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<title>rt-thread.git/libcpu/risc-v/t-head, branch serialX-dev</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
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<updated>2023-02-24T06:52:16Z</updated>
<entry>
<title>[rt-smart] handling kernel from accessing unmapped user stack (#6957)</title>
<updated>2023-02-24T06:52:16Z</updated>
<author>
<name>Shell</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2023-02-24T06:52:16Z</published>
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<id>urn:sha1:382e9bcac746b408b5b01ea2f59338428ab203dd</id>
<content type='text'>
[rt-smart] handling kernel from accessing unmapped user stack</content>
</entry>
<entry>
<title>[fixup] add cache maintenance ops;</title>
<updated>2023-02-21T00:48:49Z</updated>
<author>
<name>wangxiaoyao</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2023-02-20T05:48:00Z</published>
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<id>urn:sha1:484a0d602e8b571a9d8186d38c8b136abc4ccfc9</id>
<content type='text'>
fix bugs on cache maintenance when starting user app
</content>
</entry>
<entry>
<title>[rt-smart] PV_OFFSET as a variable (#6904)</title>
<updated>2023-02-14T15:08:32Z</updated>
<author>
<name>Shell</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2023-02-14T15:08:32Z</published>
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<id>urn:sha1:2d0974908659bd41d748e69fac0166c37b15cb02</id>
<content type='text'>
* [rt-smart/mem] remove pv_offset

* [rt-smart] list kernel space command

* [rt-smart] restore ioremap region

* [revert] restore kernel space isolation

* [rt-smart/pv_off] code format

* [rt-smart] add get_pvoff()

* [pvoffset] pvoff as constant for C codes

* [pvoff] pvoff as interfaces</content>
</entry>
<entry>
<title>为c906添加asid支持 (#6870)</title>
<updated>2023-01-28T18:08:40Z</updated>
<author>
<name>chenhy0106</name>
<email>42792255+chenhy0106@users.noreply.github.com</email>
</author>
<published>2023-01-28T18:08:40Z</published>
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<id>urn:sha1:9db73a47c45f94668bb7a5947402ec5982beedd1</id>
<content type='text'>
* [rt-smart] asid for c906</content>
</entry>
<entry>
<title>[rt-smart] porting c906 and D1s to mm (#6848)</title>
<updated>2023-01-16T00:24:03Z</updated>
<author>
<name>Shell</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2023-01-16T00:24:03Z</published>
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<id>urn:sha1:f0dadcb3c390e60463afa5892d2d65e6033d82c8</id>
<content type='text'>
* [rv64/bsp] porting to mm

* [mm] report more info for debugging

* [fix] code format

* [libcpu/c906] porting to RTOS

* [fix] using rtdbg api

* [fix] add return

* [fix] report more information for debugging

* [fix] use assert 0 for unrecoverable error</content>
</entry>
<entry>
<title>[rt-smart] kernel virtual memory management layer (#6809)</title>
<updated>2023-01-09T02:08:55Z</updated>
<author>
<name>Shell</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2023-01-09T02:08:55Z</published>
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<id>urn:sha1:7450ef6c4d71f992444d27f4a26c16f813ed8e55</id>
<content type='text'>
synchronize virtual memory system works.
adding kernel virtual memory management layer for page-based MMU enabled architecture
porting libcpu MMU codes
porting lwp memory related codes</content>
</entry>
<entry>
<title>[bsp]add new bsp-bl808 (#6824)</title>
<updated>2023-01-07T07:03:21Z</updated>
<author>
<name>flyingcys</name>
<email>flyingcys@163.com</email>
</author>
<published>2023-01-07T07:03:21Z</published>
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<id>urn:sha1:98a997c57eeefcd8c8941ff144e817125a2f720c</id>
<content type='text'>
* add new bsp-bl808

* support ARCH_RISCV_FPU_S &amp;&amp; update rtconfig.py</content>
</entry>
<entry>
<title>[rt-smart] 弱化 RT_USING_LWP，使用 RT_USING_SMART 作为宏配置 (#6740)</title>
<updated>2022-12-16T10:38:28Z</updated>
<author>
<name>guo</name>
<email>guozhanxin@rt-thread.com</email>
</author>
<published>2022-12-16T10:38:28Z</published>
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<id>urn:sha1:68ca9f07a60ad5cbe52b37b52299327b6246e7f7</id>
<content type='text'>
* [dfs] sync cromfs

* [rt-smart]Weaken RT_USING_LWP, use RT_USING_SMART as macro configuration

* [format] fix some format issue.</content>
</entry>
<entry>
<title>[rtdef] use lower-case to define attributes (#6728)</title>
<updated>2022-12-11T18:12:03Z</updated>
<author>
<name>Man, Jianting (Meco)</name>
<email>920369182@qq.com</email>
</author>
<published>2022-12-11T18:12:03Z</published>
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<id>urn:sha1:99bdf978d7fe4ec18ed50a639e15b254825c871b</id>
<content type='text'>
* [rtdef] rename RT_WEAK attribute as rt_weak

* [rtdef] rename RT_USED attribute as rt_used

* [rtdef] rename RT_SECTION attribute as rt_section

* [rtdef] rename ALIGN attribute as rt_align

* [legacy] add RT_USED ALIGN RT_SECTION RT_WEAK as legacy support</content>
</entry>
<entry>
<title>sync branch rt-smart. (#6641)</title>
<updated>2022-12-03T04:07:44Z</updated>
<author>
<name>guo</name>
<email>guozhanxin@rt-thread.com</email>
</author>
<published>2022-12-03T04:07:44Z</published>
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<id>urn:sha1:ecf2d8215961ca7c539132b62a72df6072cc3e14</id>
<content type='text'>
* Synchronize the code of the rt mart branch to the master branch.
  * TTY device
  * Add lwP code from rt-smart
  * Add vnode in DFS, but DFS will be re-write for rt-smart
  * There are three libcpu for rt-smart:
    * arm/cortex-a, arm/aarch64
    * riscv64

Co-authored-by: Rbb666 &lt;zhangbingru@rt-thread.com&gt;
Co-authored-by: zhkag &lt;zhkag@foxmail.com&gt;</content>
</entry>
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