<feed xmlns='http://www.w3.org/2005/Atom'>
<title>rt-thread.git/libcpu/risc-v/virt64/SConscript, branch copilot/remove-finish-function-export-alias</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/libcpu/risc-v/virt64/SConscript?h=copilot%2Fremove-finish-function-export-alias</id>
<link rel='self' href='http://cgit.235523.xyz/rt-thread.git/atom/libcpu/risc-v/virt64/SConscript?h=copilot%2Fremove-finish-function-export-alias'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/'/>
<updated>2024-11-27T10:04:59Z</updated>
<entry>
<title>给vector模块添加构建脚本</title>
<updated>2024-11-27T10:04:59Z</updated>
<author>
<name>heyuanjie87</name>
<email>943313837@qq.com</email>
</author>
<published>2024-11-22T03:58:18Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=d3820ed77e26759c3a3d29dad65bbcca371374c6'/>
<id>urn:sha1:d3820ed77e26759c3a3d29dad65bbcca371374c6</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu][riscv]virt64使用通用vector支持代码</title>
<updated>2024-11-27T10:04:59Z</updated>
<author>
<name>heyuanjie87</name>
<email>943313837@qq.com</email>
</author>
<published>2024-11-21T09:18:35Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=3268716c4fdd506487f89b39b09b8f5339882ae5'/>
<id>urn:sha1:3268716c4fdd506487f89b39b09b8f5339882ae5</id>
<content type='text'>
</content>
</entry>
<entry>
<title>feat: remove redundant codes under virt64, c906</title>
<updated>2024-09-13T21:35:00Z</updated>
<author>
<name>Shell</name>
<email>smokewood@qq.com</email>
</author>
<published>2024-09-12T03:14:12Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=57d002b25e26a5df950b087f0ea2dc7b6feeb7e3'/>
<id>urn:sha1:57d002b25e26a5df950b087f0ea2dc7b6feeb7e3</id>
<content type='text'>
Changes:

- create new folder name `common64` and save all common codes of rv64
  inside

Signed-off-by: Shell &lt;smokewood@qq.com&gt;
</content>
</entry>
<entry>
<title>feat: libcpu/risc-v: unify low-level bringups</title>
<updated>2024-09-11T22:06:51Z</updated>
<author>
<name>Shell</name>
<email>smokewood@qq.com</email>
</author>
<published>2024-09-02T10:03:21Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=c78a19ed264adf9a5f90180148d3d7cf441f95b1'/>
<id>urn:sha1:c78a19ed264adf9a5f90180148d3d7cf441f95b1</id>
<content type='text'>
This patch consolidates the separated architecture-specific code for
rv64 (virt64 and c906) under a more unified approach. The changes
aim to enhance maintainability and code reuse, reducing duplication
between these two architectures while adding small improvements in
porting compatibility.

Changes:
- Modified build scripts (SConscript) for both virt64 and c906 to
  remove ASID and vector dependencies when not required.
- Updated c906's sbi.c and sbi.h to use standard integer types
  (uint32_t) and include the missing &lt;stdint.h&gt; header.
- Unified inline function declaration for `sbi_call` across both
  c906 and virt64 using `rt_inline`.
- Disabled FPU and vector in c906's startup assembly file, aligning it
  with the virt64 handling.
- Corrected syscall handler type definitions in c906 for consistency.

Signed-off-by: Shell &lt;smokewood@qq.com&gt;
</content>
</entry>
<entry>
<title>[libcpu][SConscript]规范group名为libcpu</title>
<updated>2024-02-20T00:39:05Z</updated>
<author>
<name>Meco Man</name>
<email>920369182@qq.com</email>
</author>
<published>2024-02-19T19:33:47Z</published>
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<id>urn:sha1:6d4503363a352c72148bc91da3026f0db096f119</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[atomic]添加arm与risc-v下的常用原子操作函数 (#7053)</title>
<updated>2023-03-23T12:06:50Z</updated>
<author>
<name>Yaochenger</name>
<email>75192526+Yaochenger@users.noreply.github.com</email>
</author>
<published>2023-03-23T12:06:50Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=de4f23748212dbba7d0250fdac3ae583e74fcbed'/>
<id>urn:sha1:de4f23748212dbba7d0250fdac3ae583e74fcbed</id>
<content type='text'>
* Update Kconfig
* Update trap_gcc.S
* Update bsp/hifive1/drivers/SConscript

Co-authored-by: Man, Jianting (Meco) &lt;920369182@qq.com&gt;
* Update SConscript
* [atomic]提交一份arm与risc-v架构下的常用原子操作函数
* 修改变量类型
* 更新rtatomic.h与atomic_port.c
* 更新rt-thread\libcpu\arm\common\atomic_port.c
* 更新include/rtatomic.h与libcpu/arm/common/SConscript
* 更新include/rtatomic.h
* 修正格式与Kconfig
* 修正格式与文件结构

* 规范文件格式与文件重命名
* 添加测试用例与CI
* 添加函数声明
* 修改virt64/SConscript 添加atomic_riscv.c
  * 1.规范代码风格
  * 2.添加RISC-V64原子指令支持 解决在RV64下编译器将32-bit运算结果扩展为64-bit 导致判断错误
* 添加C11标准库原子操作测试

---------

Co-authored-by: Man, Jianting (Meco) &lt;920369182@qq.com&gt;</content>
</entry>
<entry>
<title>add qemu-riscv-virt64 bsp</title>
<updated>2021-05-18T01:57:25Z</updated>
<author>
<name>lizhirui</name>
<email>exiis@126.com</email>
</author>
<published>2021-05-18T01:57:25Z</published>
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<id>urn:sha1:5036816967c3e3a3fb72d7f27024641d32bad0e2</id>
<content type='text'>
add qemu-riscv-virt64 bsp
</content>
</entry>
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