rt-thread.git/libcpu/risc-v/virt64/cache.h, branch v5.2.2-beta

[ci] fix errors under strick compiling mode

2024-02-20T00:39:05Z

[rt-smart] testcase & improvements for memory management (#7099)

2023-03-30T00:25:15Z

* [utest/mm] add testcase for create/init format codes of create/init in components/mm * [libcpu/aarch64] fix user stack check routine * [kservice] export API for utest * [utest/mm] testcase for aspace_map format & modify the files under components/mm related with aspace_map * [lwp/user_mm] add user_map_varea for mmap feature * [mm] rename rt_mm_fault_try_fix to rt_aspace_fault_try_fix * [utest/mm] testcase for synchronization * [mm] modify unmap api to improve throughput * [utest/mm] testcases for cache and varea map * [format] remove extra space * [utest/mm] fix testcase problem in header * [lwp] extend map_user_varea with a flag * [utest/mm] testcase for lwp_map_user_varea * [libcpu/arm/cortex-a] fix kernel space layout * [utest/mm] adjust for armv7 arch

[rt-smart] move sys_cacheflush to lwp_syscall.c (#7048)

2023-03-17T07:11:38Z

* [syscall] move sys_cacheflush to lwp_syscall.c * [syscall] improve assertion * [format] rename to rt_ctassert * [debug] modified ct assertion on mm_page.c

[fixup] add cache maintenance ops;

2023-02-21T00:48:49Z

fix bugs on cache maintenance when starting user app

sync branch rt-smart. (#6641)

2022-12-03T04:07:44Z

* Synchronize the code of the rt mart branch to the master branch. * TTY device * Add lwP code from rt-smart * Add vnode in DFS, but DFS will be re-write for rt-smart * There are three libcpu for rt-smart: * arm/cortex-a, arm/aarch64 * riscv64 Co-authored-by: Rbb666 Co-authored-by: zhkag