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<title>rt-thread.git/libcpu/risc-v/virt64/startup_gcc.S, branch riscv64</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/libcpu/risc-v/virt64/startup_gcc.S?h=riscv64</id>
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<updated>2024-06-18T03:15:59Z</updated>
<entry>
<title>[libcpu] rv64: support for ARCH_REMAP_KERNEL (#9067)</title>
<updated>2024-06-18T03:15:59Z</updated>
<author>
<name>Shell</name>
<email>smokewood@qq.com</email>
</author>
<published>2024-06-18T03:15:59Z</published>
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<id>urn:sha1:65c99472253051521eaa5a670085b2cc0da4be3e</id>
<content type='text'>
* [libcpu] support for ARCH_REMAP_KERNEL

These changes introduce support for the ARCH_REMAP_KERNEL configuration,
which isolates kernel space in high virtual address regions. This feature
is necessary to enhance memory protection and management by segregating
user and kernel spaces more effectively.

Changes:
- Updated conditional macros to check for ARCH_REMAP_KERNEL instead of
  ARCH_KERNEL_IN_HIGH_VA in board initialization files to reflect the new
  configuration option.
- Modified qemu-virt64-riscv Kconfig and SConstruct files to include and
  utilize ARCH_REMAP_KERNEL.
- Created a new linker script `link_smart.lds` for smart linking in qemu-virt64-riscv.
- Updated rtconfig.py to use a more flexible execution path setup.
- Enhanced user address space definitions in `lwp_arch.h` to support the
  new virtual address mappings.
- Adjusted kernel memory initialization and mapping logic in `c906/mmu.c`
  and `virt64/mmu.c` to account for high virtual address regions.
- Added Kconfig option to enable ARCH_REMAP_KERNEL for RISCV64 architectures.
- Enhanced memory setup functions to support new mapping scheme, including
  updates to early page table setup and address relocation logic.

These modifications ensure that the system can utilize high memory
addresses for the kernel, improving memory isolation and system stability.

Signed-off-by: Shell &lt;smokewood@qq.com&gt;

* fixup: CI run failed

* bsp: default config without using smart

* fixup: static checks

* restore rt_hw_mmu_kernel_map_init for D1

---------

Signed-off-by: Shell &lt;smokewood@qq.com&gt;</content>
</entry>
<entry>
<title>[libcpu/riscv/virt64] fix (#5979) (#7040)</title>
<updated>2023-03-11T04:34:14Z</updated>
<author>
<name>zilong</name>
<email>52786674+zilongmix@users.noreply.github.com</email>
</author>
<published>2023-03-11T04:34:14Z</published>
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<id>urn:sha1:50e1f6327d2e03b887dfbff0af2dd87fd41d4d48</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[rt-smart] porting c906 and D1s to mm (#6848)</title>
<updated>2023-01-16T00:24:03Z</updated>
<author>
<name>Shell</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2023-01-16T00:24:03Z</published>
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<id>urn:sha1:f0dadcb3c390e60463afa5892d2d65e6033d82c8</id>
<content type='text'>
* [rv64/bsp] porting to mm

* [mm] report more info for debugging

* [fix] code format

* [libcpu/c906] porting to RTOS

* [fix] using rtdbg api

* [fix] add return

* [fix] report more information for debugging

* [fix] use assert 0 for unrecoverable error</content>
</entry>
<entry>
<title>[rt-smart] kernel virtual memory management layer (#6809)</title>
<updated>2023-01-09T02:08:55Z</updated>
<author>
<name>Shell</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2023-01-09T02:08:55Z</published>
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<id>urn:sha1:7450ef6c4d71f992444d27f4a26c16f813ed8e55</id>
<content type='text'>
synchronize virtual memory system works.
adding kernel virtual memory management layer for page-based MMU enabled architecture
porting libcpu MMU codes
porting lwp memory related codes</content>
</entry>
<entry>
<title>sync branch rt-smart. (#6641)</title>
<updated>2022-12-03T04:07:44Z</updated>
<author>
<name>guo</name>
<email>guozhanxin@rt-thread.com</email>
</author>
<published>2022-12-03T04:07:44Z</published>
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<id>urn:sha1:ecf2d8215961ca7c539132b62a72df6072cc3e14</id>
<content type='text'>
* Synchronize the code of the rt mart branch to the master branch.
  * TTY device
  * Add lwP code from rt-smart
  * Add vnode in DFS, but DFS will be re-write for rt-smart
  * There are three libcpu for rt-smart:
    * arm/cortex-a, arm/aarch64
    * riscv64

Co-authored-by: Rbb666 &lt;zhangbingru@rt-thread.com&gt;
Co-authored-by: zhkag &lt;zhkag@foxmail.com&gt;</content>
</entry>
<entry>
<title>[asm] 解决tab和空格混用的问题</title>
<updated>2022-01-20T12:57:35Z</updated>
<author>
<name>Meco Man</name>
<email>920369182@qq.com</email>
</author>
<published>2022-01-18T05:35:13Z</published>
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<id>urn:sha1:563e49890c597c53adba954063c37b03644c5c69</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu] fix s-mode issue</title>
<updated>2021-10-19T06:35:22Z</updated>
<author>
<name>BernardXiong</name>
<email>bernard.xiong@gmail.com</email>
</author>
<published>2021-10-19T06:35:22Z</published>
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<id>urn:sha1:6b66207048df5d5e07c3d7158939f0575a981c14</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Support for running with M-Mode</title>
<updated>2021-05-21T09:10:07Z</updated>
<author>
<name>bigmagic</name>
<email>fujin.zhao@foxmail.com</email>
</author>
<published>2021-05-21T09:03:30Z</published>
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<id>urn:sha1:b7c7c7f4dec7ec3708ff056b3d12c9750c835f38</id>
<content type='text'>
</content>
</entry>
<entry>
<title>add qemu-riscv-virt64 bsp</title>
<updated>2021-05-18T01:57:25Z</updated>
<author>
<name>lizhirui</name>
<email>exiis@126.com</email>
</author>
<published>2021-05-18T01:57:25Z</published>
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<id>urn:sha1:5036816967c3e3a3fb72d7f27024641d32bad0e2</id>
<content type='text'>
add qemu-riscv-virt64 bsp
</content>
</entry>
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