rt-thread.git/libcpu/risc-v/virt64/tick.h, branch copilot/remove-vbus-code-implementation

feat: remove redundant codes under virt64, c906

2024-09-13T21:35:00Z

Changes: - create new folder name `common64` and save all common codes of rv64 inside Signed-off-by: Shell

[libcpu/rv64] feat: unify tick.c

2024-07-15T04:06:39Z

The changes unify the tick.c implementations for all risc-v64 architectures, leveraging the CPUTIME feature. This refactoring was necessary to streamline the codebase, and ensure consistent timer handling across different platforms. Changes: - Updated `Kconfig` in `bsp/cvitek/cv18xx_risc-v` to fix formatting issues. - Updated .config for BSPs to update `CPUTIME_TIMER_FREQ` - Updated header of for API `riscv_cputime_init` - Initialized riscv timer on `rt_hw_tick_init` - Refactored `tick.c` and `tick.h` in `libcpu/risc-v/t-head/c906` and `libcpu/risc-v/virt64`: - Replaced direct use of `rdtime` with `clock_cpu_gettime`. - Removed redundant timer frequency definitions. - Added static assertions to check the value of `CPUTIME_TIMER_FREQ`. - Initialized `tick_cycles` based on `CPUTIME_TIMER_FREQ`. - Integrated `ktime` support for tick initialization. Signed-off-by: Shell Reviewed-on: https://github.com/RT-Thread/rt-thread/pull/9164 Reviewed-by: Chen Wang

sync branch rt-smart. (#6641)

2022-12-03T04:07:44Z

* Synchronize the code of the rt mart branch to the master branch. * TTY device * Add lwP code from rt-smart * Add vnode in DFS, but DFS will be re-write for rt-smart * There are three libcpu for rt-smart: * arm/cortex-a, arm/aarch64 * riscv64 Co-authored-by: Rbb666 Co-authored-by: zhkag

format code

2021-05-21T10:39:41Z

Support for running with M-Mode

2021-05-21T09:10:07Z

add qemu-riscv-virt64 bsp

2021-05-18T01:57:25Z

add qemu-riscv-virt64 bsp