rt-thread.git/libcpu/risc-v, branch v4.0.0
Unnamed repository; edit this file 'description' to name the repository.
http://cgit.235523.xyz/rt-thread.git/atom/libcpu/risc-v?h=v4.0.0
2019-01-06T22:09:45Z
[libcpu] Add SConscript in libcpu.
2019-01-06T22:09:45Z
Bernard Xiong
bernard.xiong@gmail.com
2019-01-06T22:09:45Z
urn:sha1:bde47018b8327fb8106c68e84a719a97243a1653
add k210 SMP support
2018-12-28T01:41:18Z
shaojinchun
shaojinchun@rt-thread.com
2018-12-28T01:06:32Z
urn:sha1:86c76b0e8a4486dec13d61ee3ca68379b947dfb5
[bsp][k210] Add get_free_heap_size function.
2018-12-23T06:11:25Z
Bernard Xiong
bernard.xiong@gmail.com
2018-12-23T06:11:25Z
urn:sha1:597d71cc032bf30098c2a5f890eec48ce5ff418d
* Add get_free_heap_size function;
* Increase shell stack for KPU module.
[libcpu] Add k210 BSP.
2018-12-18T13:01:03Z
Bernard Xiong
bernard.xiong@gmail.com
2018-12-18T13:01:03Z
urn:sha1:5e0f8cb3aa0d9459985bf0345eef0192857d1b41
[libcpu][risc-v] fix rt_thread_switch_interrupt_flag issue.
2018-12-15T03:47:59Z
Bernard Xiong
bernard.xiong@gmail.com
2018-12-15T03:47:59Z
urn:sha1:885d99ee9b76bfdd838d5b3f358137fe255d92e7
[libcpu][risc-v] fix the rt_thread_switch_interrupt_flag issue
2018-12-15T03:47:10Z
Bernard Xiong
bernard.xiong@gmail.com
2018-12-15T03:47:10Z
urn:sha1:fd347fdb9026af8f2b15d362c1118cab46ffc2c9
[libcpu] Fix the E310 compiling issue.
2018-12-08T09:08:52Z
Bernard Xiong
bernard.xiong@gmail.com
2018-12-08T09:08:52Z
urn:sha1:08521ceaa54875d35ac53f2741a20d7dd822d30d
[BSP] Add RV32M1_VEGA BSP.
2018-12-08T02:44:56Z
Bernard Xiong
bernard.xiong@gmail.com
2018-12-08T02:44:56Z
urn:sha1:c9576c3e538770a2d1d9f62ab64940b71bd7ad0f
[BSP] Update Hifive1 BSP with unified RV porting.
2018-12-08T02:42:40Z
Bernard Xiong
bernard.xiong@gmail.com
2018-12-08T02:42:40Z
urn:sha1:36b194aeb6c1f4c3335af6d8ba94bb66f0e48dda
[libcpu] Add unified RISC-V libcpu porting.
2018-12-08T02:41:38Z
Bernard Xiong
bernard.xiong@gmail.com
2018-12-08T02:41:38Z
urn:sha1:2a7d814f77a42da4dc126a9e75f6e8705f6bf0cd