rt-thread.git/libcpu/risc-v, branch v5.2.0-beta

[libcpu][riscv] add a doc for wch saving the irq stack as stack-512 (#10063)

2025-03-10T14:48:27Z

[libcpu][risc-v]add comments for rv64 sv39 mmu APIs. (#10053)

2025-03-10T14:47:50Z

[bugfix][risc-v]fix the PPN length error in GET_PPN(pte). (#10020)

2025-03-10T14:47:03Z

libcpu: riscv: fixed ARCH_RISCV_VECTOR issue

2025-03-10T14:44:46Z

description: Using the vector instruction set to trigger an illegal instruction exception when ARCH_SISCV_VECTOR=y. analysis: When initializing the thread stack, the rt_cw_stack_init function did not enable VS for SSTATUS. Solution: When ARCH_SISCV_VECTOR=y, increment the initial value of sstatus by 0x600(SSTATUS_VS). Signed-off-by: Liu Gui

libcpu: riscv: rv64: fixed warnings

2025-01-30T01:28:38Z

When building bsp/cvitek/c906_little, compiler reports: ``` .../rt-thread/libcpu/risc-v/rv64/trap.c: In function 'handle_trap': .../rt-thread/libcpu/risc-v/rv64/trap.c:106:13: warning: implicit declaration of function 'rt_hw_tick_isr'; did you mean 'rt_hw_stack_init'? [-Wimplicit-function-declaration] 106 | rt_hw_tick_isr(); | ^~~~~~~~~~~~~~ | rt_hw_stack_init .../rt-thread/libcpu/risc-v/rv64/trap.c:110:13: warning: implicit declaration of function 'rt_hw_irq_isr'; did you mean 'rt_hw_soft_irq_isr'? [-Wimplicit-function-declaration] 110 | rt_hw_irq_isr(); | ^~~~~~~~~~~~~ | rt_hw_soft_irq_isr ``` rt_hw_tick_isr()/rt_hw_irq_isr() are implemented by bsp, but libcpu/risc-v/rv64 doesn't declare them, so compiler warns. There are three BSPs using 'rv64' (libcpu/risc-v/rv64): - `bsp/cvitek/c906_little/rtconfig.py` - `bsp/juicevm/rtconfig.py` - `bsp/k210/rtconfig.py` `handle_trap` in `libcpu/risc-v/rv64` is defined as weak. BSP can use this function directly or define and overload it by itself. If bsp use this function directly, bsp need to pay attention to the fact that three functions will be called in this function: - `rt_hw_soft_irq_isr` - `rt_hw_tick_isr` - `rt_hw_irq_isr` In `libcpu/risc-v/rv64`, `rt_hw_soft_irq_isr` has a weak definition, while the other two do not. This means that if the bsp does not overload `handle_trap`, bsp must define `rt_hw_tick_isr` and `rt_hw_irq_isr` itself. This is also the practice of `bsp/cvitek/c906_little`. There is also a similar bsp `bsp/k210`, and the form of `bsp/juicevm` implements `handle_trap` by itself. It seems that `rt_hw_tick_isr` and `rt_hw_irq_isr` are not required to be implemented by all BSPs using `libcpu/risc-v/rv64`. The premise for BSP to implement them is that it does not overload `handle_trap`. So declaring `rt_hw_tick_isr` and `rt_hw_irq_isr` with extern in `libcpu/risc-v/rv64` is not proper. In addition, the `rt_hw_tick_isr/rt_hw_irq_isr` are only used by `libcpu/risc-v/rv64`, so it is not worth putting the declaration in `./include/rthw.h`. Sum up, the best solution is to add weak definition to `rt_hw_tick_isr/rt_hw_irq_isr` as existing `rt_hw_soft_irq_isr`. Signed-off-by: Chen Wang

libcpu: riscv: common: fixed build warnings

2025-01-30T01:28:38Z

When building bsp/cvitek/c906_little, compiler warns: ``` .../rt-thread/libcpu/risc-v/common/trap_common.c: In function 'rt_hw_interrupt_install': .../rt-thread/libcpu/risc-v/common/trap_common.c:50:11: warning: unused variable 'user_param' [-Wunused-variable] 50 | void *user_param = param; | ^~~~~~~~~~ .../rt-thread/libcpu/risc-v/common/trap_common.c: In function 'rt_rv32_system_irq_handler': .../rt-thread/libcpu/risc-v/common/trap_common.c:77:25: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] 77 | s_stack_frame = (rt_hw_stack_frame_t *)mscratch; | ^ ``` Fixed these warnings as per indication from gcc. Signed-off-by: Chen Wang

bsp: qemu-virt64-riscv: remove config RISCV_S_MODE

2025-01-10T09:14:13Z

RISCV_S_MODE configuration only affects the code in libcpu/risc-v/virt64, and the only bsp using this libcpu is qemu-virt64-riscv. Considering s-mode is the default mode RT-Thread running on virt64 machine, it seems unnecessary to make RISCV_S_MODE a Kconfig option. Solution: Remove RISCV_S_MODE from Kconfig and define it as a macro in the code in libcpu/risc-v/virt64. Plus, due to this macro is only related to virt64, rename RISCV_S_MODE to RISCV_VIRT64_S_MODE. Update the .config/rtconfig.h in this patch. Signed-off-by: Chen Wang

[libcpu/riscv]解决smp下cpuport.h中的编译问题 (#9714)

2024-11-29T01:39:41Z

给vector模块添加构建脚本

2024-11-27T10:04:59Z

[libcpu][riscv]virt64使用通用vector支持代码

2024-11-27T10:04:59Z