rt-thread.git/libcpu/ti-dsp/c28x, branch v4.0.2 Unnamed repository; edit this file 'description' to name the repository. http://cgit.235523.xyz/rt-thread.git/atom/libcpu/ti-dsp/c28x?h=v4.0.2 2019-08-24T10:42:54Z [bsp][tms320f28379d] Fix an issue that interrupts are disabled in the thread 2019-08-24T10:42:54Z xuzhuoyi xzy476386434@vip.qq.com 2019-08-24T10:42:54Z urn:sha1:a101327d24f9deed087e8c1421ca50b9f45e4203 [libcpu][c28x]Add __rt_ffs support 2019-07-03T11:31:54Z 明德无敌赵晓薇 1755923166@qq.com 2019-07-03T11:31:54Z urn:sha1:d68220d8667462339640cfda2f3d80484bd1f8db Use a native instruction "Count Sign Bits" to support fast ffs function, then add __rt_ffs support in C28x. [libcpu][C28x] Fix bugs of old c28x interrupt api which can not save and restore int status 2019-06-18T12:59:00Z 明德无敌赵晓薇 1755923166@qq.com 2019-06-18T12:59:00Z urn:sha1:21d32cdb3abe15f495b88cfaa18e1441357137ed In C28x DSP, interrupt status are stored in ST1 register. Both INTM and DBGM is used for masking interrupt, while the latter one is used in real-time debug mode. The origin function rudely enable and disable the interrupt without considering the recent interrupt status, which not only may cause problem in some situation but also is not in conformity with rt-thread design specifications. The new api will fix this bug. [bsp][tms320f28379d] Fix FPU config problem 2019-04-14T04:26:25Z xuzhuoyi xzy476386434@vip.qq.com 2019-04-14T04:26:25Z urn:sha1:752152b63e5b8f3a82de7b39255712f41e7efac2 [bsp][tms320f28379d] Add finsh init in rt_init_thread 2019-04-10T14:33:25Z xuzhuoyi xzy476386434@vip.qq.com 2019-04-10T14:33:25Z urn:sha1:4acd8db61eb366878b849716db25558abaa5325b [libcpu] Add SConscript in libcpu. 2019-01-06T22:09:45Z Bernard Xiong bernard.xiong@gmail.com 2019-01-06T22:09:45Z urn:sha1:bde47018b8327fb8106c68e84a719a97243a1653 [bsp][tms320f28379d] Classify c28x into ti-dsp 2018-11-24T09:41:55Z xuzhuoyi xzy476386434@vip.qq.com 2018-11-24T09:41:55Z urn:sha1:6c081947b5c68819cc5ba9fd058e7bd29e9ca62a