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<title>rt-thread.git/libcpu, branch revert-11186-master</title>
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<updated>2026-01-31T09:44:27Z</updated>
<entry>
<title>[components][clock_time] Refactor time subsystem around clock_time (#11111)</title>
<updated>2026-01-31T09:44:27Z</updated>
<author>
<name>Bernard Xiong</name>
<email>bernard.xiong@gmail.com</email>
</author>
<published>2026-01-31T09:44:27Z</published>
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<id>urn:sha1:743b614875fc33257be47ab53b6c5e040ec27893</id>
<content type='text'>
* [components][clock_time] Refactor time subsystem around clock_time

Introduce the clock_time core with clock source/event separation, high-resolution scheduling, and boot-time helpers, plus clock_timer adapters for timer peripherals.

Remove legacy ktime/cputime/hwtimer implementations and migrate arch and BSP time paths to the new subsystem while keeping POSIX time integration functional.

Update drivers, Kconfig/SConscript wiring, documentation, and tests; add clock_time overview docs and align naming to clock_boottime/clock_hrtimer/clock_timer.

* [components][clock_time] Use BSP-provided clock timer frequency on riscv64

* [risc-v] Use runtime clock timer frequency for tick and delays

* [bsp] Add clock timer frequency hooks for riscv64 boards

* [bsp] Update Renesas RA driver doc clock_timer link

* [bsp] Sync zynqmp-r5-axu4ev rtconfig after config refresh

* [bsp][rk3500] Update rk3500 clock configuration

* [bsp][hpmicro] Add rt_hw_us_delay hook and update board delays

* [bsp][stm32l496-st-nucleo] enable clock_time for hwtimer sample in ci

* [bsp][hpmicro] Fix rtconfig include scope for hpm6750evk

Move rtconfig.h include outside the ENET_MULTIPLE_PORT guard for hpm6750evk and hpm6750evk2 so configuration macros are available regardless of ENET settings.

* [bsp][raspi3] select clock time for systimer

* [bsp][hpm5300evk] Trim trailing blank line

* [bsp][hpm5301evklite] Trim trailing blank line

* [bsp][hpm5e00evk] Trim trailing blank line

* [bsp][hpm6200evk] Trim trailing blank line

* [bsp][hpm6300evk] Trim trailing blank line

* [bsp][hpm6750evk] Trim trailing blank line

* [bsp][hpm6750evk2] Trim trailing blank line

* [bsp][hpm6750evkmini] Trim trailing blank line

* [bsp][hpm6800evk] Trim trailing blank line

* [bsp][hpm6e00evk] Trim trailing blank line

* [bsp][nxp] switch lpc178x to gcc and remove mcx timer source

* [bsp][stm32] fix the CONFIG_RT_USING_CLOCK_TIME issue.

* [docs][clock_time] add clock time documentation

* [docs][clock_time] Update clock time subsystem documentation

- Update device driver index to use correct page reference
- Clarify upper layer responsibilities in architecture overview
- Update README to describe POSIX/libc, Soft RTC, and device driver usage
- Refine architecture diagram with improved layout and color scheme
- Remove obsolete clock_timer.md file

* [kernel][utest] Trim trailing space

* [clock_time] Fix hrtimer wrap handling

* [clock_time] fix the static rt_inline issue

* [clock_time] fix the rt_clock_hrtimer_control result issue</content>
</entry>
<entry>
<title>[libcpu][aarch64] Replace x8 with a callee-saved register</title>
<updated>2026-01-13T05:42:26Z</updated>
<author>
<name>Tang Qingmei</name>
<email>qingmeytang@163.com</email>
</author>
<published>2025-12-27T14:17:43Z</published>
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<id>urn:sha1:6c2b9a8f20c4524d796312016242d4362eeb5796</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[risc-v][common64] Make rt_hw_cpu_shutdown weak to resolve multiple definition with RT_USING_DM (#11100)</title>
<updated>2026-01-12T09:15:42Z</updated>
<author>
<name>Copilot</name>
<email>198982749+Copilot@users.noreply.github.com</email>
</author>
<published>2026-01-12T09:15:42Z</published>
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<id>urn:sha1:570cc035793aff077ca473a41994a452889b024e</id>
<content type='text'>
* Initial plan

* [risc-v][common64] Make rt_hw_cpu_shutdown weak to fix multiple definition error

Co-authored-by: BernardXiong &lt;1241087+BernardXiong@users.noreply.github.com&gt;

---------

Co-authored-by: copilot-swe-agent[bot] &lt;198982749+Copilot@users.noreply.github.com&gt;
Co-authored-by: BernardXiong &lt;1241087+BernardXiong@users.noreply.github.com&gt;</content>
</entry>
<entry>
<title>[libcpu][arm][cortex-a] Fixup mmu setup early</title>
<updated>2026-01-10T05:30:09Z</updated>
<author>
<name>laidene</name>
<email>228526434@qq.com</email>
</author>
<published>2025-12-26T02:42:15Z</published>
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<id>urn:sha1:68a5c6a83b2b944d23dbcec1e6f31d846814b753</id>
<content type='text'>
	Correct the starting virtual address of _reset alignment to 16MB
</content>
</entry>
<entry>
<title>Update libcpu/arm/cortex-a/gic.c</title>
<updated>2026-01-09T02:19:52Z</updated>
<author>
<name>laidene</name>
<email>228526434@qq.com</email>
</author>
<published>2026-01-09T01:06:31Z</published>
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<id>urn:sha1:9c60c5fb067cbe4cd7ad643405957ce3fac3eeaf</id>
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</content>
</entry>
<entry>
<title>[docs][libcpu][arm][cortex-a] add comment for gic.c</title>
<updated>2026-01-09T02:19:52Z</updated>
<author>
<name>laidene</name>
<email>228526434@qq.com</email>
</author>
<published>2026-01-06T07:14:02Z</published>
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<id>urn:sha1:ff5c5eab6ba6c76aa7aa57340eb02a22a35b6d1e</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[docs][libcpu][arm][cortex-a] add comment for mmu.h (#11104)</title>
<updated>2026-01-04T09:03:20Z</updated>
<author>
<name>caicunjun</name>
<email>73829869+laidene@users.noreply.github.com</email>
</author>
<published>2026-01-04T09:03:20Z</published>
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<id>urn:sha1:a73f5d103263740263e839970e957e6d02d18fb5</id>
<content type='text'>
* [docs][libcpu][arm][cortex-a] add comment for mmu.h

* [docs][libcpu][arm][cortex-a] beautify comment for mmu.h

* [docs][libcpu][arm][cortex-a] delete extra space at the end of lines</content>
</entry>
<entry>
<title> [docs][libcpu][arm][cortex-a] update comment for start_gcc.S #11089</title>
<updated>2025-12-26T13:04:23Z</updated>
<author>
<name>caicunjun</name>
<email>73829869+laidene@users.noreply.github.com</email>
</author>
<published>2025-12-26T13:04:23Z</published>
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<id>urn:sha1:71d802c415262862734ce3c70573e512903083a6</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu][aarch64] Update for DM</title>
<updated>2025-12-19T13:18:54Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2025-12-17T07:11:39Z</published>
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<id>urn:sha1:77fbed5744872a825ce71222796b9bdcee30526c</id>
<content type='text'>
1. PSCI port to system power.
2. Support builtin fdt.
3. Update system aspace size.
4. Support DMA memory probe.
5. Fixup not backtrace in Serror for device bus fault.

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;
</content>
</entry>
<entry>
<title>update: [libcpu][risc-v][common] allow overriding isr numbers for MCU</title>
<updated>2025-12-11T09:04:14Z</updated>
<author>
<name>Fan YANG</name>
<email>fan.yang@hpmicro.com</email>
</author>
<published>2025-12-11T04:14:49Z</published>
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<id>urn:sha1:7330df69f6e10be7464932ef246c078dd894550b</id>
<content type='text'>
- allow overriding the isr numbers via RT_HW_ISR_NUM macro

Signed-off-by: Fan YANG &lt;fan.yang@hpmicro.com&gt;
</content>
</entry>
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