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<title>rt-thread.git/libcpu, branch v4.1.0</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/libcpu?h=v4.1.0</id>
<link rel='self' href='http://cgit.235523.xyz/rt-thread.git/atom/libcpu?h=v4.1.0'/>
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<updated>2022-03-29T14:18:05Z</updated>
<entry>
<title>[libcpu/risc-v] 修复risc-v scons编译中间文件不能输出到build/kernel/libcpu目录问题 (#5736)</title>
<updated>2022-03-29T14:18:05Z</updated>
<author>
<name>blta</name>
<email>blta@users.noreply.github.com</email>
</author>
<published>2022-03-29T14:18:05Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=ce602a6e4aab2279a648cb51d01fb2ed0a7f9289'/>
<id>urn:sha1:ce602a6e4aab2279a648cb51d01fb2ed0a7f9289</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu/aarch64] add gicv3 support and bsp/rockchip/rk3568 (#5722)</title>
<updated>2022-03-29T03:08:25Z</updated>
<author>
<name>GUI</name>
<email>39894654+GuEe-GUI@users.noreply.github.com</email>
</author>
<published>2022-03-29T03:08:25Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=f587a55bc2006f4316383425d518b734e42bb4a2'/>
<id>urn:sha1:f587a55bc2006f4316383425d518b734e42bb4a2</id>
<content type='text'>
* [libcpu/aarch64] add smp support

* [libcpu/aarch64] rt_hw_trap_irq get irq instead of iar when using gicv2

* [libcpu/aarch64] disable irq/fiq when switch thread

* [libcpu/aarch64] add gtimer frq set and stack align

* [libcpu/aarch64] add gicv3 support and bsp/rockchip/rk3568</content>
</entry>
<entry>
<title>[libcpu/arm/cortex-m33]fix syscall_iar.S compiler error  (#5719)</title>
<updated>2022-03-28T02:38:46Z</updated>
<author>
<name>ACM32_MCU</name>
<email>90822414+ACM32-MCU@users.noreply.github.com</email>
</author>
<published>2022-03-28T02:38:46Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=9779963c6db540b7d38eb05e3ea63d4568517a8f'/>
<id>urn:sha1:9779963c6db540b7d38eb05e3ea63d4568517a8f</id>
<content type='text'>
* 1. 新增了i2c/spi/rtc/crypto等驱动；2. 删除了部分文件中的未使用到的头文件包含; 3. 修改keil编译时pm文件atoi的头文件stdlib未包含的警告

* 修改文件格式

* BSP

1. 修改f4系列bsp的readme文件与工程文件
2. 修改f0系列源文件的版权信息、删除目前没有的库文件。
3. 其他

* 修改IAR环境下arm cortex-m33内核的syscall_iar.S文件编译错误

* 还原.gitignore文件

Co-authored-by: aisino2200 &lt;90822414+aisino2200@users.noreply.github.com&gt;</content>
</entry>
<entry>
<title>Merge remote-tracking branch 'rtt_gitee/gitee_master'</title>
<updated>2022-03-12T16:14:47Z</updated>
<author>
<name>rtthread-bot</name>
<email>48120998+rtthread-bot@users.noreply.github.com</email>
</author>
<published>2022-03-12T16:14:47Z</published>
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<id>urn:sha1:ad5eb2e086fbd34ed0c0ff4e7907ffe218a063ec</id>
<content type='text'>
</content>
</entry>
<entry>
<title>优化bsp/simulator自动初始化 (#5634)</title>
<updated>2022-03-08T04:03:41Z</updated>
<author>
<name>张世争</name>
<email>zhangshizheng@rt-thread.com</email>
</author>
<published>2022-03-08T04:03:41Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=7746d288d73bf008d9ccb036832442c7bc3b888b'/>
<id>urn:sha1:7746d288d73bf008d9ccb036832442c7bc3b888b</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu/aarch64] add gtimer frq set and stack align (#5642)</title>
<updated>2022-03-07T14:41:56Z</updated>
<author>
<name>GUI</name>
<email>39894654+GuEe-GUI@users.noreply.github.com</email>
</author>
<published>2022-03-07T14:41:56Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=0a8dd10b0bb73a8c52b7c9132bdb9ce8202a18bb'/>
<id>urn:sha1:0a8dd10b0bb73a8c52b7c9132bdb9ce8202a18bb</id>
<content type='text'>
* [libcpu/aarch64] add smp support

* [libcpu/aarch64] rt_hw_trap_irq get irq instead of iar when using gicv2

* [libcpu/aarch64] disable irq/fiq when switch thread

* [libcpu/aarch64] add gtimer frq set and stack align</content>
</entry>
<entry>
<title>update libcpu/mips/gs232/gs232.h:</title>
<updated>2022-02-22T09:48:12Z</updated>
<author>
<name>clickcheck</name>
<email>chenghuibin11@163.com</email>
</author>
<published>2022-02-22T09:48:12Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=ed9037e376d51e494cf123870c80256fa8aceb82'/>
<id>urn:sha1:ed9037e376d51e494cf123870c80256fa8aceb82</id>
<content type='text'>
更正了看门狗的寄存器地址</content>
</entry>
<entry>
<title>[libcpu/aarch64] disable irq/fiq when switch thread (#5605)</title>
<updated>2022-02-21T15:24:51Z</updated>
<author>
<name>GUI</name>
<email>39894654+GuEe-GUI@users.noreply.github.com</email>
</author>
<published>2022-02-21T15:24:51Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=9b6e75f90b1e56c075eb2bb2566dfd6843a2b5e2'/>
<id>urn:sha1:9b6e75f90b1e56c075eb2bb2566dfd6843a2b5e2</id>
<content type='text'>
* [libcpu/aarch64] add smp support

* [libcpu/aarch64] rt_hw_trap_irq get irq instead of iar when using gicv2

* [libcpu/aarch64] disable irq/fiq when switch thread</content>
</entry>
<entry>
<title>[libcpu/aarch64] rt_hw_trap_irq get irq instead of iar when using gicv2 (#5601)</title>
<updated>2022-02-16T17:00:29Z</updated>
<author>
<name>GUI</name>
<email>39894654+GuEe-GUI@users.noreply.github.com</email>
</author>
<published>2022-02-16T17:00:29Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=85dc9bd4a6e798c74f16a87bc91191907dfdbaf7'/>
<id>urn:sha1:85dc9bd4a6e798c74f16a87bc91191907dfdbaf7</id>
<content type='text'>
* [libcpu/aarch64] add smp support
* [libcpu/aarch64] rt_hw_trap_irq get irq instead of iar when using gicv2</content>
</entry>
<entry>
<title>add new bsp tms320c6678</title>
<updated>2022-01-29T08:11:42Z</updated>
<author>
<name>Man, Jianting (Meco)</name>
<email>920369182@qq.com</email>
</author>
<published>2022-01-28T18:50:04Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=71ba65e7c0fdb388aa35e019fefbbb5672d39d0a'/>
<id>urn:sha1:71ba65e7c0fdb388aa35e019fefbbb5672d39d0a</id>
<content type='text'>
原始提交PR：https://gitee.com/rtthread/rt-thread/pulls/372
提交者：https://gitee.com/wei-handong

----------------------

在TI公司C6000 DSP处理器上成功移植rt-thread操作系统；主要在libcpu/ti-dsp/c6x添加keystone架构底层代码，在bsp/ti-c6678添加bsp工程，该工程已在本人的开发板上成功运行

* 添加TMS320C6678处理器，keystone架构底层代码

* 添加支持中断栈部分代码，修改格式

* 修改汇编rt_hw_context_switch_to处关于时间槽的使用；修改格式

* 修改使用C语言构建任务栈帧，清除fls和ffs对&lt;c6x.h&gt;文件的依赖

* 修改bsp tms320c6678工程，并测试

* 删除依赖TI的KeyStone_common.c文件

* 添加编译说明

* update bsp/ti-tms320c6678/README.md.

* format code

Co-authored-by: Huang bo &lt;hb265419@126.com&gt;
Co-authored-by: hdwei &lt;1147479335@qq.com&gt;
Co-authored-by: bernard &lt;bernard.xiong@gmail.com&gt;
Co-authored-by: rtthread-bot &lt;48120998+rtthread-bot@users.noreply.github.com&gt;
Co-authored-by: Meco Man &lt;920369182@qq.com&gt;
</content>
</entry>
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