rt-thread.git/libcpu, branch v5.3.0

[libcpu] Fix RZ/N2L interrupt dispatch

2026-09-10T09:54:43Z

(cherry picked from commit fe966755e9d9b207b9271afd38e5086624328af4)

Ensure that c906 uses only the Xuantie MMU properties

2026-08-21T08:51:33Z

[bsp/raspberry-pi] update DM support

2026-08-16T11:56:03Z

- reorganize common Raspberry Pi drivers under the device framework - add the Raspberry Pi 5 BSP, configuration and documentation - add BCM2712 and DesignWare AXI DMA controller support - distinguish BCM2712 DMA32 and DMA40 channels by channel mask - restore DesignWare AXI DMA enable bits after controller reset - support a shared AXI maximum burst length across DMA channels Signed-off-by: GuEe-GUI <2991707448@qq.com>

[dm][dma] Update DMA (#11678)

2026-08-14T04:42:01Z

* [dm][dma] update DMA interface Extend DMA mapping to honor OFW dma-ranges even when no reserved memory pool is present, and add PCI host-bridge DMA-region translation for PCI devices. Prefer 32-bit-addressable allocations for translated devices, improve pool allocation fallbacks and synchronization, and establish a linear mapping for installed DMA pools when possible. Signed-off-by: GuEe-GUI <2991707448@qq.com> * [dm][dma] fixup PL330 work flow Fix PL330 channel allocation so device-tree cells select peripheral request lines rather than execution channels. Generate proper peripheral DMA microcode using DMAWFP, DMALDP, DMASTP, and DMAFLUSHP, encode burst lengths correctly, honor transfer direction and non-secure attributes, and allocate microcode from DMA-coherent memory. Signed-off-by: GuEe-GUI <2991707448@qq.com> * style: format code with clang-format * style: format complete changed files with clang-format * drivers: dma: fix diagnostic format types * style: format DMA changes for current master --------- Signed-off-by: GuEe-GUI <2991707448@qq.com>

refactor(pic): dispatch NVIC IRQs through traps

2026-08-12T04:54:50Z

fix(dm): route Cortex-M resets through power core

2026-08-12T04:54:50Z

feat(dm): support OFW on Cortex-M targets

2026-08-12T04:54:50Z

Add the ARM NVIC PIC driver, no-MMU I/O mapping, built-in FDT support, and Cortex-M CPU hooks required by the native RT-Thread device model.

Fix:Always use vmalle1is for kernel aspace; only use aside1is for user aspace with non-global PTE.

2026-06-26T09:54:38Z

[libcpu][aarch64] support DVFS idle

2026-06-23T00:02:09Z

Signed-off-by: GuEe-GUI <2991707448@qq.com>

[bsp][zynqmp-a53-dfzu2eg] enable full dm

2026-06-08T06:57:37Z

This is a builtin fdt example BSP Signed-off-by: GuEe-GUI <2991707448@qq.com>