rt-thread.git/src/scheduler_mp.c, branch v5.2.1-beta

doxygen: add prefix for groups (#9991)

2025-02-15T04:15:19Z

* doxygen: add prefix for groups Add "group_" prefix to doxygen group names. This makes it easier to grep with group name later. This patch only modifies the groups defined in the pathes of INPUT of documentation/Doxyfile: INPUT = . \ ../src \ ../include \ ../components/finsh \ ../components/drivers/include/drivers \ ../components/drivers/clk \ ../components/dfs/dfs_v2/src \ ../components/dfs/dfs_v2/include Other groups are not touched. Signed-off-by: Chen Wang * ci: fixed error report when run file_check.py Such as: - "please delete extra space at the end of this line." - "the RT-Thread error code should return negative value. e.g. return -RT_ERROR" Signed-off-by: Chen Wang --------- Signed-off-by: Chen Wang

feat: arm64: update thread self on sp-switch

2024-10-11T04:09:01Z

This patch improves the atomicity of context switching by ensuring that the stack pointer (sp) and thread self updates occur simultaneously. This enhancement is crucial for maintaining thread safety and preventing potential inconsistencies during context switches. Changes: - Modified `cpuport.h` to use `ARM64_THREAD_REG` for thread self access. - Added an `update_tidr` macro in `context_gcc.S` to streamline thread ID updates. - Adjusted `rt_hw_context_switch_to` and `rt_hw_context_switch` to call `update_tidr`, ensuring atomic updates during context switches. - Cleaned up `scheduler_mp.c` by removing redundant thread self assignments. Signed-off-by: Shell

[arm64] add hw thread self (#8942)

2024-05-28T06:27:55Z

* [libcpu] arm64: Add hardware thread_self support This patch introduces hardware-based thread self-identification for the AArch64 architecture. It optimizes thread management by using hardware registers to store and access the current thread's pointer, reducing overhead and improving overall performance. Changes include: - Added `ARCH_USING_HW_THREAD_SELF` configuration option. - Modified `rtdef.h`, `rtsched.h` to conditionally include `critical_switch_flag` based on the new config. - Updated context management in `context_gcc.S`, `cpuport.h` to support hardware-based thread self. - Enhanced `scheduler_mp.c` and `thread.c` to leverage the new hardware thread self feature. These modifications ensure better scheduling and thread handling, particularly in multi-core environments, by minimizing the software overhead associated with thread management. Signed-off-by: Shell * fixup: address suggestion * fixup: rt_current_thread as global * scheduler: add cpu object for UP scheduler Also, maintain the rt_current_thread in cpu object on UP scheduler. --------- Signed-off-by: Shell

[libcpu/arm64] add C11 atomic ticket spinlock (#8882)

2024-05-16T07:45:12Z

* [libcpu/arm64] add C11 atomic ticket spinlock Replace the former implementation of flag-based spinlock which is unfair Besides, C11 atomic implementation is more readable (it's C anyway), and maintainable. Cause toolchain can use their builtin optimization and tune for different micro-architectures. For example armv8.5 introduces a better instruction. The compiler can help with that when it knows your target platform in support of it. Signed-off-by: Shell * fixup: RT_CPUS_NR --------- Signed-off-by: Shell

[src][thread]bind cpu fixup (#8872)

2024-04-28T07:19:50Z

bind cpu fixup

fixup: add Kconfig option

2024-04-20T01:30:12Z

[kernel] remove redundant _scheduler_stack_check

2024-03-21T02:26:41Z

[fixup] check NULL pointer before access (#8573)

2024-03-02T08:05:19Z

Signed-off-by: Shell

🎯 Sync smart & scheduler codes (#8537)

2024-02-23T09:49:15Z

Signed-off-by: Shell Co-authored-by: xqyjlj

[ci] fix errors under strick compiling mode

2024-02-20T00:39:05Z