rt-thread.git/tools/ci/toolchain_bsp.yml, branch master

[bsp][esp32] adapt C3/C6 to ESP-IDF v6.1 and bump RISC-V toolchain to gcc 15.2 (#11870)

2026-10-22T07:42:35Z

* [bsp][esp32] adapt C3/C6 to ESP-IDF v6.1 and bump RISC-V toolchain to gcc 15.2 - Adapt ESP32-C3/C6 BSP to ESP-IDF v6.1; bump RISC-V toolchain to gcc 15.2 - C6: re-enable SPI with board-local drv_spi.c; add devices.spi to CI attachconfig; drop shared drv_spi.c spi_command_t hack - C6: fix ADC oneshot multi-channel unit handle and mutex - C3: fix portTRY_ENTER_CRITICAL_SAFE expansion in portmacro.h - Compat with RT-Thread-packages/esp-idf rtt-dev used by CI: map SYSTIMER_* to SYSTIMER_LL_* (C3 and C6 board.c), accept uart_periph.h from hal/ or soc/ - Fix clang-format and cppcheck issues in the compat code Signed-off-by: seteiro Co-Authored-By: Grok * ci: retrigger after esp-idf#18 merged * bsp: ESP: fix C6 ADC for IDF 6.1 (adc_ll bus clock) Replace removed PERIPH_SARADC_MODULE with adc_ll_enable_bus_clock / adc_ll_reset_register when ESP_IDF_VERSION >= 6.0.0. --------- Signed-off-by: seteiro Co-authored-by: Grok

[bsp][esp32-c6] add ESP32-C6-DevKitC-1 support (#11836)

2026-09-28T14:22:30Z

* [bsp][esp32-c6] add ESP32-C6-DevKitC-1 support Add bsp/ESP/ESP32_C6. Default image is GPIO, UART0 and ADC. The C6 IDF sources are not in RT-Thread-packages/esp-idf yet. * [bsp][esp32-c6] fix CI format, C6 package and CH32V203 D6 build clang-format the files the format check rejected. Fetch the C6 scons branch when the downloaded ESP-IDF package has no C6 target. Patch the CH32V20x SDK under libraries so a D6 build no longer calls Exit(). * [bsp][esp32-c6] fetch mbedtls and stop pkgs from pulling the C6 branch * [bsp][esp32-c6] rebuild CI against the package branch tip * [bsp][esp32-c6] rebuild CI against the strict-mode package tip * [bsp][esp32-c6] fix the reviewed ADC, math and package pin bugs Keep the IDF tree on the reviewed commit, and stop the ADC and critical-section paths from reporting success when they did not. * [bsp][esp32-c6] reserve stuck interrupt lines and lock ADC CPU lines 3 and 4 never latch an enable, so copying the handler left the non-IRAM mask on the old line. Reserve those lines and let the allocator write the mask and the route together. The C6 oneshot registers are shared, so one mutex covers enable and convert. * [bsp][esp32-c6] list the peripherals this board actually runs GPIO, UART0 and ADC1 have been read on the DevKitC-1. Radios and the untested buses stay marked unsupported. * [bsp][esp32-c6] keep SPI unsupported after the loopback mismatch GPIO7 shorted to GPIO2 returned 0xA5000000 for a sent 0xA5, so the table does not mark SPI supported. --------- Co-authored-by: seteiro <276597748+cms19859230182-lang@users.noreply.github.com>

[bsp][ch32v203] add CH32V203C8T6-EVT-R0 support #11827

2026-09-24T08:21:11Z

[bsp][n32] n32hxxx: extend H47x_48x/H49x/H7xx driver support

2026-09-16T01:06:34Z

- libraries/N32_Drivers: add ADC/DAC/I2C/SPI config headers for the h47x_48x, h49x and h7xx series, and extend the shared drivers (adc, dac, eth, gpio, hard_i2c, nand, qspi, sdram, spi, usart, wdt). - n32h487zgl7-evb / n32h497zgl7-evb: add board ports (femc_timing, phy_reset, usb_config) and update Kconfig, SConscript, rtconfig and the IAR/Keil project files. - n32h760zil7-stb: update Kconfig and rtconfig. - CI: register the three n32hxxx boards.

[bsp][stm32] Add stm32n657-st-nucleo BSP (#11799)

2026-09-16T01:05:27Z

* [bsp][stm32] Add stm32n657-st-nucleo BSP * style: format STM32 HAL drivers and STM32N657 BSP with clang-format

bsp: rename Libraries directories to lowercase

2026-07-27T05:17:02Z

[action] add toolchain download link

2024-08-25T05:36:50Z

[action/ci] Add bsp detail python script

2024-08-25T05:36:50Z