diff options
| author | bernard.xiong <[email protected]> | 2009-12-18 06:14:43 +0000 |
|---|---|---|
| committer | bernard.xiong <[email protected]> | 2009-12-18 06:14:43 +0000 |
| commit | dbade245bfdb3863e1b852ef4fa0c7cb4d7ff40d (patch) | |
| tree | 5d871d2ba91fc1484144eee341ef78672fcac2fb | |
| parent | 9d94c390320a646c65c93125b1e30ec28cce804b (diff) | |
update debug project file and MMU file.
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@211 bbd45198-f89e-11dd-88c7-29a3b14d5316
| -rw-r--r-- | bsp/mini2440/Ext_RAM.ini | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/bsp/mini2440/Ext_RAM.ini b/bsp/mini2440/Ext_RAM.ini new file mode 100644 index 0000000000..12ed66d4db --- /dev/null +++ b/bsp/mini2440/Ext_RAM.ini @@ -0,0 +1,60 @@ +/******************************************************************************/
+/* Ext_RAM.INI: External RAM (SDRAM) Initialization File */
+/******************************************************************************/
+// <<< Use Configuration Wizard in Context Menu >>> //
+/******************************************************************************/
+/* This file is part of the uVision/ARM development tools. */
+/* Copyright (c) 2005-2008 Keil Software. All rights reserved. */
+/* This software may only be used under the terms of a valid, current, */
+/* end user licence from KEIL for a compatible version of KEIL software */
+/* development tools. Nothing else gives you the right to use this software. */
+/******************************************************************************/
+
+
+FUNC void SetupForStart (void) {
+
+// <o> Program Entry Point
+ PC = 0x30000000;
+}
+
+
+FUNC void Init (void) {
+
+ _WDWORD(0x4A000008, 0xFFFFFFFF); // Disable All Interrupts
+
+ _WDWORD(0x53000000, 0x00000000); // Disable Watchdog Timer
+
+ // Clock Setup
+ // FCLK = 300 MHz, HCLK = 100 MHz, PCLK = 50 MHz
+ _WDWORD(0x4C000000, 0x0FFF0FFF); // LOCKTIME
+ _WDWORD(0x4C000014, 0x0000000F); // CLKDIVN
+ _WDWORD(0x4C000004, 0x00043011); // MPLLCON
+ _WDWORD(0x4C000008, 0x00038021); // UPLLCON
+ _WDWORD(0x4C00000C, 0x001FFFF0); // CLKCON
+
+ // Memory Controller Setup for SDRAM
+ _WDWORD(0x48000000, 0x22000000); // BWSCON
+ _WDWORD(0x4800001C, 0x00018005); // BANKCON6
+ _WDWORD(0x48000020, 0x00018005); // BANKCON7
+ _WDWORD(0x48000024, 0x008404F3); // REFRESH
+ _WDWORD(0x48000028, 0x00000032); // BANKSIZE
+ _WDWORD(0x4800002C, 0x00000020); // MRSRB6
+ _WDWORD(0x48000030, 0x00000020); // MRSRB7
+
+ _WDWORD(0x56000000, 0x000003FF); // GPACON: Enable Address lines for SDRAM
+}
+
+
+// Reset chip with watchdog, because nRST line is routed on hardware in a way
+// that it can not be pulled low with ULINK
+
+_WDWORD(0x40000000, 0xEAFFFFFE); // Load RAM addr 0 with branch to itself
+CPSR = 0x000000D3; // Disable interrupts
+PC = 0x40000000; // Position PC to start of RAM
+_WDWORD(0x53000000, 0x00000021); // Enable Watchdog
+g, 0 // Wait for Watchdog to reset chip
+
+Init(); // Initialize memory
+LOAD rtthread-mini2440.axf INCREMENTAL // Download program
+SetupForStart(); // Setup for Running
+g, main // Goto Main
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