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authorWayne Lin <[email protected]>2022-10-07 10:26:53 +0800
committerBernard Xiong <[email protected]>2022-10-11 08:46:01 +0800
commitece0c6eef8606be94bbaec61fa9b690e157d1655 (patch)
tree56b600c7c760a575c2f69741c28f9a2c89c0dabf
parent5d014e8d31fb882c25063d58db89876d1eca9a96 (diff)
Move gtimer driver to libcpu.
-rw-r--r--bsp/ft2004/drivers/gtimer.c179
-rw-r--r--bsp/ft2004/drivers/gtimer.h27
-rw-r--r--libcpu/arm/cortex-a/armv7.h6
-rw-r--r--libcpu/arm/cortex-a/gtimer.c2
4 files changed, 7 insertions, 207 deletions
diff --git a/bsp/ft2004/drivers/gtimer.c b/bsp/ft2004/drivers/gtimer.c
deleted file mode 100644
index fd5f96950c..0000000000
--- a/bsp/ft2004/drivers/gtimer.c
+++ /dev/null
@@ -1,179 +0,0 @@
-/*
- * Copyright (c) 2006-2021, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date Author Notes
- * 2021-03-30 huijie.feng first version
- */
-
-#include "cp15.h"
-#include <rtdef.h>
-
-/** Set CNTFRQ
- * This function assigns the given value to PL1 Physical Timer Counter Frequency Register (CNTFRQ).
- * @param value: CNTFRQ Register value to set
- */
-static inline void __set_cntfrq(rt_uint32_t value)
-{
- __set_cp(15, 0, value, 14, 0, 0);
-}
-
-/** Get CNTFRQ
- * This function returns the value of the PL1 Physical Timer Counter Frequency Register (CNTFRQ).
- * return CNTFRQ Register value
- */
-static inline rt_uint32_t __get_cntfrq(void)
-{
- rt_uint32_t result;
- __get_cp(15, 0, result, 14, 0 , 0);
- return result;
-}
-
-/** Set CNTP_TVAL
- * This function assigns the given value to PL1 Physical Timer Value Register (CNTP_TVAL).
- * param value: CNTP_TVAL Register value to set
- */
-static inline void __set_cntp_tval(rt_uint32_t value)
-{
- __set_cp(15, 0, value, 14, 2, 0);
-}
-
-/** Get CNTP_TVAL
- * This function returns the value of the PL1 Physical Timer Value Register (CNTP_TVAL).
- * return CNTP_TVAL Register value
- */
-static inline rt_uint32_t __get_cntp_tval(void)
-{
- rt_uint32_t result;
- __get_cp(15, 0, result, 14, 2, 0);
- return result;
-}
-
-/** Get CNTPCT
- * This function returns the value of the 64 bits PL1 Physical Count Register (CNTPCT).
- * return CNTPCT Register value
- */
-static inline rt_uint64_t __get_cntpct(void)
-{
- rt_uint64_t result;
- __get_cp64(15, 0, result, 14);
- return result;
-}
-
-/** Set CNTP_CVAL
- * This function assigns the given value to 64bits PL1 Physical Timer CompareValue Register (CNTP_CVAL).
- * param value: CNTP_CVAL Register value to set
-*/
-static inline void __set_cntp_cval(rt_uint64_t value)
-{
- __set_cp64(15, 2, value, 14);
-}
-
-/** Get CNTP_CVAL
- * This function returns the value of the 64 bits PL1 Physical Timer CompareValue Register (CNTP_CVAL).
- * return CNTP_CVAL Register value
- */
-static inline rt_uint64_t __get_cntp_cval(void)
-{
- rt_uint64_t result;
- __get_cp64(15, 2, result, 14);
- return result;
-}
-
-/** Set CNTP_CTL
- * This function assigns the given value to PL1 Physical Timer Control Register (CNTP_CTL).
- * param value: CNTP_CTL Register value to set
- */
-static inline void __set_cntp_ctl(rt_uint32_t value)
-{
- __set_cp(15, 0, value, 14, 2, 1);
-}
-
-/** Get CNTP_CTL register
- * return CNTP_CTL Register value
- */
-static inline rt_uint32_t __get_cntp_ctl(void)
-{
- rt_uint32_t result;
- __get_cp(15, 0, result, 14, 2, 1);
- return result;
-}
-
-/** Configures the frequency the timer shall run at.
- * param value The timer frequency in Hz.
- */
-void gtimer_set_counter_frequency(rt_uint32_t value)
-{
- __set_cntfrq(value);
- __asm__ volatile ("isb 0xF":::"memory");
-}
-
-/** Get the frequency the timer shall run at.
- * return timer frequency in Hz.
- */
-rt_uint32_t gtimer_get_counter_frequency(void)
-{
- return(__get_cntfrq());
-}
-
-/** Sets the reset value of the timer.
- * param value: The value the timer is loaded with.
- */
-void gtimer_set_load_value(rt_uint32_t value)
-{
- __set_cntp_tval(value);
- __asm__ volatile ("isb 0xF":::"memory");
-}
-
-/** Get the current counter value.
- * return Current counter value.
- */
-rt_uint32_t gtimer_get_current_value(void)
-{
- return(__get_cntp_tval());
-}
-
-/** Get the current physical counter value.
- * return Current physical counter value.
- */
-rt_uint64_t gtimer_get_current_physical_value(void)
-{
- return(__get_cntpct());
-}
-
-/** Set the physical compare value.
- * param value: New physical timer compare value.
- */
-void gtimer_set_physical_compare_value(rt_uint64_t value)
-{
- __set_cntp_cval(value);
- __asm__ volatile ("isb 0xF":::"memory");
-}
-
-/** Get the physical compare value.
- * return Physical compare value.
- */
-rt_uint64_t gtimer_get_physical_compare_value(void)
-{
- return(__get_cntp_cval());
-}
-
-/** Configure the timer by setting the control value.
- * param value: New timer control value.
- */
-void gtimer_set_control(rt_uint32_t value)
-{
- __set_cntp_ctl(value);
- __asm__ volatile ("isb 0xF":::"memory");
-}
-
-/** Get the control value.
- * return Control value.
- */
-rt_uint32_t gtimer_get_control(void)
-{
- return(__get_cntp_ctl());
-}
-
diff --git a/bsp/ft2004/drivers/gtimer.h b/bsp/ft2004/drivers/gtimer.h
deleted file mode 100644
index ec5d54127e..0000000000
--- a/bsp/ft2004/drivers/gtimer.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * Copyright (c) 2006-2021, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date Author Notes
- * 2021-03-30 huijie.feng first version
- */
-
-#ifndef __GTIMER_H__
-#define __GTIMER_H__
-
-#include <rtdef.h>
-
-void gtimer_set_counter_frequency(rt_uint32_t value);
-rt_uint32_t gtimer_get_counter_frequency(void);
-void gtimer_set_load_value(rt_uint32_t value);
-rt_uint32_t gtimer_get_current_value(void);
-rt_uint64_t gtimer_get_current_physical_value(void);
-void gtimer_set_physical_compare_value(rt_uint64_t value);
-rt_uint64_t gtimer_get_physical_compare_value(void);
-void gtimer_set_control(rt_uint32_t value);
-rt_uint32_t gtimer_get_control(void);
-
-#endif
-
diff --git a/libcpu/arm/cortex-a/armv7.h b/libcpu/arm/cortex-a/armv7.h
index f284bb5255..325d0ed0ae 100644
--- a/libcpu/arm/cortex-a/armv7.h
+++ b/libcpu/arm/cortex-a/armv7.h
@@ -69,4 +69,10 @@ struct rt_hw_stack
#define E_Bit (1<<9)
#define J_Bit (1<<24)
+#define PABT_EXCEPTION 0x1
+#define DABT_EXCEPTION 0x2
+#define UND_EXCEPTION 0x3
+#define SWI_EXCEPTION 0x4
+#define RESV_EXCEPTION 0xF
+
#endif
diff --git a/libcpu/arm/cortex-a/gtimer.c b/libcpu/arm/cortex-a/gtimer.c
index b35acc6e6f..fd5f96950c 100644
--- a/libcpu/arm/cortex-a/gtimer.c
+++ b/libcpu/arm/cortex-a/gtimer.c
@@ -86,7 +86,7 @@ static inline rt_uint64_t __get_cntp_cval(void)
* This function assigns the given value to PL1 Physical Timer Control Register (CNTP_CTL).
* param value: CNTP_CTL Register value to set
*/
-static inline void __set_cntp_ctl(uint32_t value)
+static inline void __set_cntp_ctl(rt_uint32_t value)
{
__set_cp(15, 0, value, 14, 2, 1);
}