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authorMeco Man <[email protected]>2022-08-04 22:57:14 -0400
committerMan, Jianting (Meco) <[email protected]>2022-08-08 10:11:46 -0400
commit8cd7ee268f120c55acdbcd9c6b8cd395cde5bdec (patch)
treed584908ca656dc6eb679db7a193565dfb511b0fc
parentccf0ad297bfd0bd8e64d92b660422ae78fc268c1 (diff)
[gd32] 修复串口引脚定义错误的问题
https://club.rt-thread.org/ask/question/32d3a440402902f7.html
-rw-r--r--bsp/gd32450z-eval/drivers/drv_usart.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/bsp/gd32450z-eval/drivers/drv_usart.c b/bsp/gd32450z-eval/drivers/drv_usart.c
index 423befbc93..6b5b0ced96 100644
--- a/bsp/gd32450z-eval/drivers/drv_usart.c
+++ b/bsp/gd32450z-eval/drivers/drv_usart.c
@@ -255,8 +255,8 @@ static const struct gd32_uart uarts[] = {
UART6, // uart peripheral index
UART6_IRQn, // uart iqrn
RCU_UART6, RCU_GPIOE, RCU_GPIOE, // periph clock, tx gpio clock, rt gpio clock
- GPIOE, GPIO_AF_8, GPIO_PIN_7, // tx port, tx alternate, tx pin
- GPIOE, GPIO_AF_8, GPIO_PIN_8, // rx port, rx alternate, rx pin
+ GPIOE, GPIO_AF_8, GPIO_PIN_8, // tx port, tx alternate, tx pin
+ GPIOE, GPIO_AF_8, GPIO_PIN_7, // rx port, rx alternate, rx pin
&serial6,
"uart6",
},
@@ -267,8 +267,8 @@ static const struct gd32_uart uarts[] = {
UART7, // uart peripheral index
UART7_IRQn, // uart iqrn
RCU_UART7, RCU_GPIOE, RCU_GPIOE, // periph clock, tx gpio clock, rt gpio clock
- GPIOE, GPIO_AF_8, GPIO_PIN_0, // tx port, tx alternate, tx pin
- GPIOE, GPIO_AF_8, GPIO_PIN_1, // rx port, rx alternate, rx pin
+ GPIOE, GPIO_AF_8, GPIO_PIN_1, // tx port, tx alternate, tx pin
+ GPIOE, GPIO_AF_8, GPIO_PIN_0, // rx port, rx alternate, rx pin
&serial7,
"uart7",
},