[bsp][ch32v307]添加了适配RT-Thread的全速USB驱动

7 files changed, 1595 insertions, 0 deletions

diff --git a/bsp/wch/risc-v/Libraries/ch32_drivers/SConscript b/bsp/wch/risc-v/Libraries/ch32_drivers/SConscript
index 03d2b77732..7d462d7f4a 100644
--- a/bsp/wch/risc-v/Libraries/ch32_drivers/SConscript
+++ b/bsp/wch/risc-v/Libraries/ch32_drivers/SConscript
@@ -30,6 +30,12 @@ if  GetDepend('SOC_RISCV_FAMILY_CH32'):
     if GetDepend('BSP_USING_RTC'):
         src += ['drv_rtc.c']
 
+    if GetDepend('BSP_USING_USBH'):
+        src += ['drv_usbh.c']
+
+    if GetDepend('BSP_USING_USBD'):
+        src += ['drv_usbd.c']
+
     if GetDepend('BSP_USING_IWDT'):
         src += ['drv_iwdt.c']
 
diff --git a/bsp/wch/risc-v/Libraries/ch32_drivers/drv_usbd.c b/bsp/wch/risc-v/Libraries/ch32_drivers/drv_usbd.c
new file mode 100644
index 0000000000..b549855adc
--- /dev/null
+++ b/bsp/wch/risc-v/Libraries/ch32_drivers/drv_usbd.c
@@ -0,0 +1,422 @@
+/*
+ * Copyright (c) 2006-2024, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2024-4-30      IceBear003   the first version adapted from CherryUSB
+ */
+
+#include "board.h"
+#include "drv_usbd.h"
+
+#ifdef BSP_USING_USBD
+
+#define LOG_TAG "drv.usbd"
+#include "drv_log.h"
+
+#define UEP_MPS_64          64
+#define UEP_MPS_512         512
+
+#define _get_ep_idx(address)    ((address) & USB_EPNO_MASK)
+#define _get_ep_dir(address)    ((address) & USB_DIR_MASK)
+#define _is_dir_in(address)     (_get_ep_dir(address) == USB_DIR_IN)
+#define _is_dir_out(address)    (_get_ep_dir(address) == USB_DIR_OUT)
+
+#define _get_dma(ep_idx)          (*(volatile uint32_t *)((uint32_t)(USBFSD->UEP0_DMA) + 4 * ep_idx))
+#define _set_dma(ep_idx, addr)    (*(volatile uint32_t *)((uint32_t)(USBFSD->UEP0_DMA) + 4 * ep_idx) = addr)
+#define _set_tx_len(ep_idx, len)  (*(volatile uint16_t *)((uint32_t)(USBFSD->UEP0_TX_LEN) + 4 * ep_idx) = len)
+#define _get_tx_len(ep_idx)       (*(volatile uint16_t *)((uint32_t)(USBFSD->UEP0_TX_LEN) + 4 * ep_idx))
+#define _set_tx_ctrl(ep_idx, val) (*(volatile uint8_t *)((uint32_t)(USBFSD->UEP0_TX_CTRL) + 4 * ep_idx) = val)
+#define _get_tx_ctrl(ep_idx)      (*(volatile uint8_t *)((uint32_t)(USBFSD->UEP0_TX_CTRL) + 4 * ep_idx))
+#define _set_rx_ctrl(ep_idx, val) (*(volatile uint8_t *)((uint32_t)(USBFSD->UEP0_RX_CTRL) + 4 * ep_idx) = val)
+#define _get_rx_ctrl(ep_idx)      (*(volatile uint8_t *)((uint32_t)(USBFSD->UEP0_RX_CTRL) + 4 * ep_idx))
+
+static struct udcd udcd;
+
+USBOTG_FS_TypeDef *USBFSD = USBOTG_FS;
+
+static struct ep_id endpoint_pool[] =
+{
+    {0x0,  USB_EP_ATTR_CONTROL,   USB_DIR_INOUT, 64,  ID_ASSIGNED  },
+    {0x1,  USB_EP_ATTR_BULK,      USB_DIR_IN,    512, ID_UNASSIGNED},
+    {0x1,  USB_EP_ATTR_BULK,      USB_DIR_OUT,   512, ID_UNASSIGNED},
+    {0x2,  USB_EP_ATTR_INT,       USB_DIR_IN,    512, ID_UNASSIGNED},
+    {0x2,  USB_EP_ATTR_INT,       USB_DIR_OUT,   512, ID_UNASSIGNED},
+    {0x3,  USB_EP_ATTR_ISOC,      USB_DIR_IN,    512, ID_UNASSIGNED},
+    {0x3,  USB_EP_ATTR_ISOC,      USB_DIR_OUT,   512, ID_UNASSIGNED},
+    {0xFF, USB_EP_ATTR_TYPE_MASK, USB_DIR_MASK,  0,   ID_ASSIGNED  },
+};
+
+uint8_t _uep_mod_get(uint8_t ep_idx)
+{
+    switch(ep_idx)
+    {
+        case 1:
+        case 4: return USBFSD->UEP4_1_MOD;
+        case 2:
+        case 3: return USBFSD->UEP2_3_MOD;
+        case 5:
+        case 6: return USBFSD->UEP5_6_MOD;
+        case 7: return USBFSD->UEP7_MOD;
+        default: return 0;
+    }
+}
+
+rt_err_t _uep_mod_set(uint8_t ep_idx, uint8_t value)
+{
+    switch(ep_idx)
+    {
+        case 1:
+        case 4: USBFSD->UEP4_1_MOD = value; break;
+        case 2:
+        case 3: USBFSD->UEP2_3_MOD = value; break;
+        case 5:
+        case 6: USBFSD->UEP5_6_MOD = value; break;
+        case 7: USBFSD->UEP7_MOD = value; break;
+        default: return -RT_ERROR;
+    }
+    return RT_EOK;
+}
+
+uint8_t _uep_tx_en(uint8_t ep_idx)
+{
+    switch(ep_idx)
+    {
+        case 1: return USBFS_UEP1_TX_EN;
+        case 4: return USBFS_UEP4_TX_EN;
+        case 2: return USBFS_UEP2_TX_EN;
+        case 3: return USBFS_UEP3_TX_EN;
+        case 5: return USBFS_UEP5_TX_EN;
+        case 6: return USBFS_UEP6_TX_EN;
+        case 7: return USBFS_UEP7_TX_EN;
+        default: return 0;
+    }
+}
+
+uint8_t _uep_rx_en(uint8_t ep_idx)
+{
+    switch(ep_idx)
+    {
+        case 1: return USBFS_UEP1_TX_EN;
+        case 4: return USBFS_UEP4_TX_EN;
+        case 2: return USBFS_UEP2_TX_EN;
+        case 3: return USBFS_UEP3_TX_EN;
+        case 5: return USBFS_UEP5_TX_EN;
+        case 6: return USBFS_UEP6_TX_EN;
+        case 7: return USBFS_UEP7_TX_EN;
+        default: return 0;
+    }
+}
+
+rt_err_t usbd_set_address(rt_uint8_t address)
+{
+    if(address > 0x7f)
+        return -RT_ERROR;
+    USBFSD->DEV_ADDR = (USBFSD->DEV_ADDR & USBFS_UDA_GP_BIT) | address;
+    return RT_EOK;
+}
+
+rt_err_t usbd_set_config(rt_uint8_t address)
+{  //Nonsense?
+    return RT_EOK;
+}
+
+rt_err_t usbd_ep_set_stall(rt_uint8_t address)
+{
+    uint8_t ep_idx = _get_ep_idx(address);
+
+    if (_is_dir_out(address))
+        if (ep_idx == 0)
+            _set_rx_ctrl(0, USBFS_UEP_R_TOG | USBFS_UEP_R_RES_STALL);
+        else
+            _set_rx_ctrl(ep_idx, (_get_rx_ctrl(ep_idx) & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_STALL);
+    else
+    if (ep_idx == 0)
+        _set_tx_ctrl(0, USBFS_UEP_T_TOG | USBFS_UEP_T_RES_STALL);
+    else
+        _set_tx_ctrl(ep_idx, (_get_tx_ctrl(ep_idx) & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_STALL);
+
+    return RT_EOK;
+}
+
+rt_err_t usbd_ep_clear_stall(rt_uint8_t address)
+{
+    uint8_t ep_idx = _get_ep_idx(address);
+
+    if (_is_dir_in(address))
+        _set_tx_ctrl(ep_idx, (_get_tx_ctrl(ep_idx) & ~(USBFS_UEP_T_TOG | USBFS_UEP_T_RES_MASK)) | USBFS_UEP_T_RES_NAK);
+    else
+        _set_rx_ctrl(ep_idx, (_get_rx_ctrl(ep_idx) & ~(USBFS_UEP_R_TOG | USBFS_UEP_R_RES_MASK)) | USBFS_UEP_R_RES_ACK);
+
+    return RT_EOK;
+}
+
+rt_err_t usbd_ep_enable(struct uendpoint* ep)
+{
+    RT_ASSERT(ep != RT_NULL);
+    RT_ASSERT(ep->ep_desc != RT_NULL);
+
+    uint8_t address = EP_ADDRESS(ep);
+    uint8_t ep_idx = _get_ep_idx(address);
+
+    if (ep_idx != 0)
+    {
+        uint8_t mod = _is_dir_in(address) ? _uep_tx_en(ep_idx) : _uep_rx_en(ep_idx);
+        mod = _uep_mod_get(ep_idx) | mod;
+        _uep_mod_set(ep_idx, mod);
+    } else return -RT_ERROR;
+
+    return RT_EOK;
+}
+
+rt_err_t usbd_ep_disable(struct uendpoint* ep)
+{
+    RT_ASSERT(ep != RT_NULL);
+    RT_ASSERT(ep->ep_desc != RT_NULL);
+
+    uint8_t address = EP_ADDRESS(ep);
+    uint8_t ep_idx = _get_ep_idx(address);
+
+    if (ep_idx != 0)
+    {
+        uint8_t mod = _is_dir_in(address) ? _uep_tx_en(ep_idx) : _uep_rx_en(ep_idx);
+        mod = _uep_mod_get(ep_idx) & ~mod;
+        _uep_mod_set(ep_idx, mod);
+    } else return -RT_ERROR;
+
+    return RT_EOK;
+}
+
+rt_size_t usbd_ep_read_prepare(rt_uint8_t address, void *buffer, rt_size_t size)
+{
+    uint8_t ep_idx = _get_ep_idx(address);
+
+    if (_is_dir_in(address))
+        return 0;
+
+    if (size > (ep_idx ? UEP_MPS_512 : UEP_MPS_64))
+        size = (ep_idx ? UEP_MPS_512 : UEP_MPS_64);
+
+    _set_dma(ep_idx, (uint32_t)buffer);
+
+    if (ep_idx == 0)
+        if(size == 0) _set_rx_ctrl(0, USBFS_UEP_R_RES_ACK | USBFS_UEP_R_TOG);
+        else _set_rx_ctrl(ep_idx, USBFS_UEP_R_RES_ACK);
+    else _set_rx_ctrl(0, (_get_rx_ctrl(ep_idx) & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_ACK | USBFS_UEP_R_TOG);
+
+    return size;
+}
+
+rt_size_t usbd_ep_read(rt_uint8_t address, void *buffer)
+{
+    uint8_t ep_idx = _get_ep_idx(address);
+
+    if (_is_dir_out(address))
+        return -2;
+    if ((uint32_t)buffer & 0x03)
+        return -3;
+
+    uint32_t dmabuf = _get_dma(ep_idx);
+    rt_size_t size = USBFSD->RX_LEN;
+
+    if (size > 0 && (uint32_t)buffer != dmabuf)
+        rt_memcpy(buffer, (void *)dmabuf, size);
+
+    return size;
+}
+
+rt_size_t usbd_ep_write(rt_uint8_t address, void *buffer, rt_size_t size)
+{
+    uint8_t ep_idx = _get_ep_idx(address);
+
+    if (_is_dir_in(address))
+        return -2;
+    if ((uint32_t)buffer & 0x03)
+        return -3;
+
+    uint32_t dmabuf = _get_dma(ep_idx);
+
+    if (size > (ep_idx ? UEP_MPS_512 : UEP_MPS_64))
+        size = (ep_idx ? UEP_MPS_512 : UEP_MPS_64);
+
+    _set_tx_len(ep_idx, size);
+    if(ep_idx == 0)
+    {
+        if(size != 0)
+            _set_dma(0, (uint32_t)buffer);
+        _set_tx_ctrl(0, USBFS_UEP_T_TOG | USBFS_UEP_T_RES_ACK);
+    }
+    else
+    {
+        if(size != 0)
+            rt_memcpy((void *)dmabuf, buffer, size);
+        _set_tx_ctrl(ep_idx, (_get_tx_ctrl(ep_idx) & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_ACK);
+    }
+
+    return size;
+}
+
+rt_err_t usbd_ep0_send_status(void)
+{
+    _set_tx_len(0, 0);
+    _set_tx_ctrl(0, USBFS_UEP_T_RES_ACK | USBFS_UEP_T_TOG);
+    _set_dma(0, 0);
+    return RT_EOK;
+}
+
+rt_err_t usbd_suspend(void)
+{
+    return RT_EOK;
+}
+
+rt_err_t usbd_wakeup(void)
+{
+    return RT_EOK;
+}
+
+const struct udcd_ops udcd_ops =
+{
+    .set_address = usbd_set_address,
+    .set_config = usbd_set_config,
+    .ep_set_stall = usbd_ep_set_stall,
+    .ep_clear_stall = usbd_ep_clear_stall,
+    .ep_enable = usbd_ep_enable,
+    .ep_disable = usbd_ep_disable,
+    .ep_read_prepare = usbd_ep_read_prepare,
+    .ep_read = usbd_ep_read,
+    .ep_write = usbd_ep_write,
+    .ep0_send_status = usbd_ep0_send_status,
+    .suspend = usbd_suspend,
+    .wakeup = usbd_wakeup,
+};
+
+rt_err_t dcd_init(rt_device_t dev)
+{
+    USBFSD->BASE_CTRL = 0x00;
+
+    USBFSD->UEP4_1_MOD = USBFS_UEP4_RX_EN | USBFS_UEP4_TX_EN | USBFS_UEP1_RX_EN | USBFS_UEP1_TX_EN;
+    USBFSD->UEP2_3_MOD = USBFS_UEP2_RX_EN | USBFS_UEP2_TX_EN | USBFS_UEP3_RX_EN | USBFS_UEP3_TX_EN;
+    USBFSD->UEP5_6_MOD = USBFS_UEP5_RX_EN | USBFS_UEP5_TX_EN | USBFS_UEP6_RX_EN | USBFS_UEP6_TX_EN;
+    USBFSD->UEP7_MOD = USBFS_UEP7_RX_EN | USBFS_UEP7_TX_EN;
+
+    USBFSD->INT_FG = 0xFF;
+    USBFSD->INT_EN = USBFS_UIE_SUSPEND | USBFS_UIE_BUS_RST | USBFS_UIE_TRANSFER;
+    USBFSD->DEV_ADDR = 0x00;
+
+    USBFSD->BASE_CTRL = USBFS_UC_DEV_PU_EN | USBFS_UC_INT_BUSY | USBFS_UC_DMA_EN;
+    USBFSD->UDEV_CTRL = USBFS_UD_PD_DIS | USBFS_UD_PORT_EN;
+
+    NVIC_EnableIRQ(OTG_FS_IRQn);
+
+    return RT_EOK;
+}
+
+void USBD_IRQHandler(void) __attribute__((interrupt()));
+void USBD_IRQHandler()
+{
+    rt_interrupt_enter();
+    uint8_t int_fg = USBFSD->INT_FG;
+
+    if (int_fg & USBFS_UIF_TRANSFER) {
+        uint8_t ep_idx = USBFSD->INT_ST & USBFS_UIS_ENDP_MASK;
+        uint8_t tog;
+        switch (USBFSD->INT_ST & USBFS_UIS_TOKEN_MASK) {
+            case USBFS_UIS_TOKEN_SETUP:
+                _set_rx_ctrl(ep_idx, USBFS_UEP_R_RES_NAK);
+                break;
+
+            case USBFS_UIS_TOKEN_IN:
+                if (ep_idx == 0x00)
+                {
+                    tog = _get_tx_ctrl(ep_idx) & USBFS_UEP_T_TOG;
+                    _set_tx_ctrl(ep_idx, (_get_tx_ctrl(ep_idx) & 0b11111000) | ~tog | USBFS_UEP_T_RES_NAK);
+                    if (_get_dma(ep_idx) != 0)
+                    {
+                        rt_usbd_ep0_in_handler(&udcd);
+                    }
+                }
+                else
+                {
+                    _set_tx_ctrl(ep_idx, (_get_tx_ctrl(ep_idx) & ~USBFS_UEP_T_RES_MASK) | USBFS_UEP_T_RES_NAK);
+                    rt_usbd_ep_in_handler(&udcd, ep_idx | USB_DIR_IN, _get_tx_len(ep_idx));
+                }
+                break;
+            case USBFS_UIS_TOKEN_OUT:
+                if (ep_idx == 0x00)
+                {
+                    if(USBFSD->INT_ST & USBFS_UIS_TOG_OK)
+                    {
+                        tog = _get_rx_ctrl(ep_idx) & USBFS_UEP_R_TOG;
+                        _set_rx_ctrl(ep_idx, (_get_rx_ctrl(ep_idx) & 0b11111000) | ~tog | USBFS_UEP_R_RES_NAK);
+                    }
+                    else
+                    {
+                        _set_rx_ctrl(ep_idx, (_get_rx_ctrl(ep_idx) & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_NAK);
+                    }
+                }
+                else
+                {
+                    _set_rx_ctrl(ep_idx, (_get_rx_ctrl(ep_idx) & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_NAK);
+                    if (USBFSD->INT_ST & USBFS_UIS_TOG_OK) {
+                        _set_rx_ctrl(ep_idx, (_get_rx_ctrl(ep_idx) & ~USBFS_UEP_R_RES_MASK) | USBFS_UEP_R_RES_NAK);
+                        rt_usbd_ep_out_handler(&udcd, ep_idx | USB_DIR_OUT, 0);
+                    }
+                }
+                break;
+            default:
+                break;
+        }
+
+        USBFSD->INT_FG = USBFS_UIF_TRANSFER;
+    } else if (int_fg & USBFS_UIF_BUS_RST) {
+        USBFSD->UEP0_TX_LEN = 0;
+        USBFSD->UEP0_TX_CTRL = USBFS_UEP_T_RES_NAK;
+        USBFSD->UEP0_RX_CTRL = USBFS_UEP_R_RES_NAK;
+
+        for (uint8_t i = 1; i < 8; i++) {
+            _set_tx_len(i, 0);
+            _set_tx_ctrl(i, USBFS_UEP_T_RES_NAK | USBFS_UEP_T_AUTO_TOG);
+            _set_rx_ctrl(i, USBFS_UEP_R_RES_NAK | USBFS_UEP_R_AUTO_TOG);
+        }
+
+        _set_rx_ctrl(0, USBFS_UEP_R_RES_ACK);
+        rt_usbd_reset_handler(&udcd);
+
+        USBFSD->INT_FG |= USBFS_UIF_BUS_RST;
+    } else if (int_fg & USBFS_UIF_SUSPEND) {
+        USBFSD->INT_FG = USBFS_UIF_SUSPEND;
+    } else {
+        USBFSD->INT_FG = int_fg;
+    }
+
+    rt_interrupt_leave();
+}
+
+int rt_hw_usbd_init()
+{
+    rt_err_t res = -RT_ERROR;
+
+    rt_memset((void *)&udcd, 0, sizeof(struct uhcd));
+    udcd.parent.type = RT_Device_Class_USBDevice;
+    udcd.parent.user_data = (void *)USBFS_BASE;
+    udcd.parent.init = dcd_init;
+    udcd.ops = &udcd_ops;
+    udcd.ep_pool = endpoint_pool;
+    udcd.ep0.id = &endpoint_pool[0];
+    udcd.device_is_hs = RT_FALSE;
+
+    res = rt_device_register(&udcd.parent, "usbd", RT_DEVICE_FLAG_DEACTIVATE);
+
+    if (res != RT_EOK)
+    {
+        rt_kprintf("register usb device failed res = %d\r\n", res);
+        return -RT_ERROR;
+    }
+
+    rt_usb_device_init();
+
+    return RT_EOK;
+}
+#endif //BSP_USING_USBD
diff --git a/bsp/wch/risc-v/Libraries/ch32_drivers/drv_usbd.h b/bsp/wch/risc-v/Libraries/ch32_drivers/drv_usbd.h
new file mode 100644
index 0000000000..4c4ba056bf
--- /dev/null
+++ b/bsp/wch/risc-v/Libraries/ch32_drivers/drv_usbd.h
@@ -0,0 +1,19 @@
+/*
+ * Copyright (c) 2006-2024, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2024-4-1       IceBear003   the first version
+ */
+
+#ifndef __DRV_USBD_H_
+#define __DRV_USBD_H_
+
+#include <rtthread.h>
+#include <rtdevice.h>
+
+int rt_hw_usbd_init();
+
+#endif
\ No newline at end of file
diff --git a/bsp/wch/risc-v/Libraries/ch32_drivers/drv_usbh.c b/bsp/wch/risc-v/Libraries/ch32_drivers/drv_usbh.c
new file mode 100644
index 0000000000..15005305c7
--- /dev/null
+++ b/bsp/wch/risc-v/Libraries/ch32_drivers/drv_usbh.c
@@ -0,0 +1,286 @@
+/*
+ * Copyright (c) 2006-2024, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2024-4-30      IceBear003   the first version adapted from CherryUSB
+ */
+
+#include "board.h"
+#include "drv_usbh.h"
+
+#ifdef BSP_USING_USBH
+
+#define LOG_TAG "drv.usbh"
+#include "drv_log.h"
+
+static struct uhcd uhcd;
+
+static struct rt_completion urb_completion;
+
+__attribute__((aligned(4))) int8_t usb_rx_buf[ MAX_PACKET_SIZE ];
+__attribute__((aligned(4))) int8_t usb_tx_buf[ MAX_PACKET_SIZE ];
+
+USBOTGH_FS_TypeDef *USBFSH = USBOTG_H_FS;
+
+rt_err_t usbh_reset_port(rt_uint8_t port)
+{
+    //Disable interrupt
+    USBFSH->INT_EN &= (~USBFS_UIE_DETECT);
+    USBFSH->HOST_CTRL &= ~USBFS_UH_SOF_EN;
+
+    //Set address
+    USBFSH->DEV_ADDR = (USBFS_UDA_GP_BIT & USBFSH->DEV_ADDR) | (0x00 & USBFS_USB_ADDR_MASK);
+
+    //Close port
+    USBFSH->HOST_CTRL &= ~USBFS_UH_PORT_EN;
+
+    //Reset
+    USBFSH->HOST_CTRL |= USBFS_UH_BUS_RESET;
+    rt_thread_mdelay(30);
+    USBFSH->HOST_CTRL &= ~USBFS_UH_BUS_RESET;
+    rt_thread_mdelay(20);
+
+    //Set speed
+    if ((USBFSH->HOST_CTRL & USBFS_UH_PORT_EN) == 0) { //Set speed only when port is closed
+        if(USBFSH->MIS_ST & USBFS_UMS_DM_LEVEL)        //RB_UMS_DM_LEVEL: 1/Low 0/Full
+        {   //Low speed
+            USBFSH->BASE_CTRL |= USBFS_UC_LOW_SPEED;
+            USBFSH->HOST_CTRL |= USBFS_UH_LOW_SPEED;
+            USBFSH->HOST_SETUP |= USBFS_UH_PRE_PID_EN;
+        }
+        else
+        {   //Full speed
+            USBFSH->BASE_CTRL &= ~USBFS_UC_LOW_SPEED;
+            USBFSH->HOST_CTRL &= ~USBFS_UH_LOW_SPEED;
+            USBFSH->HOST_SETUP &= ~USBFS_UH_PRE_PID_EN;
+        }
+    }
+
+    //Enable port
+    USBFSH->HOST_CTRL |= USBFS_UH_PORT_EN;
+    USBFSH->HOST_SETUP |= USBFS_UH_SOF_EN;
+
+    //Enable interrupt
+    USBFSH->INT_EN |= USBFS_UIE_DETECT;
+
+    if(USBFSH->INT_FG & USBFS_UIF_DETECT)
+        if(USBFSH->MIS_ST & USBFS_UMS_DEV_ATTACH)
+            USBFSH->INT_FG = USBFS_UIF_DETECT;
+
+    return RT_EOK;
+}
+
+int usbh_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes, int timeouts)
+{
+    rt_uint8_t usb_pid;
+    rt_uint8_t *tog = (rt_uint8_t *)pipe->user_data;
+
+    USBFSH->DEV_ADDR = (USBFS_UDA_GP_BIT & USBFSH->DEV_ADDR) | (pipe->pipe_index & USBFS_USB_ADDR_MASK);
+
+    if(pipe->ep.bEndpointAddress & USB_DIR_IN)
+    {
+        usb_pid = USB_PID_IN;
+        USBFSH->HOST_TX_LEN = 0x00;
+    }
+    else
+    {
+        usb_pid = (token == USBH_PID_SETUP) ? USB_PID_SETUP : USB_PID_OUT;
+        rt_memcpy(usb_tx_buf, buffer, nbytes);
+        USBFSH->HOST_TX_LEN = nbytes;
+    }
+
+    switch(usb_pid)
+    {
+    case USB_PID_IN:
+        if (nbytes == 0) *tog = USB_PID_DATA1;
+        USBFSH->HOST_RX_CTRL = (*tog == USB_PID_DATA1) ? USBFS_UH_R_TOG : 0x00;
+        break;
+    case USB_PID_OUT:
+        if (nbytes == 0) *tog = USB_PID_DATA1;
+        USBFSH->HOST_TX_CTRL = (*tog == USB_PID_DATA1) ? USBFS_UH_T_TOG : 0x00;
+        break;
+    case USB_PID_SETUP:
+        *(rt_uint8_t *)pipe->inst->pipe_ep0_out->user_data = USB_PID_DATA0;
+        *(rt_uint8_t *)pipe->inst->pipe_ep0_in->user_data = USB_PID_DATA1;
+        USBFSH->HOST_TX_CTRL = (*tog == USB_PID_DATA1) ? USBFS_UH_T_TOG : 0x00;
+        break;
+    }
+
+    rt_uint16_t try = 3;
+    if ((pipe->ep.bmAttributes & USB_EP_ATTR_TYPE_MASK) == USB_EP_ATTR_CONTROL)
+        try = 1000;
+
+    while(try--)
+    {
+        USBFSH->HOST_EP_PID = (usb_pid << 4) | (pipe->ep.bEndpointAddress & 0x0F);
+        if (rt_completion_wait(&urb_completion, timeouts) != RT_EOK)
+            continue;
+
+        if (USBFSH->INT_ST & USBHS_UIS_TOG_OK)
+            *tog = (*tog == USB_PID_DATA0) ? USB_PID_DATA1 : USB_PID_DATA0;
+
+        switch(USBFSH->INT_ST & USBHS_UIS_H_RES_MASK)
+        {
+        case USB_PID_DATA0:
+        case USB_PID_DATA1:
+            pipe->status = UPIPE_STATUS_OK;
+            if (pipe->callback != RT_NULL)
+                pipe->callback(pipe);
+            if (usb_pid == USB_PID_IN)
+            {
+                rt_memcpy(buffer, usb_rx_buf, USBFSH->RX_LEN);
+                return USBFSH->RX_LEN;
+            }
+            return nbytes;
+
+        case USB_PID_ACK:
+            pipe->status = UPIPE_STATUS_OK;
+            if (pipe->callback != RT_NULL)
+                pipe->callback(pipe);
+            return nbytes;
+        case USB_PID_NAK:
+            if (pipe->ep.bmAttributes == USB_EP_ATTR_INT)
+                rt_thread_delay((pipe->ep.bInterval * RT_TICK_PER_SECOND / 1000) > 0 ? (pipe->ep.bInterval * RT_TICK_PER_SECOND / 1000) : 1);
+            rt_thread_mdelay(1);
+            continue;
+
+        case USB_PID_STALL:
+            pipe->status = UPIPE_STATUS_STALL;
+            if (pipe->callback != RT_NULL)
+                pipe->callback(pipe);
+            return 0;
+
+        default:
+            break;
+        }
+    }
+
+    pipe->status = UPIPE_STATUS_ERROR;
+    if (pipe->callback != RT_NULL)
+        pipe->callback(pipe);
+
+    return -RT_ERROR;
+}
+
+rt_err_t usbh_open_pipe(upipe_t pipe)
+{
+    pipe->pipe_index = pipe->inst->address & USBFS_USB_ADDR_MASK;
+    pipe->user_data = rt_malloc(sizeof(rt_uint8_t));
+    *(rt_uint8_t *)pipe->user_data = (pipe->ep.bEndpointAddress & USB_DIR_IN) ? USB_PID_DATA0 : USB_PID_DATA0;
+    return RT_EOK;
+}
+
+rt_err_t usbh_close_pipe(upipe_t pipe)
+{
+    rt_free(pipe->user_data);
+    return RT_EOK;
+}
+
+rt_err_t hcd_init(rt_device_t dev)
+{
+    //Force                  reset handler        clear FIFO & interrupt flags
+    USBFSH->BASE_CTRL = USBFS_UC_RESET_SIE | USBFS_UC_CLR_ALL;
+    rt_thread_mdelay(20);
+    USBFSH->BASE_CTRL = 0;     //Set SIE to 0 manually
+
+    USBFSH->BASE_CTRL = USBFS_UC_HOST_MODE;
+    USBFSH->HOST_CTRL = 0;
+    USBFSH->DEV_ADDR = 0;
+    USBFSH->HOST_EP_MOD = USBFS_UH_EP_TX_EN | USBFS_UH_EP_RX_EN; //SETUP/OUT/IN
+
+    USBFSH->HOST_RX_DMA = (uint32_t)usb_rx_buf;
+    USBFSH->HOST_TX_DMA = (uint32_t)usb_tx_buf;
+
+    USBFSH->HOST_RX_CTRL = 0;
+    USBFSH->HOST_TX_CTRL = 0;
+    USBFSH->BASE_CTRL = USBFS_UC_HOST_MODE | USBFS_UC_INT_BUSY | USBFS_UC_DMA_EN;
+
+    USBFSH->INT_FG = 0xFF;
+    USBFSH->INT_EN = USBFS_UIE_TRANSFER | USBFS_UIE_DETECT;
+
+    if( SystemCoreClock == 144000000 )
+        RCC_OTGFSCLKConfig( RCC_OTGFSCLKSource_PLLCLK_Div3 );
+    else if( SystemCoreClock == 96000000 )
+        RCC_OTGFSCLKConfig( RCC_OTGFSCLKSource_PLLCLK_Div2 );
+    else if( SystemCoreClock == 48000000 )
+        RCC_OTGFSCLKConfig( RCC_OTGFSCLKSource_PLLCLK_Div1 );
+    RCC_AHBPeriphClockCmd( RCC_AHBPeriph_OTG_FS, ENABLE );
+
+    NVIC_EnableIRQ(OTG_FS_IRQn);
+
+    rt_completion_init(&urb_completion);
+
+    return RT_EOK;
+}
+
+static struct uhcd_ops uhcd_ops =
+{
+    .reset_port = usbh_reset_port,
+    .pipe_xfer = usbh_pipe_xfer,
+    .open_pipe = usbh_open_pipe,
+    .close_pipe = usbh_close_pipe,
+};
+
+void OTG_HS_IRQHandler() __attribute__((interrupt("WCH-Interrupt-fast")));
+void OTG_HS_IRQHandler()
+{
+    rt_interrupt_enter();
+
+    if (USBFSH->INT_FG & USBFS_UIF_TRANSFER)
+    {
+        USBFSH->HOST_EP_PID = 0x00;
+        USBFSH->INT_FG = USBFS_UIF_TRANSFER;
+        rt_completion_done(&urb_completion);                            //本应在此处理的中断在传输函数里进行枚举
+        rt_kprintf("USB: Transfer finished\n");
+    }
+    else if (USBFSH->INT_FG & USBFS_UIF_DETECT)
+    {
+        if (USBFSH->MIS_ST & USBFS_UMS_DEV_ATTACH)
+        {
+            rt_usbh_root_hub_connect_handler(&uhcd, 1, RT_FALSE);
+            rt_kprintf("USB: Connect\n");
+        }
+        else
+        {
+            USBFSH->HOST_SETUP &= ~USBFS_UH_SOF_EN;
+            USBFSH->HOST_CTRL &= ~USBFS_UH_PORT_EN;
+
+            rt_usbh_root_hub_disconnect_handler(&uhcd, 1);
+            rt_kprintf("USB: Disconnect\n");
+        }
+        USBFSH->INT_FG = USBFS_UIF_DETECT;
+    }
+    else
+    {
+        rt_kprintf("USB: Unknown\n");
+    }
+
+    rt_interrupt_leave();
+}
+
+int rt_hw_usbh_init()
+{
+    rt_err_t res = -RT_ERROR;
+
+    rt_memset((void *)&uhcd, 0, sizeof(struct uhcd));
+    uhcd.parent.type = RT_Device_Class_USBHost;
+    uhcd.parent.init = hcd_init;
+    uhcd.ops = &uhcd_ops;
+    uhcd.num_ports = 1;
+
+    res = rt_device_register(&uhcd.parent, "usbh", RT_DEVICE_FLAG_DEACTIVATE);
+
+    if (res != RT_EOK)
+    {
+        rt_kprintf("register usb host failed res = %d\r\n", res);
+        return -RT_ERROR;
+    }
+
+    rt_usb_host_init();
+
+    return RT_EOK;
+}
+#endif //BSP_USING_USBH
\ No newline at end of file
diff --git a/bsp/wch/risc-v/Libraries/ch32_drivers/drv_usbh.h b/bsp/wch/risc-v/Libraries/ch32_drivers/drv_usbh.h
new file mode 100644
index 0000000000..f2544d4793
--- /dev/null
+++ b/bsp/wch/risc-v/Libraries/ch32_drivers/drv_usbh.h
@@ -0,0 +1,19 @@
+/*
+ * Copyright (c) 2006-2024, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2024-4-1       IceBear003   the first version
+ */
+
+#ifndef __DRV_USBH_H_
+#define __DRV_USBH_H_
+
+#include <rtthread.h>
+#include <rtdevice.h>
+
+int rt_hw_usbh_init();
+
+#endif
\ No newline at end of file
diff --git a/bsp/wch/risc-v/Libraries/ch32v30x_libraries/ch32v307_hal/include/ch32v30x_usb.h b/bsp/wch/risc-v/Libraries/ch32v30x_libraries/ch32v307_hal/include/ch32v30x_usb.h
new file mode 100644
index 0000000000..9bfdeb187a
--- /dev/null
+++ b/bsp/wch/risc-v/Libraries/ch32v30x_libraries/ch32v307_hal/include/ch32v30x_usb.h
@@ -0,0 +1,833 @@
+/********************************** (C) COPYRIGHT *******************************
+* File Name          : system_ch32v30x.h
+* Author             : WCH
+* Version            : V1.0.0
+* Date               : 2022/08/20
+* Description        : CH32V30x Device Peripheral Access Layer System Header File.
+*********************************************************************************
+* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
+* Attention: This software (modified or not) and binary are used for
+* microcontroller manufactured by Nanjing Qinheng Microelectronics.
+*******************************************************************************/
+
+#ifndef __CH32V30x_USB_H
+#define __CH32V30x_USB_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/*******************************************************************************/
+/* Header File */
+#include "stdint.h"
+
+/*******************************************************************************/
+/* USB Communication Related Macro Definition */
+/* USB Endpoint0 Size */
+#ifndef DEFAULT_ENDP0_SIZE
+#define DEFAULT_ENDP0_SIZE          8          // default maximum packet size for endpoint 0
+#endif
+#ifndef MAX_PACKET_SIZE
+#define MAX_PACKET_SIZE             64         // maximum packet size
+#endif
+
+/* USB PID */
+#ifndef USB_PID_SETUP
+#define USB_PID_NULL                0x00
+#define USB_PID_SOF                 0x05
+#define USB_PID_SETUP               0x0D
+#define USB_PID_IN                  0x09
+#define USB_PID_OUT                 0x01
+#define USB_PID_NYET                0x06
+#define USB_PID_ACK                 0x02
+#define USB_PID_NAK                 0x0A
+#define USB_PID_STALL               0x0E
+#define USB_PID_DATA0               0x03
+#define USB_PID_DATA1               0x0B
+#define USB_PID_DATA2               0x07
+#define USB_PID_MDATA               0x0F
+#define USB_PID_PRE                 0x0C
+#endif
+
+/* USB standard device request code */
+#ifndef USB_GET_DESCRIPTOR
+#define USB_GET_STATUS              0x00
+#define USB_CLEAR_FEATURE           0x01
+#define USB_SET_FEATURE             0x03
+#define USB_SET_ADDRESS             0x05
+#define USB_GET_DESCRIPTOR          0x06
+#define USB_SET_DESCRIPTOR          0x07
+#define USB_GET_CONFIGURATION       0x08
+#define USB_SET_CONFIGURATION       0x09
+#define USB_GET_INTERFACE           0x0A
+#define USB_SET_INTERFACE           0x0B
+#define USB_SYNCH_FRAME             0x0C
+#endif
+
+#define DEF_STRING_DESC_LANG        0x00
+#define DEF_STRING_DESC_MANU        0x01
+#define DEF_STRING_DESC_PROD        0x02
+#define DEF_STRING_DESC_SERN        0x03
+
+/* USB hub class request code */
+#ifndef HUB_GET_DESCRIPTOR
+#define HUB_GET_STATUS              0x00
+#define HUB_CLEAR_FEATURE           0x01
+#define HUB_GET_STATE               0x02
+#define HUB_SET_FEATURE             0x03
+#define HUB_GET_DESCRIPTOR          0x06
+#define HUB_SET_DESCRIPTOR          0x07
+#endif
+
+/* USB HID class request code */
+#ifndef HID_GET_REPORT
+#define HID_GET_REPORT              0x01
+#define HID_GET_IDLE                0x02
+#define HID_GET_PROTOCOL            0x03
+#define HID_SET_REPORT              0x09
+#define HID_SET_IDLE                0x0A
+#define HID_SET_PROTOCOL            0x0B
+#endif
+
+/* USB CDC Class request code */
+#ifndef CDC_GET_LINE_CODING
+#define CDC_GET_LINE_CODING         0x21                                      /* This request allows the host to find out the currently configured line coding */
+#define CDC_SET_LINE_CODING         0x20                                      /* Configures DTE rate, stop-bits, parity, and number-of-character */
+#define CDC_SET_LINE_CTLSTE         0x22                                      /* This request generates RS-232/V.24 style control signals */
+#define CDC_SEND_BREAK              0x23                                      /* Sends special carrier modulation used to specify RS-232 style break */
+#endif
+
+/* Bit Define for USB Request Type */
+#ifndef USB_REQ_TYP_MASK
+#define USB_REQ_TYP_IN              0x80
+#define USB_REQ_TYP_OUT             0x00
+#define USB_REQ_TYP_READ            0x80
+#define USB_REQ_TYP_WRITE           0x00
+#define USB_REQ_TYP_MASK            0x60
+#define USB_REQ_TYP_STANDARD        0x00
+#define USB_REQ_TYP_CLASS           0x20
+#define USB_REQ_TYP_VENDOR          0x40
+#define USB_REQ_TYP_RESERVED        0x60
+#define USB_REQ_RECIP_MASK          0x1F
+#define USB_REQ_RECIP_DEVICE        0x00
+#define USB_REQ_RECIP_INTERF        0x01
+#define USB_REQ_RECIP_ENDP          0x02
+#define USB_REQ_RECIP_OTHER         0x03
+#define USB_REQ_FEAT_REMOTE_WAKEUP  0x01
+#define USB_REQ_FEAT_ENDP_HALT      0x00
+#endif
+
+/* USB Descriptor Type */
+#ifndef USB_DESCR_TYP_DEVICE
+#define USB_DESCR_TYP_DEVICE        0x01
+#define USB_DESCR_TYP_CONFIG        0x02
+#define USB_DESCR_TYP_STRING        0x03
+#define USB_DESCR_TYP_INTERF        0x04
+#define USB_DESCR_TYP_ENDP          0x05
+#define USB_DESCR_TYP_QUALIF        0x06
+#define USB_DESCR_TYP_SPEED         0x07
+#define USB_DESCR_TYP_OTG           0x09
+#define USB_DESCR_TYP_BOS           0X0F
+#define USB_DESCR_TYP_HID           0x21
+#define USB_DESCR_TYP_REPORT        0x22
+#define USB_DESCR_TYP_PHYSIC        0x23
+#define USB_DESCR_TYP_CS_INTF       0x24
+#define USB_DESCR_TYP_CS_ENDP       0x25
+#define USB_DESCR_TYP_HUB           0x29
+#endif
+
+/* USB Device Class */
+#ifndef USB_DEV_CLASS_HUB
+#define USB_DEV_CLASS_RESERVED      0x00
+#define USB_DEV_CLASS_AUDIO         0x01
+#define USB_DEV_CLASS_COMMUNIC      0x02
+#define USB_DEV_CLASS_HID           0x03
+#define USB_DEV_CLASS_MONITOR       0x04
+#define USB_DEV_CLASS_PHYSIC_IF     0x05
+#define USB_DEV_CLASS_POWER         0x06
+#define USB_DEV_CLASS_IMAGE         0x06
+#define USB_DEV_CLASS_PRINTER       0x07
+#define USB_DEV_CLASS_STORAGE       0x08
+#define USB_DEV_CLASS_HUB           0x09
+#define USB_DEV_CLASS_VEN_SPEC      0xFF
+#endif
+
+/* USB Hub Class Request */
+#ifndef HUB_GET_HUB_DESCRIPTOR
+#define HUB_CLEAR_HUB_FEATURE       0x20
+#define HUB_CLEAR_PORT_FEATURE      0x23
+#define HUB_GET_BUS_STATE           0xA3
+#define HUB_GET_HUB_DESCRIPTOR      0xA0
+#define HUB_GET_HUB_STATUS          0xA0
+#define HUB_GET_PORT_STATUS         0xA3
+#define HUB_SET_HUB_DESCRIPTOR      0x20
+#define HUB_SET_HUB_FEATURE         0x20
+#define HUB_SET_PORT_FEATURE        0x23
+#endif
+
+/* Hub Class Feature Selectors */
+#ifndef HUB_PORT_RESET
+#define HUB_C_HUB_LOCAL_POWER       0
+#define HUB_C_HUB_OVER_CURRENT      1
+#define HUB_PORT_CONNECTION         0
+#define HUB_PORT_ENABLE             1
+#define HUB_PORT_SUSPEND            2
+#define HUB_PORT_OVER_CURRENT       3
+#define HUB_PORT_RESET              4
+#define HUB_PORT_POWER              8
+#define HUB_PORT_LOW_SPEED          9
+#define HUB_C_PORT_CONNECTION       16
+#define HUB_C_PORT_ENABLE           17
+#define HUB_C_PORT_SUSPEND          18
+#define HUB_C_PORT_OVER_CURRENT     19
+#define HUB_C_PORT_RESET            20
+#endif
+
+/* USB UDisk */
+#ifndef USB_BO_CBW_SIZE
+#define USB_BO_CBW_SIZE             0x1F
+#define USB_BO_CSW_SIZE             0x0D
+#endif
+#ifndef USB_BO_CBW_SIG0
+#define USB_BO_CBW_SIG0             0x55
+#define USB_BO_CBW_SIG1             0x53
+#define USB_BO_CBW_SIG2             0x42
+#define USB_BO_CBW_SIG3             0x43
+#define USB_BO_CSW_SIG0             0x55
+#define USB_BO_CSW_SIG1             0x53
+#define USB_BO_CSW_SIG2             0x42
+#define USB_BO_CSW_SIG3             0x53
+#endif
+
+
+/******************************************************************************/
+/* USBHS Clock Configuration Related Macro Definition */
+#define USB_CLK_SRC                 0x80000000
+#define USBHS_PLL_ALIVE             0x40000000
+#define USBHS_PLL_CKREF_MASK        0x30000000
+#define USBHS_PLL_CKREF_3M          0x00000000
+#define USBHS_PLL_CKREF_4M          0x10000000
+#define USBHS_PLL_CKREF_8M          0x20000000
+#define USBHS_PLL_CKREF_5M          0x30000000
+#define USBHS_PLL_SRC               0x08000000
+#define USBHS_PLL_SRC_PRE_MASK      0x07000000
+#define USBHS_PLL_SRC_PRE_DIV1      0x00000000
+#define USBHS_PLL_SRC_PRE_DIV2      0x01000000
+#define USBHS_PLL_SRC_PRE_DIV3      0x02000000
+#define USBHS_PLL_SRC_PRE_DIV4      0x03000000
+#define USBHS_PLL_SRC_PRE_DIV5      0x04000000
+#define USBHS_PLL_SRC_PRE_DIV6      0x05000000
+#define USBHS_PLL_SRC_PRE_DIV7      0x06000000
+#define USBHS_PLL_SRC_PRE_DIV8      0x07000000
+
+
+/*******************************************************************************/
+/* USBHS Related Register Macro Definition */
+
+/* R8_USB_CTRL */
+#define USBHS_UC_HOST_MODE          0x80
+#define USBHS_UC_SPEED_TYPE         0x60
+#define USBHS_UC_SPEED_LOW          0x40
+#define USBHS_UC_SPEED_FULL         0x00
+#define USBHS_UC_SPEED_HIGH         0x20
+#define USBHS_UC_DEV_PU_EN          0x10
+#define USBHS_UC_INT_BUSY           0x08
+#define USBHS_UC_RESET_SIE          0x04
+#define USBHS_UC_CLR_ALL            0x02
+#define USBHS_UC_DMA_EN             0x01
+
+/* R8_USB_INT_EN */
+#define USBHS_UIE_DEV_NAK           0x80
+#define USBHS_UIE_ISO_ACT           0x40
+#define USBHS_UIE_SETUP_ACT         0x20
+#define USBHS_UIE_FIFO_OV           0x10
+#define USBHS_UIE_SOF_ACT           0x08
+#define USBHS_UIE_SUSPEND           0x04
+#define USBHS_UIE_TRANSFER          0x02
+#define USBHS_UIE_DETECT            0x01
+#define USBHS_UIE_BUS_RST           0x01
+
+/* R16_USB_DEV_AD */
+#define USBHS_MASK_USB_ADDR         0x7F
+
+/* R16_USB_FRAME_NO */
+#define USBHS_MICRO_FRAME_NUM       0xE000
+#define USBHS_SOF_FRAME_NUM         0x07FF
+
+/* R8_USB_SUSPEND */
+#define USBHS_USB_LINESTATE         0x30
+#define USBHS_USB_WAKEUP_ST         0x04
+#define USBHS_USB_SYS_MOD           0x03
+
+/* R8_USB_SPEED_TYPE */
+#define USBHS_USB_SPEED_TYPE        0x03
+#define USBHS_USB_SPEED_LOW         0x02
+#define USBHS_USB_SPEED_FULL        0x00
+#define USBHS_USB_SPEED_HIGH        0x01
+
+/* R8_USB_MIS_ST */
+#define USBHS_UMS_SOF_PRES          0x80
+#define USBHS_UMS_SOF_ACT           0x40
+#define USBHS_UMS_SIE_FREE          0x20
+#define USBHS_UMS_R_FIFO_RDY        0x10
+#define USBHS_UMS_BUS_RESET         0x08
+#define USBHS_UMS_SUSPEND           0x04
+#define USBHS_UMS_DEV_ATTACH        0x02
+#define USBHS_UMS_SPLIT_CAN         0x01
+
+/* R8_USB_INT_FG */
+#define USBHS_UIF_ISO_ACT           0x40
+#define USBHS_UIF_SETUP_ACT         0x20
+#define USBHS_UIF_FIFO_OV           0x10
+#define USBHS_UIF_HST_SOF           0x08
+#define USBHS_UIF_SUSPEND           0x04
+#define USBHS_UIF_TRANSFER          0x02
+#define USBHS_UIF_DETECT            0x01
+#define USBHS_UIF_BUS_RST           0x01
+
+/* R8_USB_INT_ST */
+#define USBHS_UIS_IS_NAK            0x80
+#define USBHS_UIS_TOG_OK            0x40
+#define USBHS_UIS_TOKEN_MASK        0x30
+#define USBHS_UIS_TOKEN_OUT         0x00
+#define USBHS_UIS_TOKEN_SOF         0x10
+#define USBHS_UIS_TOKEN_IN          0x20
+#define USBHS_UIS_TOKEN_SETUP       0x30
+#define USBHS_UIS_ENDP_MASK         0x0F
+#define USBHS_UIS_H_RES_MASK        0x0F
+
+/* R16_USB_RX_LEN */
+#define USBHS_USB_RX_LEN            0xFFFF
+
+/* R32_UEP_CONFIG */
+#define USBHS_UEP15_R_EN            0x80000000
+#define USBHS_UEP14_R_EN            0x40000000
+#define USBHS_UEP13_R_EN            0x20000000
+#define USBHS_UEP12_R_EN            0x10000000
+#define USBHS_UEP11_R_EN            0x08000000
+#define USBHS_UEP10_R_EN            0x04000000
+#define USBHS_UEP9_R_EN             0x02000000
+#define USBHS_UEP8_R_EN             0x01000000
+#define USBHS_UEP7_R_EN             0x00800000
+#define USBHS_UEP6_R_EN             0x00400000
+#define USBHS_UEP5_R_EN             0x00200000
+#define USBHS_UEP4_R_EN             0x00100000
+#define USBHS_UEP3_R_EN             0x00080000
+#define USBHS_UEP2_R_EN             0x00040000
+#define USBHS_UEP1_R_EN             0x00020000
+#define USBHS_UEP0_R_EN             0x00010000
+#define USBHS_UEP15_T_EN            0x00008000
+#define USBHS_UEP14_T_EN            0x00004000
+#define USBHS_UEP13_T_EN            0x00002000
+#define USBHS_UEP12_T_EN            0x00001000
+#define USBHS_UEP11_T_EN            0x00000800
+#define USBHS_UEP10_T_EN            0x00000400
+#define USBHS_UEP9_T_EN             0x00000200
+#define USBHS_UEP8_T_EN             0x00000100
+#define USBHS_UEP7_T_EN             0x00000080
+#define USBHS_UEP6_T_EN             0x00000040
+#define USBHS_UEP5_T_EN             0x00000020
+#define USBHS_UEP4_T_EN             0x00000010
+#define USBHS_UEP3_T_EN             0x00000008
+#define USBHS_UEP2_T_EN             0x00000004
+#define USBHS_UEP1_T_EN             0x00000002
+#define USBHS_UEP0_T_EN             0x00000001
+
+/* R32_UEP_TYPE */
+#define USBHS_UEP15_R_TYPE          0x80000000
+#define USBHS_UEP14_R_TYPE          0x40000000
+#define USBHS_UEP13_R_TYPE          0x20000000
+#define USBHS_UEP12_R_TYPE          0x10000000
+#define USBHS_UEP11_R_TYPE          0x08000000
+#define USBHS_UEP10_R_TYPE          0x04000000
+#define USBHS_UEP9_R_TYPE           0x02000000
+#define USBHS_UEP8_R_TYPE           0x01000000
+#define USBHS_UEP7_R_TYPE           0x00800000
+#define USBHS_UEP6_R_TYPE           0x00400000
+#define USBHS_UEP5_R_TYPE           0x00200000
+#define USBHS_UEP4_R_TYPE           0x00100000
+#define USBHS_UEP3_R_TYPE           0x00080000
+#define USBHS_UEP2_R_TYPE           0x00040000
+#define USBHS_UEP1_R_TYPE           0x00020000
+#define USBHS_UEP0_R_TYPE           0x00010000
+#define USBHS_UEP15_T_TYPE          0x00008000
+#define USBHS_UEP14_T_TYPE          0x00004000
+#define USBHS_UEP13_T_TYPE          0x00002000
+#define USBHS_UEP12_T_TYPE          0x00001000
+#define USBHS_UEP11_T_TYPE          0x00000800
+#define USBHS_UEP10_T_TYPE          0x00000400
+#define USBHS_UEP9_T_TYPE           0x00000200
+#define USBHS_UEP8_T_TYPE           0x00000100
+#define USBHS_UEP7_T_TYPE           0x00000080
+#define USBHS_UEP6_T_TYPE           0x00000040
+#define USBHS_UEP5_T_TYPE           0x00000020
+#define USBHS_UEP4_T_TYPE           0x00000010
+#define USBHS_UEP3_T_TYPE           0x00000008
+#define USBHS_UEP2_T_TYPE           0x00000004
+#define USBHS_UEP1_T_TYPE           0x00000002
+#define USBHS_UEP0_T_TYPE           0x00000001
+
+/* R32_UEP_BUF_MOD */
+#define USBHS_UEP15_ISO_BUF_MOD     0x80000000
+#define USBHS_UEP14_ISO_BUF_MOD     0x40000000
+#define USBHS_UEP13_ISO_BUF_MOD     0x20000000
+#define USBHS_UEP12_ISO_BUF_MOD     0x10000000
+#define USBHS_UEP11_ISO_BUF_MOD     0x08000000
+#define USBHS_UEP10_ISO_BUF_MOD     0x04000000
+#define USBHS_UEP9_ISO_BUF_MOD      0x02000000
+#define USBHS_UEP8_ISO_BUF_MOD      0x01000000
+#define USBHS_UEP7_ISO_BUF_MOD      0x00800000
+#define USBHS_UEP6_ISO_BUF_MOD      0x00400000
+#define USBHS_UEP5_ISO_BUF_MOD      0x00200000
+#define USBHS_UEP4_ISO_BUF_MOD      0x00100000
+#define USBHS_UEP3_ISO_BUF_MOD      0x00080000
+#define USBHS_UEP2_ISO_BUF_MOD      0x00040000
+#define USBHS_UEP1_ISO_BUF_MOD      0x00020000
+#define USBHS_UEP0_ISO_BUF_MOD      0x00010000
+#define USBHS_UEP15_BUF_MOD         0x00008000
+#define USBHS_UEP14_BUF_MOD         0x00004000
+#define USBHS_UEP13_BUF_MOD         0x00002000
+#define USBHS_UEP12_BUF_MOD         0x00001000
+#define USBHS_UEP11_BUF_MOD         0x00000800
+#define USBHS_UEP10_BUF_MOD         0x00000400
+#define USBHS_UEP9_BUF_MOD          0x00000200
+#define USBHS_UEP8_BUF_MOD          0x00000100
+#define USBHS_UEP7_BUF_MOD          0x00000080
+#define USBHS_UEP6_BUF_MOD          0x00000040
+#define USBHS_UEP5_BUF_MOD          0x00000020
+#define USBHS_UEP4_BUF_MOD          0x00000010
+#define USBHS_UEP3_BUF_MOD          0x00000008
+#define USBHS_UEP2_BUF_MOD          0x00000004
+#define USBHS_UEP1_BUF_MOD          0x00000002
+#define USBHS_UEP0_BUF_MOD          0x00000001
+
+/* R32_UEP0_DMA */
+#define USBHS_UEP0_DMA              0x0000FFFF
+
+/* R32_UEPn_TX_DMA, n=1-15 */
+#define USBHS_UEPn_TX_DMA           0x0000FFFF
+
+/* R32_UEPn_RX_DMA, n=1-15 */
+#define USBHS_UEPn_RX_DMA           0x0000FFFF
+
+/* R16_UEPn_MAX_LEN, n=0-15 */
+#define USBHS_UEPn_MAX_LEN          0x07FF
+
+/* R16_UEPn_T_LEN, n=0-15 */
+#define USBHS_UEPn_T_LEN            0x07FF
+
+/* R8_UEPn_TX_CTRL, n=0-15 */
+#define USBHS_UEP_T_TOG_AUTO        0x20
+#define USBHS_UEP_T_TOG_MASK        0x18
+#define USBHS_UEP_T_TOG_DATA0       0x00
+#define USBHS_UEP_T_TOG_DATA1       0x08
+#define USBHS_UEP_T_TOG_DATA2       0x10
+#define USBHS_UEP_T_TOG_MDATA       0x18
+#define USBHS_UEP_T_RES_MASK        0x03
+#define USBHS_UEP_T_RES_ACK         0x00
+#define USBHS_UEP_T_RES_NYET        0x01
+#define USBHS_UEP_T_RES_NAK         0x02
+#define USBHS_UEP_T_RES_STALL       0x03
+
+/* R8_UEPn_TX_CTRL, n=0-15 */
+#define USBHS_UEP_R_TOG_AUTO        0x20
+#define USBHS_UEP_R_TOG_MASK        0x18
+#define USBHS_UEP_R_TOG_DATA0       0x00
+#define USBHS_UEP_R_TOG_DATA1       0x08
+#define USBHS_UEP_R_TOG_DATA2       0x10
+#define USBHS_UEP_R_TOG_MDATA       0x18
+#define USBHS_UEP_R_RES_MASK        0x03
+#define USBHS_UEP_R_RES_ACK         0x00
+#define USBHS_UEP_R_RES_NYET        0x01
+#define USBHS_UEP_R_RES_NAK         0x02
+#define USBHS_UEP_R_RES_STALL       0x03
+
+/* R8_UHOST_CTRL */
+#define USBHS_UH_SOF_EN             0x80
+#define USBHS_UH_SOF_FREE           0x40
+#define USBHS_UH_PHY_SUSPENDM       0x10
+#define USBHS_UH_REMOTE_WKUP        0x08
+#define USBHS_UH_TX_BUS_RESUME      0x04
+#define USBHS_UH_TX_BUS_SUSPEND     0x02
+#define USBHS_UH_TX_BUS_RESET       0x01
+
+/* R32_UH_CONFIG */
+#define USBHS_UH_EP_RX_EN           0x00040000
+#define USBHS_UH_EP_TX_EN           0x00000008
+
+/* R32_UH_EP_TYPE */
+#define USBHS_UH_EP_RX_TYPE         0x00040000
+#define USBHS_UH_EP_TX_TYPE         0x00000008
+
+/* R32_UH_RX_DMA */
+#define USBHS_UH_RX_DMA             0x0000FFFC
+
+/* R32_UH_TX_DMA */
+#define USBHS_UH_TX_DMA             0x0000FFFF
+
+/* R16_UH_RX_MAX_LEN */
+#define USBHS_UH_RX_MAX_LEN         0x07FF
+
+/* R8_UH_EP_PID */
+#define USBHS_UH_TOKEN_MASK         0xF0
+#define USBHS_UH_ENDP_MASK          0x0F
+
+/* R8_UH_RX_CTRL */
+#define USBHS_UH_R_DATA_NO          0x40
+#define USBHS_UH_R_TOG_AUTO         0x20
+#define USBHS_UH_R_TOG_MASK         0x18
+#define USBHS_UH_R_TOG_DATA0        0x00
+#define USBHS_UH_R_TOG_DATA1        0x08
+#define USBHS_UH_R_TOG_DATA2        0x10
+#define USBHS_UH_R_TOG_MDATA        0x18
+#define USBHS_UH_R_RES_NO           0x04
+#define USBHS_UH_R_RES_MASK         0x03
+#define USBHS_UH_R_RES_ACK          0x00
+#define USBHS_UH_R_RES_NYET         0x01
+#define USBHS_UH_R_RES_NAK          0x02
+#define USBHS_UH_R_RES_STALL        0x03
+
+/* R16_UH_TX_LEN */
+#define USBHS_UH_TX_LEN             0x07FF
+
+/* R8_UH_TX_CTRL */
+#define USBHS_UH_T_DATA_NO          0x40
+#define USBHS_UH_T_AUTO_TOG         0x20
+#define USBHS_UH_T_TOG_MASK         0x18
+#define USBHS_UH_T_TOG_DATA0        0x00
+#define USBHS_UH_T_TOG_DATA1        0x08
+#define USBHS_UH_T_TOG_DATA2        0x10
+#define USBHS_UH_T_TOG_MDATA        0x18
+#define USBHS_UH_T_RES_NO           0x04
+#define USBHS_UH_T_RES_MASK         0x03
+#define USBHS_UH_T_RES_ACK          0x00
+#define USBHS_UH_T_RES_NYET         0x01
+#define USBHS_UH_T_RES_NAK          0x02
+#define USBHS_UH_T_RES_STALL        0x03
+
+/* R16_UH_SPLIT_DATA */
+#define USBHS_UH_SPLIT_DATA         0x0FFF
+
+
+/*******************************************************************************/
+/* USBFS Related Register Macro Definition */
+
+/* R8_USB_CTRL */
+#define USBFS_UC_HOST_MODE          0x80
+#define USBFS_UC_LOW_SPEED          0x40
+#define USBFS_UC_DEV_PU_EN          0x20
+#define USBFS_UC_SYS_CTRL_MASK      0x30
+#define USBFS_UC_SYS_CTRL0          0x00
+#define USBFS_UC_SYS_CTRL1          0x10
+#define USBFS_UC_SYS_CTRL2          0x20
+#define USBFS_UC_SYS_CTRL3          0x30
+#define USBFS_UC_INT_BUSY           0x08
+#define USBFS_UC_RESET_SIE          0x04
+#define USBFS_UC_CLR_ALL            0x02
+#define USBFS_UC_DMA_EN             0x01
+
+/* R8_USB_INT_EN */
+#define USBFS_UIE_DEV_SOF           0x80
+#define USBFS_UIE_DEV_NAK           0x40
+#define USBFS_UIE_FIFO_OV           0x10
+#define USBFS_UIE_HST_SOF           0x08
+#define USBFS_UIE_SUSPEND           0x04
+#define USBFS_UIE_TRANSFER          0x02
+#define USBFS_UIE_DETECT            0x01
+#define USBFS_UIE_BUS_RST           0x01
+
+/* R8_USB_DEV_AD */
+#define USBFS_UDA_GP_BIT            0x80
+#define USBFS_USB_ADDR_MASK         0x7F
+
+/* R8_USB_MIS_ST */
+#define USBFS_UMS_SOF_PRES          0x80
+#define USBFS_UMS_SOF_ACT           0x40
+#define USBFS_UMS_SIE_FREE          0x20
+#define USBFS_UMS_R_FIFO_RDY        0x10
+#define USBFS_UMS_BUS_RESET         0x08
+#define USBFS_UMS_SUSPEND           0x04
+#define USBFS_UMS_DM_LEVEL          0x02
+#define USBFS_UMS_DEV_ATTACH        0x01
+
+/* R8_USB_INT_FG */
+#define USBFS_U_IS_NAK              0x80    // RO, indicate current USB transfer is NAK received
+#define USBFS_U_TOG_OK              0x40    // RO, indicate current USB transfer toggle is OK
+#define USBFS_U_SIE_FREE            0x20    // RO, indicate USB SIE free status
+#define USBFS_UIF_FIFO_OV           0x10    // FIFO overflow interrupt flag for USB, direct bit address clear or write 1 to clear
+#define USBFS_UIF_HST_SOF           0x08    // host SOF timer interrupt flag for USB host, direct bit address clear or write 1 to clear
+#define USBFS_UIF_SUSPEND           0x04    // USB suspend or resume event interrupt flag, direct bit address clear or write 1 to clear
+#define USBFS_UIF_TRANSFER          0x02    // USB transfer completion interrupt flag, direct bit address clear or write 1 to clear
+#define USBFS_UIF_DETECT            0x01    // device detected event interrupt flag for USB host mode, direct bit address clear or write 1 to clear
+#define USBFS_UIF_BUS_RST           0x01    // bus reset event interrupt flag for USB device mode, direct bit address clear or write 1 to clear
+
+/* R8_USB_INT_ST */
+#define USBFS_UIS_IS_NAK            0x80      // RO, indicate current USB transfer is NAK received for USB device mode
+#define USBFS_UIS_TOG_OK            0x40      // RO, indicate current USB transfer toggle is OK
+#define USBFS_UIS_TOKEN_MASK        0x30      // RO, bit mask of current token PID code received for USB device mode
+#define USBFS_UIS_TOKEN_OUT         0x00
+#define USBFS_UIS_TOKEN_SOF         0x10
+#define USBFS_UIS_TOKEN_IN          0x20
+#define USBFS_UIS_TOKEN_SETUP       0x30
+// bUIS_TOKEN1 & bUIS_TOKEN0: current token PID code received for USB device mode
+//   00: OUT token PID received
+//   01: SOF token PID received
+//   10: IN token PID received
+//   11: SETUP token PID received
+#define USBFS_UIS_ENDP_MASK         0x0F      // RO, bit mask of current transfer endpoint number for USB device mode
+#define USBFS_UIS_H_RES_MASK        0x0F      // RO, bit mask of current transfer handshake response for USB host mode: 0000=no response, time out from device, others=handshake response PID received
+
+/* R32_USB_OTG_CR */
+#define USBFS_CR_SESS_VTH           0x20
+#define USBFS_CR_VBUS_VTH           0x10
+#define USBFS_CR_OTG_EN             0x08
+#define USBFS_CR_IDPU               0x04
+#define USBFS_CR_CHARGE_VBUS        0x02
+#define USBFS_CR_DISCHAR_VBUS       0x01
+
+/* R32_USB_OTG_SR */
+#define USBFS_SR_ID_DIG             0x08
+#define USBFS_SR_SESS_END           0x04
+#define USBFS_SR_SESS_VLD           0x02
+#define USBFS_SR_VBUS_VLD           0x01
+
+/* R8_UDEV_CTRL */
+#define USBFS_UD_PD_DIS             0x80      // disable USB UDP/UDM pulldown resistance: 0=enable pulldown, 1=disable
+#define USBFS_UD_DP_PIN             0x20      // ReadOnly: indicate current UDP pin level
+#define USBFS_UD_DM_PIN             0x10      // ReadOnly: indicate current UDM pin level
+#define USBFS_UD_LOW_SPEED          0x04      // enable USB physical port low speed: 0=full speed, 1=low speed
+#define USBFS_UD_GP_BIT             0x02      // general purpose bit
+#define USBFS_UD_PORT_EN            0x01      // enable USB physical port I/O: 0=disable, 1=enable
+
+/* R8_UEP4_1_MOD */
+#define USBFS_UEP1_RX_EN            0x80      // enable USB endpoint 1 receiving (OUT)
+#define USBFS_UEP1_TX_EN            0x40      // enable USB endpoint 1 transmittal (IN)
+#define USBFS_UEP1_BUF_MOD          0x10      // buffer mode of USB endpoint 1
+#define USBFS_UEP4_RX_EN            0x08      // enable USB endpoint 4 receiving (OUT)
+#define USBFS_UEP4_TX_EN            0x04      // enable USB endpoint 4 transmittal (IN)
+#define USBFS_UEP4_BUF_MOD          0x01
+
+/* R8_UEP2_3_MOD */
+#define USBFS_UEP3_RX_EN            0x80      // enable USB endpoint 3 receiving (OUT)
+#define USBFS_UEP3_TX_EN            0x40      // enable USB endpoint 3 transmittal (IN)
+#define USBFS_UEP3_BUF_MOD          0x10      // buffer mode of USB endpoint 3
+#define USBFS_UEP2_RX_EN            0x08      // enable USB endpoint 2 receiving (OUT)
+#define USBFS_UEP2_TX_EN            0x04      // enable USB endpoint 2 transmittal (IN)
+#define USBFS_UEP2_BUF_MOD          0x01      // buffer mode of USB endpoint 2
+
+/* R8_UEP5_6_MOD */
+#define USBFS_UEP6_RX_EN            0x80      // enable USB endpoint 6 receiving (OUT)
+#define USBFS_UEP6_TX_EN            0x40      // enable USB endpoint 6 transmittal (IN)
+#define USBFS_UEP6_BUF_MOD          0x10      // buffer mode of USB endpoint 6
+#define USBFS_UEP5_RX_EN            0x08      // enable USB endpoint 5 receiving (OUT)
+#define USBFS_UEP5_TX_EN            0x04      // enable USB endpoint 5 transmittal (IN)
+#define USBFS_UEP5_BUF_MOD          0x01      // buffer mode of USB endpoint 5
+
+/* R8_UEP7_MOD */
+#define USBFS_UEP7_RX_EN            0x08      // enable USB endpoint 7 receiving (OUT)
+#define USBFS_UEP7_TX_EN            0x04      // enable USB endpoint 7 transmittal (IN)
+#define USBFS_UEP7_BUF_MOD          0x01      // buffer mode of USB endpoint 7
+
+/* R8_UEPn_TX_CTRL */
+#define USBFS_UEP_T_AUTO_TOG        0x08      // enable automatic toggle after successful transfer completion on endpoint 1/2/3: 0=manual toggle, 1=automatic toggle
+#define USBFS_UEP_T_TOG             0x04      // prepared data toggle flag of USB endpoint X transmittal (IN): 0=DATA0, 1=DATA1
+#define USBFS_UEP_T_RES_MASK        0x03      // bit mask of handshake response type for USB endpoint X transmittal (IN)
+#define USBFS_UEP_T_RES_ACK         0x00
+#define USBFS_UEP_T_RES_NONE        0x01
+#define USBFS_UEP_T_RES_NAK         0x02
+#define USBFS_UEP_T_RES_STALL       0x03
+// bUEP_T_RES1 & bUEP_T_RES0: handshake response type for USB endpoint X transmittal (IN)
+//   00: DATA0 or DATA1 then expecting ACK (ready)
+//   01: DATA0 or DATA1 then expecting no response, time out from host, for non-zero endpoint isochronous transactions
+//   10: NAK (busy)
+//   11: STALL (error)
+// host aux setup
+
+/* R8_UEPn_RX_CTRL, n=0-7 */
+#define USBFS_UEP_R_AUTO_TOG        0x08      // enable automatic toggle after successful transfer completion on endpoint 1/2/3: 0=manual toggle, 1=automatic toggle
+#define USBFS_UEP_R_TOG             0x04      // expected data toggle flag of USB endpoint X receiving (OUT): 0=DATA0, 1=DATA1
+#define USBFS_UEP_R_RES_MASK        0x03      // bit mask of handshake response type for USB endpoint X receiving (OUT)
+#define USBFS_UEP_R_RES_ACK         0x00
+#define USBFS_UEP_R_RES_NONE        0x01
+#define USBFS_UEP_R_RES_NAK         0x02
+#define USBFS_UEP_R_RES_STALL       0x03
+// RB_UEP_R_RES1 & RB_UEP_R_RES0: handshake response type for USB endpoint X receiving (OUT)
+//   00: ACK (ready)
+//   01: no response, time out to host, for non-zero endpoint isochronous transactions
+//   10: NAK (busy)
+//   11: STALL (error)
+
+/* R8_UHOST_CTRL */
+#define USBFS_UH_PD_DIS             0x80      // disable USB UDP/UDM pulldown resistance: 0=enable pulldown, 1=disable
+#define USBFS_UH_DP_PIN             0x20      // ReadOnly: indicate current UDP pin level
+#define USBFS_UH_DM_PIN             0x10      // ReadOnly: indicate current UDM pin level
+#define USBFS_UH_LOW_SPEED          0x04      // enable USB port low speed: 0=full speed, 1=low speed
+#define USBFS_UH_BUS_RESET          0x02      // control USB bus reset: 0=normal, 1=force bus reset
+#define USBFS_UH_PORT_EN            0x01      // enable USB port: 0=disable, 1=enable port, automatic disabled if USB device detached
+
+/* R32_UH_EP_MOD */
+#define USBFS_UH_EP_TX_EN           0x40      // enable USB host OUT endpoint transmittal
+#define USBFS_UH_EP_TBUF_MOD        0x10      // buffer mode of USB host OUT endpoint
+// bUH_EP_TX_EN & bUH_EP_TBUF_MOD: USB host OUT endpoint buffer mode, buffer start address is UH_TX_DMA
+//   0 x:  disable endpoint and disable buffer
+//   1 0:  64 bytes buffer for transmittal (OUT endpoint)
+//   1 1:  dual 64 bytes buffer by toggle bit bUH_T_TOG selection for transmittal (OUT endpoint), total=128bytes
+#define USBFS_UH_EP_RX_EN           0x08      // enable USB host IN endpoint receiving
+#define USBFS_UH_EP_RBUF_MOD        0x01      // buffer mode of USB host IN endpoint
+// bUH_EP_RX_EN & bUH_EP_RBUF_MOD: USB host IN endpoint buffer mode, buffer start address is UH_RX_DMA
+//   0 x:  disable endpoint and disable buffer
+//   1 0:  64 bytes buffer for receiving (IN endpoint)
+//   1 1:  dual 64 bytes buffer by toggle bit bUH_R_TOG selection for receiving (IN endpoint), total=128bytes
+
+/* R16_UH_SETUP */
+#define USBFS_UH_PRE_PID_EN         0x0400      // USB host PRE PID enable for low speed device via hub
+#define USBFS_UH_SOF_EN             0x0004      // USB host automatic SOF enable
+
+/* R8_UH_EP_PID */
+#define USBFS_UH_TOKEN_MASK         0xF0      // bit mask of token PID for USB host transfer
+#define USBFS_UH_ENDP_MASK          0x0F      // bit mask of endpoint number for USB host transfer
+
+/* R8_UH_RX_CTRL */
+#define USBFS_UH_R_AUTO_TOG         0x08      // enable automatic toggle after successful transfer completion: 0=manual toggle, 1=automatic toggle
+#define USBFS_UH_R_TOG              0x04      // expected data toggle flag of host receiving (IN): 0=DATA0, 1=DATA1
+#define USBFS_UH_R_RES              0x01      // prepared handshake response type for host receiving (IN): 0=ACK (ready), 1=no response, time out to device, for isochronous transactions
+
+/* R8_UH_TX_CTRL */
+#define USBFS_UH_T_AUTO_TOG         0x08      // enable automatic toggle after successful transfer completion: 0=manual toggle, 1=automatic toggle
+#define USBFS_UH_T_TOG              0x04      // prepared data toggle flag of host transmittal (SETUP/OUT): 0=DATA0, 1=DATA1
+#define USBFS_UH_T_RES              0x01      // expected handshake response type for host transmittal (SETUP/OUT): 0=ACK (ready), 1=no response, time out from device, for isochronous transactions
+
+
+/*******************************************************************************/
+/* Struct Definition */
+
+/* USB Setup Request */
+typedef struct __attribute__((packed)) _USB_SETUP_REQ
+{
+    uint8_t  bRequestType;
+    uint8_t  bRequest;
+    uint16_t wValue;
+    uint16_t wIndex;
+    uint16_t wLength;
+} USB_SETUP_REQ, *PUSB_SETUP_REQ;
+
+/* USB Device Descriptor */
+typedef struct __attribute__((packed)) _USB_DEVICE_DESCR
+{
+    uint8_t  bLength;
+    uint8_t  bDescriptorType;
+    uint16_t bcdUSB;
+    uint8_t  bDeviceClass;
+    uint8_t  bDeviceSubClass;
+    uint8_t  bDeviceProtocol;
+    uint8_t  bMaxPacketSize0;
+    uint16_t idVendor;
+    uint16_t idProduct;
+    uint16_t bcdDevice;
+    uint8_t  iManufacturer;
+    uint8_t  iProduct;
+    uint8_t  iSerialNumber;
+    uint8_t  bNumConfigurations;
+} USB_DEV_DESCR, *PUSB_DEV_DESCR;
+
+/* USB Configuration Descriptor */
+typedef struct __attribute__((packed)) _USB_CONFIG_DESCR
+{
+    uint8_t  bLength;
+    uint8_t  bDescriptorType;
+    uint16_t wTotalLength;
+    uint8_t  bNumInterfaces;
+    uint8_t  bConfigurationValue;
+    uint8_t  iConfiguration;
+    uint8_t  bmAttributes;
+    uint8_t  MaxPower;
+} USB_CFG_DESCR, *PUSB_CFG_DESCR;
+
+/* USB Interface Descriptor */
+typedef struct __attribute__((packed)) _USB_INTERF_DESCR
+{
+    uint8_t  bLength;
+    uint8_t  bDescriptorType;
+    uint8_t  bInterfaceNumber;
+    uint8_t  bAlternateSetting;
+    uint8_t  bNumEndpoints;
+    uint8_t  bInterfaceClass;
+    uint8_t  bInterfaceSubClass;
+    uint8_t  bInterfaceProtocol;
+    uint8_t  iInterface;
+} USB_ITF_DESCR, *PUSB_ITF_DESCR;
+
+/* USB Endpoint Descriptor */
+typedef struct __attribute__((packed)) _USB_ENDPOINT_DESCR
+{
+    uint8_t  bLength;
+    uint8_t  bDescriptorType;
+    uint8_t  bEndpointAddress;
+    uint8_t  bmAttributes;
+    uint8_t  wMaxPacketSizeL;
+    uint8_t  wMaxPacketSizeH;
+    uint8_t  bInterval;
+} USB_ENDP_DESCR, *PUSB_ENDP_DESCR;
+
+/* USB Configuration Descriptor Set */
+typedef struct __attribute__((packed)) _USB_CONFIG_DESCR_LONG
+{
+    USB_CFG_DESCR  cfg_descr;
+    USB_ITF_DESCR  itf_descr;
+    USB_ENDP_DESCR endp_descr[ 1 ];
+} USB_CFG_DESCR_LONG, *PUSB_CFG_DESCR_LONG;
+
+/* USB HUB Descriptor */
+typedef struct __attribute__((packed)) _USB_HUB_DESCR
+{
+    uint8_t  bDescLength;
+    uint8_t  bDescriptorType;
+    uint8_t  bNbrPorts;
+    uint8_t  wHubCharacteristicsL;
+    uint8_t  wHubCharacteristicsH;
+    uint8_t  bPwrOn2PwrGood;
+    uint8_t  bHubContrCurrent;
+    uint8_t  DeviceRemovable;
+    uint8_t  PortPwrCtrlMask;
+} USB_HUB_DESCR, *PUSB_HUB_DESCR;
+
+/* USB HID Descriptor */
+typedef struct __attribute__((packed)) _USB_HID_DESCR
+{
+    uint8_t  bLength;
+    uint8_t  bDescriptorType;
+    uint16_t bcdHID;
+    uint8_t  bCountryCode;
+    uint8_t  bNumDescriptors;
+    uint8_t  bDescriptorTypeX;
+    uint8_t  wDescriptorLengthL;
+    uint8_t  wDescriptorLengthH;
+} USB_HID_DESCR, *PUSB_HID_DESCR;
+
+/* USB UDisk */
+typedef struct __attribute__((packed)) _UDISK_BOC_CBW
+{
+    uint32_t mCBW_Sig;
+    uint32_t mCBW_Tag;
+    uint32_t mCBW_DataLen;
+    uint8_t  mCBW_Flag;
+    uint8_t  mCBW_LUN;
+    uint8_t  mCBW_CB_Len;
+    uint8_t  mCBW_CB_Buf[ 16 ];
+} UDISK_BOC_CBW, *PXUDISK_BOC_CBW;
+
+/* USB UDisk */
+typedef struct __attribute__((packed)) _UDISK_BOC_CSW
+{
+    uint32_t mCBW_Sig;
+    uint32_t mCBW_Tag;
+    uint32_t mCSW_Residue;
+    uint8_t  mCSW_Status;
+} UDISK_BOC_CSW, *PXUDISK_BOC_CSW;
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CH32V30x_USB_H */
diff --git a/bsp/wch/risc-v/ch32v307v-r1/board/Kconfig b/bsp/wch/risc-v/ch32v307v-r1/board/Kconfig
index 19e9199239..4b7e8923a5 100644
--- a/bsp/wch/risc-v/ch32v307v-r1/board/Kconfig
+++ b/bsp/wch/risc-v/ch32v307v-r1/board/Kconfig
@@ -121,6 +121,16 @@ menu "On-chip Peripheral Drivers"
                 default n
         endif
 
+    config BSP_USING_USBH
+        bool "Enable USB Host"
+        select RT_USING_USB_HOST
+        default n
+
+    config BSP_USING_USBD
+        bool "Enable USB Device"
+        select RT_USING_USB_DEVICE
+        default n
+
     menuconfig BSP_USING_I2C
         bool "Enable I2C"
         select RT_USING_I2C