diff options
| author | Ihavedone <[email protected]> | 2020-01-17 11:54:05 +0800 |
|---|---|---|
| committer | Ihavedone <[email protected]> | 2020-01-17 11:54:05 +0800 |
| commit | caef50f3d152e2d4e59d349a2ad79013032a0f1b (patch) | |
| tree | 6d9304db9cee38f09992ab3f98a74bf73841f1bc | |
| parent | 5eeae513ae29ee2af8a24389ed250a55fc2eb15d (diff) | |
修复SPI4 RX DMA相关的宏定义写成 SPI4 TX的问题
| -rw-r--r-- | bsp/stm32/libraries/HAL_Drivers/config/f4/dma_config.h | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f4/dma_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f4/dma_config.h index 46411c5441..17768c9a04 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f4/dma_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f4/dma_config.h @@ -157,12 +157,12 @@ extern "C" { #define SPI1_RX_DMA_INSTANCE DMA2_Stream0 #define SPI1_RX_DMA_CHANNEL DMA_CHANNEL_3 #define SPI1_RX_DMA_IRQ DMA2_Stream0_IRQn -#elif defined(BSP_SPI4_TX_USING_DMA) && !defined(SPI4_TX_DMA_INSTANCE) -#define SPI4_DMA_TX_IRQHandler DMA2_Stream0_IRQHandler -#define SPI4_TX_DMA_RCC RCC_AHB1ENR_DMA2EN -#define SPI4_TX_DMA_INSTANCE DMA2_Stream0 -#define SPI4_TX_DMA_CHANNEL DMA_CHANNEL_4 -#define SPI4_TX_DMA_IRQ DMA2_Stream0_IRQn +#elif defined(BSP_SPI4_RX_USING_DMA) && !defined(SPI4_RX_DMA_INSTANCE) +#define SPI4_DMA_RX_IRQHandler DMA2_Stream0_IRQHandler +#define SPI4_RX_DMA_RCC RCC_AHB1ENR_DMA2EN +#define SPI4_RX_DMA_INSTANCE DMA2_Stream0 +#define SPI4_RX_DMA_CHANNEL DMA_CHANNEL_4 +#define SPI4_RX_DMA_IRQ DMA2_Stream0_IRQn #endif /* DMA2 stream1 */ @@ -208,12 +208,12 @@ extern "C" { #define SPI1_TX_DMA_INSTANCE DMA2_Stream3 #define SPI1_TX_DMA_CHANNEL DMA_CHANNEL_3 #define SPI1_TX_DMA_IRQ DMA2_Stream3_IRQn -#elif defined(BSP_SPI4_TX_USING_DMA) && !defined(SPI4_TX_DMA_INSTANCE) -#define SPI4_DMA_TX_IRQHandler DMA2_Stream3_IRQHandler -#define SPI4_TX_DMA_RCC RCC_AHB1ENR_DMA2EN -#define SPI4_TX_DMA_INSTANCE DMA2_Stream3 -#define SPI4_TX_DMA_CHANNEL DMA_CHANNEL_5 -#define SPI4_TX_DMA_IRQ DMA2_Stream3_IRQn +#elif defined(BSP_SPI4_RX_USING_DMA) && !defined(SPI4_RX_DMA_INSTANCE) +#define SPI4_DMA_RX_IRQHandler DMA2_Stream3_IRQHandler +#define SPI4_RX_DMA_RCC RCC_AHB1ENR_DMA2EN +#define SPI4_RX_DMA_INSTANCE DMA2_Stream3 +#define SPI4_RX_DMA_CHANNEL DMA_CHANNEL_5 +#define SPI4_RX_DMA_IRQ DMA2_Stream3_IRQn #endif /* DMA2 stream4 */ |