diff options
| author | xinyi.gao <[email protected]> | 2023-05-16 18:41:54 +0800 |
|---|---|---|
| committer | Man, Jianting (Meco) <[email protected]> | 2023-05-16 21:53:38 -0400 |
| commit | 3b913914c2362637ab0cc70aef30eeb0f33baf7a (patch) | |
| tree | d94a139478dc1e0e3cb64d47717a7aba6843eb16 | |
| parent | e865b5b7dd468039fe4305750207fe9c1d1e36f7 (diff) | |
[bsp][nxp][imxrt1020] update to support Keil AC6
| -rw-r--r-- | bsp/imxrt/imxrt1021-nxp-evk/.config | 456 | ||||
| -rw-r--r-- | bsp/imxrt/imxrt1021-nxp-evk/board/MCUX_Config/dcd.c | 302 | ||||
| -rw-r--r-- | bsp/imxrt/imxrt1021-nxp-evk/board/MCUX_Config/dcd.h | 32 | ||||
| -rw-r--r-- | bsp/imxrt/imxrt1021-nxp-evk/board/SConscript | 4 | ||||
| -rw-r--r-- | bsp/imxrt/imxrt1021-nxp-evk/board/board.c | 104 | ||||
| -rw-r--r-- | bsp/imxrt/imxrt1021-nxp-evk/board/linker_scripts/link.sct | 171 | ||||
| -rw-r--r-- | bsp/imxrt/imxrt1021-nxp-evk/project.uvoptx | 1155 | ||||
| -rw-r--r-- | bsp/imxrt/imxrt1021-nxp-evk/project.uvprojx | 307 | ||||
| -rw-r--r-- | bsp/imxrt/imxrt1021-nxp-evk/rtconfig.h | 68 | ||||
| -rw-r--r-- | bsp/imxrt/imxrt1021-nxp-evk/template.uvoptx | 9 | ||||
| -rw-r--r-- | bsp/imxrt/imxrt1021-nxp-evk/template.uvprojx | 35 |
11 files changed, 1799 insertions, 844 deletions
diff --git a/bsp/imxrt/imxrt1021-nxp-evk/.config b/bsp/imxrt/imxrt1021-nxp-evk/.config index 65ec3791db..ca3c1d19b1 100644 --- a/bsp/imxrt/imxrt1021-nxp-evk/.config +++ b/bsp/imxrt/imxrt1021-nxp-evk/.config @@ -60,7 +60,6 @@ CONFIG_RT_USING_MESSAGEQUEUE=y # # Memory Management # -CONFIG_RT_PAGE_MAX_ORDER=11 CONFIG_RT_USING_MEMPOOL=y CONFIG_RT_USING_SMALL_MEM=y # CONFIG_RT_USING_SLAB is not set @@ -84,7 +83,7 @@ CONFIG_RT_USING_DEVICE=y CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" -CONFIG_RT_VER_NUM=0x50000 +CONFIG_RT_VER_NUM=0x50001 # CONFIG_RT_USING_STDC_ATOMIC is not set CONFIG_RT_USING_CACHE=y CONFIG_RT_USING_HW_ATOMIC=y @@ -119,13 +118,19 @@ CONFIG_FINSH_USING_DESCRIPTION=y # CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set # CONFIG_FINSH_USING_AUTH is not set CONFIG_FINSH_ARG_MAX=10 + +# +# DFS: device virtual file system +# CONFIG_RT_USING_DFS=y CONFIG_DFS_USING_POSIX=y CONFIG_DFS_USING_WORKDIR=y +# CONFIG_RT_USING_DFS_MNTTABLE is not set +CONFIG_DFS_FD_MAX=16 +CONFIG_RT_USING_DFS_V1=y +# CONFIG_RT_USING_DFS_V2 is not set CONFIG_DFS_FILESYSTEMS_MAX=2 CONFIG_DFS_FILESYSTEM_TYPES_MAX=2 -CONFIG_DFS_FD_MAX=16 -# CONFIG_RT_USING_DFS_MNTTABLE is not set CONFIG_RT_USING_DFS_ELMFAT=y # @@ -297,7 +302,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # # IoT - internet of things # -# CONFIG_PKG_USING_LWIP is not set # CONFIG_PKG_USING_LORAWAN_DRIVER is not set # CONFIG_PKG_USING_PAHOMQTT is not set # CONFIG_PKG_USING_UMQTT is not set @@ -308,8 +312,12 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_KAWAII_MQTT is not set # CONFIG_PKG_USING_BC28_MQTT is not set # CONFIG_PKG_USING_WEBTERMINAL is not set +# CONFIG_PKG_USING_CJSON is not set +# CONFIG_PKG_USING_JSMN is not set # CONFIG_PKG_USING_LIBMODBUS is not set # CONFIG_PKG_USING_FREEMODBUS is not set +# CONFIG_PKG_USING_LJSON is not set +# CONFIG_PKG_USING_EZXML is not set # CONFIG_PKG_USING_NANOPB is not set # @@ -347,10 +355,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_JIOT-C-SDK is not set # CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set # CONFIG_PKG_USING_JOYLINK is not set -# CONFIG_PKG_USING_EZ_IOT_OS is not set -# CONFIG_PKG_USING_IOTSHARP_SDK is not set # CONFIG_PKG_USING_NIMBLE is not set -# CONFIG_PKG_USING_LLSYNC_SDK_ADAPTER is not set # CONFIG_PKG_USING_OTA_DOWNLOADER is not set # CONFIG_PKG_USING_IPMSG is not set # CONFIG_PKG_USING_LSSDP is not set @@ -364,36 +369,31 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_ABUP_FOTA is not set # CONFIG_PKG_USING_LIBCURL2RTT is not set # CONFIG_PKG_USING_CAPNP is not set +# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set # CONFIG_PKG_USING_AGILE_TELNET is not set # CONFIG_PKG_USING_NMEALIB is not set +# CONFIG_PKG_USING_AGILE_JSMN is not set # CONFIG_PKG_USING_PDULIB is not set # CONFIG_PKG_USING_BTSTACK is not set # CONFIG_PKG_USING_LORAWAN_ED_STACK is not set # CONFIG_PKG_USING_WAYZ_IOTKIT is not set # CONFIG_PKG_USING_MAVLINK is not set +# CONFIG_PKG_USING_RAPIDJSON is not set # CONFIG_PKG_USING_BSAL is not set # CONFIG_PKG_USING_AGILE_MODBUS is not set # CONFIG_PKG_USING_AGILE_FTP is not set # CONFIG_PKG_USING_EMBEDDEDPROTO is not set # CONFIG_PKG_USING_RT_LINK_HW is not set -# CONFIG_PKG_USING_RYANMQTT is not set -# CONFIG_PKG_USING_RYANW5500 is not set # CONFIG_PKG_USING_LORA_PKT_FWD is not set # CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set # CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set # CONFIG_PKG_USING_HM is not set -# CONFIG_PKG_USING_SMALL_MODBUS is not set -# CONFIG_PKG_USING_NET_SERVER is not set -# CONFIG_PKG_USING_ZFTP is not set -# CONFIG_PKG_USING_WOL is not set -# CONFIG_PKG_USING_ZEPHYR_POLLING is not set # # security packages # # CONFIG_PKG_USING_MBEDTLS is not set -# CONFIG_PKG_USING_LIBSODIUM is not set -# CONFIG_PKG_USING_LIBHYDROGEN is not set +# CONFIG_PKG_USING_libsodium is not set # CONFIG_PKG_USING_TINYCRYPT is not set # CONFIG_PKG_USING_TFM is not set # CONFIG_PKG_USING_YD_CRYPTO is not set @@ -401,29 +401,10 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # # language packages # - -# -# JSON: JavaScript Object Notation, a lightweight data-interchange format -# -# CONFIG_PKG_USING_CJSON is not set -# CONFIG_PKG_USING_LJSON is not set -# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set -# CONFIG_PKG_USING_RAPIDJSON is not set -# CONFIG_PKG_USING_JSMN is not set -# CONFIG_PKG_USING_AGILE_JSMN is not set -# CONFIG_PKG_USING_PARSON is not set - -# -# XML: Extensible Markup Language -# -# CONFIG_PKG_USING_SIMPLE_XML is not set -# CONFIG_PKG_USING_EZXML is not set -# CONFIG_PKG_USING_LUATOS_SOC is not set # CONFIG_PKG_USING_LUA is not set # CONFIG_PKG_USING_JERRYSCRIPT is not set # CONFIG_PKG_USING_MICROPYTHON is not set # CONFIG_PKG_USING_PIKASCRIPT is not set -# CONFIG_PKG_USING_RTT_RUST is not set # # multimedia packages @@ -432,16 +413,8 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # # LVGL: powerful and easy-to-use embedded GUI library # -# CONFIG_PKG_USING_LVGL is not set # CONFIG_PKG_USING_LITTLEVGL2RTT is not set -# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set -# CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set - -# -# u8g2: a monochrome graphic library -# -# CONFIG_PKG_USING_U8G2_OFFICIAL is not set -# CONFIG_PKG_USING_U8G2 is not set +# CONFIG_PKG_USING_LVGL is not set # CONFIG_PKG_USING_OPENMV is not set # CONFIG_PKG_USING_MUPDF is not set # CONFIG_PKG_USING_STEMWIN is not set @@ -455,13 +428,12 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_MP3PLAYER is not set # CONFIG_PKG_USING_TINYJPEG is not set # CONFIG_PKG_USING_UGUI is not set -# CONFIG_PKG_USING_MCURSES is not set -# CONFIG_PKG_USING_TERMBOX is not set -# CONFIG_PKG_USING_VT100 is not set -# CONFIG_PKG_USING_QRCODE is not set -# CONFIG_PKG_USING_GUIENGINE is not set -# CONFIG_PKG_USING_PERSIMMON is not set -# CONFIG_PKG_USING_3GPP_AMRNB is not set + +# +# u8g2: a monochrome graphic library +# +# CONFIG_PKG_USING_U8G2_OFFICIAL is not set +# CONFIG_PKG_USING_U8G2 is not set # # tools packages @@ -471,9 +443,10 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_EASYLOGGER is not set # CONFIG_PKG_USING_SYSTEMVIEW is not set # CONFIG_PKG_USING_SEGGER_RTT is not set -# CONFIG_PKG_USING_RTT_AUTO_EXE_CMD is not set # CONFIG_PKG_USING_RDB is not set +# CONFIG_PKG_USING_QRCODE is not set # CONFIG_PKG_USING_ULOG_EASYFLASH is not set +# CONFIG_PKG_USING_ULOG_FILE is not set # CONFIG_PKG_USING_LOGMGR is not set # CONFIG_PKG_USING_ADBD is not set # CONFIG_PKG_USING_COREMARK is not set @@ -503,39 +476,20 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_MEM_SANDBOX is not set # CONFIG_PKG_USING_SOLAR_TERMS is not set # CONFIG_PKG_USING_GAN_ZHI is not set -# CONFIG_PKG_USING_FDT is not set -# CONFIG_PKG_USING_CBOX is not set -# CONFIG_PKG_USING_SNOWFLAKE is not set -# CONFIG_PKG_USING_HASH_MATCH is not set -# CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set -# CONFIG_PKG_USING_VOFA_PLUS is not set # # system packages # # -# enhanced kernel services -# -# CONFIG_PKG_USING_RT_MEMCPY_CM is not set -# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set -# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set - -# # acceleration: Assembly language or algorithmic acceleration packages # +# CONFIG_PKG_USING_RT_MEMCPY_CM is not set # CONFIG_PKG_USING_QFPLIB_M0_FULL is not set # CONFIG_PKG_USING_QFPLIB_M0_TINY is not set # CONFIG_PKG_USING_QFPLIB_M3 is not set # -# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard -# -# CONFIG_PKG_USING_CMSIS_5 is not set -# CONFIG_PKG_USING_CMSIS_RTOS1 is not set -# CONFIG_PKG_USING_CMSIS_RTOS2 is not set - -# # Micrium: Micrium software products porting for RT-Thread # # CONFIG_PKG_USING_UCOSIII_WRAPPER is not set @@ -544,14 +498,16 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_UC_CLK is not set # CONFIG_PKG_USING_UC_COMMON is not set # CONFIG_PKG_USING_UC_MODBUS is not set -# CONFIG_PKG_USING_FREERTOS_WRAPPER is not set +# CONFIG_PKG_USING_GUIENGINE is not set +# CONFIG_PKG_USING_PERSIMMON is not set # CONFIG_PKG_USING_CAIRO is not set # CONFIG_PKG_USING_PIXMAN is not set # CONFIG_PKG_USING_PARTITION is not set -# CONFIG_PKG_USING_PERF_COUNTER is not set +# CONFIG_PKG_USING_FAL is not set # CONFIG_PKG_USING_FLASHDB is not set # CONFIG_PKG_USING_SQLITE is not set # CONFIG_PKG_USING_RTI is not set +# CONFIG_PKG_USING_CMSIS is not set # CONFIG_PKG_USING_DFS_YAFFS is not set # CONFIG_PKG_USING_LITTLEFS is not set # CONFIG_PKG_USING_DFS_JFFS2 is not set @@ -568,105 +524,25 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_QBOOT is not set # CONFIG_PKG_USING_PPOOL is not set # CONFIG_PKG_USING_OPENAMP is not set +# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set # CONFIG_PKG_USING_LPM is not set # CONFIG_PKG_USING_TLSF is not set # CONFIG_PKG_USING_EVENT_RECORDER is not set # CONFIG_PKG_USING_ARM_2D is not set +# CONFIG_PKG_USING_WCWIDTH is not set # CONFIG_PKG_USING_MCUBOOT is not set # CONFIG_PKG_USING_TINYUSB is not set -# CONFIG_PKG_USING_CHERRYUSB is not set -# CONFIG_PKG_USING_KMULTI_RTIMER is not set -# CONFIG_PKG_USING_TFDB is not set -# CONFIG_PKG_USING_QPC is not set -# CONFIG_PKG_USING_AGILE_UPGRADE is not set -# CONFIG_PKG_USING_FLASH_BLOB is not set # # peripheral libraries and drivers # - -# -# sensors drivers -# -# CONFIG_PKG_USING_LSM6DSM is not set -# CONFIG_PKG_USING_LSM6DSL is not set -# CONFIG_PKG_USING_LPS22HB is not set -# CONFIG_PKG_USING_HTS221 is not set -# CONFIG_PKG_USING_LSM303AGR is not set -# CONFIG_PKG_USING_BME280 is not set -# CONFIG_PKG_USING_BME680 is not set -# CONFIG_PKG_USING_BMA400 is not set -# CONFIG_PKG_USING_BMI160_BMX160 is not set -# CONFIG_PKG_USING_SPL0601 is not set -# CONFIG_PKG_USING_MS5805 is not set -# CONFIG_PKG_USING_DA270 is not set -# CONFIG_PKG_USING_DF220 is not set -# CONFIG_PKG_USING_HSHCAL001 is not set -# CONFIG_PKG_USING_BH1750 is not set -# CONFIG_PKG_USING_MPU6XXX is not set -# CONFIG_PKG_USING_AHT10 is not set -# CONFIG_PKG_USING_AP3216C is not set -# CONFIG_PKG_USING_TSL4531 is not set -# CONFIG_PKG_USING_DS18B20 is not set -# CONFIG_PKG_USING_DHT11 is not set -# CONFIG_PKG_USING_DHTXX is not set -# CONFIG_PKG_USING_GY271 is not set -# CONFIG_PKG_USING_GP2Y10 is not set -# CONFIG_PKG_USING_SGP30 is not set -# CONFIG_PKG_USING_HDC1000 is not set -# CONFIG_PKG_USING_BMP180 is not set -# CONFIG_PKG_USING_BMP280 is not set -# CONFIG_PKG_USING_SHTC1 is not set -# CONFIG_PKG_USING_BMI088 is not set -# CONFIG_PKG_USING_HMC5883 is not set -# CONFIG_PKG_USING_MAX6675 is not set -# CONFIG_PKG_USING_TMP1075 is not set -# CONFIG_PKG_USING_SR04 is not set -# CONFIG_PKG_USING_CCS811 is not set -# CONFIG_PKG_USING_PMSXX is not set -# CONFIG_PKG_USING_RT3020 is not set -# CONFIG_PKG_USING_MLX90632 is not set -# CONFIG_PKG_USING_MLX90393 is not set -# CONFIG_PKG_USING_MLX90392 is not set -# CONFIG_PKG_USING_MLX90397 is not set -# CONFIG_PKG_USING_MS5611 is not set -# CONFIG_PKG_USING_MAX31865 is not set -# CONFIG_PKG_USING_VL53L0X is not set -# CONFIG_PKG_USING_INA260 is not set -# CONFIG_PKG_USING_MAX30102 is not set -# CONFIG_PKG_USING_INA226 is not set -# CONFIG_PKG_USING_LIS2DH12 is not set -# CONFIG_PKG_USING_HS300X is not set -# CONFIG_PKG_USING_ZMOD4410 is not set -# CONFIG_PKG_USING_ISL29035 is not set -# CONFIG_PKG_USING_MMC3680KJ is not set -# CONFIG_PKG_USING_QMP6989 is not set -# CONFIG_PKG_USING_BALANCE is not set +# CONFIG_PKG_USING_SENSORS_DRIVERS is not set +# CONFIG_PKG_USING_REALTEK_AMEBA is not set # CONFIG_PKG_USING_SHT2X is not set # CONFIG_PKG_USING_SHT3X is not set -# CONFIG_PKG_USING_AD7746 is not set -# CONFIG_PKG_USING_ADT74XX is not set -# CONFIG_PKG_USING_MAX17048 is not set # CONFIG_PKG_USING_AS7341 is not set -# CONFIG_PKG_USING_CW2015 is not set -# CONFIG_PKG_USING_ICM20608 is not set -# CONFIG_PKG_USING_PAJ7620 is not set -# CONFIG_PKG_USING_STHS34PF80 is not set - -# -# touch drivers -# -# CONFIG_PKG_USING_GT9147 is not set -# CONFIG_PKG_USING_GT1151 is not set -# CONFIG_PKG_USING_GT917S is not set -# CONFIG_PKG_USING_GT911 is not set -# CONFIG_PKG_USING_FT6206 is not set -# CONFIG_PKG_USING_FT5426 is not set -# CONFIG_PKG_USING_FT6236 is not set -# CONFIG_PKG_USING_XPT2046_TOUCH is not set -# CONFIG_PKG_USING_REALTEK_AMEBA is not set # CONFIG_PKG_USING_STM32_SDIO is not set -# CONFIG_PKG_USING_ESP_IDF is not set +# CONFIG_PKG_USING_ICM20608 is not set # CONFIG_PKG_USING_BUTTON is not set # CONFIG_PKG_USING_PCF8574 is not set # CONFIG_PKG_USING_SX12XX is not set @@ -677,22 +553,18 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_NRF5X_SDK is not set # CONFIG_PKG_USING_NRFX is not set # CONFIG_PKG_USING_WM_LIBRARIES is not set - -# -# Kendryte SDK -# -# CONFIG_PKG_USING_K210_SDK is not set # CONFIG_PKG_USING_KENDRYTE_SDK is not set # CONFIG_PKG_USING_INFRARED is not set -# CONFIG_PKG_USING_MULTI_INFRARED is not set # CONFIG_PKG_USING_AGILE_BUTTON is not set # CONFIG_PKG_USING_AGILE_LED is not set # CONFIG_PKG_USING_AT24CXX is not set # CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set +# CONFIG_PKG_USING_AD7746 is not set # CONFIG_PKG_USING_PCA9685 is not set -# CONFIG_PKG_USING_ILI9341 is not set # CONFIG_PKG_USING_I2C_TOOLS is not set # CONFIG_PKG_USING_NRF24L01 is not set +# CONFIG_PKG_USING_TOUCH_DRIVERS is not set +# CONFIG_PKG_USING_MAX17048 is not set # CONFIG_PKG_USING_RPLIDAR is not set # CONFIG_PKG_USING_AS608 is not set # CONFIG_PKG_USING_RC522 is not set @@ -707,6 +579,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_CAN_YMODEM is not set # CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set # CONFIG_PKG_USING_QLED is not set +# CONFIG_PKG_USING_PAJ7620 is not set # CONFIG_PKG_USING_AGILE_CONSOLE is not set # CONFIG_PKG_USING_LD3320 is not set # CONFIG_PKG_USING_WK2124 is not set @@ -715,7 +588,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_SSD1306 is not set # CONFIG_PKG_USING_QKEY is not set # CONFIG_PKG_USING_RS485 is not set -# CONFIG_PKG_USING_RS232 is not set # CONFIG_PKG_USING_NES is not set # CONFIG_PKG_USING_VIRTUAL_SENSOR is not set # CONFIG_PKG_USING_VDEVICE is not set @@ -733,15 +605,8 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_BLUETRUM_SDK is not set # CONFIG_PKG_USING_MISAKA_AT24CXX is not set # CONFIG_PKG_USING_MISAKA_RGB_BLING is not set -# CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set # CONFIG_PKG_USING_BL_MCU_SDK is not set # CONFIG_PKG_USING_SOFT_SERIAL is not set -# CONFIG_PKG_USING_MB85RS16 is not set -# CONFIG_PKG_USING_RFM300 is not set -# CONFIG_PKG_USING_IO_INPUT_FILTER is not set -# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set -# CONFIG_PKG_USING_LRF_NV7LIDAR is not set -# CONFIG_PKG_USING_FINGERPRINT is not set # # AI packages @@ -757,20 +622,10 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_NAXOS is not set # -# Signal Processing and Control Algorithm Packages -# -# CONFIG_PKG_USING_FIRE_PID_CURVE is not set -# CONFIG_PKG_USING_UKAL is not set - -# # miscellaneous packages # # -# project laboratory -# - -# # samples: kernel and components samples # # CONFIG_PKG_USING_KERNEL_SAMPLES is not set @@ -790,8 +645,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_SNAKE is not set # CONFIG_PKG_USING_TETRIS is not set # CONFIG_PKG_USING_DONUT is not set -# CONFIG_PKG_USING_COWSAY is not set -# CONFIG_PKG_USING_MORSE is not set # CONFIG_PKG_USING_LIBCSV is not set # CONFIG_PKG_USING_OPTPARSE is not set # CONFIG_PKG_USING_FASTLZ is not set @@ -803,7 +656,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_CANFESTIVAL is not set # CONFIG_PKG_USING_ZLIB is not set # CONFIG_PKG_USING_MINIZIP is not set -# CONFIG_PKG_USING_HEATSHRINK is not set # CONFIG_PKG_USING_DSTR is not set # CONFIG_PKG_USING_TINYFRAME is not set # CONFIG_PKG_USING_KENDRYTE_DEMO is not set @@ -814,230 +666,14 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_VI is not set # CONFIG_PKG_USING_KI is not set # CONFIG_PKG_USING_ARMv7M_DWT is not set +# CONFIG_PKG_USING_VT100 is not set +# CONFIG_PKG_USING_UKAL is not set # CONFIG_PKG_USING_CRCLIB is not set # CONFIG_PKG_USING_LWGPS is not set # CONFIG_PKG_USING_STATE_MACHINE is not set -# CONFIG_PKG_USING_DESIGN_PATTERN is not set -# CONFIG_PKG_USING_CONTROLLER is not set -# CONFIG_PKG_USING_PHASE_LOCKED_LOOP is not set -# CONFIG_PKG_USING_MFBD is not set -# CONFIG_PKG_USING_SLCAN2RTT is not set -# CONFIG_PKG_USING_SOEM is not set -# CONFIG_PKG_USING_QPARAM is not set -# CONFIG_PKG_USING_CorevMCU_CLI is not set - -# -# Arduino libraries -# -# CONFIG_PKG_USING_RTDUINO is not set - -# -# Projects -# -# CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set -# CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set -# CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set - -# -# Sensors -# -# CONFIG_PKG_USING_ARDUINO_SENSOR_DEVICE_DRIVERS is not set -# CONFIG_PKG_USING_ARDUINO_CAPACITIVESENSOR is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL375 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L0X is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L1X is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSOR is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL6180X is not set -# CONFIG_PKG_USING_ADAFRUIT_MAX31855 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31865 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31856 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX6675 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90614 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS1 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AHTX0 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS0 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP280 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADT7410 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME680 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9808 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4728 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA219 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR390 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL345 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DHT is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9600 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM6DS is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO055 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX1704X is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMC56X3 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90393 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90395 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ICM20X is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DPS310 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTS221 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT4X is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT31 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL343 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME280 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS726X is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AMG88XX is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2320 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2315 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR329_LTR303 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085_UNIFIED is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183_UNIFIED is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP3XX is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MS8607 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3MDL is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90640 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMA8451 is not set -# CONFIG_PKG_USING_ADAFRUIT_MSA301 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL115A2 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X_RVC is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS2MDL is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303DLH_MAG is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LC709203F is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CAP1188 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CCS811 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_NAU7802 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS331 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS2X is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS35HW is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303_ACCEL is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3DH is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8591 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL3115A2 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPR121 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPRLS is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPU6050 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCT2075 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PM25AQI is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_EMC2101 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXAS21002C is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SCD30 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXOS8700 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HMC5883_UNIFIED is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP30 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP006 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TLA202X is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCS34725 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI7021 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI1145 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP40 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHTC3 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HDC1000 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU21DF is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS7341 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU31D is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSORLAB is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA260 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP007_LIBRARY is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_L3GD20 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP117 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSC2007 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2561 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2591_LIBRARY is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VCNL4040 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6070 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6075 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML7700 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_LIS3DHTR is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_DHT is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL335 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL345 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_BME280 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_BMP280 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_H3LIS331DL is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_MMA7660 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_TSL2561 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_PAJ7620 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_VL53L0X is not set -# CONFIG_PKG_USING_SEEED_ITG3200 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_SHT31 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_HP20X is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_DRV2605L is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_BBM150 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_HMC5883L is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_LSM303DLH is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_TCS3414CS is not set -# CONFIG_PKG_USING_SEEED_MP503 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_BMP085 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_HIGHTEMP is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_VEML6070 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_SI1145 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_SHT35 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_AT42QT1070 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_LSM6DS3 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_HDC1000 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_HM3301 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_MCP9600 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_LTC2941 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_LDC1612 is not set - -# -# Display -# -# CONFIG_PKG_USING_ARDUINO_U8G2 is not set -# CONFIG_PKG_USING_ARDUINO_U8GLIB_ARDUINO is not set -# CONFIG_PKG_USING_SEEED_TM1637 is not set - -# -# Timing -# -# CONFIG_PKG_USING_ARDUINO_MSTIMER2 is not set - -# -# Data Processing -# -# CONFIG_PKG_USING_ARDUINO_KALMANFILTER is not set -# CONFIG_PKG_USING_ARDUINO_ARDUINOJSON is not set - -# -# Data Storage -# - -# -# Communication -# -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PN532 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI4713 is not set - -# -# Device Control -# -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8574 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCA9685 is not set -# CONFIG_PKG_USING_ARDUINO_SEEED_PCF85063TP is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TPA2016 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DRV2605 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS1841 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS3502 is not set - -# -# Other -# -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MFRC630 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI5351 is not set -# CONFIG_PKG_USING_ARDUINO_RTCLIB is not set - -# -# Signal IO -# -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BUSIO is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCA8418 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP23017 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADS1X15 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AW9523 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP3008 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4725 is not set -# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BD3491FS is not set - -# -# Uncategorized -# +# CONFIG_PKG_USING_MCURSES is not set +# CONFIG_PKG_USING_COWSAY is not set +# CONFIG_PKG_USING_TERMBOX is not set CONFIG_SOC_IMXRT1020_SERIES=y # @@ -1061,6 +697,7 @@ CONFIG_BSP_USING_LPUART1=y # CONFIG_BSP_USING_I2C is not set # CONFIG_BSP_USING_ADC is not set # CONFIG_BSP_USING_RTC is not set +# CONFIG_BSP_USING_CACHE is not set # # Onboard Peripheral Drivers @@ -1071,6 +708,7 @@ CONFIG_BSP_USING_LPUART1=y # CONFIG_BSP_USING_EEPROM is not set # CONFIG_BSP_USING_RS232 is not set # CONFIG_BSP_USING_RS485 is not set +# CONFIG_BSP_USING_ETH is not set # # Board extended module Drivers diff --git a/bsp/imxrt/imxrt1021-nxp-evk/board/MCUX_Config/dcd.c b/bsp/imxrt/imxrt1021-nxp-evk/board/MCUX_Config/dcd.c new file mode 100644 index 0000000000..50ff1fe6c8 --- /dev/null +++ b/bsp/imxrt/imxrt1021-nxp-evk/board/MCUX_Config/dcd.c @@ -0,0 +1,302 @@ +/* + * Copyright 2020-2021 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/*********************************************************************************************************************** + * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file + * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. + **********************************************************************************************************************/ + +#include "dcd.h" + +/* Component ID definition, used by tools. */ +#ifndef FSL_COMPONENT_ID +#define FSL_COMPONENT_ID "platform.drivers.xip_board" +#endif + +#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1) +#if defined(XIP_BOOT_HEADER_DCD_ENABLE) && (XIP_BOOT_HEADER_DCD_ENABLE == 1) +#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__) +__attribute__((section(".boot_hdr.dcd_data"), used)) +#elif defined(__ICCARM__) +#pragma location = ".boot_hdr.dcd_data" +#endif + +/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +!!GlobalInfo +product: DCDx V2.0 +processor: MIMXRT1021xxxxx +package_id: MIMXRT1021DAG5A +mcu_data: ksdk2_0 +processor_version: 9.0.1 +output_format: c_array + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ +/* COMMENTS BELOW ARE USED AS SETTINGS FOR DCD DATA */ +const uint8_t dcd_data[] = { + /* HEADER */ + /* Tag */ + 0xD2, + /* Image Length */ + 0x03, 0xE0, + /* Version */ + 0x41, + + /* COMMANDS */ + + /* group: 'Imported Commands' */ + /* #1.1-107, command header bytes for merged 'Write - value' command */ + 0xCC, 0x03, 0x5C, 0x04, + /* #1.1, command: write_value, address: CCM_CCGR0, value: 0xFFFFFFFF, size: 4 */ + 0x40, 0x0F, 0xC0, 0x68, 0xFF, 0xFF, 0xFF, 0xFF, + /* #1.2, command: write_value, address: CCM_CCGR1, value: 0xFFFFFFFF, size: 4 */ + 0x40, 0x0F, 0xC0, 0x6C, 0xFF, 0xFF, 0xFF, 0xFF, + /* #1.3, command: write_value, address: CCM_CCGR2, value: 0xFFFFFFFF, size: 4 */ + 0x40, 0x0F, 0xC0, 0x70, 0xFF, 0xFF, 0xFF, 0xFF, + /* #1.4, command: write_value, address: CCM_CCGR3, value: 0xFFFFFFFF, size: 4 */ + 0x40, 0x0F, 0xC0, 0x74, 0xFF, 0xFF, 0xFF, 0xFF, + /* #1.5, command: write_value, address: CCM_CCGR4, value: 0xFFFFFFFF, size: 4 */ + 0x40, 0x0F, 0xC0, 0x78, 0xFF, 0xFF, 0xFF, 0xFF, + /* #1.6, command: write_value, address: CCM_CCGR5, value: 0xFFFFFFFF, size: 4 */ + 0x40, 0x0F, 0xC0, 0x7C, 0xFF, 0xFF, 0xFF, 0xFF, + /* #1.7, command: write_value, address: CCM_CCGR6, value: 0xFFFFFFFF, size: 4 */ + 0x40, 0x0F, 0xC0, 0x80, 0xFF, 0xFF, 0xFF, 0xFF, + /* #1.8, command: write_value, address: CCM_ANALOG_PLL_SYS, value: 0x2001, size: 4 */ + 0x40, 0x0D, 0x80, 0x30, 0x00, 0x00, 0x20, 0x01, + /* #1.9, command: write_value, address: CCM_ANALOG_PFD_528, value: 0x1018101B, size: 4 */ + 0x40, 0x0D, 0x81, 0x00, 0x10, 0x18, 0x10, 0x1B, + /* #1.10, command: write_value, address: CCM_CBCDR, value: 0xA8340, size: 4 */ + 0x40, 0x0F, 0xC0, 0x14, 0x00, 0x0A, 0x83, 0x40, + /* #1.11, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_00, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x14, 0x00, 0x00, 0x00, 0x00, + /* #1.12, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_01, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x18, 0x00, 0x00, 0x00, 0x00, + /* #1.13, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_02, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x1C, 0x00, 0x00, 0x00, 0x00, + /* #1.14, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_03, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x20, 0x00, 0x00, 0x00, 0x00, + /* #1.15, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_04, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x24, 0x00, 0x00, 0x00, 0x00, + /* #1.16, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_05, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x28, 0x00, 0x00, 0x00, 0x00, + /* #1.17, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_06, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x2C, 0x00, 0x00, 0x00, 0x00, + /* #1.18, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_07, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x30, 0x00, 0x00, 0x00, 0x00, + /* #1.19, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_08, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x34, 0x00, 0x00, 0x00, 0x00, + /* #1.20, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_09, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x38, 0x00, 0x00, 0x00, 0x00, + /* #1.21, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_10, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x3C, 0x00, 0x00, 0x00, 0x00, + /* #1.22, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_11, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x40, 0x00, 0x00, 0x00, 0x00, + /* #1.23, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_12, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x44, 0x00, 0x00, 0x00, 0x00, + /* #1.24, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_13, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x48, 0x00, 0x00, 0x00, 0x00, + /* #1.25, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_14, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x4C, 0x00, 0x00, 0x00, 0x00, + /* #1.26, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_15, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x50, 0x00, 0x00, 0x00, 0x00, + /* #1.27, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_16, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x54, 0x00, 0x00, 0x00, 0x00, + /* #1.28, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_17, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x58, 0x00, 0x00, 0x00, 0x00, + /* #1.29, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_18, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x5C, 0x00, 0x00, 0x00, 0x00, + /* #1.30, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_19, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x60, 0x00, 0x00, 0x00, 0x00, + /* #1.31, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_20, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x64, 0x00, 0x00, 0x00, 0x00, + /* #1.32, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_21, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x68, 0x00, 0x00, 0x00, 0x00, + /* #1.33, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_22, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x6C, 0x00, 0x00, 0x00, 0x00, + /* #1.34, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_23, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x70, 0x00, 0x00, 0x00, 0x00, + /* #1.35, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_24, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x74, 0x00, 0x00, 0x00, 0x00, + /* #1.36, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_25, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x78, 0x00, 0x00, 0x00, 0x00, + /* #1.37, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_26, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x7C, 0x00, 0x00, 0x00, 0x00, + /* #1.38, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_27, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, + /* #1.39, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_28, value: 0x10, size: 4 */ + 0x40, 0x1F, 0x80, 0x84, 0x00, 0x00, 0x00, 0x10, + /* #1.40, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_29, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x88, 0x00, 0x00, 0x00, 0x00, + /* #1.41, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_30, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x8C, 0x00, 0x00, 0x00, 0x00, + /* #1.42, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_31, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x90, 0x00, 0x00, 0x00, 0x00, + /* #1.43, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_32, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x94, 0x00, 0x00, 0x00, 0x00, + /* #1.44, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_33, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x98, 0x00, 0x00, 0x00, 0x00, + /* #1.45, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_34, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x9C, 0x00, 0x00, 0x00, 0x00, + /* #1.46, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_35, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0xA0, 0x00, 0x00, 0x00, 0x00, + /* #1.47, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_36, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0xA4, 0x00, 0x00, 0x00, 0x00, + /* #1.48, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_37, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0xA8, 0x00, 0x00, 0x00, 0x00, + /* #1.49, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_38, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0xAC, 0x00, 0x00, 0x00, 0x00, + /* #1.50, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_39, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0xB0, 0x00, 0x00, 0x00, 0x00, + /* #1.51, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_00, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x81, 0x88, 0x00, 0x00, 0x00, 0xE1, + /* #1.52, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_01, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x81, 0x8C, 0x00, 0x00, 0x00, 0xE1, + /* #1.53, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_02, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x81, 0x90, 0x00, 0x00, 0x00, 0xE1, + /* #1.54, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_03, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x81, 0x94, 0x00, 0x00, 0x00, 0xE1, + /* #1.55, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_04, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x81, 0x98, 0x00, 0x00, 0x00, 0xE1, + /* #1.56, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_05, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x81, 0x9C, 0x00, 0x00, 0x00, 0xE1, + /* #1.57, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_06, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x81, 0xA0, 0x00, 0x00, 0x00, 0xE1, + /* #1.58, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_07, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x81, 0xA4, 0x00, 0x00, 0x00, 0xE1, + /* #1.59, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_08, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x81, 0xA8, 0x00, 0x00, 0x00, 0xE1, + /* #1.60, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_09, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x81, 0xAC, 0x00, 0x00, 0x00, 0xE1, + /* #1.61, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_10, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x81, 0xB0, 0x00, 0x00, 0x00, 0xE1, + /* #1.62, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_11, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x81, 0xB4, 0x00, 0x00, 0x00, 0xE1, + /* #1.63, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_12, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x81, 0xB8, 0x00, 0x00, 0x00, 0xE1, + /* #1.64, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_13, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x81, 0xBC, 0x00, 0x00, 0x00, 0xE1, + /* #1.65, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_14, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x81, 0xC0, 0x00, 0x00, 0x00, 0xE1, + /* #1.66, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_15, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x81, 0xC4, 0x00, 0x00, 0x00, 0xE1, + /* #1.67, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_16, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x81, 0xC8, 0x00, 0x00, 0x00, 0xE1, + /* #1.68, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_17, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x81, 0xCC, 0x00, 0x00, 0x00, 0xE1, + /* #1.69, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_18, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x81, 0xD0, 0x00, 0x00, 0x00, 0xE1, + /* #1.70, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_19, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x81, 0xD4, 0x00, 0x00, 0x00, 0xE1, + /* #1.71, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_20, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x81, 0xD8, 0x00, 0x00, 0x00, 0xE1, + /* #1.72, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_21, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x81, 0xDC, 0x00, 0x00, 0x00, 0xE1, + /* #1.73, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_22, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x81, 0xE0, 0x00, 0x00, 0x00, 0xE1, + /* #1.74, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_23, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x81, 0xE4, 0x00, 0x00, 0x00, 0xE1, + /* #1.75, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_24, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x81, 0xE8, 0x00, 0x00, 0x00, 0xE1, + /* #1.76, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_25, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x81, 0xEC, 0x00, 0x00, 0x00, 0xE1, + /* #1.77, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_26, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x81, 0xF0, 0x00, 0x00, 0x00, 0xE1, + /* #1.78, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_27, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x81, 0xF4, 0x00, 0x00, 0x00, 0xE1, + /* #1.79, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_28, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x81, 0xF8, 0x00, 0x00, 0x00, 0xE1, + /* #1.80, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_29, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x81, 0xFC, 0x00, 0x00, 0x00, 0xE1, + /* #1.81, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_30, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x82, 0x00, 0x00, 0x00, 0x00, 0xE1, + /* #1.82, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_31, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x82, 0x04, 0x00, 0x00, 0x00, 0xE1, + /* #1.83, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_32, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x82, 0x08, 0x00, 0x00, 0x00, 0xE1, + /* #1.84, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_33, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x82, 0x0C, 0x00, 0x00, 0x00, 0xE1, + /* #1.85, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_34, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x82, 0x10, 0x00, 0x00, 0x00, 0xE1, + /* #1.86, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_35, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x82, 0x14, 0x00, 0x00, 0x00, 0xE1, + /* #1.87, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_36, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x82, 0x18, 0x00, 0x00, 0x00, 0xE1, + /* #1.88, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_37, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x82, 0x1C, 0x00, 0x00, 0x00, 0xE1, + /* #1.89, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_38, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x82, 0x20, 0x00, 0x00, 0x00, 0xE1, + /* #1.90, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_39, value: 0xE1, size: 4 */ + 0x40, 0x1F, 0x82, 0x24, 0x00, 0x00, 0x00, 0xE1, + /* #1.91, command: write_value, address: SEMC_MCR, value: 0x10000004, size: 4 */ + 0x40, 0x2F, 0x00, 0x00, 0x10, 0x00, 0x00, 0x04, + /* #1.92, command: write_value, address: SEMC_BMCR0, value: 0x81, size: 4 */ + 0x40, 0x2F, 0x00, 0x08, 0x00, 0x00, 0x00, 0x81, + /* #1.93, command: write_value, address: SEMC_BMCR1, value: 0x81, size: 4 */ + 0x40, 0x2F, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x81, + /* #1.94, command: write_value, address: SEMC_BR0, value: 0x8000001B, size: 4 */ + 0x40, 0x2F, 0x00, 0x10, 0x80, 0x00, 0x00, 0x1B, + /* #1.95, command: write_value, address: SEMC_BR1, value: 0x8200001B, size: 4 */ + 0x40, 0x2F, 0x00, 0x14, 0x82, 0x00, 0x00, 0x1B, + /* #1.96, command: write_value, address: SEMC_BR2, value: 0x8400001B, size: 4 */ + 0x40, 0x2F, 0x00, 0x18, 0x84, 0x00, 0x00, 0x1B, + /* #1.97, command: write_value, address: SEMC_IOCR, value: 0x7988, size: 4 */ + 0x40, 0x2F, 0x00, 0x04, 0x00, 0x00, 0x79, 0x88, + /* #1.98, command: write_value, address: SEMC_SDRAMCR0, value: 0xF07, size: 4 */ + 0x40, 0x2F, 0x00, 0x40, 0x00, 0x00, 0x0F, 0x07, + /* #1.99, command: write_value, address: SEMC_SDRAMCR1, value: 0x652922, size: 4 */ + 0x40, 0x2F, 0x00, 0x44, 0x00, 0x65, 0x29, 0x22, + /* #1.100, command: write_value, address: SEMC_SDRAMCR2, value: 0x10920, size: 4 */ + 0x40, 0x2F, 0x00, 0x48, 0x00, 0x01, 0x09, 0x20, + /* #1.101, command: write_value, address: SEMC_SDRAMCR3, value: 0x50210A08, size: 4 */ + 0x40, 0x2F, 0x00, 0x4C, 0x50, 0x21, 0x0A, 0x08, + /* #1.102, command: write_value, address: SEMC_DBICR0, value: 0x21, size: 4 */ + 0x40, 0x2F, 0x00, 0x80, 0x00, 0x00, 0x00, 0x21, + /* #1.103, command: write_value, address: SEMC_DBICR1, value: 0x888888, size: 4 */ + 0x40, 0x2F, 0x00, 0x84, 0x00, 0x88, 0x88, 0x88, + /* #1.104, command: write_value, address: SEMC_IPCR1, value: 0x02, size: 4 */ + 0x40, 0x2F, 0x00, 0x94, 0x00, 0x00, 0x00, 0x02, + /* #1.105, command: write_value, address: SEMC_IPCR2, value: 0x00, size: 4 */ + 0x40, 0x2F, 0x00, 0x98, 0x00, 0x00, 0x00, 0x00, + /* #1.106, command: write_value, address: SEMC_IPCR0, value: 0x80000000, size: 4 */ + 0x40, 0x2F, 0x00, 0x90, 0x80, 0x00, 0x00, 0x00, + /* #1.107, command: write_value, address: SEMC_IPCMD, value: 0xA55A000F, size: 4 */ + 0x40, 0x2F, 0x00, 0x9C, 0xA5, 0x5A, 0x00, 0x0F, + /* #2, command: check_any_bit_set, address: SEMC_INTR, value: 0x01, size: 4 */ + 0xCF, 0x00, 0x0C, 0x1C, 0x40, 0x2F, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, + /* #3.1-2, command header bytes for merged 'Write - value' command */ + 0xCC, 0x00, 0x14, 0x04, + /* #3.1, command: write_value, address: SEMC_IPCR0, value: 0x80000000, size: 4 */ + 0x40, 0x2F, 0x00, 0x90, 0x80, 0x00, 0x00, 0x00, + /* #3.2, command: write_value, address: SEMC_IPCMD, value: 0xA55A000C, size: 4 */ + 0x40, 0x2F, 0x00, 0x9C, 0xA5, 0x5A, 0x00, 0x0C, + /* #4, command: check_any_bit_set, address: SEMC_INTR, value: 0x01, size: 4 */ + 0xCF, 0x00, 0x0C, 0x1C, 0x40, 0x2F, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, + /* #5.1-2, command header bytes for merged 'Write - value' command */ + 0xCC, 0x00, 0x14, 0x04, + /* #5.1, command: write_value, address: SEMC_IPCR0, value: 0x80000000, size: 4 */ + 0x40, 0x2F, 0x00, 0x90, 0x80, 0x00, 0x00, 0x00, + /* #5.2, command: write_value, address: SEMC_IPCMD, value: 0xA55A000C, size: 4 */ + 0x40, 0x2F, 0x00, 0x9C, 0xA5, 0x5A, 0x00, 0x0C, + /* #6, command: check_any_bit_set, address: SEMC_INTR, value: 0x01, size: 4 */ + 0xCF, 0x00, 0x0C, 0x1C, 0x40, 0x2F, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, + /* #7.1-3, command header bytes for merged 'Write - value' command */ + 0xCC, 0x00, 0x1C, 0x04, + /* #7.1, command: write_value, address: SEMC_IPTXDAT, value: 0x30, size: 4 */ + 0x40, 0x2F, 0x00, 0xA0, 0x00, 0x00, 0x00, 0x30, + /* #7.2, command: write_value, address: SEMC_IPCR0, value: 0x80000000, size: 4 */ + 0x40, 0x2F, 0x00, 0x90, 0x80, 0x00, 0x00, 0x00, + /* #7.3, command: write_value, address: SEMC_IPCMD, value: 0xA55A000A, size: 4 */ + 0x40, 0x2F, 0x00, 0x9C, 0xA5, 0x5A, 0x00, 0x0A, + /* #8, command: check_any_bit_set, address: SEMC_INTR, value: 0x01, size: 4 */ + 0xCF, 0x00, 0x0C, 0x1C, 0x40, 0x2F, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, + /* #9, command: write_value, address: SEMC_SDRAMCR3, value: 0x50210A09, size: 4 */ + 0xCC, 0x00, 0x0C, 0x04, 0x40, 0x2F, 0x00, 0x4C, 0x50, 0x21, 0x0A, 0x09 + }; +/* BE CAREFUL MODIFYING THIS SETTINGS - IT IS YAML SETTINGS FOR TOOLS */ + +#else +const uint8_t dcd_data[] = {0x00}; +#endif /* XIP_BOOT_HEADER_DCD_ENABLE */ +#endif /* XIP_BOOT_HEADER_ENABLE */ diff --git a/bsp/imxrt/imxrt1021-nxp-evk/board/MCUX_Config/dcd.h b/bsp/imxrt/imxrt1021-nxp-evk/board/MCUX_Config/dcd.h new file mode 100644 index 0000000000..185b0ecd89 --- /dev/null +++ b/bsp/imxrt/imxrt1021-nxp-evk/board/MCUX_Config/dcd.h @@ -0,0 +1,32 @@ +/* + * Copyright 2020 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/*********************************************************************************************************************** + * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file + * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. + **********************************************************************************************************************/ + +#ifndef __DCD__ +#define __DCD__ + +#include <stdint.h> + +/*! @name Driver version */ +/*@{*/ +/*! @brief XIP_BOARD driver version 2.0.1. */ +#define FSL_XIP_BOARD_DRIVER_VERSION (MAKE_VERSION(2, 0, 1)) +/*@}*/ + +/************************************* + * DCD Data + *************************************/ +#define DCD_TAG_HEADER (0xD2) +#define DCD_VERSION (0x41) +#define DCD_TAG_HEADER_SHIFT (24) +#define DCD_ARRAY_SIZE 1 + +#endif /* __DCD__ */ diff --git a/bsp/imxrt/imxrt1021-nxp-evk/board/SConscript b/bsp/imxrt/imxrt1021-nxp-evk/board/SConscript index c492c8785d..b72c7f4015 100644 --- a/bsp/imxrt/imxrt1021-nxp-evk/board/SConscript +++ b/bsp/imxrt/imxrt1021-nxp-evk/board/SConscript @@ -1,4 +1,5 @@ - +Import('RTT_ROOT') +Import('rtconfig') from building import * cwd = GetCurrentDir() @@ -8,6 +9,7 @@ src = Split(""" board.c MCUX_Config/clock_config.c MCUX_Config/pin_mux.c +MCUX_Config/dcd.c """) CPPPATH = [cwd,cwd + '/MCUX_Config',cwd + '/ports'] diff --git a/bsp/imxrt/imxrt1021-nxp-evk/board/board.c b/bsp/imxrt/imxrt1021-nxp-evk/board/board.c index 365c0acb94..53767d5b27 100644 --- a/bsp/imxrt/imxrt1021-nxp-evk/board/board.c +++ b/bsp/imxrt/imxrt1021-nxp-evk/board/board.c @@ -33,6 +33,28 @@ /* MPU configuration. */ void BOARD_ConfigMPU(void) { + #if defined(__CC_ARM) || defined(__ARMCC_VERSION) + extern uint32_t Image$$RW_m_ncache$$Base[]; + /* RW_m_ncache_unused is a auxiliary region which is used to get the whole size of noncache section */ + extern uint32_t Image$$RW_m_ncache_unused$$Base[]; + extern uint32_t Image$$RW_m_ncache_unused$$ZI$$Limit[]; + uint32_t nonCacheStart = (uint32_t)Image$$RW_m_ncache$$Base; + uint32_t size = ((uint32_t)Image$$RW_m_ncache_unused$$Base == nonCacheStart) ? + 0 : + ((uint32_t)Image$$RW_m_ncache_unused$$ZI$$Limit - nonCacheStart); +#elif defined(__MCUXPRESSO) + extern uint32_t __base_NCACHE_REGION; + extern uint32_t __top_NCACHE_REGION; + uint32_t nonCacheStart = (uint32_t)(&__base_NCACHE_REGION); + uint32_t size = (uint32_t)(&__top_NCACHE_REGION) - nonCacheStart; +#elif defined(__ICCARM__) || defined(__GNUC__) + extern uint32_t __NCACHE_REGION_START[]; + extern uint32_t __NCACHE_REGION_SIZE[]; + uint32_t nonCacheStart = (uint32_t)__NCACHE_REGION_START; + uint32_t size = (uint32_t)__NCACHE_REGION_SIZE; +#endif + volatile uint32_t i = 0; + /* Disable I cache and D cache */ if (SCB_CCR_IC_Msk == (SCB_CCR_IC_Msk & SCB->CCR)) { @@ -85,59 +107,69 @@ void BOARD_ConfigMPU(void) * mpu_armv7.h. */ - /* Region 0 setting: Memory with Device type, not shareable, non-cacheable. */ - MPU->RBAR = ARM_MPU_RBAR(0, 0xC0000000U); - MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_512MB); + /* + * Add default region to deny access to whole address space to workaround speculative prefetch. + * Refer to Arm errata 1013783-B for more details. + * + */ + /* Region 0 setting: Instruction access disabled, No data access permission. */ + MPU->RBAR = ARM_MPU_RBAR(0, 0x00000000U); + MPU->RASR = ARM_MPU_RASR(1, ARM_MPU_AP_NONE, 0, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_4GB); - /* Region 1 setting: Memory with Device type, not shareable, non-cacheable. */ + /* Region 1 setting: Memory with Device type, not shareable, non-cacheable. */ MPU->RBAR = ARM_MPU_RBAR(1, 0x80000000U); - MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_1GB); + MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_512MB); -/* Region 2 setting */ -#if defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1) - /* Setting Memory with Normal type, not shareable, outer/inner write back. */ + /* Region 2 setting: Memory with Device type, not shareable, non-cacheable. */ MPU->RBAR = ARM_MPU_RBAR(2, 0x60000000U); + MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_512MB); + +#if defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1) + /* Region 3 setting: Memory with Normal type, not shareable, outer/inner write back. */ + MPU->RBAR = ARM_MPU_RBAR(3, 0x60000000U); MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_RO, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_8MB); -#else - /* Setting Memory with Device type, not shareable, non-cacheable. */ - MPU->RBAR = ARM_MPU_RBAR(2, 0x60000000U); - MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_RO, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_8MB); #endif - /* Region 3 setting: Memory with Device type, not shareable, non-cacheable. */ - MPU->RBAR = ARM_MPU_RBAR(3, 0x00000000U); - MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_1GB); - - /* Region 4 setting: Memory with Normal type, not shareable, outer/inner write back */ + /* Region 4 setting: Memory with Device type, not shareable, non-cacheable. */ MPU->RBAR = ARM_MPU_RBAR(4, 0x00000000U); - MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_64KB); + MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_1GB); /* Region 5 setting: Memory with Normal type, not shareable, outer/inner write back */ - MPU->RBAR = ARM_MPU_RBAR(5, 0x20000000U); + MPU->RBAR = ARM_MPU_RBAR(5, 0x00000000U); MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_64KB); /* Region 6 setting: Memory with Normal type, not shareable, outer/inner write back */ - MPU->RBAR = ARM_MPU_RBAR(6, 0x20200000U); - MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_128KB); + MPU->RBAR = ARM_MPU_RBAR(6, 0x20000000U); + MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_64KB); -/* The define sets the cacheable memory to shareable, - * this suggestion is referred from chapter 2.2.1 Memory regions, - * types and attributes in Cortex-M7 Devices, Generic User Guide */ -#if defined(SDRAM_IS_SHAREABLE) - /* Region 7 setting: Memory with Normal type, shareable, outer/inner write back */ - MPU->RBAR = ARM_MPU_RBAR(7, 0x80000000U); - MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 1, 1, 1, 0, ARM_MPU_REGION_SIZE_32MB); -#else /* Region 7 setting: Memory with Normal type, not shareable, outer/inner write back */ - MPU->RBAR = ARM_MPU_RBAR(7, 0x80000000U); + MPU->RBAR = ARM_MPU_RBAR(7, 0x20200000U); + MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_128KB); + + /* Region 8 setting: Memory with Normal type, not shareable, outer/inner write back */ + MPU->RBAR = ARM_MPU_RBAR(8, 0x80000000U); MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_32MB); -#endif - /* Region 8 setting, set last 2MB of SDRAM can't be accessed by cache, glocal variables which are not expected to be - * accessed by cache can be put here */ - /* Memory with Normal type, not shareable, non-cacheable */ - MPU->RBAR = ARM_MPU_RBAR(8, 0x81E00000U); - MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 1, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_2MB); + while ((size >> i) > 0x1U) + { + i++; + } + + if (i != 0) + { + /* The MPU region size should be 2^N, 5<=N<=32, region base should be multiples of size. */ + assert(!(nonCacheStart % size)); + assert(size == (uint32_t)(1 << i)); + assert(i >= 5); + + /* Region 9 setting: Memory with Normal type, not shareable, non-cacheable */ + MPU->RBAR = ARM_MPU_RBAR(9, nonCacheStart); + MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 1, 0, 0, 0, 0, i - 1); + } + + /* Region 10 setting: Memory with Device type, not shareable, non-cacheable */ + MPU->RBAR = ARM_MPU_RBAR(10, 0x40000000); + MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_4MB); /* Enable MPU */ ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk); diff --git a/bsp/imxrt/imxrt1021-nxp-evk/board/linker_scripts/link.sct b/bsp/imxrt/imxrt1021-nxp-evk/board/linker_scripts/link.sct index 24ecc854aa..58fbd7f2c3 100644 --- a/bsp/imxrt/imxrt1021-nxp-evk/board/linker_scripts/link.sct +++ b/bsp/imxrt/imxrt1021-nxp-evk/board/linker_scripts/link.sct @@ -1,43 +1,24 @@ -#! armcc -E
+#!armclang --target=arm-arm-none-eabi -mcpu=cortex-m7 -E -x c
/*
** ###################################################################
-** Processors: MIMXRT1052CVL5A
-** MIMXRT1052DVL6A
+** Processors: MIMXRT1021CAF4A
+** MIMXRT1021CAG4A
+** MIMXRT1021DAF5A
+** MIMXRT1021DAG5A
**
** Compiler: Keil ARM C/C++ Compiler
-** Reference manual: IMXRT1050RM Rev.C, 08/2017
-** Version: rev. 0.1, 2017-01-10
-** Build: b170927
+** Reference manual: IMXRT1020RM Rev.1, 12/2018 | IMXRT1020SRM Rev.3
+** Version: rev. 0.1, 2017-06-06
+** Build: b210709
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright 2016 Freescale Semiconductor, Inc.
-** Copyright 2016-2017 NXP
-** Redistribution and use in source and binary forms, with or without modification,
-** are permitted provided that the following conditions are met:
+** Copyright 2016-2021 NXP
+** All rights reserved.
**
-** 1. Redistributions of source code must retain the above copyright notice, this list
-** of conditions and the following disclaimer.
-**
-** 2. Redistributions in binary form must reproduce the above copyright notice, this
-** list of conditions and the following disclaimer in the documentation and/or
-** other materials provided with the distribution.
-**
-** 3. Neither the name of the copyright holder nor the names of its
-** contributors may be used to endorse or promote products derived from this
-** software without specific prior written permission.
-**
-** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
-** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+** SPDX-License-Identifier: BSD-3-Clause
**
** http: www.nxp.com
** mail: [email protected]
@@ -45,90 +26,96 @@ ** ###################################################################
*/
+#if (defined(__ram_vector_table__))
+ #define __ram_vector_table_size__ 0x00000400
+#else
+ #define __ram_vector_table_size__ 0x00000000
+#endif
+
#define m_flash_config_start 0x60000000
#define m_flash_config_size 0x00001000
#define m_ivt_start 0x60001000
#define m_ivt_size 0x00001000
-#define m_text_start 0x60002000
-#define m_text_size 0x007FE000
+#define m_interrupts_start 0x60002000
+#define m_interrupts_size 0x00000400
+
+#define m_text_start 0x60002400
+#define m_text_size 0x007FDC00
+
+#define m_qacode_start 0x00000000
+#define m_qacode_size 0x00010000
-#define m_data_start 0x20000000
-#define m_data_size 0x00020000
+#define m_interrupts_ram_start 0x20000000
+#define m_interrupts_ram_size __ram_vector_table_size__
-#define m_ncache_start 0x81E00000
-#define m_ncache_size 0x00200000
+#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
+#define m_data_size (0x00010000 - m_interrupts_ram_size)
+
+#define m_data2_start 0x20200000
+#define m_data2_size 0x00020000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
- #define Stack_Size 0x1000
+ #define Stack_Size 0x2000
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
- #define Heap_Size 0x0400
-#endif
-
-#include "../../rtconfig.h"
-;BSP_USING_HYPERFLASH
-#if (defined(BOARD_USING_QSPIFLASH))
-LR_m_rom_config m_flash_config_start m_flash_config_size ; load region size_region
-{
- RW_m_config_text m_flash_config_start m_flash_config_size ; load address = execution address
- {
- * (.boot_hdr.conf, +FIRST)
- }
-}
-
-LR_m_rom_ivt m_ivt_start m_ivt_size ; load region size_region
-{
- RW_m_ivt_text m_ivt_start m_ivt_size ; load address = execution address
- {
- * (.boot_hdr.ivt, +FIRST)
- * (.boot_hdr.boot_data)
- * (.boot_hdr.dcd_data)
- }
-}
+ #define Heap_Size 0x6000
#endif
#define RTT_HEAP_SIZE (m_data_size-ImageLength(RW_m_data)-ImageLength(ARM_LIB_HEAP)-ImageLength(ARM_LIB_STACK))
-; load region size_region
-LR_IROM1 m_text_start m_text_size
-{
- ER_IROM1 m_text_start m_text_size ; load address = execution address
- {
- * (RESET,+FIRST)
- * (InRoot$$Sections)
- .ANY (+RO)
- }
-
- RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size ; RW data
- {
- .ANY (+RW +ZI)
- }
+#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
+LR_m_text m_flash_config_start m_text_start+m_text_size-m_flash_config_start { ; load region size_region
+ RW_m_config_text m_flash_config_start FIXED m_flash_config_size { ; load address = execution address
+ * (.boot_hdr.conf, +FIRST)
+ }
- ARM_LIB_HEAP +0 EMPTY Heap_Size{} ; Heap region growing up
- ARM_LIB_STACK +0 EMPTY Stack_Size{} ; Stack region growing down
- RTT_HEAP +0 EMPTY RTT_HEAP_SIZE{}
+ RW_m_ivt_text m_ivt_start FIXED m_ivt_size { ; load address = execution address
+ * (.boot_hdr.ivt, +FIRST)
+ * (.boot_hdr.boot_data)
+ * (.boot_hdr.dcd_data)
+ }
+#else
+LR_m_text m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load region size_region
+#endif
+ VECTOR_ROM m_interrupts_start FIXED m_interrupts_size { ; load address = execution address
+ * (.isr_vector,+FIRST)
+ }
+ ER_m_text m_text_start FIXED m_text_size { ; load address = execution address
+ * (InRoot$$Sections)
+ .ANY (+RO)
+ }
+#if (defined(__ram_vector_table__))
+ VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
+ }
+#else
+ VECTOR_RAM m_interrupts_start EMPTY 0 {
+ }
+#endif
+ RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data
+ .ANY (+RW +ZI)
+ * (RamFunction)
+ * (NonCacheable.init)
+ * (*NonCacheable)
+ * (DataQuickAccess)
+ }
+ ARM_LIB_HEAP +0 EMPTY Heap_Size {}
+ ARM_LIB_STACK +0 EMPTY Stack_Size{} ; Stack region growing down
+ RTT_HEAP +0 EMPTY RTT_HEAP_SIZE{}
- ; ncache RW data
- RW_m_ncache m_ncache_start m_ncache_size
- {
- * (NonCacheable.init)
- * (NonCacheable)
- }
- ITCM 0x400 0xFBFF {
- ;drv_flexspi_hyper.o(+RO)
- ;fsl_flexspi.o(+RO)
- * (*CLOCK_DisableClock)
- * (*CLOCK_ControlGate)
- * (*CLOCK_EnableClock)
- * (*CLOCK_SetDiv)
- * (itcm)
- }
+ RW_m_ram_text m_qacode_start m_qacode_size { ;
+ * (CodeQuickAccess)
+ }
+ RW_m_ncache m_data2_start EMPTY 0 {
+ }
+ RW_m_ncache_unused +0 EMPTY m_data2_size-ImageLength(RW_m_ncache) { ; Empty region added for MPU configuration
+ }
}
+
diff --git a/bsp/imxrt/imxrt1021-nxp-evk/project.uvoptx b/bsp/imxrt/imxrt1021-nxp-evk/project.uvoptx index 10c9cb6ce2..007fae71aa 100644 --- a/bsp/imxrt/imxrt1021-nxp-evk/project.uvoptx +++ b/bsp/imxrt/imxrt1021-nxp-evk/project.uvoptx @@ -10,7 +10,7 @@ <aExt>*.s*; *.src; *.a*</aExt> <oExt>*.obj; *.o</oExt> <lExt>*.lib</lExt> - <tExt>*.txt; *.h; *.inc</tExt> + <tExt>*.txt; *.h; *.inc; *.md</tExt> <pExt>*.plm</pExt> <CppX>*.cpp</CppX> <nMigrate>0</nMigrate> @@ -119,13 +119,33 @@ <TargetDriverDllRegistry> <SetRegEntry> <Number>0</Number> + <Key>ARMRTXEVENTFLAGS</Key> + <Name>-L70 -Z18 -C0 -M0 -T1</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>DLGTARM</Key> + <Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>ARMDBGFLAGS</Key> + <Name></Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>DLGUARM</Key> + <Name></Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> <Key>UL2CM3</Key> <Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC8000 -FD20000000 -FF0MIMXRT1021_QuadSPI_4KB_SEC -FL0800000 -FS060000000 -FP0($$Device:MIMXRT1021DAG5A$arm\MIMXRT1021_QuadSPI_4KB_SEC.FLM)</Name> </SetRegEntry> <SetRegEntry> <Number>0</Number> <Key>CMSIS_AGDI</Key> - <Name>-X"CMSIS-DAP" -U0226000040214e4500491018c8920028 -O1007 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(0BD11477) -L00(0) -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC8000 -FN1 -FF0MIMXRT1021_QuadSPI_4KB_SEC.FLM -FS060000000 -FL0800000 -FP0($$Device:MIMXRT1021DAG5A$arm\MIMXRT1021_QuadSPI_4KB_SEC.FLM)</Name> + <Name>-X"CMSIS-DAP" -U0226000047784e4500219003d9170010 -O1007 -S8 -C0 -P00000000 -N00("ARM CoreSight SW-DP") -D00(0BD11477) -L00(0) -TO65554 -TC10000000 -TT10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC8000 -FN1 -FF0MIMXRT1021_QuadSPI_4KB_SEC.FLM -FS060000000 -FL0800000 -FP0($$Device:MIMXRT1021DAG5A$arm\MIMXRT1021_QuadSPI_4KB_SEC.FLM)</Name> </SetRegEntry> </TargetDriverDllRegistry> <Breakpoint/> @@ -135,12 +155,12 @@ <DebugFlag> <trace>0</trace> <periodic>0</periodic> - <aLwin>0</aLwin> + <aLwin>1</aLwin> <aCover>0</aCover> <aSer1>0</aSer1> <aSer2>0</aSer2> <aPa>0</aPa> - <viewmode>0</viewmode> + <viewmode>1</viewmode> <vrSel>0</vrSel> <aSym>0</aSym> <aTbox>0</aTbox> @@ -171,7 +191,1134 @@ <pszMrulep></pszMrulep> <pSingCmdsp></pSingCmdsp> <pMultCmdsp></pMultCmdsp> + <DebugDescription> + <Enable>1</Enable> + <EnableFlashSeq>1</EnableFlashSeq> + <EnableLog>0</EnableLog> + <Protocol>2</Protocol> + <DbgClock>10000000</DbgClock> + </DebugDescription> </TargetOption> </Target> + <Group> + <GroupName>Applications</GroupName> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <cbSel>0</cbSel> + <RteFlg>0</RteFlg> + <File> + <GroupNumber>1</GroupNumber> + <FileNumber>1</FileNumber> + <FileType>1</FileType> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + 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<FilenameWithoutPath>fsl_flexspi_nor_flash.c</FilenameWithoutPath> + <RteFlg>0</RteFlg> + <bShared>0</bShared> + </File> + <File> + <GroupNumber>11</GroupNumber> + <FileNumber>86</FileNumber> + <FileType>1</FileType> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <bDave2>0</bDave2> + <PathWithFileName>xip\fsl_flexspi_nor_boot.c</PathWithFileName> + <FilenameWithoutPath>fsl_flexspi_nor_boot.c</FilenameWithoutPath> + <RteFlg>0</RteFlg> + <bShared>0</bShared> + </File> + </Group> + </ProjectOpt> diff --git a/bsp/imxrt/imxrt1021-nxp-evk/project.uvprojx b/bsp/imxrt/imxrt1021-nxp-evk/project.uvprojx index b4c0a6a15e..a8fd48c0a9 100644 --- a/bsp/imxrt/imxrt1021-nxp-evk/project.uvprojx +++ b/bsp/imxrt/imxrt1021-nxp-evk/project.uvprojx @@ -1,43 +1,46 @@ <?xml version="1.0" encoding="UTF-8" standalone="no" ?> <Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd"> + <SchemaVersion>2.1</SchemaVersion> + <Header>### uVision Project, (C) Keil Software</Header> + <Targets> <Target> <TargetName>rtthread</TargetName> <ToolsetNumber>0x4</ToolsetNumber> <ToolsetName>ARM-ADS</ToolsetName> - <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed> - <uAC6>0</uAC6> + <pCCUsed>6160000::V6.16::ARMCLANG</pCCUsed> + <uAC6>1</uAC6> <TargetOption> <TargetCommonOption> <Device>MIMXRT1021DAG5A</Device> <Vendor>NXP</Vendor> - <PackID>NXP.MIMXRT1021_DFP.11.0.1</PackID> - <PackURL>http://mcuxpresso.nxp.com/cmsis_pack/repo/</PackURL> + <PackID>NXP.MIMXRT1021_DFP.16.0.0</PackID> + <PackURL>https://mcuxpresso.nxp.com/cmsis_pack/repo/</PackURL> <Cpu>IRAM(0x20000000,0x010000) IRAM2(0x00000000,0x010000) XRAM(0x20200000,0x020000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ELITTLE</Cpu> - <FlashUtilSpec /> - <StartupFile /> + <FlashUtilSpec></FlashUtilSpec> + <StartupFile></StartupFile> <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC8000 -FN1 -FF0MIMXRT1021_QuadSPI_4KB_SEC -FS060000000 -FL0800000 -FP0($$Device:MIMXRT1021DAG5A$arm\MIMXRT1021_QuadSPI_4KB_SEC.FLM))</FlashDriverDll> <DeviceId>0</DeviceId> <RegisterFile>$$Device:MIMXRT1021DAG5A$fsl_device_registers.h</RegisterFile> - <MemoryEnv /> - <Cmp /> - <Asm /> - <Linker /> - <OHString /> - <InfinionOptionDll /> - <SLE66CMisc /> - <SLE66AMisc /> - <SLE66LinkerMisc /> + <MemoryEnv></MemoryEnv> + <Cmp></Cmp> + <Asm></Asm> + <Linker></Linker> + <OHString></OHString> + <InfinionOptionDll></InfinionOptionDll> + <SLE66CMisc></SLE66CMisc> + <SLE66AMisc></SLE66AMisc> + <SLE66LinkerMisc></SLE66LinkerMisc> <SFDFile>$$Device:MIMXRT1021DAG5A$MIMXRT1021.xml</SFDFile> <bCustSvd>0</bCustSvd> <UseEnv>0</UseEnv> - <BinPath /> - <IncludePath /> - <LibPath /> - <RegisterFilePath /> - <DBRegisterFilePath /> + <BinPath></BinPath> + <IncludePath></IncludePath> + <LibPath></LibPath> + <RegisterFilePath></RegisterFilePath> + <DBRegisterFilePath></DBRegisterFilePath> <TargetStatus> <Error>0</Error> <ExitCodeStop>0</ExitCodeStop> @@ -59,8 +62,8 @@ <BeforeCompile> <RunUserProg1>0</RunUserProg1> <RunUserProg2>0</RunUserProg2> - <UserProg1Name /> - <UserProg2Name /> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> <UserProg1Dos16Mode>0</UserProg1Dos16Mode> <UserProg2Dos16Mode>0</UserProg2Dos16Mode> <nStopU1X>0</nStopU1X> @@ -69,8 +72,8 @@ <BeforeMake> <RunUserProg1>0</RunUserProg1> <RunUserProg2>0</RunUserProg2> - <UserProg1Name /> - <UserProg2Name /> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> <UserProg1Dos16Mode>0</UserProg1Dos16Mode> <UserProg2Dos16Mode>0</UserProg2Dos16Mode> <nStopB1X>0</nStopB1X> @@ -80,14 +83,14 @@ <RunUserProg1>1</RunUserProg1> <RunUserProg2>0</RunUserProg2> <UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name> - <UserProg2Name /> + <UserProg2Name></UserProg2Name> <UserProg1Dos16Mode>0</UserProg1Dos16Mode> <UserProg2Dos16Mode>0</UserProg2Dos16Mode> <nStopA1X>0</nStopA1X> <nStopA2X>0</nStopA2X> </AfterMake> <SelectedForBatchBuild>0</SelectedForBatchBuild> - <SVCSIdString /> + <SVCSIdString></SVCSIdString> </TargetCommonOption> <CommonProperty> <UseCPPCompiler>0</UseCPPCompiler> @@ -101,8 +104,8 @@ <AssembleAssemblyFile>0</AssembleAssemblyFile> <PublicsOnly>0</PublicsOnly> <StopOnExitCode>3</StopOnExitCode> - <CustomArgument /> - <IncludeLibraryModules /> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> <ComprImg>1</ComprImg> </CommonProperty> <DllOption> @@ -111,7 +114,7 @@ <SimDlgDll>DCM.DLL</SimDlgDll> <SimDlgDllArguments>-pCM7</SimDlgDllArguments> <TargetDllName>SARMCM3.DLL</TargetDllName> - <TargetDllArguments /> + <TargetDllArguments></TargetDllArguments> <TargetDlgDll>TCM.DLL</TargetDlgDll> <TargetDlgDllArguments>-pCM7</TargetDlgDllArguments> </DllOption> @@ -136,10 +139,10 @@ <bUseTDR>1</bUseTDR> <Flash2>BIN\UL2CM3.DLL</Flash2> <Flash3>"" ()</Flash3> - <Flash4 /> - <pFcarmOut /> - <pFcarmGrp /> - <pFcArmRoot /> + <Flash4></Flash4> + <pFcarmOut></pFcarmOut> + <pFcarmGrp></pFcarmGrp> + <pFcArmRoot></pFcArmRoot> <FcArmLst>0</FcArmLst> </Utilities> <TargetArmAds> @@ -172,7 +175,7 @@ <RvctClst>0</RvctClst> <GenPPlst>0</GenPPlst> <AdsCpuType>"Cortex-M7"</AdsCpuType> - <RvctDeviceName /> + <RvctDeviceName></RvctDeviceName> <mOS>0</mOS> <uocRom>0</uocRom> <uocRam>0</uocRam> @@ -182,9 +185,10 @@ <uocXRam>0</uocXRam> <RvdsVP>3</RvdsVP> <RvdsMve>0</RvdsMve> + <RvdsCdeCp>0</RvdsCdeCp> <hadIRAM2>1</hadIRAM2> <hadIROM2>0</hadIROM2> - <StupSel>0</StupSel> + <StupSel>1</StupSel> <useUlib>0</useUlib> <EndSel>0</EndSel> <uLtcg>0</uLtcg> @@ -198,7 +202,7 @@ <NoZi3>0</NoZi3> <NoZi4>0</NoZi4> <NoZi5>0</NoZi5> - <Ro1Chk>0</Ro1Chk> + <Ro1Chk>1</Ro1Chk> <Ro2Chk>0</Ro2Chk> <Ro3Chk>0</Ro3Chk> <Ir1Chk>0</Ir1Chk> @@ -207,7 +211,7 @@ <Ra2Chk>0</Ra2Chk> <Ra3Chk>0</Ra3Chk> <Im1Chk>0</Im1Chk> - <Im2Chk>0</Im2Chk> + <Im2Chk>1</Im2Chk> <OnChipMemories> <Ocm1> <Type>0</Type> @@ -256,8 +260,8 @@ </XRAM> <OCR_RVCT1> <Type>1</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> + <StartAddress>0x60000000</StartAddress> + <Size>0x800000</Size> </OCR_RVCT1> <OCR_RVCT2> <Type>1</Type> @@ -296,20 +300,20 @@ </OCR_RVCT8> <OCR_RVCT9> <Type>0</Type> - <StartAddress>0x20000000</StartAddress> + <StartAddress>0x0</StartAddress> <Size>0x10000</Size> </OCR_RVCT9> <OCR_RVCT10> <Type>0</Type> - <StartAddress>0x0</StartAddress> + <StartAddress>0x20000000</StartAddress> <Size>0x10000</Size> </OCR_RVCT10> </OnChipMemories> - <RvctStartVector /> + <RvctStartVector></RvctStartVector> </ArmAdsMisc> <Cads> <interw>1</interw> - <Optim>3</Optim> + <Optim>2</Optim> <oTime>0</oTime> <SplitLS>0</SplitLS> <OneElfS>1</OneElfS> @@ -318,24 +322,24 @@ <PlainCh>0</PlainCh> <Ropi>0</Ropi> <Rwpi>0</Rwpi> - <wLevel>0</wLevel> + <wLevel>3</wLevel> <uThumb>0</uThumb> <uSurpInc>0</uSurpInc> <uC99>1</uC99> <uGnu>0</uGnu> <useXO>0</useXO> - <v6Lang>1</v6Lang> - <v6LangP>1</v6LangP> + <v6Lang>3</v6Lang> + <v6LangP>3</v6LangP> <vShortEn>1</vShortEn> <vShortWch>1</vShortWch> <v6Lto>0</v6Lto> <v6WtE>0</v6WtE> <v6Rtti>0</v6Rtti> <VariousControls> - <MiscControls>--library_interface=armcc --library_type=standardlib --diag_suppress=66,1296,186</MiscControls> + <MiscControls>-fno-common -fdata-sections -ffreestanding -fno-builtin -mthumb</MiscControls> <Define>__STDC_LIMIT_MACROS, RT_USING_ARMLIBC, XIP_BOOT_HEADER_ENABLE=1, SKIP_SYSCLK_INIT, CPU_MIMXRT1021DAG5A, RT_USING_LIBC, __FPU_PRESENT=1, __CLK_TCK=RT_TICK_PER_SECOND, __RTTHREAD__, STD=C99, ENDIANNESS, FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL, XIP_EXTERNAL_FLASH=1, EVK_MCIMXRM</Define> - <Undefine /> - <IncludePath>..\libraries\drivers;..\..\..\components\drivers\include;..\..\..\components\dfs\filesystems\devfs;..\..\..\components\libc\compilers\common\extension;..\..\..\components\drivers\include;.;..\..\..\libcpu\arm\cortex-m7;board;..\..\..\components\finsh;..\..\..\components\drivers\include;..\..\..\components\drivers\spi;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\components\drivers\include;..\..\..\components\libc\posix\io\stdio;board\MCUX_Config;..\..\..\components\dfs\filesystems\elmfat;..\libraries\MIMXRT1020\CMSIS\Include;..\..\..\components\drivers\usb\usbdevice;xip;..\..\..\components\dfs\include;..\..\..\include;..\..\..\components\drivers\include;..\..\..\libcpu\arm\common;..\libraries\MIMXRT1020\MIMXRT1021\drivers;board\ports;..\..\..\components\drivers\include;..\..\..\components\libc\posix\ipc;..\libraries\MIMXRT1020\MIMXRT1021;..\..\..\components\drivers\include;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\compilers\common\include;applications</IncludePath> + <Undefine></Undefine> + <IncludePath>..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\compilers\common\include;..\libraries\MIMXRT1020\MIMXRT1021;..\..\..\components\dfs\dfs_v1\filesystems\elmfat;..\..\..\components\drivers\usb\usbdevice;..\..\..\components\drivers\include;..\..\..\components\libc\posix\io\stdio;..\..\..\libcpu\arm\common;xip;.;board;..\..\..\components\dfs\dfs_v1\filesystems\devfs;..\..\..\components\libc\posix\ipc;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\spi;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\libraries\MIMXRT1020\CMSIS\Include;..\..\..\libcpu\arm\cortex-m7;board\ports;..\..\..\components\drivers\include;board\MCUX_Config;..\..\..\components\drivers\include;..\libraries\drivers;..\..\..\components\dfs\dfs_v1\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\finsh;..\libraries\MIMXRT1020\MIMXRT1021\drivers;..\..\..\components\drivers\include;applications;..\..\..\components\drivers\include;..\..\..\include</IncludePath> </VariousControls> </Cads> <Aads> @@ -348,12 +352,12 @@ <NoWarn>0</NoWarn> <uSurpInc>0</uSurpInc> <useXO>0</useXO> - <uClangAs>0</uClangAs> + <ClangAsOpt>1</ClangAsOpt> <VariousControls> - <MiscControls /> - <Define /> - <Undefine /> - <IncludePath /> + <MiscControls></MiscControls> + <Define>DEBUG, __STARTUP_INITIALIZE_NONCACHEDATA</Define> + <Undefine></Undefine> + <IncludePath></IncludePath> </VariousControls> </Aads> <LDads> @@ -365,13 +369,13 @@ <useFile>0</useFile> <TextAddressRange>0x00000000</TextAddressRange> <DataAddressRange>0x10000000</DataAddressRange> - <pXoBase /> + <pXoBase></pXoBase> <ScatterFile>.\board\linker_scripts\link.sct</ScatterFile> - <IncludeLibs /> - <IncludeLibsPath /> + <IncludeLibs></IncludeLibs> + <IncludeLibsPath></IncludeLibsPath> <Misc>--keep=*(.boot_hdr.ivt)--keep=*(.boot_hdr.boot_data)--keep=*(.boot_hdr.dcd_data)--keep=*(.boot_hdr.conf)</Misc> - <LinkerInputFile /> - <DisabledWarnings /> + <LinkerInputFile></LinkerInputFile> + <DisabledWarnings></DisabledWarnings> </LDads> </TargetArmAds> </TargetOption> @@ -394,50 +398,36 @@ <FileType>1</FileType> <FilePath>..\..\..\components\libc\compilers\armlibc\syscall_mem.c</FilePath> </File> - </Files> - <Files> <File> <FileName>syscalls.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\libc\compilers\armlibc\syscalls.c</FilePath> </File> - </Files> - <Files> <File> <FileName>cctype.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\libc\compilers\common\cctype.c</FilePath> </File> - </Files> - <Files> <File> <FileName>cstdio.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\libc\compilers\common\cstdio.c</FilePath> </File> - </Files> - <Files> <File> <FileName>cstdlib.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\libc\compilers\common\cstdlib.c</FilePath> </File> - </Files> - <Files> <File> <FileName>cstring.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\libc\compilers\common\cstring.c</FilePath> </File> - </Files> - <Files> <File> <FileName>ctime.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\libc\compilers\common\ctime.c</FilePath> </File> - </Files> - <Files> <File> <FileName>cwchar.c</FileName> <FileType>1</FileType> @@ -453,36 +443,26 @@ <FileType>1</FileType> <FilePath>..\..\..\libcpu\arm\common\atomic_arm.c</FilePath> </File> - </Files> - <Files> <File> <FileName>div0.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\libcpu\arm\common\div0.c</FilePath> </File> - </Files> - <Files> <File> <FileName>showmem.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\libcpu\arm\common\showmem.c</FilePath> </File> - </Files> - <Files> <File> <FileName>context_rvds.S</FileName> <FileType>2</FileType> <FilePath>..\..\..\libcpu\arm\cortex-m7\context_rvds.S</FilePath> </File> - </Files> - <Files> <File> <FileName>cpu_cache.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\libcpu\arm\cortex-m7\cpu_cache.c</FilePath> </File> - </Files> - <Files> <File> <FileName>cpuport.c</FileName> <FileType>1</FileType> @@ -498,162 +478,116 @@ <FileType>1</FileType> <FilePath>..\..\..\components\drivers\i2c\i2c-bit-ops.c</FilePath> </File> - </Files> - <Files> <File> <FileName>i2c_core.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\drivers\i2c\i2c_core.c</FilePath> </File> - </Files> - <Files> <File> <FileName>i2c_dev.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\drivers\i2c\i2c_dev.c</FilePath> </File> - </Files> - <Files> <File> <FileName>completion.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\drivers\ipc\completion.c</FilePath> </File> - </Files> - <Files> <File> <FileName>dataqueue.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\drivers\ipc\dataqueue.c</FilePath> </File> - </Files> - <Files> <File> <FileName>pipe.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\drivers\ipc\pipe.c</FilePath> </File> - </Files> - <Files> <File> <FileName>ringblk_buf.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\drivers\ipc\ringblk_buf.c</FilePath> </File> - </Files> - <Files> <File> <FileName>ringbuffer.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\drivers\ipc\ringbuffer.c</FilePath> </File> - </Files> - <Files> <File> <FileName>waitqueue.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\drivers\ipc\waitqueue.c</FilePath> </File> - </Files> - <Files> <File> <FileName>workqueue.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\drivers\ipc\workqueue.c</FilePath> </File> - </Files> - <Files> <File> <FileName>adc.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\drivers\misc\adc.c</FilePath> </File> - </Files> - <Files> <File> <FileName>pin.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\drivers\misc\pin.c</FilePath> </File> - </Files> - <Files> <File> <FileName>rt_drv_pwm.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\drivers\misc\rt_drv_pwm.c</FilePath> </File> - </Files> - <Files> <File> <FileName>rtc.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\drivers\rtc\rtc.c</FilePath> </File> - </Files> - <Files> <File> <FileName>block_dev.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\drivers\sdio\block_dev.c</FilePath> </File> - </Files> - <Files> <File> <FileName>gpt.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\drivers\sdio\gpt.c</FilePath> </File> - </Files> - <Files> <File> <FileName>mmc.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\drivers\sdio\mmc.c</FilePath> </File> - </Files> - <Files> <File> <FileName>mmcsd_core.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\drivers\sdio\mmcsd_core.c</FilePath> </File> - </Files> - <Files> <File> <FileName>sd.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\drivers\sdio\sd.c</FilePath> </File> - </Files> - <Files> <File> <FileName>sdio.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\drivers\sdio\sdio.c</FilePath> </File> - </Files> - <Files> <File> <FileName>serial.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\drivers\serial\serial.c</FilePath> </File> - </Files> - <Files> <File> <FileName>qspi_core.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\drivers\spi\qspi_core.c</FilePath> </File> - </Files> - <Files> <File> <FileName>spi_core.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\drivers\spi\spi_core.c</FilePath> </File> - </Files> - <Files> <File> <FileName>spi_dev.c</FileName> <FileType>1</FileType> @@ -669,36 +603,31 @@ <FileType>1</FileType> <FilePath>board\MCUX_Config\clock_config.c</FilePath> </File> - </Files> - <Files> + <File> + <FileName>dcd.c</FileName> + <FileType>1</FileType> + <FilePath>board\MCUX_Config\dcd.c</FilePath> + </File> <File> <FileName>pin_mux.c</FileName> <FileType>1</FileType> <FilePath>board\MCUX_Config\pin_mux.c</FilePath> </File> - </Files> - <Files> <File> <FileName>board.c</FileName> <FileType>1</FileType> <FilePath>board\board.c</FilePath> </File> - </Files> - <Files> <File> <FileName>drv_common.c</FileName> <FileType>1</FileType> <FilePath>..\libraries\drivers\drv_common.c</FilePath> </File> - </Files> - <Files> <File> <FileName>drv_gpio.c</FileName> <FileType>1</FileType> <FilePath>..\libraries\drivers\drv_gpio.c</FilePath> </File> - </Files> - <Files> <File> <FileName>drv_uart.c</FileName> <FileType>1</FileType> @@ -712,56 +641,42 @@ <File> <FileName>devfs.c</FileName> <FileType>1</FileType> - <FilePath>..\..\..\components\dfs\filesystems\devfs\devfs.c</FilePath> + <FilePath>..\..\..\components\dfs\dfs_v1\filesystems\devfs\devfs.c</FilePath> </File> - </Files> - <Files> <File> <FileName>dfs_elm.c</FileName> <FileType>1</FileType> - <FilePath>..\..\..\components\dfs\filesystems\elmfat\dfs_elm.c</FilePath> + <FilePath>..\..\..\components\dfs\dfs_v1\filesystems\elmfat\dfs_elm.c</FilePath> </File> - </Files> - <Files> <File> <FileName>ff.c</FileName> <FileType>1</FileType> - <FilePath>..\..\..\components\dfs\filesystems\elmfat\ff.c</FilePath> + <FilePath>..\..\..\components\dfs\dfs_v1\filesystems\elmfat\ff.c</FilePath> </File> - </Files> - <Files> <File> <FileName>ffunicode.c</FileName> <FileType>1</FileType> - <FilePath>..\..\..\components\dfs\filesystems\elmfat\ffunicode.c</FilePath> + <FilePath>..\..\..\components\dfs\dfs_v1\filesystems\elmfat\ffunicode.c</FilePath> </File> - </Files> - <Files> <File> <FileName>dfs.c</FileName> <FileType>1</FileType> - <FilePath>..\..\..\components\dfs\src\dfs.c</FilePath> + <FilePath>..\..\..\components\dfs\dfs_v1\src\dfs.c</FilePath> </File> - </Files> - <Files> <File> <FileName>dfs_file.c</FileName> <FileType>1</FileType> - <FilePath>..\..\..\components\dfs\src\dfs_file.c</FilePath> + <FilePath>..\..\..\components\dfs\dfs_v1\src\dfs_file.c</FilePath> </File> - </Files> - <Files> <File> <FileName>dfs_fs.c</FileName> <FileType>1</FileType> - <FilePath>..\..\..\components\dfs\src\dfs_fs.c</FilePath> + <FilePath>..\..\..\components\dfs\dfs_v1\src\dfs_fs.c</FilePath> </File> - </Files> - <Files> <File> <FileName>dfs_posix.c</FileName> <FileType>1</FileType> - <FilePath>..\..\..\components\dfs\src\dfs_posix.c</FilePath> + <FilePath>..\..\..\components\dfs\dfs_v1\src\dfs_posix.c</FilePath> </File> </Files> </Group> @@ -773,29 +688,21 @@ <FileType>1</FileType> <FilePath>..\..\..\components\finsh\shell.c</FilePath> </File> - </Files> - <Files> <File> <FileName>msh.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\finsh\msh.c</FilePath> </File> - </Files> - <Files> <File> <FileName>msh_parse.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\finsh\msh_parse.c</FilePath> </File> - </Files> - <Files> <File> <FileName>cmd.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\finsh\cmd.c</FilePath> </File> - </Files> - <Files> <File> <FileName>msh_file.c</FileName> <FileType>1</FileType> @@ -811,85 +718,61 @@ <FileType>1</FileType> <FilePath>..\..\..\src\clock.c</FilePath> </File> - </Files> - <Files> <File> <FileName>components.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\src\components.c</FilePath> </File> - </Files> - <Files> <File> <FileName>device.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\src\device.c</FilePath> </File> - </Files> - <Files> <File> <FileName>idle.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\src\idle.c</FilePath> </File> - </Files> - <Files> <File> <FileName>ipc.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\src\ipc.c</FilePath> </File> - </Files> - <Files> <File> <FileName>irq.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\src\irq.c</FilePath> </File> - </Files> - <Files> <File> <FileName>kservice.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\src\kservice.c</FilePath> </File> - </Files> - <Files> <File> <FileName>mem.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\src\mem.c</FilePath> </File> - </Files> - <Files> <File> <FileName>mempool.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\src\mempool.c</FilePath> </File> - </Files> - <Files> <File> <FileName>object.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\src\object.c</FilePath> </File> - </Files> - <Files> <File> <FileName>scheduler_up.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\src\scheduler_up.c</FilePath> </File> - </Files> - <Files> <File> <FileName>thread.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\src\thread.c</FilePath> </File> - </Files> - <Files> <File> <FileName>timer.c</FileName> <FileType>1</FileType> @@ -905,50 +788,36 @@ <FileType>2</FileType> <FilePath>..\libraries\MIMXRT1020\MIMXRT1021\arm\startup_MIMXRT1021.s</FilePath> </File> - </Files> - <Files> <File> <FileName>fsl_cache.c</FileName> <FileType>1</FileType> <FilePath>..\libraries\MIMXRT1020\MIMXRT1021\drivers\fsl_cache.c</FilePath> </File> - </Files> - <Files> <File> <FileName>fsl_gpio.c</FileName> <FileType>1</FileType> <FilePath>..\libraries\MIMXRT1020\MIMXRT1021\drivers\fsl_gpio.c</FilePath> </File> - </Files> - <Files> <File> <FileName>fsl_clock.c</FileName> <FileType>1</FileType> <FilePath>..\libraries\MIMXRT1020\MIMXRT1021\drivers\fsl_clock.c</FilePath> </File> - </Files> - <Files> <File> <FileName>fsl_lpuart.c</FileName> <FileType>1</FileType> <FilePath>..\libraries\MIMXRT1020\MIMXRT1021\drivers\fsl_lpuart.c</FilePath> </File> - </Files> - <Files> <File> <FileName>fsl_usdhc.c</FileName> <FileType>1</FileType> <FilePath>..\libraries\MIMXRT1020\MIMXRT1021\drivers\fsl_usdhc.c</FilePath> </File> - </Files> - <Files> <File> <FileName>system_MIMXRT1021.c</FileName> <FileType>1</FileType> <FilePath>..\libraries\MIMXRT1020\MIMXRT1021\system_MIMXRT1021.c</FilePath> </File> - </Files> - <Files> <File> <FileName>fsl_common.c</FileName> <FileType>1</FileType> @@ -964,22 +833,16 @@ <FileType>1</FileType> <FilePath>..\..\..\components\drivers\usb\usbdevice\class\mstorage.c</FilePath> </File> - </Files> - <Files> <File> <FileName>usbdevice_core.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\drivers\usb\usbdevice\core\usbdevice_core.c</FilePath> </File> - </Files> - <Files> <File> <FileName>usbdevice.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\drivers\usb\usbdevice\core\usbdevice.c</FilePath> </File> - </Files> - <Files> <File> <FileName>cdc_vcom.c</FileName> <FileType>1</FileType> @@ -991,25 +854,25 @@ <GroupName>xip</GroupName> <Files> <File> - <FileName>fsl_flexspi_nor_boot.c</FileName> + <FileName>fsl_flexspi_nor_flash.c</FileName> <FileType>1</FileType> - <FilePath>xip\fsl_flexspi_nor_boot.c</FilePath> + <FilePath>xip\fsl_flexspi_nor_flash.c</FilePath> </File> - </Files> - <Files> <File> - <FileName>fsl_flexspi_nor_flash.c</FileName> + <FileName>fsl_flexspi_nor_boot.c</FileName> <FileType>1</FileType> - <FilePath>xip\fsl_flexspi_nor_flash.c</FilePath> + <FilePath>xip\fsl_flexspi_nor_boot.c</FilePath> </File> </Files> </Group> </Groups> </Target> </Targets> + <RTE> - <apis /> - <components /> - <files /> + <apis/> + <components/> + <files/> </RTE> + </Project> diff --git a/bsp/imxrt/imxrt1021-nxp-evk/rtconfig.h b/bsp/imxrt/imxrt1021-nxp-evk/rtconfig.h index 48293f39a7..b624a0a7a2 100644 --- a/bsp/imxrt/imxrt1021-nxp-evk/rtconfig.h +++ b/bsp/imxrt/imxrt1021-nxp-evk/rtconfig.h @@ -36,7 +36,6 @@ /* Memory Management */ -#define RT_PAGE_MAX_ORDER 11 #define RT_USING_MEMPOOL #define RT_USING_SMALL_MEM #define RT_USING_SMALL_MEM_AS_HEAP @@ -48,7 +47,7 @@ #define RT_USING_CONSOLE #define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLE_DEVICE_NAME "uart1" -#define RT_VER_NUM 0x50000 +#define RT_VER_NUM 0x50001 #define RT_USING_CACHE #define RT_USING_HW_ATOMIC #define RT_USING_CPU_FFS @@ -76,12 +75,16 @@ #define MSH_USING_BUILT_IN_COMMANDS #define FINSH_USING_DESCRIPTION #define FINSH_ARG_MAX 10 + +/* DFS: device virtual file system */ + #define RT_USING_DFS #define DFS_USING_POSIX #define DFS_USING_WORKDIR +#define DFS_FD_MAX 16 +#define RT_USING_DFS_V1 #define DFS_FILESYSTEMS_MAX 2 #define DFS_FILESYSTEM_TYPES_MAX 2 -#define DFS_FD_MAX 16 #define RT_USING_DFS_ELMFAT /* elm-chan's FatFs, Generic FAT Filesystem Module */ @@ -183,11 +186,6 @@ /* language packages */ -/* JSON: JavaScript Object Notation, a lightweight data-interchange format */ - - -/* XML: Extensible Markup Language */ - /* multimedia packages */ @@ -202,79 +200,25 @@ /* system packages */ -/* enhanced kernel services */ - - /* acceleration: Assembly language or algorithmic acceleration packages */ -/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */ - - /* Micrium: Micrium software products porting for RT-Thread */ /* peripheral libraries and drivers */ -/* sensors drivers */ - - -/* touch drivers */ - - -/* Kendryte SDK */ - /* AI packages */ -/* Signal Processing and Control Algorithm Packages */ - - /* miscellaneous packages */ -/* project laboratory */ - /* samples: kernel and components samples */ /* entertainment: terminal games and other interesting software packages */ - -/* Arduino libraries */ - - -/* Projects */ - - -/* Sensors */ - - -/* Display */ - - -/* Timing */ - - -/* Data Processing */ - - -/* Data Storage */ - -/* Communication */ - - -/* Device Control */ - - -/* Other */ - - -/* Signal IO */ - - -/* Uncategorized */ - #define SOC_IMXRT1020_SERIES /* Hardware Drivers */ diff --git a/bsp/imxrt/imxrt1021-nxp-evk/template.uvoptx b/bsp/imxrt/imxrt1021-nxp-evk/template.uvoptx index 10c9cb6ce2..f5acc91609 100644 --- a/bsp/imxrt/imxrt1021-nxp-evk/template.uvoptx +++ b/bsp/imxrt/imxrt1021-nxp-evk/template.uvoptx @@ -10,7 +10,7 @@ <aExt>*.s*; *.src; *.a*</aExt> <oExt>*.obj; *.o</oExt> <lExt>*.lib</lExt> - <tExt>*.txt; *.h; *.inc</tExt> + <tExt>*.txt; *.h; *.inc; *.md</tExt> <pExt>*.plm</pExt> <CppX>*.cpp</CppX> <nMigrate>0</nMigrate> @@ -171,6 +171,13 @@ <pszMrulep></pszMrulep> <pSingCmdsp></pSingCmdsp> <pMultCmdsp></pMultCmdsp> + <DebugDescription> + <Enable>1</Enable> + <EnableFlashSeq>1</EnableFlashSeq> + <EnableLog>0</EnableLog> + <Protocol>2</Protocol> + <DbgClock>10000000</DbgClock> + </DebugDescription> </TargetOption> </Target> diff --git a/bsp/imxrt/imxrt1021-nxp-evk/template.uvprojx b/bsp/imxrt/imxrt1021-nxp-evk/template.uvprojx index 5dc1613078..6faaa7f419 100644 --- a/bsp/imxrt/imxrt1021-nxp-evk/template.uvprojx +++ b/bsp/imxrt/imxrt1021-nxp-evk/template.uvprojx @@ -11,13 +11,13 @@ <ToolsetNumber>0x4</ToolsetNumber> <ToolsetName>ARM-ADS</ToolsetName> <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed> - <uAC6>0</uAC6> + <uAC6>1</uAC6> <TargetOption> <TargetCommonOption> <Device>MIMXRT1021DAG5A</Device> <Vendor>NXP</Vendor> - <PackID>NXP.MIMXRT1021_DFP.11.0.1</PackID> - <PackURL>http://mcuxpresso.nxp.com/cmsis_pack/repo/</PackURL> + <PackID>NXP.MIMXRT1021_DFP.16.0.0</PackID> + <PackURL>https://mcuxpresso.nxp.com/cmsis_pack/repo/</PackURL> <Cpu>IRAM(0x20000000,0x010000) IRAM2(0x00000000,0x010000) XRAM(0x20200000,0x020000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ELITTLE</Cpu> <FlashUtilSpec></FlashUtilSpec> <StartupFile></StartupFile> @@ -185,9 +185,10 @@ <uocXRam>0</uocXRam> <RvdsVP>3</RvdsVP> <RvdsMve>0</RvdsMve> + <RvdsCdeCp>0</RvdsCdeCp> <hadIRAM2>1</hadIRAM2> <hadIROM2>0</hadIROM2> - <StupSel>0</StupSel> + <StupSel>1</StupSel> <useUlib>0</useUlib> <EndSel>0</EndSel> <uLtcg>0</uLtcg> @@ -201,7 +202,7 @@ <NoZi3>0</NoZi3> <NoZi4>0</NoZi4> <NoZi5>0</NoZi5> - <Ro1Chk>0</Ro1Chk> + <Ro1Chk>1</Ro1Chk> <Ro2Chk>0</Ro2Chk> <Ro3Chk>0</Ro3Chk> <Ir1Chk>0</Ir1Chk> @@ -210,7 +211,7 @@ <Ra2Chk>0</Ra2Chk> <Ra3Chk>0</Ra3Chk> <Im1Chk>0</Im1Chk> - <Im2Chk>0</Im2Chk> + <Im2Chk>1</Im2Chk> <OnChipMemories> <Ocm1> <Type>0</Type> @@ -259,8 +260,8 @@ </XRAM> <OCR_RVCT1> <Type>1</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> + <StartAddress>0x60000000</StartAddress> + <Size>0x800000</Size> </OCR_RVCT1> <OCR_RVCT2> <Type>1</Type> @@ -299,12 +300,12 @@ </OCR_RVCT8> <OCR_RVCT9> <Type>0</Type> - <StartAddress>0x20000000</StartAddress> + <StartAddress>0x0</StartAddress> <Size>0x10000</Size> </OCR_RVCT9> <OCR_RVCT10> <Type>0</Type> - <StartAddress>0x0</StartAddress> + <StartAddress>0x20000000</StartAddress> <Size>0x10000</Size> </OCR_RVCT10> </OnChipMemories> @@ -312,7 +313,7 @@ </ArmAdsMisc> <Cads> <interw>1</interw> - <Optim>3</Optim> + <Optim>2</Optim> <oTime>0</oTime> <SplitLS>0</SplitLS> <OneElfS>1</OneElfS> @@ -321,21 +322,21 @@ <PlainCh>0</PlainCh> <Ropi>0</Ropi> <Rwpi>0</Rwpi> - <wLevel>0</wLevel> + <wLevel>3</wLevel> <uThumb>0</uThumb> <uSurpInc>0</uSurpInc> <uC99>1</uC99> <uGnu>0</uGnu> <useXO>0</useXO> - <v6Lang>1</v6Lang> - <v6LangP>1</v6LangP> + <v6Lang>3</v6Lang> + <v6LangP>3</v6LangP> <vShortEn>1</vShortEn> <vShortWch>1</vShortWch> <v6Lto>0</v6Lto> <v6WtE>0</v6WtE> <v6Rtti>0</v6Rtti> <VariousControls> - <MiscControls>--library_interface=armcc --library_type=standardlib --diag_suppress=66,1296,186</MiscControls> + <MiscControls>-fno-common -fdata-sections -ffreestanding -fno-builtin -mthumb</MiscControls> <Define></Define> <Undefine></Undefine> <IncludePath></IncludePath> @@ -351,10 +352,10 @@ <NoWarn>0</NoWarn> <uSurpInc>0</uSurpInc> <useXO>0</useXO> - <uClangAs>0</uClangAs> + <ClangAsOpt>1</ClangAsOpt> <VariousControls> <MiscControls></MiscControls> - <Define></Define> + <Define>DEBUG, __STARTUP_INITIALIZE_NONCACHEDATA</Define> <Undefine></Undefine> <IncludePath></IncludePath> </VariousControls> |