summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorGrissiom <[email protected]>2013-05-29 17:26:34 +0800
committerGrissiom <[email protected]>2013-05-29 17:26:34 +0800
commit50c8cbe1d50d39911848c180bf9fd1fa0fddd89c (patch)
tree7cffedd3b930ca380b8c2d920c6a4ea468ae2a16
parentd22496aee86db08ba9b3313178770a117a618e47 (diff)
rm48x50: now it has console
-rw-r--r--bsp/rm48x50/application/application.c7
-rw-r--r--bsp/rm48x50/drivers/board.c19
-rw-r--r--bsp/rm48x50/drivers/drv_uart.h6
-rw-r--r--bsp/rm48x50/drivers/uart.c204
-rw-r--r--bsp/rm48x50/rtconfig.h2
5 files changed, 226 insertions, 12 deletions
diff --git a/bsp/rm48x50/application/application.c b/bsp/rm48x50/application/application.c
index 8df987ac06..fe3d34bf81 100644
--- a/bsp/rm48x50/application/application.c
+++ b/bsp/rm48x50/application/application.c
@@ -28,11 +28,14 @@ static rt_uint8_t user_thread_stack[512];
static struct rt_thread user_thread;
static void user_thread_entry(void *p)
{
+ int i;
+
gioSetDirection(hetPORT1, 0xFFFFFFFF);
- for(;;)
+
+ for(i = 0; ;i++)
{
+ rt_kprintf("loop %d\n", i);
gioSetBit(hetPORT1, 17, gioGetBit(hetPORT1, 17) ^ 1);
- /* Taggle HET[1] with timer tick */
/*sciSendByte(scilinREG, 'b');*/
rt_thread_delay(100);
/*sciSendByte(scilinREG, 'a');*/
diff --git a/bsp/rm48x50/drivers/board.c b/bsp/rm48x50/drivers/board.c
index 2cd1f9ceb5..2ff930ce11 100644
--- a/bsp/rm48x50/drivers/board.c
+++ b/bsp/rm48x50/drivers/board.c
@@ -1,7 +1,7 @@
/*
* File : board.c
* This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006, RT-Thread Develop Team
+ * COPYRIGHT (C) 2013, RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
@@ -9,7 +9,7 @@
*
* Change Logs:
* Date Author Notes
- * 2008-12-11 xuxinming first version
+ * 2013-05-27 Grissiom port to RM48x50
*/
#include <rtthread.h>
@@ -17,11 +17,12 @@
#include "sys_common.h"
#include "system.h"
-#include "sci.h"
#include "rti.h"
#include "board.h"
+#include "drv_uart.h"
+
#define RTI_INT_VEC 6
void rt_timer_handler(int vector, void* param)
@@ -30,17 +31,17 @@ void rt_timer_handler(int vector, void* param)
rt_tick_increase();
}
-/**
- * This function will init LPC2478 board
- */
void rt_hw_board_init(void)
{
- sciInit();
rtiInit();
- rtiStartCounter(rtiCOUNTER_BLOCK1);
- rtiEnableNotification(rtiNOTIFICATION_COMPARE3);
rt_hw_interrupt_install(RTI_INT_VEC, rt_timer_handler, RT_NULL, "tick");
rt_hw_interrupt_umask(RTI_INT_VEC);
+
+ rtiStartCounter(rtiCOUNTER_BLOCK1);
+ rtiEnableNotification(rtiNOTIFICATION_COMPARE3);
+
+ rt_hw_uart_init();
+ rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
}
diff --git a/bsp/rm48x50/drivers/drv_uart.h b/bsp/rm48x50/drivers/drv_uart.h
new file mode 100644
index 0000000000..8bfa1489e5
--- /dev/null
+++ b/bsp/rm48x50/drivers/drv_uart.h
@@ -0,0 +1,6 @@
+#ifndef DRV_UART_H
+#define DRV_UART_H
+
+void rt_hw_uart_init(void);
+
+#endif /* end of include guard: DRV_UART_H */
diff --git a/bsp/rm48x50/drivers/uart.c b/bsp/rm48x50/drivers/uart.c
new file mode 100644
index 0000000000..ced1cb7c75
--- /dev/null
+++ b/bsp/rm48x50/drivers/uart.c
@@ -0,0 +1,204 @@
+/*
+ * File : uart.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2013, RT-Thread Develop Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://openlab.rt-thread.com/license/LICENSE
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2013-05-27 Grissiom port to RM48x50
+ */
+
+/* welcome, if you open this file, you may want to see uart driver code.
+ * However, TI call it Serial Communication Interface(SCI) and all the low
+ * level API is prefixed by "sci". To avoid messive renaming, I want to keep
+ * with TI and call all the things SCI. You could safely substitude the word
+ * "sci" with "uart". Enjoy. */
+
+#include <rthw.h>
+#include <rtthread.h>
+#include <rtdevice.h>
+
+#include <reg_sci.h>
+
+/* bring from sci.h */
+enum sciIntFlags
+{
+ SCI_FE_INT = 0x04000000U, /* framing error */
+ SCI_OE_INT = 0x02000000U, /* overrun error */
+ SCI_PE_INT = 0x01000000U, /* parity error */
+ SCI_RX_INT = 0x00000200U, /* receive buffer ready */
+ SCI_TX_INT = 0x00000100U, /* transmit buffer ready */
+ SCI_WAKE_INT = 0x00000002U, /* wakeup */
+ SCI_BREAK_INT = 0x00000001U /* break detect */
+};
+
+/* LIN1 High level interrupt. Change this if you set a different channel in
+ * HALCoGen. */
+#define SCI_INT_VEC 13
+
+#define VCLK_HZ 100000000L
+
+static rt_err_t _configure(struct rt_serial_device *serial, struct serial_configure *cfg)
+{
+ /** - global control 1 */
+ rt_uint32_t gcr1 = (1U << 25U) /* enable transmit */
+ | (1U << 24U) /* enable receive */
+ | (1U << 5U) /* internal clock (device has no clock pin) */
+ | (1U << 1U); /* asynchronous timing mode */
+ if (cfg->stop_bits == STOP_BITS_2)
+ gcr1 |= (1U << 4U); /* number of stop bits */
+ else if (cfg->stop_bits != STOP_BITS_1)
+ return -RT_ERROR;
+
+ if (cfg->parity == PARITY_EVEN)
+ {
+ gcr1 |= (1U << 3U) | (1U << 2U);
+ }
+ else if (cfg->parity == PARITY_ODD)
+ {
+ gcr1 |= (0U << 3U) | (1U << 2U);
+ }
+
+ /** - bring SCI out of reset */
+ scilinREG->GCR0 = 1U;
+
+ /** - Disable all interrupts */
+ scilinREG->CLRINT = 0xFFFFFFFFU;
+ scilinREG->CLRINTLVL = 0xFFFFFFFFU;
+
+ scilinREG->GCR1 = gcr1;
+
+ /** - set baudrate */
+ scilinREG->BRS = VCLK_HZ/16/cfg->baud_rate - 1; /* baudrate */
+
+ /** - transmission length */
+ scilinREG->FORMAT = cfg->data_bits - 1; /* length */
+
+ /** - set SCI pins functional mode */
+ scilinREG->FUN = (1U << 2U) /* tx pin */
+ | (1U << 1U) /* rx pin */
+ | (0U); /* clk pin */
+
+ /** - set SCI pins default output value */
+ scilinREG->DOUT = (0U << 2U) /* tx pin */
+ | (0U << 1U) /* rx pin */
+ | (0U); /* clk pin */
+
+ /** - set SCI pins output direction */
+ scilinREG->DIR = (0U << 2U) /* tx pin */
+ | (0U << 1U) /* rx pin */
+ | (0U); /* clk pin */
+
+ /** - set SCI pins open drain enable */
+ scilinREG->ODR = (0U << 2U) /* tx pin */
+ | (0U << 1U) /* rx pin */
+ | (0U); /* clk pin */
+
+ /** - set SCI pins pullup/pulldown enable */
+ scilinREG->PD = (0U << 2U) /* tx pin */
+ | (0U << 1U) /* rx pin */
+ | (0U); /* clk pin */
+
+ /** - set SCI pins pullup/pulldown select */
+ scilinREG->PSL = (1U << 2U) /* tx pin */
+ | (1U << 1U) /* rx pin */
+ | (1U); /* clk pin */
+
+ /** - set interrupt level */
+ scilinREG->SETINTLVL = (0U << 26U) /* Framing error */
+ | (0U << 25U) /* Overrun error */
+ | (0U << 24U) /* Parity error */
+ | (0U << 9U) /* Receive */
+ | (0U << 8U) /* Transmit */
+ | (0U << 1U) /* Wakeup */
+ | (0U); /* Break detect */
+
+ /** - set interrupt enable */
+ scilinREG->SETINT = (0U << 26U) /* Framing error */
+ | (0U << 25U) /* Overrun error */
+ | (0U << 24U) /* Parity error */
+ | (1U << 9U) /* Receive */
+ | (0U << 1U) /* Wakeup */
+ | (0U); /* Break detect */
+
+ /** - Finaly start SCILIN */
+ scilinREG->GCR1 |= (1U << 7U);
+
+ return RT_EOK;
+}
+
+static rt_err_t _control(struct rt_serial_device *serial, int cmd, void *arg)
+{
+ sciBASE_t *sci = (sciBASE_t*)serial->parent.user_data;
+
+ switch (cmd)
+ {
+ case RT_DEVICE_CTRL_CLR_INT:
+ /* disable rx irq */
+ sci->CLRINT = SCI_RX_INT;
+ break;
+ case RT_DEVICE_CTRL_SET_INT:
+ /* enable rx irq */
+ sci->SETINT = SCI_RX_INT;
+ break;
+ }
+
+ return RT_EOK;
+}
+
+static int _putc(struct rt_serial_device *serial, char c)
+{
+ sciBASE_t *sci = (sciBASE_t*)serial->parent.user_data;
+ while ((sci->FLR & SCI_TX_INT) == 0U)
+ ;
+ sci->TD = c;
+ return 1;
+}
+
+static int _getc(struct rt_serial_device *serial)
+{
+ sciBASE_t *sci = (sciBASE_t*)serial->parent.user_data;
+ if (sci->FLR & (1<<9))
+ return (sci->RD & 0x000000FFU);
+ else
+ return -1;
+}
+
+static const struct rt_uart_ops _sci_ops =
+{
+ _configure,
+ _control,
+ _putc,
+ _getc,
+};
+
+static struct rt_serial_device _sci2_serial;
+static struct serial_ringbuffer _sci2_int_rx;
+
+void rt_hw_uart_init(void)
+{
+ struct serial_configure config;
+
+ /* fake configuration */
+ config.baud_rate = BAUD_RATE_115200;
+ config.bit_order = BIT_ORDER_LSB;
+ config.data_bits = DATA_BITS_8;
+ config.parity = PARITY_NONE;
+ config.stop_bits = STOP_BITS_1;
+ config.invert = NRZ_NORMAL;
+
+ _sci2_serial.ops = &_sci_ops;
+ _sci2_serial.int_rx = &_sci2_int_rx;
+ _sci2_serial.config = config;
+
+ rt_hw_serial_register(&_sci2_serial, "sci2",
+ RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
+ (void*)scilinREG);
+
+ rt_hw_interrupt_install(SCI_INT_VEC, rt_hw_serial_isr, &_sci2_serial, "sci2");
+ rt_hw_interrupt_umask(SCI_INT_VEC);
+}
diff --git a/bsp/rm48x50/rtconfig.h b/bsp/rm48x50/rtconfig.h
index 2efd82ae68..abc3711e50 100644
--- a/bsp/rm48x50/rtconfig.h
+++ b/bsp/rm48x50/rtconfig.h
@@ -79,7 +79,7 @@
// <integer name="RT_CONSOLEBUF_SIZE" description="The buffer size for console output" default="128" />
#define RT_CONSOLEBUF_SIZE 128
// <string name="RT_CONSOLE_DEVICE_NAME" description="The device name for console" default="uart" />
-#define RT_CONSOLE_DEVICE_NAME "uart0"
+#define RT_CONSOLE_DEVICE_NAME "sci2"
// </section>
// <bool name="RT_USING_COMPONENTS_INIT" description="Using RT-Thread components initialization" default="true" />