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authorbernard.xiong <[email protected]>2010-03-29 15:54:30 +0000
committerbernard.xiong <[email protected]>2010-03-29 15:54:30 +0000
commit6acaf214a583ddc34c8d15a531e6eefad3e04ab7 (patch)
tree6dfda6bcd703fb75db7396ff414e84533224cc78
parent4223f6efd5879a5ebdca7e83b0913562071f2a1d (diff)
update STM32F107 branch
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@551 bbd45198-f89e-11dd-88c7-29a3b14d5316
-rw-r--r--bsp/stm3210/project_107/board.h12
-rw-r--r--bsp/stm3210/project_107/msd.c10
-rw-r--r--bsp/stm3210/project_107/project.Uv218
-rw-r--r--bsp/stm3210/project_107/rtconfig.h3
-rw-r--r--bsp/stm3210/project_107/startup.c3
-rw-r--r--bsp/stm3210/project_107/usart.c331
-rw-r--r--bsp/stm3210/usart.c16
7 files changed, 32 insertions, 361 deletions
diff --git a/bsp/stm3210/project_107/board.h b/bsp/stm3210/project_107/board.h
index 5ac2de0623..baea5f611a 100644
--- a/bsp/stm3210/project_107/board.h
+++ b/bsp/stm3210/project_107/board.h
@@ -1,7 +1,7 @@
/*
* File : board.h
* This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006, RT-Thread Develop Team
+ * COPYRIGHT (C) 2009, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
@@ -50,6 +50,16 @@ void rt_hw_board_led_on(int n);
void rt_hw_board_led_off(int n);
void rt_hw_board_init(void);
+#if STM32_CONSOLE_USART == 0
+#define CONSOLE_DEVICE "no"
+#elif STM32_CONSOLE_USART == 1
+#define CONSOLE_DEVICE "uart1"
+#elif STM32_CONSOLE_USART == 2
+#define CONSOLE_DEVICE "uart2"
+#elif STM32_CONSOLE_USART == 3
+#define CONSOLE_DEVICE "uart3"
+#endif
+
void rt_hw_usart_init(void);
/* SD Card init function */
diff --git a/bsp/stm3210/project_107/msd.c b/bsp/stm3210/project_107/msd.c
index 6c61ffb869..170bd3f248 100644
--- a/bsp/stm3210/project_107/msd.c
+++ b/bsp/stm3210/project_107/msd.c
@@ -40,7 +40,6 @@
#define MSD_CS_HIGH() GPIO_SetBits(GPIOC, GPIO_Pin_7)
/* MSD Card SPI */
#define MSD_SPI SPI3
-#define MSD_RCC_SPI RCC_APB1Periph_SPI3
/* Private function prototypes -----------------------------------------------*/
static void SPI_Config(void);
@@ -757,9 +756,9 @@ void SPI_Config(void)
GPIO_PinRemapConfig(GPIO_Remap_SPI3, ENABLE);
/* SPI Periph clock enable */
- RCC_APB2PeriphClockCmd(MSD_RCC_SPI, ENABLE);
+ RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI3, ENABLE);
- /* Configure SPI pins: SCK, MISO and MOSI */
+ /* Configure SPI3 pins: SCK, MISO and MOSI */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10 | GPIO_Pin_11 | GPIO_Pin_12;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
@@ -771,7 +770,7 @@ void SPI_Config(void)
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
GPIO_Init(GPIOC, &GPIO_InitStructure);
- /* SPI Config */
+ /* SPI3 Config */
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
@@ -786,8 +785,7 @@ void SPI_Config(void)
/* SPI enable */
SPI_Cmd(MSD_SPI, ENABLE);
- /* active SD card */
- for (delay = 0; delay < 0xfffff; delay ++);
+ for(delay = 0; delay < 0xfffff; delay++);
}
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/
diff --git a/bsp/stm3210/project_107/project.Uv2 b/bsp/stm3210/project_107/project.Uv2
index 15ca92fca4..5ac6c3471e 100644
--- a/bsp/stm3210/project_107/project.Uv2
+++ b/bsp/stm3210/project_107/project.Uv2
@@ -115,22 +115,12 @@ File 7,1,<..\..\finsh\finsh_var.c><finsh_var.c>
File 7,1,<..\..\finsh\finsh_vm.c><finsh_vm.c>
File 7,1,<..\..\finsh\shell.c><shell.c>
File 8,1,<..\..\filesystem\dfs\src\dfs_util.c><dfs_util.c>
-File 8,1,<..\..\filesystem\dfs\src\dfs_cache.c><dfs_cache.c>
File 8,1,<..\..\filesystem\dfs\src\dfs_fs.c><dfs_fs.c>
File 8,1,<..\..\filesystem\dfs\src\dfs_init.c><dfs_init.c>
File 8,1,<..\..\filesystem\dfs\src\dfs_posix.c><dfs_posix.c>
File 8,1,<..\..\filesystem\dfs\src\dfs_raw.c><dfs_raw.c>
-File 8,1,<..\..\filesystem\dfs\filesystems\efsl\src\base\efs.c><efs.c>
-File 8,1,<..\..\filesystem\dfs\filesystems\efsl\src\base\extract.c><extract.c>
-File 8,1,<..\..\filesystem\dfs\filesystems\efsl\src\base\partition.c><partition.c>
-File 8,1,<..\..\filesystem\dfs\filesystems\efsl\src\base\plibc.c><plibc.c>
-File 8,1,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\dir.c><dir.c>
-File 8,1,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\fat.c><fat.c>
-File 8,1,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\file.c><file.c>
-File 8,1,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\fs.c><fs.c>
-File 8,1,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\ls.c><ls.c>
-File 8,1,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\time.c><time.c>
-File 8,1,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\ui.c><ui.c>
+File 8,1,<..\..\filesystem\dfs\filesystems\elmfat\dfs_elm.c><dfs_elm.c>
+File 8,1,<..\..\filesystem\dfs\filesystems\elmfat\ff.c><ff.c>
Options 1,0,0 // Target 'RT-Thread STM32'
@@ -191,7 +181,7 @@ Options 1,0,0 // Target 'RT-Thread STM32'
ADSCMISC ()
ADSCDEFN (USE_STDPERIPH_DRIVER, STM32F10X_CL,)
ADSCUDEF ()
- ADSCINCD (.\Libraries\STM32F10x_StdPeriph_Driver\inc;.\Libraries\CMSIS\Core\CM3;..\..\include;.;..\..\libcpu\arm\stm32;..\..\finsh;..\..\net\lwip\src;..\..\net\lwip\src\include;..\..\net\lwip\src\arch\include;..\..\net\lwip\src\include\ipv4;..\..\filesystem\dfs;..\..\filesystem\dfs\include;..\..\filesystem\dfs\filesystems\efsl\src\include;..\..\filesystem\dfs\filesystems\efsl\src\base\include;..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\include)
+ ADSCINCD (.\Libraries\STM32F10x_StdPeriph_Driver\inc;.\Libraries\CMSIS\Core\CM3;..\..\include;.;..\..\libcpu\arm\stm32;..\..\finsh;..\..\net\lwip\src;..\..\net\lwip\src\include;..\..\net\lwip\src\arch\include;..\..\net\lwip\src\include\ipv4;..\..\filesystem\dfs;..\..\filesystem\dfs\include)
ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSAMISC ()
ADSADEFN ()
@@ -215,7 +205,7 @@ Options 1,0,0 // Target 'RT-Thread STM32'
ADSLDMC (--keep __fsym_* --keep __vsym_*)
ADSLDIF ()
ADSLDDW ()
- OPTDL (SARMCM3.DLL)()(DARMSTM.DLL)(-pSTM32F107xCSchedule)(SARMCM3.DLL)()(TARMSTM.DLL)(-pSTM32F107xC)
+ OPTDL (SARMCM3.DLL)()(DARMSTM.DLL)(-pSTM32F103ZE)(SARMCM3.DLL)()(TARMSTM.DLL)(-pSTM32F103ZE)
OPTDBG 49150,7,()()()()()()()()()() (Segger\JL2CM3.dll)()()()
FLASH1 { 1,0,0,0,1,0,0,0,6,16,0,0,0,0,0,0,0,0,0,0 }
FLASH2 (Segger\JL2CM3.dll)
diff --git a/bsp/stm3210/project_107/rtconfig.h b/bsp/stm3210/project_107/rtconfig.h
index 0ab24d8329..12f140c2f4 100644
--- a/bsp/stm3210/project_107/rtconfig.h
+++ b/bsp/stm3210/project_107/rtconfig.h
@@ -74,8 +74,7 @@
/* SECTION: device filesystem */
#define RT_USING_DFS
-#define RT_USING_DFS_EFSL
-/* #define RT_USING_DFS_ELMFAT */
+#define RT_USING_DFS_ELMFAT
/* the max number of mounted filesystem */
#define DFS_FILESYSTEMS_MAX 2
diff --git a/bsp/stm3210/project_107/startup.c b/bsp/stm3210/project_107/startup.c
index b6c561fc25..a0aae73edf 100644
--- a/bsp/stm3210/project_107/startup.c
+++ b/bsp/stm3210/project_107/startup.c
@@ -97,9 +97,6 @@ void rtthread_startup(void)
/* init scheduler system */
rt_system_scheduler_init();
- /* init hardware serial device */
- rt_hw_usart_init();
-
#ifdef RT_USING_DFS
/* init sdcard driver */
#if STM32_USE_SDIO
diff --git a/bsp/stm3210/project_107/usart.c b/bsp/stm3210/project_107/usart.c
deleted file mode 100644
index 0876708d83..0000000000
--- a/bsp/stm3210/project_107/usart.c
+++ /dev/null
@@ -1,331 +0,0 @@
-/*
- * File : usart.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date Author Notes
- * 2009-01-05 Bernard the first version
- */
-
-#include "usart.h"
-#include <serial.h>
-#include <stm32f10x_dma.h>
-
-/*
- * Use UART1 as console output and finsh input
- * interrupt Rx and poll Tx (stream mode)
- *
- * Use UART2 with DMA Rx and poll Tx -- DMA channel 6
- * Use UART3 with DMA Tx and interrupt Rx -- DMA channel 2
- *
- * USART DMA setting on STM32
- * USART1 Tx --> DMA Channel 4
- * USART1 Rx --> DMA Channel 5
- * USART2 Tx --> DMA Channel 7
- * USART2 Rx --> DMA Channel 6
- * USART3 Tx --> DMA Channel 2
- * USART3 Rx --> DMA Channel 3
- */
-
-#ifdef RT_USING_UART1
-struct stm32_serial_int_rx uart1_int_rx;
-struct stm32_serial_device uart1 =
-{
- USART1,
- &uart1_int_rx,
- RT_NULL,
- RT_NULL,
- RT_NULL
-};
-struct rt_device uart1_device;
-#endif
-
-#ifdef RT_USING_UART2
-struct stm32_serial_int_rx uart2_int_rx;
-struct stm32_serial_dma_rx uart2_dma_rx;
-struct stm32_serial_device uart2 =
-{
- USART2,
- &uart2_int_rx,
- RT_NULL,
- RT_NULL,
- RT_NULL
-};
-struct rt_device uart2_device;
-#endif
-
-#ifdef RT_USING_UART3
-struct stm32_serial_int_rx uart3_int_rx;
-struct stm32_serial_dma_tx uart3_dma_tx;
-struct stm32_serial_device uart3 =
-{
- USART3,
- &uart3_int_rx,
- RT_NULL,
- RT_NULL,
- &uart3_dma_tx
-};
-struct rt_device uart3_device;
-#endif
-
-#define USART1_DR_Base 0x40013804
-#define USART2_DR_Base 0x40004404
-#define USART3_DR_Base 0x40004804
-
-/* USART1_REMAP = 0 */
-#define UART1_GPIO_TX GPIO_Pin_9
-#define UART1_GPIO_RX GPIO_Pin_10
-#define UART1_GPIO GPIOA
-#define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1
-#define UART1_TX_DMA DMA1_Channel4
-#define UART1_RX_DMA DMA1_Channel5
-
-/* USART2_REMAP = 0 */
-#define UART2_GPIO_TX GPIO_Pin_2
-#define UART2_GPIO_RX GPIO_Pin_3
-#define UART2_GPIO GPIOA
-#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2
-#define UART2_TX_DMA DMA1_Channel7
-#define UART2_RX_DMA DMA1_Channel6
-
-/* USART3_REMAP[1:0] = 00 */
-#define UART3_GPIO_RX GPIO_Pin_11
-#define UART3_GPIO_TX GPIO_Pin_10
-#define UART3_GPIO GPIOB
-#define RCC_APBPeriph_UART3 RCC_APB1Periph_USART3
-#define UART3_TX_DMA DMA1_Channel2
-#define UART3_RX_DMA DMA1_Channel3
-
-static void RCC_Configuration(void)
-{
- RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
-
-#ifdef RT_USING_UART1
- /* Enable USART1 and GPIOA clocks */
- RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA, ENABLE);
-#endif
-
-#ifdef RT_USING_UART2
- /* Enable GPIOD clocks */
- RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD, ENABLE);
- /* Enable USART2 clock */
- RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
-#endif
-
-#ifdef RT_USING_UART3
- RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
- /* Enable USART3 clock */
- RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
-#endif
-
-#if defined (RT_USING_UART2) || defined (RT_USING_UART3)
- /* DMA clock enable */
- RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
-#endif
-}
-
-static void GPIO_Configuration(void)
-{
- GPIO_InitTypeDef GPIO_InitStructure;
-
-#ifdef RT_USING_UART1
- /* Configure USART1 Rx (PA.10) as input floating */
- GPIO_InitStructure.GPIO_Pin = UART1_GPIO_RX;
- GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
- GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
-
- /* Configure USART1 Tx (PA.09) as alternate function push-pull */
- GPIO_InitStructure.GPIO_Pin = UART1_GPIO_TX;
- GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
- GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
- GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
-#endif
-
-#ifdef RT_USING_UART2
- /* Configure USART2 Rx as input floating */
- GPIO_InitStructure.GPIO_Pin = UART2_GPIO_RX;
- GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
- GPIO_Init(UART2_GPIO, &GPIO_InitStructure);
-
- /* Configure USART2 Tx as alternate function push-pull */
- GPIO_InitStructure.GPIO_Pin = UART2_GPIO_TX;
- GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
- GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
- GPIO_Init(UART2_GPIO, &GPIO_InitStructure);
-#endif
-
-#ifdef RT_USING_UART3
- /* Configure USART3 Rx as input floating */
- GPIO_InitStructure.GPIO_Pin = UART3_GPIO_RX;
- GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
- GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
-
- /* Configure USART3 Tx as alternate function push-pull */
- GPIO_InitStructure.GPIO_Pin = UART3_GPIO_TX;
- GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
- GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
- GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
-#endif
-}
-
-static void NVIC_Configuration(void)
-{
- NVIC_InitTypeDef NVIC_InitStructure;
-
- /* Configure the NVIC Preemption Priority Bits */
- NVIC_PriorityGroupConfig(NVIC_PriorityGroup_0);
-
-#ifdef RT_USING_UART1
- /* Enable the USART1 Interrupt */
- NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn;
- NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
- NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
- NVIC_Init(&NVIC_InitStructure);
-#endif
-
-#ifdef RT_USING_UART2
- /* Enable the USART2 Interrupt */
- NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn;
- NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
- NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
- NVIC_Init(&NVIC_InitStructure);
-#endif
-
-#ifdef RT_USING_UART3
- /* Enable the USART3 Interrupt */
- NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn;
- NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
- NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
- NVIC_Init(&NVIC_InitStructure);
-
- /* Enable the DMA1 Channel2 Interrupt */
- NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel2_IRQn;
- NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
- NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
- NVIC_Init(&NVIC_InitStructure);
-#endif
-}
-
-static void DMA_Configuration(void)
-{
-#if defined (RT_USING_UART3)
- DMA_InitTypeDef DMA_InitStructure;
-
- /* fill init structure */
- DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
- DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
- DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
- DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
- DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
- DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
- DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
-
- /* DMA1 Channel5 (triggered by USART3 Tx event) Config */
- DMA_DeInit(UART3_TX_DMA);
- DMA_InitStructure.DMA_PeripheralBaseAddr = USART3_DR_Base;
- DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
- DMA_InitStructure.DMA_MemoryBaseAddr = (u32)0;
- DMA_InitStructure.DMA_BufferSize = 0;
- DMA_Init(UART3_TX_DMA, &DMA_InitStructure);
- DMA_ITConfig(UART3_TX_DMA, DMA_IT_TC | DMA_IT_TE, ENABLE);
- DMA_ClearFlag(DMA1_FLAG_TC5);
-#endif
-}
-
-/*
- * Init all related hardware in here
- * rt_hw_serial_init() will register all supported USART device
- */
-void rt_hw_usart_init()
-{
- USART_InitTypeDef USART_InitStructure;
- USART_ClockInitTypeDef USART_ClockInitStructure;
-
- RCC_Configuration();
-
- GPIO_Configuration();
-
- NVIC_Configuration();
-
- DMA_Configuration();
-
- /* uart init */
-#ifdef RT_USING_UART1
- USART_InitStructure.USART_BaudRate = 115200;
- USART_InitStructure.USART_WordLength = USART_WordLength_8b;
- USART_InitStructure.USART_StopBits = USART_StopBits_1;
- USART_InitStructure.USART_Parity = USART_Parity_No;
- USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
- USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
- USART_ClockInitStructure.USART_Clock = USART_Clock_Disable;
- USART_ClockInitStructure.USART_CPOL = USART_CPOL_Low;
- USART_ClockInitStructure.USART_CPHA = USART_CPHA_2Edge;
- USART_ClockInitStructure.USART_LastBit = USART_LastBit_Disable;
- USART_Init(USART1, &USART_InitStructure);
- USART_ClockInit(USART1, &USART_ClockInitStructure);
-
- /* register uart1 */
- rt_hw_serial_register(&uart1_device, "uart1",
- RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
- &uart1);
-
- /* enable interrupt */
- USART_ITConfig(USART1, USART_IT_RXNE, ENABLE);
-#endif
-
-#ifdef RT_USING_UART2
- USART_InitStructure.USART_BaudRate = 115200;
- USART_InitStructure.USART_WordLength = USART_WordLength_8b;
- USART_InitStructure.USART_StopBits = USART_StopBits_1;
- USART_InitStructure.USART_Parity = USART_Parity_No;
- USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
- USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
- USART_ClockInitStructure.USART_Clock = USART_Clock_Disable;
- USART_ClockInitStructure.USART_CPOL = USART_CPOL_Low;
- USART_ClockInitStructure.USART_CPHA = USART_CPHA_2Edge;
- USART_ClockInitStructure.USART_LastBit = USART_LastBit_Disable;
- USART_Init(USART2, &USART_InitStructure);
- USART_ClockInit(USART2, &USART_ClockInitStructure);
-
- /* register uart2 */
- rt_hw_serial_register(&uart2_device, "uart2",
- RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
- &uart2);
-
- /* Enable USART2 DMA Rx request */
- USART_ITConfig(USART2, USART_IT_RXNE, ENABLE);
-#endif
-
-#ifdef RT_USING_UART3
- USART_InitStructure.USART_BaudRate = 115200;
- USART_InitStructure.USART_WordLength = USART_WordLength_8b;
- USART_InitStructure.USART_StopBits = USART_StopBits_1;
- USART_InitStructure.USART_Parity = USART_Parity_No;
- USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
- USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
- USART_ClockInitStructure.USART_Clock = USART_Clock_Disable;
- USART_ClockInitStructure.USART_CPOL = USART_CPOL_Low;
- USART_ClockInitStructure.USART_CPHA = USART_CPHA_2Edge;
- USART_ClockInitStructure.USART_LastBit = USART_LastBit_Disable;
- USART_Init(USART3, &USART_InitStructure);
- USART_ClockInit(USART3, &USART_ClockInitStructure);
-
- uart3_dma_tx.dma_channel= UART3_TX_DMA;
-
- /* register uart3 */
- rt_hw_serial_register(&uart3_device, "uart3",
- RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_TX,
- &uart3);
-
- /* Enable USART3 DMA Tx request */
- USART_DMACmd(USART3, USART_DMAReq_Tx , ENABLE);
-
- /* enable interrupt */
- USART_ITConfig(USART3, USART_IT_RXNE, ENABLE);
-#endif
-}
diff --git a/bsp/stm3210/usart.c b/bsp/stm3210/usart.c
index dc4662d780..bc05e93c77 100644
--- a/bsp/stm3210/usart.c
+++ b/bsp/stm3210/usart.c
@@ -112,8 +112,18 @@ static void RCC_Configuration(void)
#endif
#ifdef RT_USING_UART2
- /* Enable GPIOD clocks */
- RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD, ENABLE);
+
+#if (defined(STM32F10X_LD) || defined(STM32F10X_MD) || defined(STM32F10X_CL))
+ /* Enable AFIO and GPIOD clock */
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO | RCC_APB2Periph_GPIOD, ENABLE);
+
+ /* Enable the USART2 Pins Software Remapping */
+ GPIO_PinRemapConfig(GPIO_Remap_USART2, ENABLE);
+#else
+ /* Enable AFIO and GPIOA clock */
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO | RCC_APB2Periph_GPIOA, ENABLE);
+#endif
+
/* Enable USART2 clock */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
#endif
@@ -122,9 +132,7 @@ static void RCC_Configuration(void)
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
/* Enable USART3 clock */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
-#endif
-#if defined (RT_USING_UART3)
/* DMA clock enable */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
#endif