[fix] fixup spaces and add in ci.

18 files changed, 3627 insertions, 10 deletions

diff --git a/.github/workflows/bsp_buildings.yml b/.github/workflows/bsp_buildings.yml
index 2fbfe94395..881f0df4ce 100644
--- a/.github/workflows/bsp_buildings.yml
+++ b/.github/workflows/bsp_buildings.yml
@@ -179,6 +179,7 @@ jobs:
                 - "stm32/stm32h750-artpi"
                 - "stm32/stm32h750-weact-ministm32h7xx"
                 - "stm32/stm32h750-fk750m1-vbt6"
+                - "stm32/stm32h7s7-st-disco"
                 - "stm32/stm32mp157a-st-discovery"
                 - "stm32/stm32mp157a-st-ev1"
                 - "stm32/stm32u575-st-nucleo"
diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_common.c b/bsp/stm32/libraries/HAL_Drivers/drv_common.c
index 7cf9d4cca5..62a1b35e07 100644
--- a/bsp/stm32/libraries/HAL_Drivers/drv_common.c
+++ b/bsp/stm32/libraries/HAL_Drivers/drv_common.c
@@ -23,8 +23,8 @@
 #endif /* RT_USING_SERIAL */
 #endif /* RT_USING_SERIAL_V2 */
 
-#define DBG_TAG    "drv_common"
-#define DBG_LVL    DBG_INFO
+#define DBG_TAG "drv_common"
+#define DBG_LVL DBG_INFO
 #include <rtdbg.h>
 
 #ifdef RT_USING_FINSH
@@ -42,7 +42,7 @@ static uint32_t _systick_ms = 1;
 /* SysTick configuration */
 void rt_hw_systick_init(void)
 {
-	// Updates the variable SystemCoreClock
+    // Updates the variable SystemCoreClock
     SystemCoreClockUpdate();
 
     HAL_SYSTICK_Config(SystemCoreClock / RT_TICK_PER_SECOND);
@@ -50,7 +50,7 @@ void rt_hw_systick_init(void)
     NVIC_SetPriority(SysTick_IRQn, 0xFF);
 
     _systick_ms = 1000u / RT_TICK_PER_SECOND;
-    if(_systick_ms == 0)
+    if (_systick_ms == 0)
         _systick_ms = 1;
 }
 
@@ -63,7 +63,7 @@ void SysTick_Handler(void)
     /* enter interrupt */
     rt_interrupt_enter();
 
-    if(SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk)
+    if (SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk)
         HAL_IncTick();
 
     rt_tick_increase();
@@ -74,7 +74,7 @@ void SysTick_Handler(void)
 
 uint32_t HAL_GetTick(void)
 {
-    if(SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk)
+    if (SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk)
         HAL_IncTick();
 
     return uwTick;
@@ -118,10 +118,10 @@ HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
 }
 
 /**
-  * @brief  This function is executed in case of error occurrence.
-  * @param  None
-  * @retval None
-  */
+ * @brief  This function is executed in case of error occurrence.
+ * @param  None
+ * @retval None
+ */
 void _Error_Handler(char *s, int num)
 {
     /* USER CODE BEGIN Error_Handler */
diff --git a/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/.mxproject b/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/.mxproject
new file mode 100644
index 0000000000..3a17e892d9
--- /dev/null
+++ b/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/.mxproject
@@ -0,0 +1,72 @@
+[Boot:PreviousLibFiles]
+LibFiles=Drivers\CMSIS\Device\ST\STM32H7RSxx\Include\stm32h7s7xx.h;Drivers\CMSIS\Device\ST\STM32H7RSxx\Include\stm32h7rsxx.h;Drivers\CMSIS\Device\ST\STM32H7RSxx\Include\system_stm32h7rsxx.h;Drivers\CMSIS\Device\ST\STM32H7RSxx\Source\Templates\system_stm32h7rsxx.c;Drivers\CMSIS\Include\cachel1_armv7.h;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_armclang_ltm.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv81mml.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm35p.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm55.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_cm85.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\core_starmc1.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\pac_armv81.h;Drivers\CMSIS\Include\pmu_armv8.h;Drivers\CMSIS\Include\tz_context.h;
+
+[Boot:PreviousUsedKeilFiles]
+SourceFiles=D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\CMSIS\Device\ST\STM32H7RSxx\Source\Templates\system_stm32h7rsxx.c;;;
+HeaderPath=D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\CMSIS\Device\ST\STM32H7RSxx\Include;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\CMSIS\Include;
+CDefines=USE_HAL_DRIVER;STM32H7S7xx;USE_HAL_DRIVER;USE_HAL_DRIVER;USE_HAL_DRIVER;
+
+[Appli:PreviousLibFiles]
+LibFiles=Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_uart.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_usart.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_lpuart.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_uart_ex.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_dma.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_dma_ex.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_rcc.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_rcc_ex.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_bus.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_rcc.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_crs.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_system.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_utils.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_flash.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_flash_ex.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_gpio.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_gpio_ex.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_gpio.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_dma.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_dma2d.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_pwr.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_pwr_ex.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_pwr.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_cortex.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_cortex.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_def.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_exti.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_exti.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_tim.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_tim_ex.h;Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_uart.c;Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_uart_ex.c;Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_dma.c;Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_dma_ex.c;Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_rcc.c;Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_rcc_ex.c;Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_flash.c;Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_flash_ex.c;Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_gpio.c;Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_pwr.c;Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_pwr_ex.c;Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_cortex.c;Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal.c;Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_exti.c;Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_tim.c;Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_tim_ex.c;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_uart.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_usart.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_lpuart.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_uart_ex.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_dma.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_dma_ex.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_rcc.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_rcc_ex.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_bus.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_rcc.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_crs.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_system.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_utils.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_flash.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_flash_ex.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_gpio.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_gpio_ex.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_gpio.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_dma.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_dma2d.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_pwr.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_pwr_ex.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_pwr.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_cortex.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_cortex.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_def.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_exti.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_exti.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_tim.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_tim_ex.h;Drivers\CMSIS\Device\ST\STM32H7RSxx\Include\stm32h7s7xx.h;Drivers\CMSIS\Device\ST\STM32H7RSxx\Include\stm32h7rsxx.h;Drivers\CMSIS\Device\ST\STM32H7RSxx\Include\system_stm32h7rsxx.h;Drivers\CMSIS\Device\ST\STM32H7RSxx\Source\Templates\system_stm32h7rsxx.c;Drivers\CMSIS\Include\cachel1_armv7.h;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_armclang_ltm.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv81mml.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm35p.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm55.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_cm85.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\core_starmc1.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\pac_armv81.h;Drivers\CMSIS\Include\pmu_armv8.h;Drivers\CMSIS\Include\tz_context.h;
+
+[Appli:PreviousUsedKeilFiles]
+SourceFiles=..\Appli\Core\Src\main.c;..\Appli\Core\Src\stm32h7rsxx_it.c;..\Appli\Core\Src\stm32h7rsxx_hal_msp.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_uart.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_uart_ex.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_dma.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_dma_ex.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_rcc.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_rcc_ex.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_flash.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_flash_ex.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_gpio.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_pwr.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_pwr_ex.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_cortex.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_exti.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_tim.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_tim_ex.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\CMSIS\Device\ST\STM32H7RSxx\Source\Templates\system_stm32h7rsxx.c;;;
+HeaderPath=D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Inc;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Inc\Legacy;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\CMSIS\Device\ST\STM32H7RSxx\Include;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\CMSIS\Include;..\Appli\Core\Inc;
+CDefines=USE_HAL_DRIVER;STM32H7S7xx;USE_HAL_DRIVER;USE_HAL_DRIVER;USE_HAL_DRIVER;
+
+[Eloader:PreviousLibFiles]
+LibFiles=Drivers\CMSIS\Device\ST\STM32H7RSxx\Include\stm32h7s7xx.h;Drivers\CMSIS\Device\ST\STM32H7RSxx\Include\stm32h7rsxx.h;Drivers\CMSIS\Device\ST\STM32H7RSxx\Include\system_stm32h7rsxx.h;Drivers\CMSIS\Device\ST\STM32H7RSxx\Source\Templates\system_stm32h7rsxx.c;Drivers\CMSIS\Include\cachel1_armv7.h;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_armclang_ltm.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv81mml.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm35p.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm55.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_cm85.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\core_starmc1.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\pac_armv81.h;Drivers\CMSIS\Include\pmu_armv8.h;Drivers\CMSIS\Include\tz_context.h;
+
+[Eloader:PreviousUsedKeilFiles]
+SourceFiles=D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\CMSIS\Device\ST\STM32H7RSxx\Source\Templates\system_stm32h7rsxx.c;;;
+HeaderPath=D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\CMSIS\Device\ST\STM32H7RSxx\Include;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\CMSIS\Include;
+CDefines=USE_HAL_DRIVER;STM32H7S7xx;USE_HAL_DRIVER;USE_HAL_DRIVER;USE_HAL_DRIVER;
+
+[PreviousLibFiles]
+LibFiles=Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_uart.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_usart.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_lpuart.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_uart_ex.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_dma.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_dma_ex.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_rcc.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_rcc_ex.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_bus.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_rcc.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_crs.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_system.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_utils.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_flash.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_flash_ex.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_gpio.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_gpio_ex.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_gpio.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_dma.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_dma2d.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_pwr.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_pwr_ex.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_pwr.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_cortex.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_cortex.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_def.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_exti.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_exti.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_tim.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_tim_ex.h;Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_uart.c;Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_uart_ex.c;Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_dma.c;Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_dma_ex.c;Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_rcc.c;Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_rcc_ex.c;Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_flash.c;Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_flash_ex.c;Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_gpio.c;Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_pwr.c;Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_pwr_ex.c;Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_cortex.c;Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal.c;Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_exti.c;Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_tim.c;Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_tim_ex.c;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_uart.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_usart.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_lpuart.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_uart_ex.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_dma.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_dma_ex.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_rcc.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_rcc_ex.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_bus.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_rcc.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_crs.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_system.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_utils.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_flash.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_flash_ex.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_gpio.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_gpio_ex.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_gpio.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_dma.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_dma2d.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_pwr.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_pwr_ex.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_pwr.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_cortex.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_cortex.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_def.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_exti.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_ll_exti.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_tim.h;Drivers\STM32H7RSxx_HAL_Driver\Inc\stm32h7rsxx_hal_tim_ex.h;Drivers\CMSIS\Device\ST\STM32H7RSxx\Include\stm32h7s7xx.h;Drivers\CMSIS\Device\ST\STM32H7RSxx\Include\stm32h7rsxx.h;Drivers\CMSIS\Device\ST\STM32H7RSxx\Include\system_stm32h7rsxx.h;Drivers\CMSIS\Device\ST\STM32H7RSxx\Source\Templates\system_stm32h7rsxx.c;Drivers\CMSIS\Include\cachel1_armv7.h;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_armclang_ltm.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv81mml.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm35p.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm55.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_cm85.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\core_starmc1.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\pac_armv81.h;Drivers\CMSIS\Include\pmu_armv8.h;Drivers\CMSIS\Include\tz_context.h;
+
+[PreviousUsedKeilFiles]
+SourceFiles=..\Appli\Core\Src\main.c;..\Appli\Core\Src\stm32h7rsxx_it.c;..\Appli\Core\Src\stm32h7rsxx_hal_msp.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_uart.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_uart_ex.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_dma.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_dma_ex.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_rcc.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_rcc_ex.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_flash.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_flash_ex.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_gpio.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_pwr.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_pwr_ex.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_cortex.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_exti.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_tim.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_tim_ex.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\CMSIS\Device\ST\STM32H7RSxx\Source\Templates\system_stm32h7rsxx.c;..\Src\system_stm32h7rsxx.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_uart.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_uart_ex.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_dma.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_dma_ex.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_rcc.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_rcc_ex.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_flash.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_flash_ex.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_gpio.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_pwr.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_pwr_ex.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_cortex.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_exti.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_tim.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_tim_ex.c;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\CMSIS\Device\ST\STM32H7RSxx\Source\Templates\system_stm32h7rsxx.c;..\Src\system_stm32h7rsxx.c;..\Boot\Core\Src\system_stm32h7rsxx.c;..\Appli\Core\Src\system_stm32h7rsxx.c;..\Eloader\Core\Src\system_stm32h7rsxx.c;;;
+HeaderPath=D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Inc;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\STM32H7RSxx_HAL_Driver\Inc\Legacy;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\CMSIS\Device\ST\STM32H7RSxx\Include;D:\Packages\STM32Cube\Repository\STM32Cube_FW_H7RS_V1.0.0RC1\Drivers\CMSIS\Include;..\Appli\Core\Inc;
+CDefines=USE_HAL_DRIVER;STM32H7S7xx;USE_HAL_DRIVER;USE_HAL_DRIVER;USE_HAL_DRIVER;USE_HAL_DRIVER;STM32H7S7xx;USE_HAL_DRIVER;USE_HAL_DRIVER;USE_HAL_DRIVER;USE_HAL_DRIVER;STM32H7S7xx;USE_HAL_DRIVER;USE_HAL_DRIVER;USE_HAL_DRIVER;USE_HAL_DRIVER;
+
+[Boot:PreviousGenFiles]
+SourceFiles=;
+
+[Appli:PreviousGenFiles]
+AdvancedFolderStructure=true
+HeaderFileListSize=3
+HeaderFiles#0=..\Appli\Core\Inc\stm32h7rsxx_it.h
+HeaderFiles#1=..\Appli\Core\Inc\stm32h7rsxx_hal_conf.h
+HeaderFiles#2=..\Appli\Core\Inc\main.h
+HeaderFolderListSize=1
+HeaderPath#0=..\Appli\Core\Inc
+HeaderFiles=;
+SourceFileListSize=3
+SourceFiles#0=..\Appli\Core\Src\stm32h7rsxx_it.c
+SourceFiles#1=..\Appli\Core\Src\stm32h7rsxx_hal_msp.c
+SourceFiles#2=..\Appli\Core\Src\main.c
+SourceFolderListSize=1
+SourcePath#0=..\Appli\Core\Src
+SourceFiles=;
+
+[Eloader:PreviousGenFiles]
+SourceFiles=;
+
+[PreviousGenFiles]
+AdvancedFolderStructure=true
+HeaderFileListSize=3
+HeaderFiles#0=..\Appli\Core\Inc\stm32h7rsxx_it.h
+HeaderFiles#1=..\Appli\Core\Inc\stm32h7rsxx_hal_conf.h
+HeaderFiles#2=..\Appli\Core\Inc\main.h
+HeaderFolderListSize=1
+HeaderPath#0=..\Appli\Core\Inc
+HeaderFiles=;
+SourceFileListSize=3
+SourceFiles#0=..\Appli\Core\Src\stm32h7rsxx_it.c
+SourceFiles#1=..\Appli\Core\Src\stm32h7rsxx_hal_msp.c
+SourceFiles#2=..\Appli\Core\Src\main.c
+SourceFolderListSize=1
+SourcePath#0=..\Appli\Core\Src
+SourceFiles=;
+
diff --git a/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Appli/Core/Inc/main.h b/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Appli/Core/Inc/main.h
new file mode 100644
index 0000000000..ec23c3a606
--- /dev/null
+++ b/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Appli/Core/Inc/main.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.h
+  * @brief          : Header for main.c file.
+  *                   This file contains the common defines of the application.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32h7rsxx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Appli/Core/Inc/stm32h7rsxx_hal_conf.h b/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Appli/Core/Inc/stm32h7rsxx_hal_conf.h
new file mode 100644
index 0000000000..3726989e15
--- /dev/null
+++ b/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Appli/Core/Inc/stm32h7rsxx_hal_conf.h
@@ -0,0 +1,501 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32h7rsxx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration template file.
+  *          This file should be copied to the application folder and renamed
+  *          to stm32h7rsxx_hal_conf.h.
+  *
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2022 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32H7RSxx_HAL_CONF_H
+#define STM32H7RSxx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+#define HAL_MODULE_ENABLED
+/* #define HAL_ADC_MODULE_ENABLED   */
+/* #define HAL_CEC_MODULE_ENABLED   */
+/* #define HAL_CORDIC_MODULE_ENABLED   */
+/* #define HAL_CRC_MODULE_ENABLED   */
+/* #define HAL_CRYP_MODULE_ENABLED   */
+/* #define HAL_DCMIPP_MODULE_ENABLED   */
+/* #define HAL_DMA2D_MODULE_ENABLED   */
+/* #define HAL_DTS_MODULE_ENABLED   */
+/* #define HAL_ETH_MODULE_ENABLED   */
+/* #define HAL_FDCAN_MODULE_ENABLED   */
+/* #define HAL_GFXMMU_MODULE_ENABLED   */
+/* #define HAL_GFXTIM_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+/* #define HAL_GPU2D_MODULE_ENABLED   */
+/* #define HAL_HASH_MODULE_ENABLED   */
+/* #define HAL_HCD_MODULE_ENABLED   */
+/* #define HAL_I2C_MODULE_ENABLED   */
+/* #define HAL_I2S_MODULE_ENABLED   */
+/* #define HAL_I3C_MODULE_ENABLED   */
+/* #define HAL_ICACHE_MODULE_ENABLED   */
+/* #define HAL_IRDA_MODULE_ENABLED   */
+/* #define HAL_IWDG_MODULE_ENABLED   */
+/* #define HAL_JPEG_MODULE_ENABLED   */
+/* #define HAL_LPTIM_MODULE_ENABLED   */
+/* #define HAL_LTDC_MODULE_ENABLED   */
+/* #define HAL_MCE_MODULE_ENABLED   */
+/* #define HAL_MDF_MODULE_ENABLED   */
+/* #define HAL_MMC_MODULE_ENABLED   */
+/* #define HAL_NAND_MODULE_ENABLED   */
+/* #define HAL_NOR_MODULE_ENABLED   */
+/* #define HAL_PCD_MODULE_ENABLED   */
+/* #define HAL_PKA_MODULE_ENABLED   */
+/* #define HAL_PSSI_MODULE_ENABLED   */
+/* #define HAL_RAMECC_MODULE_ENABLED   */
+/* #define HAL_RCC_MODULE_ENABLED   */
+/* #define HAL_RNG_MODULE_ENABLED   */
+/* #define HAL_RTC_MODULE_ENABLED   */
+/* #define HAL_SAI_MODULE_ENABLED   */
+/* #define HAL_SD_MODULE_ENABLED   */
+/* #define HAL_SDRAM_MODULE_ENABLED   */
+/* #define HAL_SMARTCARD_MODULE_ENABLED   */
+/* #define HAL_SMBUS_MODULE_ENABLED   */
+/* #define HAL_SPDIFRX_MODULE_ENABLED   */
+/* #define HAL_SPI_MODULE_ENABLED   */
+/* #define HAL_SRAM_MODULE_ENABLED   */
+/* #define HAL_TIM_MODULE_ENABLED   */
+#define HAL_UART_MODULE_ENABLED
+/* #define HAL_USART_MODULE_ENABLED   */
+/* #define HAL_WWDG_MODULE_ENABLED   */
+/* #define HAL_XSPI_MODULE_ENABLED   */
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+#define HSE_VALUE    25000000UL /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+#define HSE_STARTUP_TIMEOUT    100UL   /*!< Time out for HSE start up (in ms) */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+#define HSI_VALUE          64000000UL /*!< Value of the Internal oscillator in Hz */
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal Low-power oscillator (CSI) default value.
+  *        This value is the default CSI range value after Reset.
+  */
+#if !defined  (CSI_VALUE)
+#define CSI_VALUE          4000000UL  /*!< Value of the Internal oscillator in Hz */
+#endif /* CSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI48) value for USB OTG FS and RNG.
+ *        This internal oscillator is mainly dedicated to provide a high precision clock to
+ *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+ *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+ *        which is subject to manufacturing process variations.
+  */
+  #if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE        48000000UL /*!< Value of the Internal High Speed oscillator for USB OTG FS/RNG in Hz.
+                                            The real value my vary depending on manufacturing process variations. */
+  #endif /* HSI48_VALUE */
+
+/**
+* @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+#define LSI_VALUE  32000UL              /*!< LSI Typical Value in Hz.
+                                            Value of the Internal Low Speed oscillator in Hz.
+                                              The real value may vary depending on the variations
+                                              in voltage and temperature.*/
+#endif /* LSI_VALUE */
+
+/**
+* @brief External Low Speed oscillator (LSE) value.
+*/
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE    32768UL /*!< Value of the External oscillator in Hz*/
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    5000UL   /*!< Time out for LSE start up (in ms) */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for digital audio interfaces: SPI/I2S, SAI and ADF
+  *        This value is used by the RCC HAL module to provide the digital audio interfaces
+  *        frequency. This clock source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE      48000UL /*!< Value of the external clock source in Hz */
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+#define  VDD_VALUE                    3300UL /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY            (15UL)/*!< tick interrupt priority (lowest by default) */
+#define  USE_RTOS                     0U
+
+/* ########################## Assert Selection ############################## */
+/**
+* @brief Uncomment the line below to expanse the "assert_param" macro in the
+*        HAL drivers code
+*/
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## Register callback feature configuration ############### */
+/**
+* @brief Set below the peripheral configuration  to "1U" to add the support
+*        of HAL callback registration/unregistration feature for the HAL
+*        driver(s). This allows user application to provide specific callback
+*        functions thanks to HAL_PPP_RegisterCallback() rather than overwriting
+*        the default weak callback functions (see each stm32h7rsxx_hal_ppp.h file
+*        for possible callback identifiers defined in HAL_PPP_CallbackIDTypeDef
+*        for each PPP peripheral).
+*/
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_CEC_REGISTER_CALLBACKS        0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DCMIPP_REGISTER_CALLBACKS     0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_GFXMMU_REGISTER_CALLBACKS     0U
+#define USE_HAL_HASH_REGISTER_CALLBACKS       0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_JPEG_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_MDF_REGISTER_CALLBACKS        0U
+#define USE_HAL_MMC_REGISTER_CALLBACKS        0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_PKA_REGISTER_CALLBACKS        0U
+#define USE_HAL_PSSI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SD_REGISTER_CALLBACKS         0U
+#define USE_HAL_SDRAM_REGISTER_CALLBACKS      0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS    0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+#define USE_HAL_XSPI_REGISTER_CALLBACKS       0U
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+* Activated: CRC code is present inside driver
+* Deactivated: CRC code cleaned from driver
+*/
+
+#define USE_SPI_CRC                   1U
+
+/* ################## CRYP peripheral configuration ########################## */
+
+#define USE_HAL_CRYP_SUSPEND_RESUME   0U
+
+/* ################## HASH peripheral configuration ########################## */
+
+#define USE_HAL_HASH_SUSPEND_RESUME   0U
+
+/* ################## SDMMC peripheral configuration ######################### */
+
+#define USE_SD_TRANSCEIVER            0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_CEC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_cec.h"
+#endif /* HAL_CEC_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DCMIPP_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_dcmipp.h"
+#endif /* HAL_DCMIPP_MODULE_ENABLED */
+
+#ifdef HAL_DMA2D_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_dma2d.h"
+#endif /* HAL_DMA2D_MODULE_ENABLED */
+
+#ifdef HAL_DTS_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_dts.h"
+#endif /* HAL_DTS_MODULE_ENABLED */
+
+#ifdef HAL_ETH_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_eth.h"
+#endif /* HAL_ETH_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_GFXMMU_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_gfxmmu.h"
+#endif /* HAL_GFXMMU_MODULE_ENABLED */
+
+#ifdef HAL_GFXTIM_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_gfxtim.h"
+#endif /* HAL_GFXTIM_MODULE_ENABLED */
+
+#ifdef HAL_GPU2D_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_gpu2d.h"
+#endif /* HAL_GPU2D_MODULE_ENABLED */
+
+#ifdef HAL_HASH_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_hash.h"
+#endif /* HAL_HASH_MODULE_ENABLED */
+
+#ifdef HAL_HCD_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_hcd.h"
+#endif /* HAL_HCD_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+ #include "stm32h7rsxx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_I3C_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_i3c.h"
+#endif /* HAL_I3C_MODULE_ENABLED */
+
+#ifdef HAL_ICACHE_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_icache.h"
+#endif /* HAL_ICACHE_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_JPEG_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_jpeg.h"
+#endif /* HAL_JPEG_MODULE_ENABLED */
+
+#ifdef HAL_LTDC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_ltdc.h"
+#endif /* HAL_LTDC_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_MCE_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_mce.h"
+#endif /* HAL_MCE_MODULE_ENABLED */
+
+#ifdef HAL_MDF_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_mdf.h"
+#endif /* HAL_MDF_MODULE_ENABLED */
+
+#ifdef HAL_MMC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_mmc.h"
+#endif /* HAL_MMC_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PKA_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_pka.h"
+#endif /* HAL_PKA_MODULE_ENABLED */
+
+#ifdef HAL_PSSI_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_pssi.h"
+#endif /* HAL_PSSI_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_RAMECC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_ramecc.h"
+#endif /* HAL_RAMECC_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SD_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_sd.h"
+#endif /* HAL_SD_MODULE_ENABLED */
+
+#ifdef HAL_SDRAM_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_sdram.h"
+#endif /* HAL_SDRAM_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPDIFRX_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_spdifrx.h"
+#endif /* HAL_SPDIFRX_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+#ifdef HAL_XSPI_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_xspi.h"
+#endif /* HAL_XSPI_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+  void assert_failed(uint8_t *file, uint32_t line);
+#else
+  #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32H7RSxx_HAL_CONF_H */
+
diff --git a/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Appli/Core/Inc/stm32h7rsxx_it.h b/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Appli/Core/Inc/stm32h7rsxx_it.h
new file mode 100644
index 0000000000..9020c13896
--- /dev/null
+++ b/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Appli/Core/Inc/stm32h7rsxx_it.h
@@ -0,0 +1,66 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32h7rsxx_it.h
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+ ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32H7RSxx_IT_H
+#define __STM32H7RSxx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32H7RSxx_IT_H */
diff --git a/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Appli/Core/Src/main.c b/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Appli/Core/Src/main.c
new file mode 100644
index 0000000000..357c892a45
--- /dev/null
+++ b/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Appli/Core/Src/main.c
@@ -0,0 +1,165 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.c
+  * @brief          : Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2024 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+UART_HandleTypeDef huart4;
+
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+static void MX_GPIO_Init(void);
+static void MX_UART4_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+
+/**
+  * @brief UART4 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_UART4_Init(void)
+{
+
+  /* USER CODE BEGIN UART4_Init 0 */
+
+  /* USER CODE END UART4_Init 0 */
+
+  /* USER CODE BEGIN UART4_Init 1 */
+
+  /* USER CODE END UART4_Init 1 */
+  huart4.Instance = UART4;
+  huart4.Init.BaudRate = 115200;
+  huart4.Init.WordLength = UART_WORDLENGTH_8B;
+  huart4.Init.StopBits = UART_STOPBITS_1;
+  huart4.Init.Parity = UART_PARITY_NONE;
+  huart4.Init.Mode = UART_MODE_TX_RX;
+  huart4.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+  huart4.Init.OverSampling = UART_OVERSAMPLING_16;
+  huart4.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+  huart4.Init.ClockPrescaler = UART_PRESCALER_DIV1;
+  huart4.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+  if (HAL_UART_Init(&huart4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_SetTxFifoThreshold(&huart4, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_SetRxFifoThreshold(&huart4, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_DisableFifoMode(&huart4) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN UART4_Init 2 */
+
+  /* USER CODE END UART4_Init 2 */
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOD_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  __disable_irq();
+  while (1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Appli/Core/Src/stm32h7rsxx_hal_msp.c b/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Appli/Core/Src/stm32h7rsxx_hal_msp.c
new file mode 100644
index 0000000000..e8744c3c84
--- /dev/null
+++ b/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Appli/Core/Src/stm32h7rsxx_hal_msp.c
@@ -0,0 +1,144 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file         stm32h7rsxx_hal_msp.c
+  * @brief        This file provides code for the MSP Initialization
+  *               and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2024 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  /* System interrupt init*/
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief UART MSP Initialization
+* This function configures the hardware resources used in this example
+* @param huart: UART handle pointer
+* @retval None
+*/
+void HAL_UART_MspInit(UART_HandleTypeDef* huart)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(huart->Instance==UART4)
+  {
+  /* USER CODE BEGIN UART4_MspInit 0 */
+
+  /* USER CODE END UART4_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_UART4_CLK_ENABLE();
+
+    __HAL_RCC_GPIOD_CLK_ENABLE();
+    /**UART4 GPIO Configuration
+    PD1     ------> UART4_TX
+    PD0     ------> UART4_RX
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_0;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF8_UART4;
+    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN UART4_MspInit 1 */
+
+  /* USER CODE END UART4_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief UART MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param huart: UART handle pointer
+* @retval None
+*/
+void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
+{
+  if(huart->Instance==UART4)
+  {
+  /* USER CODE BEGIN UART4_MspDeInit 0 */
+
+  /* USER CODE END UART4_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_UART4_CLK_DISABLE();
+
+    /**UART4 GPIO Configuration
+    PD1     ------> UART4_TX
+    PD0     ------> UART4_RX
+    */
+    HAL_GPIO_DeInit(GPIOD, GPIO_PIN_1|GPIO_PIN_0);
+
+  /* USER CODE BEGIN UART4_MspDeInit 1 */
+
+  /* USER CODE END UART4_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Appli/Core/Src/stm32h7rsxx_it.c b/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Appli/Core/Src/stm32h7rsxx_it.c
new file mode 100644
index 0000000000..4c3a52adbc
--- /dev/null
+++ b/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Appli/Core/Src/stm32h7rsxx_it.c
@@ -0,0 +1,203 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32h7rsxx_it.c
+  * @brief   Interrupt Service Routines.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2024 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32h7rsxx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+  while (1)
+  {
+  }
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Pre-fetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32H7RSxx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32h7rsxx.s).                    */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Appli/Core/Src/system_stm32h7rsxx.c b/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Appli/Core/Src/system_stm32h7rsxx.c
new file mode 100644
index 0000000000..bd0ba8a5aa
--- /dev/null
+++ b/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Appli/Core/Src/system_stm32h7rsxx.c
@@ -0,0 +1,304 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32h7rsxx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M7 Device Peripheral Access Layer System Source File
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2022 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32h7rsxx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (sys_cpu_ck), it can
+  *                                  be used by the user application to setup the
+  *                                  SysTick timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (64 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32h7rsxx.s" file, to
+  *   optionally configure the system clock before to branch to main program.
+  *
+  *=============================================================================
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup STM32H7RSxx_System
+  * @{
+  */
+
+/** @addtogroup STM32H7RSxx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32h7rsxx.h"
+#include <math.h>
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32H7RSxx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32H7RSxx_System_Private_Defines
+  * @{
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    24000000UL /*!< Value of the High-Speed External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    64000000UL /*!< Value of the High-Speed Internal oscillator in Hz */
+#endif /* HSI_VALUE */
+
+#if !defined  (CSI_VALUE)
+  #define CSI_VALUE    4000000UL  /*!< Value of the Low-power Internal oscillator in Hz */
+#endif /* CSI_VALUE */
+
+/* Note: Following vector table addresses must be defined in line with linker
+         configuration. */
+/*!< Uncomment the following line or define USER_VECT_TAB_ADDRESS at compiler level if you need
+     to relocate the vector table anywhere in Flash or Sram, else the vector table is kept at
+	 the automatic remap of the selected boot address */
+/* #define USER_VECT_TAB_ADDRESS */
+
+#if defined(USER_VECT_TAB_ADDRESS)
+/*!< Uncomment the following line or define VECT_TAB_SRAM at compiler level if you need
+     to relocate your vector Table in Sram else user remap will be done in Flash. */
+/* #define VECT_TAB_SRAM */
+
+#if defined(VECT_TAB_SRAM)
+#if !defined(VECT_TAB_BASE_ADDRESS)
+#define VECT_TAB_BASE_ADDRESS   ITCM_BASE       /*!< Vector Table base address field.
+                                                     This value must be a multiple of 0x400. */
+#endif
+#if !defined(VECT_TAB_OFFSET)
+#define VECT_TAB_OFFSET         0x00000000U     /*!< Vector Table base offset field.
+                                                     This value must be a multiple of 0x400. */
+#endif
+#else
+#if !defined(VECT_TAB_BASE_ADDRESS)
+#define VECT_TAB_BASE_ADDRESS   FLASH_BASE      /*!< Vector Table base address field.
+                                                     This value must be a multiple of 0x400. */
+#endif
+#if !defined(VECT_TAB_OFFSET)
+#define VECT_TAB_OFFSET         0x00000000U     /*!< Vector Table base offset field.
+                                                     This value must be a multiple of 0x400. */
+#endif
+#endif /* VECT_TAB_SRAM */
+#endif /* USER_VECT_TAB_ADDRESS */
+
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32H7RSxx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32H7RSxx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in two ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the first function listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+uint32_t SystemCoreClock = HSI_VALUE;
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32H7RSxx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32H7RSxx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* Configure the Vector Table location -------------------------------------*/
+#if defined(USER_VECT_TAB_ADDRESS)
+  SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET;
+#endif
+
+  /* FPU settings ------------------------------------------------------------*/
+#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+  SCB->CPACR |= ((3UL << 20U)|(3UL << 22U));  /* set CP10 and CP11 Full Access */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to RCC registers values.
+  *         The SystemCoreClock variable contains the core clock (sys_cpu_ck), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
+  *
+  *           - If SYSCLK source is CSI, SystemCoreClock will contain the CSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSI_VALUE(*)
+  *             or CSI_VALUE(**) or HSE_VALUE(***) multiplied/divided by the PLL factors.
+  *
+  *         (*) HSI_VALUE is a constant defined in stm32h7rsxx_hal.h file (default value
+  *              64 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (**) CSI_VALUE is a constant defined in stm32h7rsxx_hal.h file (default value
+  *             4 MHz) but the real value may vary depending on the variations
+  *             in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32h7rsxx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t sysclk, hsivalue, pllsource, pllm, pllp, core_presc;
+  float_t pllfracn, pllvco;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+  case 0x00:  /* HSI used as system clock source (default after reset) */
+    sysclk = (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV) >> RCC_CR_HSIDIV_Pos));
+    break;
+
+  case 0x08:  /* CSI used as system clock source */
+    sysclk = CSI_VALUE;
+    break;
+
+  case 0x10:  /* HSE used as system clock source */
+    sysclk = HSE_VALUE;
+    break;
+
+  case 0x18:  /* PLL1 used as system clock  source */
+    /* PLL1_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLLM) * PLLN
+       SYSCLK = PLL1_VCO / PLL1R
+       */
+    pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
+    pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_DIVM1_Pos)  ;
+    if ((RCC->PLLCFGR & RCC_PLLCFGR_PLL1FRACEN) != 0U)
+    {
+      pllfracn = (float_t)(uint32_t)(((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN)>> RCC_PLL1FRACR_FRACN_Pos));
+    }
+    else
+    {
+      pllfracn = (float_t)0U;
+    }
+
+    if (pllm != 0U)
+    {
+      switch (pllsource)
+      {
+      case 0x02:  /* HSE used as PLL1 clock source */
+        pllvco = ((float_t)HSE_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR1 & RCC_PLL1DIVR1_DIVN) + (pllfracn/(float_t)0x2000) +(float_t)1 );
+        break;
+
+      case 0x01:  /* CSI used as PLL1 clock source */
+        pllvco = ((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR1 & RCC_PLL1DIVR1_DIVN) + (pllfracn/(float_t)0x2000) +(float_t)1 );
+        break;
+
+      case 0x00:  /* HSI used as PLL1 clock source */
+      default:
+        hsivalue = (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV) >> RCC_CR_HSIDIV_Pos));
+        pllvco = ( (float_t)hsivalue / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR1 & RCC_PLL1DIVR1_DIVN) + (pllfracn/(float_t)0x2000) +(float_t)1 );
+        break;
+      }
+      pllp = (((RCC->PLL1DIVR1 & RCC_PLL1DIVR1_DIVP) >> RCC_PLL1DIVR1_DIVP_Pos) + 1U ) ;
+      sysclk =  (uint32_t)(float_t)(pllvco/(float_t)pllp);
+    }
+    else
+    {
+      sysclk = 0U;
+    }
+    break;
+
+  default:  /* Unexpected, default to HSI used as system clock source (default after reset) */
+    sysclk = (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV) >> RCC_CR_HSIDIV_Pos));
+    break;
+  }
+
+  /* system clock frequency : CM7 CPU frequency  */
+  core_presc = (RCC->CDCFGR & RCC_CDCFGR_CPRE);
+  if (core_presc >= 8U)
+  {
+    SystemCoreClock = (sysclk >> (core_presc - RCC_CDCFGR_CPRE_3 + 1U));
+  }
+  else
+  {
+    SystemCoreClock = sysclk;
+  }
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
diff --git a/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Boot/Core/Inc/main.h b/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Boot/Core/Inc/main.h
new file mode 100644
index 0000000000..ec23c3a606
--- /dev/null
+++ b/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Boot/Core/Inc/main.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.h
+  * @brief          : Header for main.c file.
+  *                   This file contains the common defines of the application.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32h7rsxx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Boot/Core/Inc/stm32h7rsxx_hal_conf.h b/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Boot/Core/Inc/stm32h7rsxx_hal_conf.h
new file mode 100644
index 0000000000..4d408a92e3
--- /dev/null
+++ b/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Boot/Core/Inc/stm32h7rsxx_hal_conf.h
@@ -0,0 +1,501 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32h7rsxx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration template file.
+  *          This file should be copied to the application folder and renamed
+  *          to stm32h7rsxx_hal_conf.h.
+  *
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2022 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32H7RSxx_HAL_CONF_H
+#define STM32H7RSxx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+#define HAL_MODULE_ENABLED
+/* #define HAL_ADC_MODULE_ENABLED   */
+/* #define HAL_CEC_MODULE_ENABLED   */
+/* #define HAL_CORDIC_MODULE_ENABLED   */
+/* #define HAL_CRC_MODULE_ENABLED   */
+/* #define HAL_CRYP_MODULE_ENABLED   */
+/* #define HAL_DCMIPP_MODULE_ENABLED   */
+/* #define HAL_DMA2D_MODULE_ENABLED   */
+/* #define HAL_DTS_MODULE_ENABLED   */
+/* #define HAL_ETH_MODULE_ENABLED   */
+/* #define HAL_FDCAN_MODULE_ENABLED   */
+/* #define HAL_GFXMMU_MODULE_ENABLED   */
+/* #define HAL_GFXTIM_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+/* #define HAL_GPU2D_MODULE_ENABLED   */
+/* #define HAL_HASH_MODULE_ENABLED   */
+/* #define HAL_HCD_MODULE_ENABLED   */
+/* #define HAL_I2C_MODULE_ENABLED   */
+/* #define HAL_I2S_MODULE_ENABLED   */
+/* #define HAL_I3C_MODULE_ENABLED   */
+/* #define HAL_ICACHE_MODULE_ENABLED   */
+/* #define HAL_IRDA_MODULE_ENABLED   */
+/* #define HAL_IWDG_MODULE_ENABLED   */
+/* #define HAL_JPEG_MODULE_ENABLED   */
+/* #define HAL_LPTIM_MODULE_ENABLED   */
+/* #define HAL_LTDC_MODULE_ENABLED   */
+/* #define HAL_MCE_MODULE_ENABLED   */
+/* #define HAL_MDF_MODULE_ENABLED   */
+/* #define HAL_MMC_MODULE_ENABLED   */
+/* #define HAL_NAND_MODULE_ENABLED   */
+/* #define HAL_NOR_MODULE_ENABLED   */
+/* #define HAL_PCD_MODULE_ENABLED   */
+/* #define HAL_PKA_MODULE_ENABLED   */
+/* #define HAL_PSSI_MODULE_ENABLED   */
+/* #define HAL_RAMECC_MODULE_ENABLED   */
+/* #define HAL_RCC_MODULE_ENABLED   */
+/* #define HAL_RNG_MODULE_ENABLED   */
+/* #define HAL_RTC_MODULE_ENABLED   */
+/* #define HAL_SAI_MODULE_ENABLED   */
+/* #define HAL_SD_MODULE_ENABLED   */
+/* #define HAL_SDRAM_MODULE_ENABLED   */
+/* #define HAL_SMARTCARD_MODULE_ENABLED   */
+/* #define HAL_SMBUS_MODULE_ENABLED   */
+/* #define HAL_SPDIFRX_MODULE_ENABLED   */
+/* #define HAL_SPI_MODULE_ENABLED   */
+/* #define HAL_SRAM_MODULE_ENABLED   */
+/* #define HAL_TIM_MODULE_ENABLED   */
+/* #define HAL_UART_MODULE_ENABLED   */
+/* #define HAL_USART_MODULE_ENABLED   */
+/* #define HAL_WWDG_MODULE_ENABLED   */
+/* #define HAL_XSPI_MODULE_ENABLED   */
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+#define HSE_VALUE    25000000UL /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+#define HSE_STARTUP_TIMEOUT    100UL   /*!< Time out for HSE start up (in ms) */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+#define HSI_VALUE          64000000UL /*!< Value of the Internal oscillator in Hz */
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal Low-power oscillator (CSI) default value.
+  *        This value is the default CSI range value after Reset.
+  */
+#if !defined  (CSI_VALUE)
+#define CSI_VALUE          4000000UL  /*!< Value of the Internal oscillator in Hz */
+#endif /* CSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI48) value for USB OTG FS and RNG.
+ *        This internal oscillator is mainly dedicated to provide a high precision clock to
+ *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+ *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+ *        which is subject to manufacturing process variations.
+  */
+  #if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE        48000000UL /*!< Value of the Internal High Speed oscillator for USB OTG FS/RNG in Hz.
+                                            The real value my vary depending on manufacturing process variations. */
+  #endif /* HSI48_VALUE */
+
+/**
+* @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+#define LSI_VALUE  32000UL              /*!< LSI Typical Value in Hz.
+                                            Value of the Internal Low Speed oscillator in Hz.
+                                              The real value may vary depending on the variations
+                                              in voltage and temperature.*/
+#endif /* LSI_VALUE */
+
+/**
+* @brief External Low Speed oscillator (LSE) value.
+*/
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE    32768UL /*!< Value of the External oscillator in Hz*/
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    5000UL   /*!< Time out for LSE start up (in ms) */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for digital audio interfaces: SPI/I2S, SAI and ADF
+  *        This value is used by the RCC HAL module to provide the digital audio interfaces
+  *        frequency. This clock source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE      48000UL /*!< Value of the external clock source in Hz */
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+#define  VDD_VALUE                    3300UL /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY            (15UL)/*!< tick interrupt priority (lowest by default) */
+#define  USE_RTOS                     0U
+
+/* ########################## Assert Selection ############################## */
+/**
+* @brief Uncomment the line below to expanse the "assert_param" macro in the
+*        HAL drivers code
+*/
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## Register callback feature configuration ############### */
+/**
+* @brief Set below the peripheral configuration  to "1U" to add the support
+*        of HAL callback registration/unregistration feature for the HAL
+*        driver(s). This allows user application to provide specific callback
+*        functions thanks to HAL_PPP_RegisterCallback() rather than overwriting
+*        the default weak callback functions (see each stm32h7rsxx_hal_ppp.h file
+*        for possible callback identifiers defined in HAL_PPP_CallbackIDTypeDef
+*        for each PPP peripheral).
+*/
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_CEC_REGISTER_CALLBACKS        0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DCMIPP_REGISTER_CALLBACKS     0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_GFXMMU_REGISTER_CALLBACKS     0U
+#define USE_HAL_HASH_REGISTER_CALLBACKS       0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_JPEG_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_MDF_REGISTER_CALLBACKS        0U
+#define USE_HAL_MMC_REGISTER_CALLBACKS        0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_PKA_REGISTER_CALLBACKS        0U
+#define USE_HAL_PSSI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SD_REGISTER_CALLBACKS         0U
+#define USE_HAL_SDRAM_REGISTER_CALLBACKS      0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS    0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+#define USE_HAL_XSPI_REGISTER_CALLBACKS       0U
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+* Activated: CRC code is present inside driver
+* Deactivated: CRC code cleaned from driver
+*/
+
+#define USE_SPI_CRC                   1U
+
+/* ################## CRYP peripheral configuration ########################## */
+
+#define USE_HAL_CRYP_SUSPEND_RESUME   0U
+
+/* ################## HASH peripheral configuration ########################## */
+
+#define USE_HAL_HASH_SUSPEND_RESUME   0U
+
+/* ################## SDMMC peripheral configuration ######################### */
+
+#define USE_SD_TRANSCEIVER            0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_CEC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_cec.h"
+#endif /* HAL_CEC_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DCMIPP_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_dcmipp.h"
+#endif /* HAL_DCMIPP_MODULE_ENABLED */
+
+#ifdef HAL_DMA2D_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_dma2d.h"
+#endif /* HAL_DMA2D_MODULE_ENABLED */
+
+#ifdef HAL_DTS_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_dts.h"
+#endif /* HAL_DTS_MODULE_ENABLED */
+
+#ifdef HAL_ETH_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_eth.h"
+#endif /* HAL_ETH_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_GFXMMU_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_gfxmmu.h"
+#endif /* HAL_GFXMMU_MODULE_ENABLED */
+
+#ifdef HAL_GFXTIM_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_gfxtim.h"
+#endif /* HAL_GFXTIM_MODULE_ENABLED */
+
+#ifdef HAL_GPU2D_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_gpu2d.h"
+#endif /* HAL_GPU2D_MODULE_ENABLED */
+
+#ifdef HAL_HASH_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_hash.h"
+#endif /* HAL_HASH_MODULE_ENABLED */
+
+#ifdef HAL_HCD_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_hcd.h"
+#endif /* HAL_HCD_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+ #include "stm32h7rsxx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_I3C_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_i3c.h"
+#endif /* HAL_I3C_MODULE_ENABLED */
+
+#ifdef HAL_ICACHE_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_icache.h"
+#endif /* HAL_ICACHE_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_JPEG_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_jpeg.h"
+#endif /* HAL_JPEG_MODULE_ENABLED */
+
+#ifdef HAL_LTDC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_ltdc.h"
+#endif /* HAL_LTDC_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_MCE_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_mce.h"
+#endif /* HAL_MCE_MODULE_ENABLED */
+
+#ifdef HAL_MDF_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_mdf.h"
+#endif /* HAL_MDF_MODULE_ENABLED */
+
+#ifdef HAL_MMC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_mmc.h"
+#endif /* HAL_MMC_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PKA_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_pka.h"
+#endif /* HAL_PKA_MODULE_ENABLED */
+
+#ifdef HAL_PSSI_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_pssi.h"
+#endif /* HAL_PSSI_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_RAMECC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_ramecc.h"
+#endif /* HAL_RAMECC_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SD_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_sd.h"
+#endif /* HAL_SD_MODULE_ENABLED */
+
+#ifdef HAL_SDRAM_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_sdram.h"
+#endif /* HAL_SDRAM_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPDIFRX_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_spdifrx.h"
+#endif /* HAL_SPDIFRX_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+#ifdef HAL_XSPI_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_xspi.h"
+#endif /* HAL_XSPI_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+  void assert_failed(uint8_t *file, uint32_t line);
+#else
+  #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32H7RSxx_HAL_CONF_H */
+
diff --git a/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Boot/Core/Inc/stm32h7rsxx_it.h b/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Boot/Core/Inc/stm32h7rsxx_it.h
new file mode 100644
index 0000000000..9020c13896
--- /dev/null
+++ b/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Boot/Core/Inc/stm32h7rsxx_it.h
@@ -0,0 +1,66 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32h7rsxx_it.h
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+ ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32H7RSxx_IT_H
+#define __STM32H7RSxx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32H7RSxx_IT_H */
diff --git a/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Boot/Core/Src/main.c b/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Boot/Core/Src/main.c
new file mode 100644
index 0000000000..14f9b84f05
--- /dev/null
+++ b/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Boot/Core/Src/main.c
@@ -0,0 +1,229 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.c
+  * @brief          : Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_FLASH_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+  RCC_OscInitStruct.PLL1.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL1.PLLSource = RCC_PLLSOURCE_HSE;
+  RCC_OscInitStruct.PLL1.PLLM = 2;
+  RCC_OscInitStruct.PLL1.PLLN = 32;
+  RCC_OscInitStruct.PLL1.PLLP = 1;
+  RCC_OscInitStruct.PLL1.PLLQ = 2;
+  RCC_OscInitStruct.PLL1.PLLR = 2;
+  RCC_OscInitStruct.PLL1.PLLS = 2;
+  RCC_OscInitStruct.PLL1.PLLT = 2;
+  RCC_OscInitStruct.PLL1.PLLFractional = 0;
+  RCC_OscInitStruct.PLL2.PLLState = RCC_PLL_NONE;
+  RCC_OscInitStruct.PLL3.PLLState = RCC_PLL_NONE;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
+                              |RCC_CLOCKTYPE_PCLK4|RCC_CLOCKTYPE_PCLK5;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
+  RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
+  RCC_ClkInitStruct.APB5CLKDivider = RCC_APB5_DIV2;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief FLASH Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_FLASH_Init(void)
+{
+
+  /* USER CODE BEGIN FLASH_Init 0 */
+
+  /* USER CODE END FLASH_Init 0 */
+
+  FLASH_OBProgramInitTypeDef pOBInit = {0};
+
+  /* USER CODE BEGIN FLASH_Init 1 */
+
+  /* USER CODE END FLASH_Init 1 */
+  if (HAL_FLASH_Unlock() != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_FLASH_OB_Unlock() != HAL_OK)
+  {
+    Error_Handler();
+  }
+  pOBInit.OptionType = OPTIONBYTE_USER;
+  pOBInit.USERType = OB_USER_SRAM_ECC;
+  pOBInit.USERConfig2 = OB_AXISRAM_ECC_DISABLE;
+  if (HAL_FLASHEx_OBProgram(&pOBInit) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_FLASH_OB_Lock() != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_FLASH_Lock() != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN FLASH_Init 2 */
+
+  /* USER CODE END FLASH_Init 2 */
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOD_CLK_ENABLE();
+
+  /*Configure GPIO pins : PD1 PD0 */
+  GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_0;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  GPIO_InitStruct.Alternate = GPIO_AF8_UART4;
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  __disable_irq();
+  while (1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Boot/Core/Src/stm32h7rsxx_hal_msp.c b/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Boot/Core/Src/stm32h7rsxx_hal_msp.c
new file mode 100644
index 0000000000..f236a66cbb
--- /dev/null
+++ b/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Boot/Core/Src/stm32h7rsxx_hal_msp.c
@@ -0,0 +1,87 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file         stm32h7rsxx_hal_msp.c
+  * @brief        This file provides code for the MSP Initialization
+  *               and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+
+  /* Configure the system Power Supply */
+
+  if (HAL_PWREx_ConfigSupply(PWR_DIRECT_SMPS_SUPPLY) != HAL_OK)
+  {
+    /* Initialization error */
+    Error_Handler();
+  }
+
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  /* System interrupt init*/
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Boot/Core/Src/stm32h7rsxx_it.c b/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Boot/Core/Src/stm32h7rsxx_it.c
new file mode 100644
index 0000000000..b0b943f5ed
--- /dev/null
+++ b/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Boot/Core/Src/stm32h7rsxx_it.c
@@ -0,0 +1,203 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32h7rsxx_it.c
+  * @brief   Interrupt Service Routines.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32h7rsxx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+  while (1)
+  {
+  }
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Pre-fetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32H7RSxx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32h7rsxx.s).                    */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Boot/Core/Src/system_stm32h7rsxx.c b/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Boot/Core/Src/system_stm32h7rsxx.c
new file mode 100644
index 0000000000..33e4b7eeef
--- /dev/null
+++ b/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Boot/Core/Src/system_stm32h7rsxx.c
@@ -0,0 +1,304 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32h7rsxx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M7 Device Peripheral Access Layer System Source File
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2022 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32h7rsxx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (sys_cpu_ck), it can
+  *                                  be used by the user application to setup the
+  *                                  SysTick timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (64 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32h7rsxx.s" file, to
+  *   optionally configure the system clock before to branch to main program.
+  *
+  *=============================================================================
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup STM32H7RSxx_System
+  * @{
+  */
+
+/** @addtogroup STM32H7RSxx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32h7rsxx.h"
+#include <math.h>
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32H7RSxx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32H7RSxx_System_Private_Defines
+  * @{
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    25000000UL /*!< Value of the High-Speed External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    64000000UL /*!< Value of the High-Speed Internal oscillator in Hz */
+#endif /* HSI_VALUE */
+
+#if !defined  (CSI_VALUE)
+  #define CSI_VALUE    4000000UL  /*!< Value of the Low-power Internal oscillator in Hz */
+#endif /* CSI_VALUE */
+
+/* Note: Following vector table addresses must be defined in line with linker
+         configuration. */
+/*!< Uncomment the following line or define USER_VECT_TAB_ADDRESS at compiler level if you need
+     to relocate the vector table anywhere in Flash or Sram, else the vector table is kept at
+	 the automatic remap of the selected boot address */
+/* #define USER_VECT_TAB_ADDRESS */
+
+#if defined(USER_VECT_TAB_ADDRESS)
+/*!< Uncomment the following line or define VECT_TAB_SRAM at compiler level if you need 
+     to relocate your vector Table in Sram else user remap will be done in Flash. */
+/* #define VECT_TAB_SRAM */
+
+#if defined(VECT_TAB_SRAM)
+#if !defined(VECT_TAB_BASE_ADDRESS)
+#define VECT_TAB_BASE_ADDRESS   ITCM_BASE       /*!< Vector Table base address field.
+                                                     This value must be a multiple of 0x400. */
+#endif
+#if !defined(VECT_TAB_OFFSET)
+#define VECT_TAB_OFFSET         0x00000000U     /*!< Vector Table base offset field.
+                                                     This value must be a multiple of 0x400. */
+#endif
+#else
+#if !defined(VECT_TAB_BASE_ADDRESS)
+#define VECT_TAB_BASE_ADDRESS   FLASH_BASE      /*!< Vector Table base address field.
+                                                     This value must be a multiple of 0x400. */
+#endif
+#if !defined(VECT_TAB_OFFSET)
+#define VECT_TAB_OFFSET         0x00000000U     /*!< Vector Table base offset field.
+                                                     This value must be a multiple of 0x400. */
+#endif
+#endif /* VECT_TAB_SRAM */
+#endif /* USER_VECT_TAB_ADDRESS */
+
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32H7RSxx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32H7RSxx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in two ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the first function listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+uint32_t SystemCoreClock = HSI_VALUE;
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32H7RSxx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32H7RSxx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* Configure the Vector Table location -------------------------------------*/
+#if defined(USER_VECT_TAB_ADDRESS)
+  SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET;
+#endif
+
+  /* FPU settings ------------------------------------------------------------*/
+#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+  SCB->CPACR |= ((3UL << 20U)|(3UL << 22U));  /* set CP10 and CP11 Full Access */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to RCC registers values.
+  *         The SystemCoreClock variable contains the core clock (sys_cpu_ck), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
+  *
+  *           - If SYSCLK source is CSI, SystemCoreClock will contain the CSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSI_VALUE(*)
+  *             or CSI_VALUE(**) or HSE_VALUE(***) multiplied/divided by the PLL factors.
+  *
+  *         (*) HSI_VALUE is a constant defined in stm32h7rsxx_hal.h file (default value
+  *              64 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (**) CSI_VALUE is a constant defined in stm32h7rsxx_hal.h file (default value
+  *             4 MHz) but the real value may vary depending on the variations
+  *             in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32h7rsxx_hal.h file (default value
+  *              16 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t sysclk, hsivalue, pllsource, pllm, pllp, core_presc;
+  float_t pllfracn, pllvco;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+  case 0x00:  /* HSI used as system clock source (default after reset) */
+    sysclk = (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV) >> RCC_CR_HSIDIV_Pos));
+    break;
+
+  case 0x08:  /* CSI used as system clock source */
+    sysclk = CSI_VALUE;
+    break;
+
+  case 0x10:  /* HSE used as system clock source */
+    sysclk = HSE_VALUE;
+    break;
+
+  case 0x18:  /* PLL1 used as system clock  source */
+    /* PLL1_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLLM) * PLLN
+       SYSCLK = PLL1_VCO / PLL1R
+       */
+    pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
+    pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_DIVM1_Pos)  ;
+    if ((RCC->PLLCFGR & RCC_PLLCFGR_PLL1FRACEN) != 0U)
+    {
+      pllfracn = (float_t)(uint32_t)(((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN)>> RCC_PLL1FRACR_FRACN_Pos));
+    }
+    else
+    {
+      pllfracn = (float_t)0U;
+    }
+
+    if (pllm != 0U)
+    {
+      switch (pllsource)
+      {
+      case 0x02:  /* HSE used as PLL1 clock source */
+        pllvco = ((float_t)HSE_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR1 & RCC_PLL1DIVR1_DIVN) + (pllfracn/(float_t)0x2000) +(float_t)1 );
+        break;
+
+      case 0x01:  /* CSI used as PLL1 clock source */
+        pllvco = ((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR1 & RCC_PLL1DIVR1_DIVN) + (pllfracn/(float_t)0x2000) +(float_t)1 );
+        break;
+
+      case 0x00:  /* HSI used as PLL1 clock source */
+      default:
+        hsivalue = (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV) >> RCC_CR_HSIDIV_Pos));
+        pllvco = ( (float_t)hsivalue / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR1 & RCC_PLL1DIVR1_DIVN) + (pllfracn/(float_t)0x2000) +(float_t)1 );
+        break;
+      }
+      pllp = (((RCC->PLL1DIVR1 & RCC_PLL1DIVR1_DIVP) >> RCC_PLL1DIVR1_DIVP_Pos) + 1U ) ;
+      sysclk =  (uint32_t)(float_t)(pllvco/(float_t)pllp);
+    }
+    else
+    {
+      sysclk = 0U;
+    }
+    break;
+
+  default:  /* Unexpected, default to HSI used as system clock source (default after reset) */
+    sysclk = (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV) >> RCC_CR_HSIDIV_Pos));
+    break;
+  }
+
+  /* system clock frequency : CM7 CPU frequency  */
+  core_presc = (RCC->CDCFGR & RCC_CDCFGR_CPRE);
+  if (core_presc >= 8U)
+  {
+    SystemCoreClock = (sysclk >> (core_presc - RCC_CDCFGR_CPRE_3 + 1U));
+  }
+  else
+  {
+    SystemCoreClock = sysclk;
+  }
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
diff --git a/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/MDK-ARM/startup_stm32h7s7xx.s b/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/MDK-ARM/startup_stm32h7s7xx.s
new file mode 100644
index 0000000000..212028b246
--- /dev/null
+++ b/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/MDK-ARM/startup_stm32h7s7xx.s
@@ -0,0 +1,633 @@
+;*******************************************************************************
+;* File Name          : startup_stm32h7s7xx.s
+;* Author             : MCD Application Team
+;* Description        : STM32H7S7xx Crypto devices vector table for MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M7 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;*******************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2023 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;*
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp                     ; Top of Stack
+                DCD     Reset_Handler                    ; Reset Handler
+                DCD     NMI_Handler                      ; NMI Handler
+                DCD     HardFault_Handler                ; Hard Fault Handler
+                DCD     MemManage_Handler                ; MPU Fault Handler
+                DCD     BusFault_Handler                 ; Bus Fault Handler
+                DCD     UsageFault_Handler               ; Usage Fault Handler
+                DCD     0                                ; Reserved
+                DCD     0                                ; Reserved
+                DCD     0                                ; Reserved
+                DCD     0                                ; Reserved
+                DCD     SVC_Handler                      ; SVCall Handler
+                DCD     DebugMon_Handler                 ; Debug Monitor Handler
+                DCD     0                                ; Reserved
+                DCD     PendSV_Handler                   ; PendSV Handler
+                DCD     SysTick_Handler                  ; SysTick Handler
+                ; External Interrupts
+                DCD     PVD_PVM_IRQHandler               ; PVD/PVM through EXTI Line detection
+                DCD     0                                ; Reserved
+                DCD     DTS_IRQHandler                   ; Digital Temperature Sensor
+                DCD     IWDG_IRQHandler                  ; Internal Watchdog
+                DCD     WWDG_IRQHandler                  ; Window Watchdog
+                DCD     RCC_IRQHandler                   ; RCC global interrupts through EXTI Line detection
+                DCD     0                                ; Reserved
+                DCD     0                                ; Reserved
+                DCD     FLASH_IRQHandler                 ; FLASH interrupts
+                DCD     RAMECC_IRQHandler                ; RAMECC interrupts
+                DCD     FPU_IRQHandler                   ; FPU
+                DCD     0                                ; Reserved
+                DCD     0                                ; Reserved
+                DCD     TAMP_IRQHandler                  ; Tamper and TimeStamp interrupts through EXTI Line detection
+                DCD     0                                ; Reserved
+                DCD     0                                ; Reserved
+                DCD     EXTI0_IRQHandler                 ; EXTI Line0
+                DCD     EXTI1_IRQHandler                 ; EXTI Line1
+                DCD     EXTI2_IRQHandler                 ; EXTI Line2
+                DCD     EXTI3_IRQHandler                 ; EXTI Line3
+                DCD     EXTI4_IRQHandler                 ; EXTI Line4
+                DCD     EXTI5_IRQHandler                 ; EXTI Line5
+                DCD     EXTI6_IRQHandler                 ; EXTI Line6
+                DCD     EXTI7_IRQHandler                 ; EXTI Line7
+                DCD     EXTI8_IRQHandler                 ; EXTI Line8
+                DCD     EXTI9_IRQHandler                 ; EXTI Line9
+                DCD     EXTI10_IRQHandler                ; EXTI Line10
+                DCD     EXTI11_IRQHandler                ; EXTI Line11
+                DCD     EXTI12_IRQHandler                ; EXTI Line12
+                DCD     EXTI13_IRQHandler                ; EXTI Line13
+                DCD     EXTI14_IRQHandler                ; EXTI Line14
+                DCD     EXTI15_IRQHandler                ; EXTI Line15
+                DCD     RTC_IRQHandler                   ; RTC wakeup and alarm interrupts through EXTI Line detection
+                DCD     SAES_IRQHandler                  ; SAES
+                DCD     CRYP_IRQHandler                  ; CRYP
+                DCD     PKA_IRQHandler                   ; PKA
+                DCD     HASH_IRQHandler                  ; HASH
+                DCD     RNG_IRQHandler                   ; RNG
+                DCD     ADC1_2_IRQHandler                ; ADC1 & ADC2
+                DCD     GPDMA1_Channel0_IRQHandler       ; GPDMA1 Channel 0
+                DCD     GPDMA1_Channel1_IRQHandler       ; GPDMA1 Channel 1
+                DCD     GPDMA1_Channel2_IRQHandler       ; GPDMA1 Channel 2
+                DCD     GPDMA1_Channel3_IRQHandler       ; GPDMA1 Channel 3
+                DCD     GPDMA1_Channel4_IRQHandler       ; GPDMA1 Channel 4
+                DCD     GPDMA1_Channel5_IRQHandler       ; GPDMA1 Channel 5
+                DCD     GPDMA1_Channel6_IRQHandler       ; GPDMA1 Channel 6
+                DCD     GPDMA1_Channel7_IRQHandler       ; GPDMA1 Channel 7
+                DCD     TIM1_BRK_IRQHandler              ; TIM1 Break
+                DCD     TIM1_UP_IRQHandler               ; TIM1 Update
+                DCD     TIM1_TRG_COM_IRQHandler          ; TIM1 Trigger and Commutation
+                DCD     TIM1_CC_IRQHandler               ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                  ; TIM2
+                DCD     TIM3_IRQHandler                  ; TIM3
+                DCD     TIM4_IRQHandler                  ; TIM4
+                DCD     TIM5_IRQHandler                  ; TIM5
+                DCD     TIM6_IRQHandler                  ; TIM6
+                DCD     TIM7_IRQHandler                  ; TIM7
+                DCD     TIM9_IRQHandler                  ; TIM9
+                DCD     SPI1_IRQHandler                  ; SPI1
+                DCD     SPI2_IRQHandler                  ; SPI2
+                DCD     SPI3_IRQHandler                  ; SPI3
+                DCD     SPI4_IRQHandler                  ; SPI4
+                DCD     SPI5_IRQHandler                  ; SPI5
+                DCD     SPI6_IRQHandler                  ; SPI6
+                DCD     HPDMA1_Channel0_IRQHandler       ; HPDMA1 Channel 0
+                DCD     HPDMA1_Channel1_IRQHandler       ; HPDMA1 Channel 1
+                DCD     HPDMA1_Channel2_IRQHandler       ; HPDMA1 Channel 2
+                DCD     HPDMA1_Channel3_IRQHandler       ; HPDMA1 Channel 3
+                DCD     HPDMA1_Channel4_IRQHandler       ; HPDMA1 Channel 4
+                DCD     HPDMA1_Channel5_IRQHandler       ; HPDMA1 Channel 5
+                DCD     HPDMA1_Channel6_IRQHandler       ; HPDMA1 Channel 6
+                DCD     HPDMA1_Channel7_IRQHandler       ; HPDMA1 Channel 7
+                DCD     SAI1_A_IRQHandler                ; Serial Audio Interface 1 block A
+                DCD     SAI1_B_IRQHandler                ; Serial Audio Interface 1 block B
+                DCD     SAI2_A_IRQHandler                ; Serial Audio Interface 2 block A
+                DCD     SAI2_B_IRQHandler                ; Serial Audio Interface 2 block B
+                DCD     I2C1_EV_IRQHandler               ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler               ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler               ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler               ; I2C2 Error
+                DCD     I2C3_EV_IRQHandler               ; I2C3 Event
+                DCD     I2C3_ER_IRQHandler               ; I2C3 Error
+                DCD     USART1_IRQHandler                ; USART1
+                DCD     USART2_IRQHandler                ; USART2
+                DCD     USART3_IRQHandler                ; USART3
+                DCD     UART4_IRQHandler                 ; UART4
+                DCD     UART5_IRQHandler                 ; UART5
+                DCD     UART7_IRQHandler                 ; UART7
+                DCD     UART8_IRQHandler                 ; UART8
+                DCD     I3C1_EV_IRQHandler               ; I3C1 Event
+                DCD     I3C1_ER_IRQHandler               ; I3C1 Error
+                DCD     OTG_HS_IRQHandler                ; USB OTG HS
+                DCD     ETH_IRQHandler                   ; Ethernet
+                DCD     CORDIC_IRQHandler                ; CORDIC
+                DCD     GFXTIM_IRQHandler                ; GFXTIM
+                DCD     DCMIPP_IRQHandler                ; DCMIPP
+                DCD     LTDC_IRQHandler                  ; LTDC
+                DCD     LTDC_ER_IRQHandler               ; LTDC error
+                DCD     DMA2D_IRQHandler                 ; DMA2D
+                DCD     JPEG_IRQHandler                  ; JPEG
+                DCD     GFXMMU_IRQHandler                ; GFXMMU
+                DCD     I3C1_WKUP_IRQHandler             ; I3C1 wakeup
+                DCD     MCE1_IRQHandler                  ; MCE1
+                DCD     MCE2_IRQHandler                  ; MCE2
+                DCD     MCE3_IRQHandler                  ; MCE3
+                DCD     XSPI1_IRQHandler                 ; XSPI1
+                DCD     XSPI2_IRQHandler                 ; XSPI2
+                DCD     FMC_IRQHandler                   ; FMC
+                DCD     SDMMC1_IRQHandler                ; SDMMC1
+                DCD     SDMMC2_IRQHandler                ; SDMMC2
+                DCD     0                                ; Reserved
+                DCD     0                                ; Reserved
+                DCD     OTG_FS_IRQHandler                ; USB OTG FS
+                DCD     TIM12_IRQHandler                 ; TIM12
+                DCD     TIM13_IRQHandler                 ; TIM13
+                DCD     TIM14_IRQHandler                 ; TIM14
+                DCD     TIM15_IRQHandler                 ; TIM15
+                DCD     TIM16_IRQHandler                 ; TIM16
+                DCD     TIM17_IRQHandler                 ; TIM17
+                DCD     LPTIM1_IRQHandler                ; LP TIM1
+                DCD     LPTIM2_IRQHandler                ; LP TIM2
+                DCD     LPTIM3_IRQHandler                ; LP TIM3
+                DCD     LPTIM4_IRQHandler                ; LP TIM4
+                DCD     LPTIM5_IRQHandler                ; LP TIM5
+                DCD     SPDIF_RX_IRQHandler              ; SPDIF_RX
+                DCD     MDIOS_IRQHandler                 ; MDIOS
+                DCD     ADF1_FLT0_IRQHandler             ; ADF1 Filter 0
+                DCD     CRS_IRQHandler                   ; CRS
+                DCD     UCPD1_IRQHandler                 ; UCPD1
+                DCD     CEC_IRQHandler                   ; HDMI_CEC
+                DCD     PSSI_IRQHandler                  ; PSSI
+                DCD     LPUART1_IRQHandler               ; LP UART1
+                DCD     WAKEUP_PIN_IRQHandler            ; Wake-up pins interrupt
+                DCD     GPDMA1_Channel8_IRQHandler       ; GPDMA1 Channel 8
+                DCD     GPDMA1_Channel9_IRQHandler       ; GPDMA1 Channel 9
+                DCD     GPDMA1_Channel10_IRQHandler      ; GPDMA1 Channel 10
+                DCD     GPDMA1_Channel11_IRQHandler      ; GPDMA1 Channel 11
+                DCD     GPDMA1_Channel12_IRQHandler      ; GPDMA1 Channel 12
+                DCD     GPDMA1_Channel13_IRQHandler      ; GPDMA1 Channel 13
+                DCD     GPDMA1_Channel14_IRQHandler      ; GPDMA1 Channel 14
+                DCD     GPDMA1_Channel15_IRQHandler      ; GPDMA1 Channel 15
+                DCD     HPDMA1_Channel8_IRQHandler       ; HPDMA1 Channel 8
+                DCD     HPDMA1_Channel9_IRQHandler       ; HPDMA1 Channel 9
+                DCD     HPDMA1_Channel10_IRQHandler      ; HPDMA1 Channel 10
+                DCD     HPDMA1_Channel11_IRQHandler      ; HPDMA1 Channel 11
+                DCD     HPDMA1_Channel12_IRQHandler      ; HPDMA1 Channel 12
+                DCD     HPDMA1_Channel13_IRQHandler      ; HPDMA1 Channel 13
+                DCD     HPDMA1_Channel14_IRQHandler      ; HPDMA1 Channel 14
+                DCD     HPDMA1_Channel15_IRQHandler      ; HPDMA1 Channel 15
+                DCD     GPU2D_IRQHandler                 ; GPU2D
+                DCD     GPU2D_ER_IRQHandler              ; GPU2D error
+                DCD     ICACHE_IRQHandler                ; ICACHE
+                DCD     FDCAN1_IT0_IRQHandler            ; FDCAN1 Interrupt 0
+                DCD     FDCAN1_IT1_IRQHandler            ; FDCAN1 Interrupt 1
+                DCD     FDCAN2_IT0_IRQHandler            ; FDCAN2 Interrupt 0
+                DCD     FDCAN2_IT1_IRQHandler            ; FDCAN2 Interrupt 1
+
+
+__Vectors_End
+
+__Vectors_Size  EQU    __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT  Reset_Handler             [WEAK]
+                IMPORT  SystemInit
+                IMPORT  __main
+                LDR     R0, =SystemInit
+                BLX     R0
+                LDR     R0, =__main
+                BX      R0
+                ENDP
+
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler\
+                PROC
+                EXPORT  NMI_Handler               [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler         [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler         [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler          [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler        [WEAK]
+                B       .
+                ENDP
+SVC_Handler\
+                PROC
+                EXPORT  SVC_Handler               [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler          [WEAK]
+                B       .
+                ENDP
+PendSV_Handler\
+                PROC
+                EXPORT  PendSV_Handler            [WEAK]
+                B       .
+                ENDP
+SysTick_Handler\
+                PROC
+                EXPORT  SysTick_Handler           [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+                EXPORT  PVD_PVM_IRQHandler               [WEAK]
+                EXPORT  DTS_IRQHandler                   [WEAK]
+                EXPORT  IWDG_IRQHandler                  [WEAK]
+                EXPORT  WWDG_IRQHandler                  [WEAK]
+                EXPORT  RCC_IRQHandler                   [WEAK]
+                EXPORT  FLASH_IRQHandler                 [WEAK]
+                EXPORT  RAMECC_IRQHandler                [WEAK]
+                EXPORT  FPU_IRQHandler                   [WEAK]
+                EXPORT  TAMP_IRQHandler                  [WEAK]
+                EXPORT  EXTI0_IRQHandler                 [WEAK]
+                EXPORT  EXTI1_IRQHandler                 [WEAK]
+                EXPORT  EXTI2_IRQHandler                 [WEAK]
+                EXPORT  EXTI3_IRQHandler                 [WEAK]
+                EXPORT  EXTI4_IRQHandler                 [WEAK]
+                EXPORT  EXTI5_IRQHandler                 [WEAK]
+                EXPORT  EXTI6_IRQHandler                 [WEAK]
+                EXPORT  EXTI7_IRQHandler                 [WEAK]
+                EXPORT  EXTI8_IRQHandler                 [WEAK]
+                EXPORT  EXTI9_IRQHandler                 [WEAK]
+                EXPORT  EXTI10_IRQHandler                [WEAK]
+                EXPORT  EXTI11_IRQHandler                [WEAK]
+                EXPORT  EXTI12_IRQHandler                [WEAK]
+                EXPORT  EXTI13_IRQHandler                [WEAK]
+                EXPORT  EXTI14_IRQHandler                [WEAK]
+                EXPORT  EXTI15_IRQHandler                [WEAK]
+                EXPORT  RTC_IRQHandler                   [WEAK]
+                EXPORT  SAES_IRQHandler                  [WEAK]
+                EXPORT  CRYP_IRQHandler                  [WEAK]
+                EXPORT  PKA_IRQHandler                   [WEAK]
+                EXPORT  HASH_IRQHandler                  [WEAK]
+                EXPORT  RNG_IRQHandler                   [WEAK]
+                EXPORT  ADC1_2_IRQHandler                [WEAK]
+                EXPORT  GPDMA1_Channel0_IRQHandler       [WEAK]
+                EXPORT  GPDMA1_Channel1_IRQHandler       [WEAK]
+                EXPORT  GPDMA1_Channel2_IRQHandler       [WEAK]
+                EXPORT  GPDMA1_Channel3_IRQHandler       [WEAK]
+                EXPORT  GPDMA1_Channel4_IRQHandler       [WEAK]
+                EXPORT  GPDMA1_Channel5_IRQHandler       [WEAK]
+                EXPORT  GPDMA1_Channel6_IRQHandler       [WEAK]
+                EXPORT  GPDMA1_Channel7_IRQHandler       [WEAK]
+                EXPORT  TIM1_BRK_IRQHandler              [WEAK]
+                EXPORT  TIM1_UP_IRQHandler               [WEAK]
+                EXPORT  TIM1_TRG_COM_IRQHandler          [WEAK]
+                EXPORT  TIM1_CC_IRQHandler               [WEAK]
+                EXPORT  TIM2_IRQHandler                  [WEAK]
+                EXPORT  TIM3_IRQHandler                  [WEAK]
+                EXPORT  TIM4_IRQHandler                  [WEAK]
+                EXPORT  TIM5_IRQHandler                  [WEAK]
+                EXPORT  TIM6_IRQHandler                  [WEAK]
+                EXPORT  TIM7_IRQHandler                  [WEAK]
+                EXPORT  TIM9_IRQHandler                  [WEAK]
+                EXPORT  SPI1_IRQHandler                  [WEAK]
+                EXPORT  SPI2_IRQHandler                  [WEAK]
+                EXPORT  SPI3_IRQHandler                  [WEAK]
+                EXPORT  SPI4_IRQHandler                  [WEAK]
+                EXPORT  SPI5_IRQHandler                  [WEAK]
+                EXPORT  SPI6_IRQHandler                  [WEAK]
+                EXPORT  HPDMA1_Channel0_IRQHandler       [WEAK]
+                EXPORT  HPDMA1_Channel1_IRQHandler       [WEAK]
+                EXPORT  HPDMA1_Channel2_IRQHandler       [WEAK]
+                EXPORT  HPDMA1_Channel3_IRQHandler       [WEAK]
+                EXPORT  HPDMA1_Channel4_IRQHandler       [WEAK]
+                EXPORT  HPDMA1_Channel5_IRQHandler       [WEAK]
+                EXPORT  HPDMA1_Channel6_IRQHandler       [WEAK]
+                EXPORT  HPDMA1_Channel7_IRQHandler       [WEAK]
+                EXPORT  SAI1_A_IRQHandler                [WEAK]
+                EXPORT  SAI1_B_IRQHandler                [WEAK]
+                EXPORT  SAI2_A_IRQHandler                [WEAK]
+                EXPORT  SAI2_B_IRQHandler                [WEAK]
+                EXPORT  I2C1_EV_IRQHandler               [WEAK]
+                EXPORT  I2C1_ER_IRQHandler               [WEAK]
+                EXPORT  I2C2_EV_IRQHandler               [WEAK]
+                EXPORT  I2C2_ER_IRQHandler               [WEAK]
+                EXPORT  I2C3_EV_IRQHandler               [WEAK]
+                EXPORT  I2C3_ER_IRQHandler               [WEAK]
+                EXPORT  USART1_IRQHandler                [WEAK]
+                EXPORT  USART2_IRQHandler                [WEAK]
+                EXPORT  USART3_IRQHandler                [WEAK]
+                EXPORT  UART4_IRQHandler                 [WEAK]
+                EXPORT  UART5_IRQHandler                 [WEAK]
+                EXPORT  UART7_IRQHandler                 [WEAK]
+                EXPORT  UART8_IRQHandler                 [WEAK]
+                EXPORT  I3C1_EV_IRQHandler               [WEAK]
+                EXPORT  I3C1_ER_IRQHandler               [WEAK]
+                EXPORT  OTG_HS_IRQHandler                [WEAK]
+                EXPORT  ETH_IRQHandler                   [WEAK]
+                EXPORT  CORDIC_IRQHandler                [WEAK]
+                EXPORT  GFXTIM_IRQHandler                [WEAK]
+                EXPORT  DCMIPP_IRQHandler                [WEAK]
+                EXPORT  LTDC_IRQHandler                  [WEAK]
+                EXPORT  LTDC_ER_IRQHandler               [WEAK]
+                EXPORT  DMA2D_IRQHandler                 [WEAK]
+                EXPORT  JPEG_IRQHandler                  [WEAK]
+                EXPORT  GFXMMU_IRQHandler                [WEAK]
+                EXPORT  I3C1_WKUP_IRQHandler             [WEAK]
+                EXPORT  MCE1_IRQHandler                  [WEAK]
+                EXPORT  MCE2_IRQHandler                  [WEAK]
+                EXPORT  MCE3_IRQHandler                  [WEAK]
+                EXPORT  XSPI1_IRQHandler                 [WEAK]
+                EXPORT  XSPI2_IRQHandler                 [WEAK]
+                EXPORT  FMC_IRQHandler                   [WEAK]
+                EXPORT  SDMMC1_IRQHandler                [WEAK]
+                EXPORT  SDMMC2_IRQHandler                [WEAK]
+                EXPORT  OTG_FS_IRQHandler                [WEAK]
+                EXPORT  TIM12_IRQHandler                 [WEAK]
+                EXPORT  TIM13_IRQHandler                 [WEAK]
+                EXPORT  TIM14_IRQHandler                 [WEAK]
+                EXPORT  TIM15_IRQHandler                 [WEAK]
+                EXPORT  TIM16_IRQHandler                 [WEAK]
+                EXPORT  TIM17_IRQHandler                 [WEAK]
+                EXPORT  LPTIM1_IRQHandler                [WEAK]
+                EXPORT  LPTIM2_IRQHandler                [WEAK]
+                EXPORT  LPTIM3_IRQHandler                [WEAK]
+                EXPORT  LPTIM4_IRQHandler                [WEAK]
+                EXPORT  LPTIM5_IRQHandler                [WEAK]
+                EXPORT  SPDIF_RX_IRQHandler              [WEAK]
+                EXPORT  MDIOS_IRQHandler                 [WEAK]
+                EXPORT  ADF1_FLT0_IRQHandler             [WEAK]
+                EXPORT  CRS_IRQHandler                   [WEAK]
+                EXPORT  UCPD1_IRQHandler                 [WEAK]
+                EXPORT  CEC_IRQHandler                   [WEAK]
+                EXPORT  PSSI_IRQHandler                  [WEAK]
+                EXPORT  LPUART1_IRQHandler               [WEAK]
+                EXPORT  WAKEUP_PIN_IRQHandler            [WEAK]
+                EXPORT  GPDMA1_Channel8_IRQHandler       [WEAK]
+                EXPORT  GPDMA1_Channel9_IRQHandler       [WEAK]
+                EXPORT  GPDMA1_Channel10_IRQHandler      [WEAK]
+                EXPORT  GPDMA1_Channel11_IRQHandler      [WEAK]
+                EXPORT  GPDMA1_Channel12_IRQHandler      [WEAK]
+                EXPORT  GPDMA1_Channel13_IRQHandler      [WEAK]
+                EXPORT  GPDMA1_Channel14_IRQHandler      [WEAK]
+                EXPORT  GPDMA1_Channel15_IRQHandler      [WEAK]
+                EXPORT  HPDMA1_Channel8_IRQHandler       [WEAK]
+                EXPORT  HPDMA1_Channel9_IRQHandler       [WEAK]
+                EXPORT  HPDMA1_Channel10_IRQHandler      [WEAK]
+                EXPORT  HPDMA1_Channel11_IRQHandler      [WEAK]
+                EXPORT  HPDMA1_Channel12_IRQHandler      [WEAK]
+                EXPORT  HPDMA1_Channel13_IRQHandler      [WEAK]
+                EXPORT  HPDMA1_Channel14_IRQHandler      [WEAK]
+                EXPORT  HPDMA1_Channel15_IRQHandler      [WEAK]
+                EXPORT  GPU2D_IRQHandler                 [WEAK]
+                EXPORT  GPU2D_ER_IRQHandler              [WEAK]
+                EXPORT  ICACHE_IRQHandler                [WEAK]
+                EXPORT  FDCAN1_IT0_IRQHandler            [WEAK]
+                EXPORT  FDCAN1_IT1_IRQHandler            [WEAK]
+                EXPORT  FDCAN2_IT0_IRQHandler            [WEAK]
+                EXPORT  FDCAN2_IT1_IRQHandler            [WEAK]
+
+PVD_PVM_IRQHandler
+DTS_IRQHandler
+IWDG_IRQHandler
+WWDG_IRQHandler
+RCC_IRQHandler
+FLASH_IRQHandler
+RAMECC_IRQHandler
+FPU_IRQHandler
+TAMP_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+EXTI5_IRQHandler
+EXTI6_IRQHandler
+EXTI7_IRQHandler
+EXTI8_IRQHandler
+EXTI9_IRQHandler
+EXTI10_IRQHandler
+EXTI11_IRQHandler
+EXTI12_IRQHandler
+EXTI13_IRQHandler
+EXTI14_IRQHandler
+EXTI15_IRQHandler
+RTC_IRQHandler
+SAES_IRQHandler
+CRYP_IRQHandler
+PKA_IRQHandler
+HASH_IRQHandler
+RNG_IRQHandler
+ADC1_2_IRQHandler
+GPDMA1_Channel0_IRQHandler
+GPDMA1_Channel1_IRQHandler
+GPDMA1_Channel2_IRQHandler
+GPDMA1_Channel3_IRQHandler
+GPDMA1_Channel4_IRQHandler
+GPDMA1_Channel5_IRQHandler
+GPDMA1_Channel6_IRQHandler
+GPDMA1_Channel7_IRQHandler
+TIM1_BRK_IRQHandler
+TIM1_UP_IRQHandler
+TIM1_TRG_COM_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+TIM5_IRQHandler
+TIM6_IRQHandler
+TIM7_IRQHandler
+TIM9_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+SPI3_IRQHandler
+SPI4_IRQHandler
+SPI5_IRQHandler
+SPI6_IRQHandler
+HPDMA1_Channel0_IRQHandler
+HPDMA1_Channel1_IRQHandler
+HPDMA1_Channel2_IRQHandler
+HPDMA1_Channel3_IRQHandler
+HPDMA1_Channel4_IRQHandler
+HPDMA1_Channel5_IRQHandler
+HPDMA1_Channel6_IRQHandler
+HPDMA1_Channel7_IRQHandler
+SAI1_A_IRQHandler
+SAI1_B_IRQHandler
+SAI2_A_IRQHandler
+SAI2_B_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+UART7_IRQHandler
+UART8_IRQHandler
+I3C1_EV_IRQHandler
+I3C1_ER_IRQHandler
+OTG_HS_IRQHandler
+ETH_IRQHandler
+CORDIC_IRQHandler
+GFXTIM_IRQHandler
+DCMIPP_IRQHandler
+LTDC_IRQHandler
+LTDC_ER_IRQHandler
+DMA2D_IRQHandler
+JPEG_IRQHandler
+GFXMMU_IRQHandler
+I3C1_WKUP_IRQHandler
+MCE1_IRQHandler
+MCE2_IRQHandler
+MCE3_IRQHandler
+XSPI1_IRQHandler
+XSPI2_IRQHandler
+FMC_IRQHandler
+SDMMC1_IRQHandler
+SDMMC2_IRQHandler
+OTG_FS_IRQHandler
+TIM12_IRQHandler
+TIM13_IRQHandler
+TIM14_IRQHandler
+TIM15_IRQHandler
+TIM16_IRQHandler
+TIM17_IRQHandler
+LPTIM1_IRQHandler
+LPTIM2_IRQHandler
+LPTIM3_IRQHandler
+LPTIM4_IRQHandler
+LPTIM5_IRQHandler
+SPDIF_RX_IRQHandler
+MDIOS_IRQHandler
+ADF1_FLT0_IRQHandler
+CRS_IRQHandler
+UCPD1_IRQHandler
+CEC_IRQHandler
+PSSI_IRQHandler
+LPUART1_IRQHandler
+WAKEUP_PIN_IRQHandler
+GPDMA1_Channel8_IRQHandler
+GPDMA1_Channel9_IRQHandler
+GPDMA1_Channel10_IRQHandler
+GPDMA1_Channel11_IRQHandler
+GPDMA1_Channel12_IRQHandler
+GPDMA1_Channel13_IRQHandler
+GPDMA1_Channel14_IRQHandler
+GPDMA1_Channel15_IRQHandler
+HPDMA1_Channel8_IRQHandler
+HPDMA1_Channel9_IRQHandler
+HPDMA1_Channel10_IRQHandler
+HPDMA1_Channel11_IRQHandler
+HPDMA1_Channel12_IRQHandler
+HPDMA1_Channel13_IRQHandler
+HPDMA1_Channel14_IRQHandler
+HPDMA1_Channel15_IRQHandler
+GPU2D_IRQHandler
+GPU2D_ER_IRQHandler
+ICACHE_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                IF      :DEF:__MICROLIB
+
+                EXPORT  __initial_sp
+                EXPORT  __heap_base
+                EXPORT  __heap_limit
+
+                ELSE
+
+                IMPORT  __use_two_region_memory
+                EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap PROC
+                LDR     R0, =  Heap_Mem
+                LDR     R1, =(Stack_Mem + Stack_Size)
+                LDR     R2, = (Heap_Mem +  Heap_Size)
+                LDR     R3, = Stack_Mem
+                BX      LR
+                ENDP
+
+                ALIGN
+
+                ENDIF
+
+                END