diff options
| author | liuhy <[email protected]> | 2021-10-15 14:40:55 +0800 |
|---|---|---|
| committer | liuhy <[email protected]> | 2021-10-15 14:40:55 +0800 |
| commit | 7516c14fa54130a53b383186f0318fc81f01f7c3 (patch) | |
| tree | 5b29cf0dc386bd96e6cae30508b10486a2b38578 | |
| parent | 5334f1aa8a58bc91ae0da66f9f8e42e85b00f907 (diff) | |
[bsp][essemi] update bsp es32f369x
| -rw-r--r-- | bsp/essemi/es32f369x/drivers/ES/Kconfig | 72 | ||||
| -rw-r--r-- | bsp/essemi/es32f369x/drivers/ES/es_conf_info_can.h | 2 | ||||
| -rw-r--r-- | bsp/essemi/es32f369x/drivers/ES/es_conf_info_dma.h | 59 | ||||
| -rw-r--r-- | bsp/essemi/es32f369x/drivers/ES/es_conf_info_map.h | 64 | ||||
| -rw-r--r-- | bsp/essemi/es32f369x/drivers/Kconfig | 4 | ||||
| -rw-r--r-- | bsp/essemi/es32f369x/drivers/SConscript | 3 | ||||
| -rw-r--r-- | bsp/essemi/es32f369x/drivers/board.c | 18 | ||||
| -rw-r--r-- | bsp/essemi/es32f369x/drivers/drv_can.c | 4 | ||||
| -rw-r--r-- | bsp/essemi/es32f369x/drivers/drv_uart.c | 529 | ||||
| -rw-r--r-- | bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/ald_can.c | 4 |
10 files changed, 656 insertions, 103 deletions
diff --git a/bsp/essemi/es32f369x/drivers/ES/Kconfig b/bsp/essemi/es32f369x/drivers/ES/Kconfig index 9ba55d110e..906bdb042e 100644 --- a/bsp/essemi/es32f369x/drivers/ES/Kconfig +++ b/bsp/essemi/es32f369x/drivers/ES/Kconfig @@ -4,31 +4,95 @@ menu "UART Drivers" bool "Register UART0 " select RT_USING_SERIAL default y - + + if BSP_USING_UART0 + config BSP_UART0_TX_USING_DMA + bool "UART0 using DMA TX" + select RT_SERIAL_USING_DMA + default n + config BSP_UART0_RX_USING_DMA + bool "UART0 using DMA RX" + select RT_SERIAL_USING_DMA + default n + endif + config BSP_USING_UART1 bool "Register UART1 " select RT_USING_SERIAL default n + + if BSP_USING_UART1 + config BSP_UART1_TX_USING_DMA + bool "UART1 using DMA TX" + select RT_SERIAL_USING_DMA + default n + config BSP_UART1_RX_USING_DMA + bool "UART1 using DMA RX" + select RT_SERIAL_USING_DMA + default n + endif config BSP_USING_UART2 bool "Register UART2 " select RT_USING_SERIAL default n + + if BSP_USING_UART2 + config BSP_UART2_TX_USING_DMA + bool "UART2 using DMA TX" + select RT_SERIAL_USING_DMA + default n + config BSP_UART2_RX_USING_DMA + bool "UART2 using DMA RX" + select RT_SERIAL_USING_DMA + default n + endif config BSP_USING_UART3 bool "Register UART3 " select RT_USING_SERIAL default n + + if BSP_USING_UART3 + config BSP_UART3_TX_USING_DMA + bool "UART3 using DMA TX" + default n + config BSP_UART3_RX_USING_DMA + bool "UART3 using DMA RX" + default n + endif config BSP_USING_UART4 bool "Register UART4 " select RT_USING_SERIAL default n + + if BSP_USING_UART4 + config BSP_UART4_TX_USING_DMA + bool "UART4 using DMA TX" + select RT_SERIAL_USING_DMA + default n + config BSP_UART4_RX_USING_DMA + bool "UART4 using DMA RX" + select RT_SERIAL_USING_DMA + default n + endif config BSP_USING_UART5 bool "Register UART5 " select RT_USING_SERIAL default n + + if BSP_USING_UART5 + config BSP_UART5_TX_USING_DMA + bool "UART5 using DMA TX" + select RT_SERIAL_USING_DMA + default n + config BSP_UART5_RX_USING_DMA + bool "UART5 using DMA RX" + select RT_SERIAL_USING_DMA + default n + endif endmenu @@ -195,3 +259,9 @@ menu "PM Drivers" endmenu +menu "DMA Drivers" + config BSP_USING_DMA0 + bool "Using DMA0 " + select ES_CONF_DMA_ENABLE + default n +endmenu diff --git a/bsp/essemi/es32f369x/drivers/ES/es_conf_info_can.h b/bsp/essemi/es32f369x/drivers/ES/es_conf_info_can.h index a25b903bc5..7254f5660b 100644 --- a/bsp/essemi/es32f369x/drivers/ES/es_conf_info_can.h +++ b/bsp/essemi/es32f369x/drivers/ES/es_conf_info_can.h @@ -54,7 +54,7 @@ #endif #ifndef ES_CAN0_AUTO_BAN_RE_T -#define ES_CAN0_AUTO_BAN_RE_T ES_C_ENABLE +#define ES_CAN0_AUTO_BAN_RE_T ES_C_DISABLE #endif #ifndef ES_CAN0_SPEED #define ES_CAN0_SPEED 1000000 diff --git a/bsp/essemi/es32f369x/drivers/ES/es_conf_info_dma.h b/bsp/essemi/es32f369x/drivers/ES/es_conf_info_dma.h new file mode 100644 index 0000000000..3f61f286d1 --- /dev/null +++ b/bsp/essemi/es32f369x/drivers/ES/es_conf_info_dma.h @@ -0,0 +1,59 @@ +/* + * Copyright (C) 2021 Shanghai Eastsoft Microelectronics Co., Ltd. + * + */ + +#ifndef __ES_CONF_INFO_DMA_H__ +#define __ES_CONF_INFO_DMA_H__ + +#include "es_conf_info_map.h" +#include <rtdevice.h> +#include <ald_dma.h> +#ifdef BSP_USING_DMA0 +#define ES_CONF_DMA_ENABLE +#endif + +enum ES_DMA_CHANNELS +{ +#if defined(ES_CONF_UART0_DMA_TX)||defined(BSP_UART0_TX_USING_DMA) + ES_UART0_DMATX_CHANNEL, +#endif +#if defined(ES_CONF_UART0_DMA_RX)||defined(BSP_UART0_RX_USING_DMA) + ES_UART0_DMARX_CHANNEL, +#endif +#if defined(ES_CONF_UART1_DMA_TX)||defined(BSP_UART1_TX_USING_DMA) + ES_UART1_DMATX_CHANNEL, +#endif +#if defined(ES_CONF_UART1_DMA_RX)||defined(BSP_UART1_RX_USING_DMA) + ES_UART1_DMARX_CHANNEL, +#endif +#if defined(ES_CONF_UART2_DMA_TX)||defined(BSP_UART2_TX_USING_DMA) + ES_UART2_DMATX_CHANNEL, +#endif +#if defined(ES_CONF_UART2_DMA_RX)||defined(BSP_UART2_RX_USING_DMA) + ES_UART2_DMARX_CHANNEL, +#endif +#if defined(ES_CONF_UART3_DMA_TX)||defined(BSP_UART3_TX_USING_DMA) + ES_UART3_DMATX_CHANNEL, +#endif +#if defined(ES_CONF_UART3_DMA_RX)||defined(BSP_UART3_RX_USING_DMA) + ES_UART3_DMARX_CHANNEL, +#endif +#if defined(ES_CONF_UART4_DMA_TX)||defined(BSP_UART4_TX_USING_DMA) + ES_UART4_DMATX_CHANNEL, +#endif +#if defined(ES_CONF_UART4_DMA_RX)||defined(BSP_UART4_RX_USING_DMA) + ES_UART4_DMARX_CHANNEL, +#endif +#if defined(ES_CONF_UART5_DMA_TX)||defined(BSP_UART5_TX_USING_DMA) + ES_UART5_DMATX_CHANNEL, +#endif +#if defined(ES_CONF_UART5_DMA_RX)||defined(BSP_UART5_RX_USING_DMA) + ES_UART5_DMARX_CHANNEL, +#endif + ES_DMA_CHANNEL_NUM +}; +#define ES_DMA_INVAILD_CHANNEL (DMA_CH_COUNT) +#define ES_DMA_USER_CHANNEL (ES_DMA_CHANNEL_NUM) + +#endif /* __ES_CONF_INFO_DMA_H__ */ diff --git a/bsp/essemi/es32f369x/drivers/ES/es_conf_info_map.h b/bsp/essemi/es32f369x/drivers/ES/es_conf_info_map.h index 65b68693e5..67609d04d7 100644 --- a/bsp/essemi/es32f369x/drivers/ES/es_conf_info_map.h +++ b/bsp/essemi/es32f369x/drivers/ES/es_conf_info_map.h @@ -1937,22 +1937,6 @@ static const struct pin_index pins[] = #ifndef ES_AD16C4T0_CH1_GPIO_FUNC -#define ES_AD16C4T0_CH1_GPIO_FUNC GPIO_FUNC_4 -#endif -#ifndef ES_AD16C4T0_CH1_GPIO_PORT -#define ES_AD16C4T0_CH1_GPIO_PORT GPIOA -#endif -#ifndef ES_AD16C4T0_CH1_GPIO_PIN -#define ES_AD16C4T0_CH1_GPIO_PIN GPIO_PIN_7 -#endif - -#ifndef ES_AD16C4T0_CH1_PIN -#ifdef ES_PIN_GPIO_A_7 -#define ES_AD16C4T0_CH1_PIN ES_PIN_GPIO_A_7 -#endif -#endif - -#ifndef ES_AD16C4T0_CH1_GPIO_FUNC #define ES_AD16C4T0_CH1_GPIO_FUNC GPIO_FUNC_2 #endif #ifndef ES_AD16C4T0_CH1_GPIO_PORT @@ -2097,6 +2081,22 @@ static const struct pin_index pins[] = #endif #ifndef ES_AD16C4T0_CH1N_GPIO_FUNC +#define ES_AD16C4T0_CH1N_GPIO_FUNC GPIO_FUNC_4 +#endif +#ifndef ES_AD16C4T0_CH1N_GPIO_PORT +#define ES_AD16C4T0_CH1N_GPIO_PORT GPIOA +#endif +#ifndef ES_AD16C4T0_CH1N_GPIO_PIN +#define ES_AD16C4T0_CH1N_GPIO_PIN GPIO_PIN_7 +#endif + +#ifndef ES_AD16C4T0_CH1N_PIN +#ifdef ES_PIN_GPIO_A_7 +#define ES_AD16C4T0_CH1N_PIN ES_PIN_GPIO_A_7 +#endif +#endif + +#ifndef ES_AD16C4T0_CH1N_GPIO_FUNC #define ES_AD16C4T0_CH1N_GPIO_FUNC GPIO_FUNC_2 #endif #ifndef ES_AD16C4T0_CH1N_GPIO_PORT @@ -2149,6 +2149,22 @@ static const struct pin_index pins[] = #endif #ifndef ES_AD16C4T0_CH2N_GPIO_FUNC +#define ES_AD16C4T0_CH2N_GPIO_FUNC GPIO_FUNC_6 +#endif +#ifndef ES_AD16C4T0_CH2N_GPIO_PORT +#define ES_AD16C4T0_CH2N_GPIO_PORT GPIOB +#endif +#ifndef ES_AD16C4T0_CH2N_GPIO_PIN +#define ES_AD16C4T0_CH2N_GPIO_PIN GPIO_PIN_0 +#endif + +#ifndef ES_AD16C4T0_CH2N_PIN +#ifdef ES_PIN_GPIO_B_0 +#define ES_AD16C4T0_CH2N_PIN ES_PIN_GPIO_B_0 +#endif +#endif + +#ifndef ES_AD16C4T0_CH2N_GPIO_FUNC #define ES_AD16C4T0_CH2N_GPIO_FUNC GPIO_FUNC_2 #endif #ifndef ES_AD16C4T0_CH2N_GPIO_PORT @@ -2201,6 +2217,22 @@ static const struct pin_index pins[] = #endif #ifndef ES_AD16C4T0_CH3N_GPIO_FUNC +#define ES_AD16C4T0_CH3N_GPIO_FUNC GPIO_FUNC_6 +#endif +#ifndef ES_AD16C4T0_CH3N_GPIO_PORT +#define ES_AD16C4T0_CH3N_GPIO_PORT GPIOB +#endif +#ifndef ES_AD16C4T0_CH3N_GPIO_PIN +#define ES_AD16C4T0_CH3N_GPIO_PIN GPIO_PIN_1 +#endif + +#ifndef ES_AD16C4T0_CH3N_PIN +#ifdef ES_PIN_GPIO_B_1 +#define ES_AD16C4T0_CH3N_PIN ES_PIN_GPIO_B_1 +#endif +#endif + +#ifndef ES_AD16C4T0_CH3N_GPIO_FUNC #define ES_AD16C4T0_CH3N_GPIO_FUNC GPIO_FUNC_2 #endif #ifndef ES_AD16C4T0_CH3N_GPIO_PORT diff --git a/bsp/essemi/es32f369x/drivers/Kconfig b/bsp/essemi/es32f369x/drivers/Kconfig index 75cb7bd164..6e70e9674c 100644 --- a/bsp/essemi/es32f369x/drivers/Kconfig +++ b/bsp/essemi/es32f369x/drivers/Kconfig @@ -81,6 +81,10 @@ endif bool "BSP_USING_EXAMPLE_UART" default n + config BSP_USING_EXAMPLE_UART_DMA + bool "BSP_USING_EXAMPLE_UART_DMA" + default n + config BSP_USING_EXAMPLE_CAN bool "BSP_USING_EXAMPLE_CAN" default n diff --git a/bsp/essemi/es32f369x/drivers/SConscript b/bsp/essemi/es32f369x/drivers/SConscript index b39d545e35..950f8c70e9 100644 --- a/bsp/essemi/es32f369x/drivers/SConscript +++ b/bsp/essemi/es32f369x/drivers/SConscript @@ -96,6 +96,9 @@ if GetDepend('BSP_USING_EXAMPLE_RTC'): if GetDepend('BSP_USING_EXAMPLE_UART'): src += ['bsp_driver_example/uart_sample.c'] +if GetDepend('BSP_USING_EXAMPLE_UART_DMA'): + src += ['bsp_driver_example/uart_dma_sample.c'] + if GetDepend('BSP_USING_EXAMPLE_SPI'): src += ['bsp_driver_example/spi_sample.c'] diff --git a/bsp/essemi/es32f369x/drivers/board.c b/bsp/essemi/es32f369x/drivers/board.c index 3b7f7252c7..39744002d8 100644 --- a/bsp/essemi/es32f369x/drivers/board.c +++ b/bsp/essemi/es32f369x/drivers/board.c @@ -27,6 +27,7 @@ #include "drv_uart.h" #include "drv_gpio.h" #include <ald_gpio.h> +#include "ald_dma.h" /** * @addtogroup es32f3 @@ -155,7 +156,18 @@ void CMU_Handler(void) { ald_cmu_irq_handler(); } - +/** + * This is the DMA interrupt service. + * + */ +void DMA_Handler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + ald_dma_irq_handler(); + /* leave interrupt */ + rt_interrupt_leave(); +} /*@}*/ /** * This function will initial ES32F3 board. @@ -178,6 +190,10 @@ void rt_hw_board_init(void) #ifdef RT_USING_CONSOLE rt_console_set_device(RT_CONSOLE_DEVICE_NAME); #endif +#ifdef BSP_USING_DMA0 + ald_cmu_perh_clock_config(CMU_PERH_DMA, ENABLE); + ald_dma_init(DMA0); +#endif } /** diff --git a/bsp/essemi/es32f369x/drivers/drv_can.c b/bsp/essemi/es32f369x/drivers/drv_can.c index 45a0598ae5..81936c33ac 100644 --- a/bsp/essemi/es32f369x/drivers/drv_can.c +++ b/bsp/essemi/es32f369x/drivers/drv_can.c @@ -183,10 +183,10 @@ static rt_err_t _can_control(struct rt_can_device *can_device, int cmd, void *ar NVIC_EnableIRQ(CAN0_RX0_IRQn); ald_can_interrupt_config(&drv_can->CanHandle, CAN_IT_FP0, ENABLE); - ald_can_interrupt_config(&drv_can->CanHandle, CAN_IT_FF0, ENABLE); +// ald_can_interrupt_config(&drv_can->CanHandle, CAN_IT_FF0, ENABLE); ald_can_interrupt_config(&drv_can->CanHandle, CAN_IT_FOV0, ENABLE); ald_can_interrupt_config(&drv_can->CanHandle, CAN_IT_FP1, ENABLE); - ald_can_interrupt_config(&drv_can->CanHandle, CAN_IT_FF1, ENABLE); +// ald_can_interrupt_config(&drv_can->CanHandle, CAN_IT_FF1, ENABLE); ald_can_interrupt_config(&drv_can->CanHandle, CAN_IT_FOV1, ENABLE); } diff --git a/bsp/essemi/es32f369x/drivers/drv_uart.c b/bsp/essemi/es32f369x/drivers/drv_uart.c index 482d1577f1..3bdb053a0f 100644 --- a/bsp/essemi/es32f369x/drivers/drv_uart.c +++ b/bsp/essemi/es32f369x/drivers/drv_uart.c @@ -19,6 +19,7 @@ * Date Author Notes * 2020-01-14 wangyq the first version * 2021-04-20 liuhy the second version + * 2021-09-17 shiwa add uart dma */ #include <rthw.h> @@ -26,161 +27,310 @@ #include <rtdevice.h> #include "board.h" #include "es_conf_info_uart.h" - +#include "es_conf_info_dma.h" #ifdef RT_USING_SERIAL +#define UART_DMA_BUF_SECTIONS 4 + +/* + * To use UART DMA, + * 1. select 'DMA->DMA0' + * 2. select 'UART->UARTx->DMATX(or DMARX)' + * 3. add RT_DEVICE_FLAG_DMA_TX(or RT_DEVICE_FLAG_DMA_RX) flag when open serial device + */ +#ifdef BSP_UART0_TX_USING_DMA +#define UART0_DMATX_CHANNEL ES_UART0_DMATX_CHANNEL +#define UART0_DMATX_FLAG RT_DEVICE_FLAG_DMA_TX +#else +#define UART0_DMATX_CHANNEL ES_DMA_INVAILD_CHANNEL +#define UART0_DMATX_FLAG 0 +#endif + +#ifdef BSP_UART0_RX_USING_DMA +#define UART0_DMARX_CHANNEL ES_UART0_DMARX_CHANNEL +#define UART0_DMARX_FLAG RT_DEVICE_FLAG_DMA_RX +#else +#define UART0_DMARX_CHANNEL ES_DMA_INVAILD_CHANNEL +#define UART0_DMARX_FLAG 0 +#endif + +#ifdef BSP_UART1_TX_USING_DMA +#define UART1_DMATX_CHANNEL ES_UART1_DMATX_CHANNEL +#define UART1_DMATX_FLAG RT_DEVICE_FLAG_DMA_TX +#else +#define UART1_DMATX_CHANNEL ES_DMA_INVAILD_CHANNEL +#define UART1_DMATX_FLAG 0 +#endif + +#ifdef BSP_UART1_RX_USING_DMA +#define UART1_DMARX_CHANNEL ES_UART1_DMARX_CHANNEL +#define UART1_DMARX_FLAG RT_DEVICE_FLAG_DMA_RX +#else +#define UART1_DMARX_CHANNEL ES_DMA_INVAILD_CHANNEL +#define UART1_DMARX_FLAG 0 +#endif + +#ifdef BSP_UART2_TX_USING_DMA +#define UART2_DMATX_CHANNEL ES_UART2_DMATX_CHANNEL +#define UART2_DMATX_FLAG RT_DEVICE_FLAG_DMA_TX +#else +#define UART2_DMATX_CHANNEL ES_DMA_INVAILD_CHANNEL +#define UART2_DMATX_FLAG 0 +#endif + +#ifdef BSP_UART2_RX_USING_DMA +#define UART2_DMARX_CHANNEL ES_UART2_DMARX_CHANNEL +#define UART2_DMARX_FLAG RT_DEVICE_FLAG_DMA_RX +#else +#define UART2_DMARX_CHANNEL ES_DMA_INVAILD_CHANNEL +#define UART2_DMARX_FLAG 0 +#endif + +#ifdef BSP_UART3_TX_USING_DMA +#define UART3_DMATX_CHANNEL ES_UART3_DMATX_CHANNEL +#define UART3_DMATX_FLAG RT_DEVICE_FLAG_DMA_TX +#else +#define UART3_DMATX_CHANNEL ES_DMA_INVAILD_CHANNEL +#define UART3_DMATX_FLAG 0 +#endif + +#ifdef BSP_UART3_RX_USING_DMA +#define UART3_DMARX_CHANNEL ES_UART3_DMARX_CHANNEL +#define UART3_DMARX_FLAG RT_DEVICE_FLAG_DMA_RX +#else +#define UART3_DMARX_CHANNEL ES_DMA_INVAILD_CHANNEL +#define UART3_DMARX_FLAG 0 +#endif + +#ifdef BSP_UART4_TX_USING_DMA +#define UART4_DMATX_CHANNEL ES_UART4_DMATX_CHANNEL +#define UART4_DMATX_FLAG RT_DEVICE_FLAG_DMA_TX +#else +#define UART4_DMATX_CHANNEL ES_DMA_INVAILD_CHANNEL +#define UART4_DMATX_FLAG 0 +#endif + +#ifdef BSP_UART4_RX_USING_DMA +#define UART4_DMARX_CHANNEL ES_UART4_DMARX_CHANNEL +#define UART4_DMARX_FLAG RT_DEVICE_FLAG_DMA_RX +#else +#define UART4_DMARX_CHANNEL ES_DMA_INVAILD_CHANNEL +#define UART4_DMARX_FLAG 0 +#endif + +#ifdef BSP_UART5_TX_USING_DMA +#define UART5_DMATX_CHANNEL ES_UART5_DMATX_CHANNEL +#define UART5_DMATX_FLAG RT_DEVICE_FLAG_DMA_TX +#else +#define UART5_DMATX_CHANNEL ES_DMA_INVAILD_CHANNEL +#define UART5_DMATX_FLAG 0 +#endif + +#ifdef BSP_UART5_RX_USING_DMA +#define UART5_DMARX_CHANNEL ES_UART5_DMARX_CHANNEL +#define UART5_DMARX_FLAG RT_DEVICE_FLAG_DMA_RX +#else +#define UART5_DMARX_CHANNEL ES_DMA_INVAILD_CHANNEL +#define UART5_DMARX_FLAG 0 +#endif + +#define UART_INVAILD_DMA_CHANNEL (ES_DMA_INVAILD_CHANNEL) + /* es32 uart driver */ struct es32_uart { uart_handle_t huart; + struct rt_serial_device *serial; IRQn_Type irq; +#ifdef RT_SERIAL_USING_DMA + uint16_t dma_tx_channel; + uint16_t dma_rx_channel; + + uint32_t last_rx_count; + uint32_t buf_select; +#endif /* RT_SERIAL_USING_DMA */ }; +#ifdef RT_SERIAL_USING_DMA + static void _dma_recv_timeout(struct es32_uart *uart, uint32_t dma_end); +#endif /* RT_SERIAL_USING_DMA */ + +static void uart_int_handler(struct es32_uart*uart) +{ + if ((ald_uart_get_mask_flag_status(&uart->huart, UART_IF_RFTH)) != RESET) + { + ald_uart_clear_flag_status(&uart->huart, UART_IF_RFTH); + rt_hw_serial_isr(uart->serial, RT_SERIAL_EVENT_RX_IND); + } + #ifdef RT_SERIAL_USING_DMA + if ((ald_uart_get_mask_flag_status(&uart->huart, UART_IF_RXTO)) != RESET) + { + ald_uart_clear_flag_status(&uart->huart, UART_IF_RXTO); + _dma_recv_timeout(uart, 0); + } + + if ((ald_uart_get_mask_flag_status(&uart->huart, UART_IF_TBC)) != RESET) + { + uint32_t cnt = 1000; + ald_uart_clear_flag_status(&uart->huart, UART_IF_TBC); + ald_uart_interrupt_config(&uart->huart, UART_IT_TBC, DISABLE); + CLEAR_BIT(uart->huart.state, UART_STATE_TX_MASK); + + while ((uart->huart.perh->STAT & UART_STATUS_TSBUSY) && (cnt--)); + + ald_uart_clear_flag_status(&uart->huart, UART_IF_TBC); + + if (uart->huart.tx_cplt_cbk) + uart->huart.tx_cplt_cbk(&uart->huart); + } + #endif /* RT_SERIAL_USING_DMA */ +} + + #ifdef BSP_USING_UART0 + +struct rt_serial_device serial0; /* UART0 device driver structure */ struct es32_uart uart0 = { {UART0}, - UART0_IRQn + &serial0, + UART0_IRQn, +#ifdef RT_SERIAL_USING_DMA + UART0_DMATX_CHANNEL, + UART0_DMARX_CHANNEL +#endif /* RT_SERIAL_USING_DMA */ }; - -struct rt_serial_device serial0; - void UART0_Handler(void) { /* enter interrupt */ rt_interrupt_enter(); - - if ((ald_uart_get_mask_flag_status(&uart0.huart, UART_IF_RFTH)) != RESET) - { - ald_uart_clear_flag_status(&uart0.huart, UART_IF_RFTH); - rt_hw_serial_isr(&serial0, RT_SERIAL_EVENT_RX_IND); - } + uart_int_handler(&uart0); /* leave interrupt */ rt_interrupt_leave(); } #endif /* BSP_USING_UART0 */ #ifdef BSP_USING_UART1 + +struct rt_serial_device serial1; /* UART1 device driver structure */ struct es32_uart uart1 = { {UART1}, - UART1_IRQn + &serial1, + UART1_IRQn, +#ifdef RT_SERIAL_USING_DMA + UART1_DMATX_CHANNEL, + UART1_DMARX_CHANNEL +#endif /* RT_SERIAL_USING_DMA */ }; -struct rt_serial_device serial1; - void UART1_Handler(void) { /* enter interrupt */ rt_interrupt_enter(); - - if ((ald_uart_get_mask_flag_status(&uart1.huart, UART_IF_RFTH)) != RESET) - { - ald_uart_clear_flag_status(&uart1.huart, UART_IF_RFTH); - rt_hw_serial_isr(&serial1, RT_SERIAL_EVENT_RX_IND); - } + uart_int_handler(&uart1); /* leave interrupt */ rt_interrupt_leave(); } #endif /* BSP_USING_UART1 */ #ifdef BSP_USING_UART2 + +struct rt_serial_device serial2; /* UART2 device driver structure */ struct es32_uart uart2 = { {UART2}, - UART2_IRQn + &serial2, + UART2_IRQn, +#ifdef RT_USING_SERIAL + UART2_DMATX_CHANNEL, + UART2_DMARX_CHANNEL +#endif /* RT_SERIAL_USING_DMA */ }; -struct rt_serial_device serial2; - void UART2_Handler(void) { /* enter interrupt */ rt_interrupt_enter(); - - if ((ald_uart_get_mask_flag_status(&uart2.huart, UART_IF_RFTH)) != RESET) - { - ald_uart_clear_flag_status(&uart2.huart, UART_IF_RFTH); - rt_hw_serial_isr(&serial2, RT_SERIAL_EVENT_RX_IND); - } + uart_int_handler(&uart2); /* leave interrupt */ rt_interrupt_leave(); } #endif /* BSP_USING_UART2 */ #ifdef BSP_USING_UART3 + +struct rt_serial_device serial3; /* UART3 device driver structure */ struct es32_uart uart3 = { {UART3}, - UART3_IRQn + &serial3, + UART3_IRQn, +#ifdef RT_SERIAL_USING_DMA + UART3_DMATX_CHANNEL, + UART3_DMARX_CHANNEL +#endif /* RT_SERIAL_USING_DMA */ }; -struct rt_serial_device serial3; - void UART3_Handler(void) { /* enter interrupt */ rt_interrupt_enter(); - - if ((ald_uart_get_mask_flag_status(&uart3.huart, UART_IF_RFTH)) != RESET) - { - ald_uart_clear_flag_status(&uart3.huart, UART_IF_RFTH); - rt_hw_serial_isr(&serial3, RT_SERIAL_EVENT_RX_IND); - } + uart_int_handler(&uart3); /* leave interrupt */ rt_interrupt_leave(); } #endif /* BSP_USING_UART3 */ #ifdef BSP_USING_UART4 + +struct rt_serial_device serial4; /* UART4 device driver structure */ struct es32_uart uart4 = { {UART4}, - UART4_IRQn + &serial4, + UART4_IRQn, +#ifdef RT_SERIAL_USING_DMA + UART4_DMATX_CHANNEL, + UART4_DMARX_CHANNEL +#endif /* RT_SERIAL_USING_DMA */ }; -struct rt_serial_device serial4; - void UART4_Handler(void) { /* enter interrupt */ rt_interrupt_enter(); - - if ((ald_uart_get_mask_flag_status(&uart4.huart, UART_IF_RFTH)) != RESET) - { - ald_uart_clear_flag_status(&uart4.huart, UART_IF_RFTH); - rt_hw_serial_isr(&serial4, RT_SERIAL_EVENT_RX_IND); - } + uart_int_handler(&uart4); /* leave interrupt */ rt_interrupt_leave(); } #endif /* BSP_USING_UART4 */ #ifdef BSP_USING_UART5 + +struct rt_serial_device serial5; /* UART5 device driver structure */ struct es32_uart uart5 = { {UART5}, - UART5_IRQn + &serial5, + UART5_IRQn, +#ifdef RT_SERIAL_USING_DMA + UART5_DMATX_CHANNEL, + UART5_DMARX_CHANNEL +#endif /* RT_SERIAL_USING_DMA */ }; -struct rt_serial_device serial5; - void UART5_Handler(void) { /* enter interrupt */ rt_interrupt_enter(); - - if ((ald_uart_get_mask_flag_status(&uart5.huart, UART_IF_RFTH)) != RESET) - { - ald_uart_clear_flag_status(&uart5.huart, UART_IF_RFTH); - rt_hw_serial_isr(&serial5, RT_SERIAL_EVENT_RX_IND); - } + uart_int_handler(&uart5); /* leave interrupt */ rt_interrupt_leave(); } @@ -204,7 +354,8 @@ static rt_err_t es32f3x_configure(struct rt_serial_device *serial, struct serial gpio_initstructure.type = GPIO_TYPE_TTL; #ifdef BSP_USING_UART0 - if(uart == (&uart0)) + + if (uart == (&uart0)) { #if defined(ES_UART0_TX_GPIO_FUNC)&&defined(ES_UART0_TX_GPIO_PORT)&&defined(ES_UART0_TX_GPIO_PIN) gpio_initstructure.func = ES_UART0_TX_GPIO_FUNC; @@ -223,7 +374,8 @@ static rt_err_t es32f3x_configure(struct rt_serial_device *serial, struct serial #endif /* uart0 gpio init */ #ifdef BSP_USING_UART1 - if(uart == (&uart1)) + + if (uart == (&uart1)) { #if defined(ES_UART1_TX_GPIO_FUNC)&&defined(ES_UART1_TX_GPIO_PORT)&&defined(ES_UART1_TX_GPIO_PIN) gpio_initstructure.func = ES_UART1_TX_GPIO_FUNC; @@ -239,10 +391,12 @@ static rt_err_t es32f3x_configure(struct rt_serial_device *serial, struct serial ald_cmu_perh_clock_config(CMU_PERH_UART1, ENABLE); } + #endif /* uart1 gpio init */ #ifdef BSP_USING_UART2 - if(uart == (&uart2)) + + if (uart == (&uart2)) { #if defined(ES_UART2_TX_GPIO_FUNC)&&defined(ES_UART2_TX_GPIO_PORT)&&defined(ES_UART2_TX_GPIO_PIN) gpio_initstructure.func = ES_UART2_TX_GPIO_FUNC; @@ -258,10 +412,12 @@ static rt_err_t es32f3x_configure(struct rt_serial_device *serial, struct serial ald_cmu_perh_clock_config(CMU_PERH_UART2, ENABLE); } + #endif /* uart2 gpio init */ #ifdef BSP_USING_UART3 - if(uart == (&uart3)) + + if (uart == (&uart3)) { #if defined(ES_UART3_TX_GPIO_FUNC)&&defined(ES_UART3_TX_GPIO_PORT)&&defined(ES_UART3_TX_GPIO_PIN) gpio_initstructure.func = ES_UART3_TX_GPIO_FUNC; @@ -277,10 +433,12 @@ static rt_err_t es32f3x_configure(struct rt_serial_device *serial, struct serial ald_cmu_perh_clock_config(CMU_PERH_UART3, ENABLE); } + #endif /* uart3 gpio init */ #ifdef BSP_USING_UART4 - if(uart == (&uart4)) + + if (uart == (&uart4)) { #if defined(ES_UART4_TX_GPIO_FUNC)&&defined(ES_UART4_TX_GPIO_PORT)&&defined(ES_UART4_TX_GPIO_PIN) gpio_initstructure.func = ES_UART4_TX_GPIO_FUNC; @@ -296,10 +454,12 @@ static rt_err_t es32f3x_configure(struct rt_serial_device *serial, struct serial ald_cmu_perh_clock_config(CMU_PERH_UART4, ENABLE); } + #endif /* uart4 gpio init */ #ifdef BSP_USING_UART5 - if(uart == (&uart5)) + + if (uart == (&uart5)) { #if defined(ES_UART5_TX_GPIO_FUNC)&&defined(ES_UART5_TX_GPIO_PORT)&&defined(ES_UART5_TX_GPIO_PIN) gpio_initstructure.func = ES_UART5_TX_GPIO_FUNC; @@ -315,6 +475,7 @@ static rt_err_t es32f3x_configure(struct rt_serial_device *serial, struct serial ald_cmu_perh_clock_config(CMU_PERH_UART5, ENABLE); } + #endif /* uart5 gpio init */ ald_uart_tx_fifo_config(&uart->huart, UART_TXFIFO_EMPTY); @@ -349,27 +510,179 @@ static rt_err_t es32f3x_configure(struct rt_serial_device *serial, struct serial return RT_EOK; } + + +#ifdef RT_SERIAL_USING_DMA + +static void _dma_recv_timeout(struct es32_uart *uart, uint32_t dma_end) +{ + DMA_TypeDef *DMAx; + dma_config_t *dma_cfg; + dma_descriptor_t *descr; + uint32_t rx_count_total; + uint32_t rx_count; + + + if (dma_end) + { + rx_count = dma_end - uart->last_rx_count; + uart->last_rx_count = 0; + } + else + { + DMAx = uart->huart.hdmarx.perh; + dma_cfg = &uart->huart.hdmarx.config; + descr = (dma_descriptor_t *)(DMAx->CTRLBASE) + dma_cfg->channel; + + rx_count_total = (dma_cfg->size) - (uint32_t)(descr->ctrl.n_minus_1) - 1; + + if (rx_count_total) + rx_count = rx_count_total - uart->last_rx_count; + else + return; + + uart->last_rx_count = rx_count_total; + } + + rt_hw_serial_isr(uart->serial, RT_SERIAL_EVENT_RX_DMADONE | (rx_count << 8)); +} + +/** + * DMA TX complete callback + */ +static void _uart_tx_dma_cplt(uart_handle_t *arg) +{ + struct es32_uart *uart; + uart = rt_container_of(arg, struct es32_uart, huart); + rt_hw_serial_isr(uart->serial, RT_SERIAL_EVENT_TX_DMADONE); +} +/** + * DMA RX complete callback + */ +static void _uart_rx_dma_cplt(uart_handle_t *arg) +{ + struct es32_uart *uart; + uint8_t *dma_dst; + uart = rt_container_of(arg, struct es32_uart, huart); + + if (uart->buf_select == UART_DMA_BUF_SECTIONS - 1) + { + dma_dst = (uint8_t *)uart->huart.hdmarx.config.dst - arg->hdmarx.config.size * (UART_DMA_BUF_SECTIONS - 1); + uart->buf_select = 0; + } + else + { + dma_dst = (uint8_t *)arg->hdmarx.config.dst + arg->hdmarx.config.size; + uart->buf_select += 1; + } + + ald_uart_recv_by_dma(arg, dma_dst, arg->hdmarx.config.size, arg->hdmarx.config.channel); + _dma_recv_timeout(uart, arg->hdmarx.config.size); +} +/** + * Setup DMA + */ +static rt_err_t es32f3x_dma_config(struct rt_serial_device *serial, rt_ubase_t flag) +{ + struct es32_uart *uart; + struct rt_serial_rx_fifo *rx_fifo; + + RT_ASSERT(serial != RT_NULL); + uart = (struct es32_uart *)serial->parent.user_data; + rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx; + + if (serial->config.bufsz > 1024) + return -RT_ERROR; + + if (RT_DEVICE_FLAG_DMA_RX == flag) + { + if (uart->dma_rx_channel >= UART_INVAILD_DMA_CHANNEL) + return -ERROR; + + uart->huart.rx_cplt_cbk = _uart_rx_dma_cplt; + UART_SET_TIMEOUT_VALUE(&uart->huart, 0xFF); + UART_RX_TIMEOUT_ENABLE(&uart->huart); + ald_uart_interrupt_config(&uart->huart, UART_IT_RXTO, ENABLE); + uart->last_rx_count = 0; + + if (serial->config.bufsz > 0) + { + ald_uart_recv_by_dma(&uart->huart, rx_fifo->buffer, serial->config.bufsz / UART_DMA_BUF_SECTIONS, uart->dma_rx_channel);; + } + } + else if (RT_DEVICE_FLAG_DMA_TX == flag) + { + if (uart->dma_tx_channel >= UART_INVAILD_DMA_CHANNEL) + return -ERROR; + + uart->huart.tx_cplt_cbk = _uart_tx_dma_cplt; + } + + uart->huart.err_code = UART_ERROR_NONE; + //NVIC_SetPriority(DMA_IRQn,0); + NVIC_EnableIRQ(uart->irq); + ald_cmu_perh_clock_config(CMU_PERH_DMA, ENABLE); + return RT_EOK; +} +#endif /* RT_SERIAL_USING_DMA */ + static rt_err_t es32f3x_control(struct rt_serial_device *serial, int cmd, void *arg) { struct es32_uart *uart; +#ifdef RT_SERIAL_USING_DMA + rt_ubase_t ctrl_arg = (rt_ubase_t)arg; +#endif RT_ASSERT(serial != RT_NULL); uart = (struct es32_uart *)serial->parent.user_data; + switch (cmd) { - case RT_DEVICE_CTRL_CLR_INT: - /* disable rx irq */ - NVIC_DisableIRQ(uart->irq); - /* disable interrupt */ - ald_uart_interrupt_config(&uart->huart, UART_IT_RFTH, DISABLE); - break; + case RT_DEVICE_CTRL_CLR_INT: + /* disable rx irq */ + NVIC_DisableIRQ(uart->irq); + /* disable interrupt */ + ald_uart_interrupt_config(&uart->huart, UART_IT_RFTH, DISABLE); +#ifdef RT_SERIAL_USING_DMA + + /* disable DMA */ + if (ctrl_arg == RT_DEVICE_FLAG_DMA_RX) + { + ald_uart_dma_req_config(&uart->huart, UART_DMA_REQ_RX, DISABLE); + } + else if (ctrl_arg == RT_DEVICE_FLAG_DMA_TX) + { + ald_uart_dma_req_config(&uart->huart, UART_DMA_REQ_TX, DISABLE); + } + +#endif + break; + + case RT_DEVICE_CTRL_SET_INT: + /* enable rx irq */ + NVIC_EnableIRQ(uart->irq); + /* enable interrupt */ + ald_uart_interrupt_config(&uart->huart, UART_IT_RFTH, ENABLE); + break; +#ifdef RT_SERIAL_USING_DMA + + case RT_DEVICE_CTRL_CONFIG: + /* Setup DMA */ + es32f3x_dma_config(serial, ctrl_arg); + break; +#endif - case RT_DEVICE_CTRL_SET_INT: - /* enable rx irq */ - NVIC_EnableIRQ(uart->irq); - /* enable interrupt */ - ald_uart_interrupt_config(&uart->huart, UART_IT_RFTH, ENABLE); - break; + case RT_DEVICE_CTRL_CLOSE: + while (ald_uart_get_status(&uart->huart, (UART_STATUS_TSBUSY))); + +#ifdef RT_SERIAL_USING_DMA + uart->huart.rx_cplt_cbk = NULL; + uart->huart.tx_cplt_cbk = NULL; + /* disable DMA */ + ald_uart_dma_stop(&uart->huart); +#endif + ald_uart_reset(&uart->huart); + break; } return RT_EOK; @@ -383,6 +696,7 @@ static int es32f3x_putc(struct rt_serial_device *serial, char c) while (ald_uart_get_status(&uart->huart, UART_STATUS_TFEMPTY) == RESET) ; + WRITE_REG(uart->huart.perh->TXBUF, c); return 1; @@ -403,13 +717,62 @@ static int es32f3x_getc(struct rt_serial_device *serial) return ch; } +#ifdef RT_SERIAL_USING_DMA +/** + * DMA transmit + */ +static rt_size_t es32f3x_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction) +{ + struct es32_uart *uart; + + RT_ASSERT(serial != RT_NULL); + uart = (struct es32_uart *)serial->parent.user_data; + + if (direction == RT_SERIAL_DMA_TX) + { + if (uart->dma_tx_channel >= UART_INVAILD_DMA_CHANNEL) + return 0; + if (OK == ald_uart_send_by_dma(&uart->huart, buf, size, uart->dma_tx_channel)) + { + return size; + } + else + { + return 0; + } + } + else if (direction == RT_SERIAL_DMA_RX) + { + + if (uart->dma_rx_channel >= UART_INVAILD_DMA_CHANNEL) + return 0; + + if (OK == ald_uart_recv_by_dma(&uart->huart, buf, size, uart->dma_rx_channel)) + { + return size; + } + else + { + return 0; + } + + } + + return 0; +} +#endif static const struct rt_uart_ops es32f3x_uart_ops = { es32f3x_configure, es32f3x_control, es32f3x_putc, es32f3x_getc, +#ifdef RT_SERIAL_USING_DMA + es32f3x_dma_transmit +#else + NULL +#endif }; int rt_hw_uart_init(void) @@ -423,7 +786,8 @@ int rt_hw_uart_init(void) /* register UART0 device */ rt_hw_serial_register(&serial0, ES_DEVICE_NAME_UART0, - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | + UART0_DMATX_FLAG | UART0_DMARX_FLAG, uart); #endif /* BSP_USING_UART0 */ @@ -434,7 +798,8 @@ int rt_hw_uart_init(void) /* register UART1 device */ rt_hw_serial_register(&serial1, ES_DEVICE_NAME_UART1, - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | + UART1_DMATX_FLAG | UART1_DMARX_FLAG, uart); #endif /* BSP_USING_UART1 */ @@ -445,7 +810,8 @@ int rt_hw_uart_init(void) /* register UART2 device */ rt_hw_serial_register(&serial2, ES_DEVICE_NAME_UART2, - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | + UART2_DMATX_FLAG | UART2_DMARX_FLAG, uart); #endif /* BSP_USING_UART2 */ @@ -456,7 +822,8 @@ int rt_hw_uart_init(void) /* register UART3 device */ rt_hw_serial_register(&serial3, ES_DEVICE_NAME_UART3, - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | + UART3_DMATX_FLAG | UART3_DMARX_FLAG, uart); #endif /* BSP_USING_UART3 */ @@ -467,7 +834,8 @@ int rt_hw_uart_init(void) /* register UART4 device */ rt_hw_serial_register(&serial4, ES_DEVICE_NAME_UART4, - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | + UART4_DMATX_FLAG | UART4_DMARX_FLAG, uart); #endif /* BSP_USING_UART4 */ @@ -478,7 +846,8 @@ int rt_hw_uart_init(void) /* register UART5 device */ rt_hw_serial_register(&serial5, ES_DEVICE_NAME_UART5, - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | + UART5_DMATX_FLAG | UART5_DMARX_FLAG, uart); #endif /* BSP_USING_UART5 */ diff --git a/bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/ald_can.c b/bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/ald_can.c index fb97024cd1..e610ebef80 100644 --- a/bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/ald_can.c +++ b/bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/ald_can.c @@ -443,8 +443,8 @@ ald_status_t ald_can_recv(can_handle_t *hperh, can_rx_fifo_t num, can_rx_msg_t * } } - if (__can_rx_check(hperh, num)) - return ERROR; +// if (__can_rx_check(hperh, num)) +// return ERROR; stid = READ_BITS(hperh->perh->RxFIFO[num].RXFID, CAN_RXF0ID_STDID_MSK, CAN_RXF0ID_STDID_POSS); exid = READ_BITS(hperh->perh->RxFIFO[num].RXFID, CAN_RXF0ID_EXID_MSK, CAN_RXF0ID_EXID_POSS); |
