diff options
| author | xiaofan <[email protected]> | 2019-09-07 21:19:10 +0800 |
|---|---|---|
| committer | xiaofan <[email protected]> | 2019-09-07 21:20:46 +0800 |
| commit | 94551979e069f681d53e530c62403e5b2c96b72c (patch) | |
| tree | 6550f4267088368dd0beaa38a4c211f178d9efef | |
| parent | 187a860e172f4633ac37144e15190df64fe62801 (diff) | |
Fix Cortex-M0 Cannot Execute Reboot
Signed-off-by: xiaofan <[email protected]>
| -rw-r--r-- | libcpu/arm/cortex-m0/cpuport.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/libcpu/arm/cortex-m0/cpuport.c b/libcpu/arm/cortex-m0/cpuport.c index 5d36fa11fe..19aec42230 100644 --- a/libcpu/arm/cortex-m0/cpuport.c +++ b/libcpu/arm/cortex-m0/cpuport.c @@ -119,7 +119,7 @@ void rt_hw_hard_fault_exception(struct exception_stack_frame *contex) #define SCB_HFSR (*(volatile const unsigned *)0xE000ED2C) /* HardFault Status Register */ #define SCB_MMAR (*(volatile const unsigned *)0xE000ED34) /* MemManage Fault Address register */ #define SCB_BFAR (*(volatile const unsigned *)0xE000ED38) /* Bus Fault Address Register */ -#define SCB_AIRCR (*(volatile unsigned long *)0xE000ED00) /* Reset control Address Register */ +#define SCB_AIRCR (*(volatile unsigned long *)0xE000ED0C) /* Reset control Address Register */ #define SCB_RESET_VALUE 0x05FA0004 /* Reset value, write to SCB_AIRCR can reset cpu */ #define SCB_CFSR_MFSR (*(volatile const unsigned char*)0xE000ED28) /* Memory-management Fault Status Register */ |