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authorBernard Xiong <[email protected]>2014-08-19 10:48:49 +0800
committerBernard Xiong <[email protected]>2014-08-19 10:48:49 +0800
commita55fd4b9c18df1fe97c6c8093b786f2fcb55f3be (patch)
tree1f25b5e12b3a21f5f1c206a0a64ac0c3d84ebf7e
parentee824bddfdbde4ce231dc0a63081ffdde0c68f1b (diff)
parent11fb9060e010d23899e73c46f6d1e237060a3c43 (diff)
Merge pull request #314 from grissiom/ls1b
Ls1b
-rw-r--r--bsp/ls1bdev/applications/startup.c56
-rw-r--r--bsp/ls1bdev/drivers/board.c42
-rw-r--r--bsp/ls1bdev/drivers/uart.c11
-rw-r--r--libcpu/mips/loongson_1b/interrupt.c159
4 files changed, 137 insertions, 131 deletions
diff --git a/bsp/ls1bdev/applications/startup.c b/bsp/ls1bdev/applications/startup.c
index befa929d30..bfd8214027 100644
--- a/bsp/ls1bdev/applications/startup.c
+++ b/bsp/ls1bdev/applications/startup.c
@@ -38,49 +38,49 @@ extern void irq_exception(void);
*/
void rtthread_startup(void)
{
- /* disable interrupt first */
- rt_hw_interrupt_disable();
+ /* disable interrupt first */
+ rt_hw_interrupt_disable();
- /* init cache */
- rt_hw_cache_init();
- /* init hardware interrupt */
- rt_hw_interrupt_init();
+ /* init cache */
+ rt_hw_cache_init();
+ /* init hardware interrupt */
+ rt_hw_interrupt_init();
- /* copy vector */
- memcpy((void *)A_K0BASE, tlb_refill_exception, 0x20);
- memcpy((void *)(A_K0BASE + 0x180), general_exception, 0x20);
- memcpy((void *)(A_K0BASE + 0x200), irq_exception, 0x20);
+ /* copy vector */
+ rt_memcpy((void *)A_K0BASE, tlb_refill_exception, 0x20);
+ rt_memcpy((void *)(A_K0BASE + 0x180), general_exception, 0x20);
+ rt_memcpy((void *)(A_K0BASE + 0x200), irq_exception, 0x20);
- /* init board */
- rt_hw_board_init();
+ /* init board */
+ rt_hw_board_init();
- /* show version */
- rt_show_version();
+ /* show version */
+ rt_show_version();
#ifdef RT_USING_HEAP
- rt_system_heap_init((void*)&__bss_end, (void*)RT_HW_HEAP_END);
+ rt_system_heap_init((void*)&__bss_end, (void*)RT_HW_HEAP_END);
#endif
- /* init scheduler system */
- rt_system_scheduler_init();
-
- /* init application */
- rt_application_init();
+ /* init scheduler system */
+ rt_system_scheduler_init();
/* initialize timer */
rt_system_timer_init();
- /* initialize timer thread */
- rt_system_timer_thread_init();
+ /* initialize timer thread */
+ rt_system_timer_thread_init();
+
+ /* init idle thread */
+ rt_thread_idle_init();
- /* init idle thread */
- rt_thread_idle_init();
+ /* init application */
+ rt_application_init();
- /* start scheduler */
- rt_system_scheduler_start();
+ /* start scheduler */
+ rt_system_scheduler_start();
- /* never reach here */
- return ;
+ /* never reach here */
+ return;
}
/*@}*/
diff --git a/bsp/ls1bdev/drivers/board.c b/bsp/ls1bdev/drivers/board.c
index 06a985cf1b..307d8d28b0 100644
--- a/bsp/ls1bdev/drivers/board.c
+++ b/bsp/ls1bdev/drivers/board.c
@@ -71,6 +71,23 @@ void rt_hw_board_init(void)
rt_kprintf("current sr: 0x%08x\n", read_c0_status());
}
+#define __raw_out_put(unr) \
+ while (*ptr) \
+ { \
+ if (*ptr == '\n') \
+ { \
+ /* FIFO status, contain valid data */ \
+ while (!(UART_LSR(UART##unr##_BASE) & (UARTLSR_TE | UARTLSR_TFE))); \
+ /* write data */ \
+ UART_DAT(UART##unr##_BASE) = '\r'; \
+ } \
+ /* FIFO status, contain valid data */ \
+ while (!(UART_LSR(UART##unr##_BASE) & (UARTLSR_TE | UARTLSR_TFE))); \
+ /* write data */ \
+ UART_DAT(UART##unr##_BASE) = *ptr; \
+ ptr ++; \
+ }
+
/* UART line status register value */
#define UARTLSR_ERROR (1 << 7)
#define UARTLSR_TE (1 << 6)
@@ -82,24 +99,13 @@ void rt_hw_board_init(void)
#define UARTLSR_DR (1 << 0)
void rt_hw_console_output(const char *ptr)
{
- /* stream mode */
- while (*ptr)
- {
- if (*ptr == '\n')
- {
- /* FIFO status, contain valid data */
- while (!(UART_LSR(UART0_BASE) & (UARTLSR_TE | UARTLSR_TFE)));
- /* write data */
- UART_DAT(UART0_BASE) = '\r';
- }
-
- /* FIFO status, contain valid data */
- while (!(UART_LSR(UART0_BASE) & (UARTLSR_TE | UARTLSR_TFE)));
- /* write data */
- UART_DAT(UART0_BASE) = *ptr;
-
- ptr ++;
- }
+#if defined(RT_USING_UART0)
+ __raw_out_put(0);
+#elif defined(RT_USING_UART1)
+ __raw_out_put(1);
+#elif defined(RT_USING_UART3)
+ __raw_out_put(3);
+#endif
}
/*@}*/
diff --git a/bsp/ls1bdev/drivers/uart.c b/bsp/ls1bdev/drivers/uart.c
index 4e897391fb..c4ddb581e6 100644
--- a/bsp/ls1bdev/drivers/uart.c
+++ b/bsp/ls1bdev/drivers/uart.c
@@ -249,13 +249,16 @@ void rt_hw_uart_init(void)
uart->parent.type = RT_Device_Class_Char;
rt_memset(uart->rx_buffer, 0, sizeof(uart->rx_buffer));
uart->read_index = uart->save_index = 0;
-
+
#if defined(RT_USING_UART0)
uart->hw_base = UART0_BASE;
uart->irq = LS1B_UART0_IRQ;
#elif defined(RT_USING_UART1)
uart->hw_base = UART1_BASE;
uart->irq = LS1B_UART1_IRQ;
+#elif defined(RT_USING_UART3)
+ uart->hw_base = UART3_BASE;
+ uart->irq = LS1B_UART3_IRQ;
#endif
/* device interface */
@@ -267,9 +270,9 @@ void rt_hw_uart_init(void)
uart->parent.control = RT_NULL;
uart->parent.user_data = RT_NULL;
- rt_device_register(&uart->parent, "uart0",
- RT_DEVICE_FLAG_RDWR |
- RT_DEVICE_FLAG_STREAM |
+ rt_device_register(&uart->parent, "uart0",
+ RT_DEVICE_FLAG_RDWR |
+ RT_DEVICE_FLAG_STREAM |
RT_DEVICE_FLAG_INT_RX);
}
#endif /* end of UART */
diff --git a/libcpu/mips/loongson_1b/interrupt.c b/libcpu/mips/loongson_1b/interrupt.c
index c5b4bad038..be65da914c 100644
--- a/libcpu/mips/loongson_1b/interrupt.c
+++ b/libcpu/mips/loongson_1b/interrupt.c
@@ -30,7 +30,7 @@ void rt_interrupt_dispatch(void *ptreg);
void rt_hw_timer_handler();
static struct ls1b_intc_regs volatile *ls1b_hw0_icregs
- = (struct ls1b_intc_regs volatile *)(LS1B_INTREG_BASE);
+= (struct ls1b_intc_regs volatile *)(LS1B_INTREG_BASE);
/**
* @addtogroup Loongson LS1B
@@ -40,7 +40,7 @@ static struct ls1b_intc_regs volatile *ls1b_hw0_icregs
static void rt_hw_interrupt_handler(int vector, void *param)
{
- rt_kprintf("Unhandled interrupt %d occured!!!\n", vector);
+ rt_kprintf("Unhandled interrupt %d occured!!!\n", vector);
}
/**
@@ -48,26 +48,26 @@ static void rt_hw_interrupt_handler(int vector, void *param)
*/
void rt_hw_interrupt_init(void)
{
- rt_int32_t idx;
+ rt_int32_t idx;
- /* pci active low */
- ls1b_hw0_icregs->int_pol = -1; //must be done here 20110802 lgnq
- /* make all interrupts level triggered */
- (ls1b_hw0_icregs+0)->int_edge = 0x0000e000;
- /* mask all interrupts */
- (ls1b_hw0_icregs+0)->int_clr = 0xffffffff;
+ /* pci active low */
+ ls1b_hw0_icregs->int_pol = -1; //must be done here 20110802 lgnq
+ /* make all interrupts level triggered */
+ (ls1b_hw0_icregs+0)->int_edge = 0x0000e000;
+ /* mask all interrupts */
+ (ls1b_hw0_icregs+0)->int_clr = 0xffffffff;
rt_memset(irq_handle_table, 0x00, sizeof(irq_handle_table));
- for (idx = 0; idx < MAX_INTR; idx ++)
- {
- irq_handle_table[idx].handler = rt_hw_interrupt_handler;
- }
+ for (idx = 0; idx < MAX_INTR; idx ++)
+ {
+ irq_handle_table[idx].handler = rt_hw_interrupt_handler;
+ }
- /* init interrupt nest, and context in thread sp */
- rt_interrupt_nest = 0;
- rt_interrupt_from_thread = 0;
- rt_interrupt_to_thread = 0;
- rt_thread_switch_interrupt_flag = 0;
+ /* init interrupt nest, and context in thread sp */
+ rt_interrupt_nest = 0;
+ rt_interrupt_from_thread = 0;
+ rt_interrupt_to_thread = 0;
+ rt_thread_switch_interrupt_flag = 0;
}
/**
@@ -76,8 +76,8 @@ void rt_hw_interrupt_init(void)
*/
void rt_hw_interrupt_mask(int vector)
{
- /* mask interrupt */
- (ls1b_hw0_icregs+(vector>>5))->int_en &= ~(1 << (vector&0x1f));
+ /* mask interrupt */
+ (ls1b_hw0_icregs+(vector>>5))->int_en &= ~(1 << (vector&0x1f));
}
/**
@@ -86,7 +86,7 @@ void rt_hw_interrupt_mask(int vector)
*/
void rt_hw_interrupt_umask(int vector)
{
- (ls1b_hw0_icregs+(vector>>5))->int_en |= (1 << (vector&0x1f));
+ (ls1b_hw0_icregs+(vector>>5))->int_en |= (1 << (vector&0x1f));
}
/**
@@ -96,22 +96,19 @@ void rt_hw_interrupt_umask(int vector)
* @param old_handler the old interrupt service routine
*/
rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
- void *param, char *name)
+ void *param, char *name)
{
rt_isr_handler_t old_handler = RT_NULL;
- if (vector >= 0 && vector < MAX_INTR)
- {
+ if (vector >= 0 && vector < MAX_INTR)
+ {
old_handler = irq_handle_table[vector].handler;
- if (handler != RT_NULL)
- {
#ifdef RT_USING_INTERRUPT_INFO
- rt_strncpy(irq_handle_table[vector].name, name, RT_NAME_MAX);
+ rt_strncpy(irq_handle_table[vector].name, name, RT_NAME_MAX);
#endif /* RT_USING_INTERRUPT_INFO */
- irq_handle_table[vector].handler = handler;
- irq_handle_table[vector].param = param;
- }
+ irq_handle_table[vector].handler = handler;
+ irq_handle_table[vector].param = param;
}
return old_handler;
@@ -121,71 +118,71 @@ void rt_interrupt_dispatch(void *ptreg)
{
int irq;
void *param;
- rt_isr_handler_t irq_func;
- static rt_uint32_t status = 0;
- rt_uint32_t c0_status;
- rt_uint32_t c0_cause;
- volatile rt_uint32_t cause_im;
- volatile rt_uint32_t status_im;
- rt_uint32_t pending_im;
+ rt_isr_handler_t irq_func;
+ static rt_uint32_t status = 0;
+ rt_uint32_t c0_status;
+ rt_uint32_t c0_cause;
+ volatile rt_uint32_t cause_im;
+ volatile rt_uint32_t status_im;
+ rt_uint32_t pending_im;
- /* check os timer */
- c0_status = read_c0_status();
- c0_cause = read_c0_cause();
+ /* check os timer */
+ c0_status = read_c0_status();
+ c0_cause = read_c0_cause();
- cause_im = c0_cause & ST0_IM;
- status_im = c0_status & ST0_IM;
- pending_im = cause_im & status_im;
+ cause_im = c0_cause & ST0_IM;
+ status_im = c0_status & ST0_IM;
+ pending_im = cause_im & status_im;
- if (pending_im & CAUSEF_IP7)
- {
- rt_hw_timer_handler();
- }
+ if (pending_im & CAUSEF_IP7)
+ {
+ rt_hw_timer_handler();
+ }
- if (pending_im & CAUSEF_IP2)
- {
- /* the hardware interrupt */
- status = ls1b_hw0_icregs->int_isr;
- if (!status)
- return;
+ if (pending_im & CAUSEF_IP2)
+ {
+ /* the hardware interrupt */
+ status = ls1b_hw0_icregs->int_isr;
+ if (!status)
+ return;
- for (irq = MAX_INTR; irq > 0; --irq)
- {
- if ((status & (1 << irq)))
- {
- status &= ~(1 << irq);
+ for (irq = MAX_INTR; irq > 0; --irq)
+ {
+ if ((status & (1 << irq)))
+ {
+ status &= ~(1 << irq);
irq_func = irq_handle_table[irq].handler;
param = irq_handle_table[irq].param;
- /* do interrupt */
- (*irq_func)(irq, param);
+ /* do interrupt */
+ irq_func(irq, param);
#ifdef RT_USING_INTERRUPT_INFO
irq_handle_table[irq].counter++;
#endif /* RT_USING_INTERRUPT_INFO */
- /* ack interrupt */
- ls1b_hw0_icregs->int_clr |= (1 << irq);
- }
- }
- }
- else if (pending_im & CAUSEF_IP3)
- {
- rt_kprintf("%s %d\r\n", __FUNCTION__, __LINE__);
- }
- else if (pending_im & CAUSEF_IP4)
- {
- rt_kprintf("%s %d\r\n", __FUNCTION__, __LINE__);
- }
- else if (pending_im & CAUSEF_IP5)
- {
- rt_kprintf("%s %d\r\n", __FUNCTION__, __LINE__);
- }
- else if (pending_im & CAUSEF_IP6)
- {
- rt_kprintf("%s %d\r\n", __FUNCTION__, __LINE__);
- }
+ /* ack interrupt */
+ ls1b_hw0_icregs->int_clr |= (1 << irq);
+ }
+ }
+ }
+ else if (pending_im & CAUSEF_IP3)
+ {
+ rt_kprintf("%s %d\r\n", __FUNCTION__, __LINE__);
+ }
+ else if (pending_im & CAUSEF_IP4)
+ {
+ rt_kprintf("%s %d\r\n", __FUNCTION__, __LINE__);
+ }
+ else if (pending_im & CAUSEF_IP5)
+ {
+ rt_kprintf("%s %d\r\n", __FUNCTION__, __LINE__);
+ }
+ else if (pending_im & CAUSEF_IP6)
+ {
+ rt_kprintf("%s %d\r\n", __FUNCTION__, __LINE__);
+ }
}
/*@}*/