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authorBernard Xiong <[email protected]>2019-04-22 19:25:14 +0800
committerGitHub <[email protected]>2019-04-22 19:25:14 +0800
commitb4028cf1a8acd4c2535dbab076497a9ff848d7d1 (patch)
tree371248a8d03b5f51a16d8fb0fb79fabcf6947009
parenta641540936a8cc79d99dbb6340667336f72a6309 (diff)
parent07ec9ec64c4301ed73debb7b2c86f7552b81bb6c (diff)
Merge pull request #2597 from willianchanlovegithub/469
[BSP][STM32][F469-DISCO]Add lcd drivers
-rw-r--r--bsp/stm32/stm32f469-st-disco/.config59
-rw-r--r--bsp/stm32/stm32f469-st-disco/applications/SConscript1
-rw-r--r--bsp/stm32/stm32f469-st-disco/applications/lcd_init.c28
-rw-r--r--bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/.mxproject8
-rw-r--r--bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/CubeMX_Config.ioc196
-rw-r--r--bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/Inc/stm32f4xx_hal_conf.h6
-rw-r--r--bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/Middlewares/ST/STM32_Audio/Addons/PDM/Inc/pdm2pcm_glo.h97
-rw-r--r--bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/Src/main.c253
-rw-r--r--bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/Src/stm32f4xx_hal_msp.c132
-rw-r--r--bsp/stm32/stm32f469-st-disco/board/Kconfig14
-rw-r--r--bsp/stm32/stm32f469-st-disco/board/SConscript3
-rw-r--r--bsp/stm32/stm32f469-st-disco/board/board.c15
-rw-r--r--bsp/stm32/stm32f469-st-disco/board/ports/drv_lcd_otm8009a.c525
-rw-r--r--bsp/stm32/stm32f469-st-disco/board/ports/lcd_port.h23
-rw-r--r--bsp/stm32/stm32f469-st-disco/project.ewp37
-rw-r--r--bsp/stm32/stm32f469-st-disco/project.uvopt1006
-rw-r--r--bsp/stm32/stm32f469-st-disco/project.uvoptx218
-rw-r--r--bsp/stm32/stm32f469-st-disco/project.uvproj291
-rw-r--r--bsp/stm32/stm32f469-st-disco/project.uvprojx55
-rw-r--r--bsp/stm32/stm32f469-st-disco/rtconfig.h192
20 files changed, 1628 insertions, 1531 deletions
diff --git a/bsp/stm32/stm32f469-st-disco/.config b/bsp/stm32/stm32f469-st-disco/.config
index 89f389e7ca..4d96d4e112 100644
--- a/bsp/stm32/stm32f469-st-disco/.config
+++ b/bsp/stm32/stm32f469-st-disco/.config
@@ -14,15 +14,17 @@ CONFIG_RT_ALIGN_SIZE=4
CONFIG_RT_THREAD_PRIORITY_32=y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX=32
-CONFIG_RT_TICK_PER_SECOND=1000
+CONFIG_RT_TICK_PER_SECOND=100
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_USING_HOOK=y
CONFIG_RT_USING_IDLE_HOOK=y
CONFIG_RT_IDEL_HOOK_LIST_SIZE=4
CONFIG_IDLE_THREAD_STACK_SIZE=256
-# CONFIG_RT_USING_TIMER_SOFT is not set
+CONFIG_RT_USING_TIMER_SOFT=y
+CONFIG_RT_TIMER_THREAD_PRIO=4
+CONFIG_RT_TIMER_THREAD_STACK_SIZE=512
CONFIG_RT_DEBUG=y
-CONFIG_RT_DEBUG_COLOR=y
+# CONFIG_RT_DEBUG_COLOR is not set
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
@@ -99,7 +101,7 @@ CONFIG_FINSH_CMD_SIZE=80
# CONFIG_FINSH_USING_AUTH is not set
CONFIG_FINSH_USING_MSH=y
CONFIG_FINSH_USING_MSH_DEFAULT=y
-CONFIG_FINSH_USING_MSH_ONLY=y
+# CONFIG_FINSH_USING_MSH_ONLY is not set
CONFIG_FINSH_ARG_MAX=10
#
@@ -258,7 +260,6 @@ CONFIG_RT_USING_PIN=y
#
# CONFIG_PKG_USING_OPENMV is not set
# CONFIG_PKG_USING_MUPDF is not set
-# CONFIG_PKG_USING_STEMWIN is not set
#
# tools packages
@@ -288,12 +289,22 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_CMSIS is not set
# CONFIG_PKG_USING_DFS_YAFFS is not set
# CONFIG_PKG_USING_LITTLEFS is not set
-# CONFIG_PKG_USING_THREAD_POOL is not set
#
# peripheral libraries and drivers
#
-# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
+
+#
+# sensors drivers
+#
+# CONFIG_PKG_USING_LSM6DSL is not set
+# CONFIG_PKG_USING_LPS22HB is not set
+# CONFIG_PKG_USING_HTS221 is not set
+# CONFIG_PKG_USING_LSM303AGR is not set
+# CONFIG_PKG_USING_BME280 is not set
+# CONFIG_PKG_USING_BMA400 is not set
+# CONFIG_PKG_USING_BMI160_BMX160 is not set
+# CONFIG_PKG_USING_SPL0601 is not set
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_SHT2X is not set
# CONFIG_PKG_USING_AHT10 is not set
@@ -306,10 +317,7 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_PCF8574 is not set
# CONFIG_PKG_USING_SX12XX is not set
# CONFIG_PKG_USING_SIGNAL_LED is not set
-# CONFIG_PKG_USING_WM_LIBRARIES is not set
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
-# CONFIG_PKG_USING_INFRARED is not set
-# CONFIG_PKG_USING_ROSSERIAL is not set
#
# miscellaneous packages
@@ -335,35 +343,6 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
# CONFIG_PKG_USING_HELLO is not set
# CONFIG_PKG_USING_VI is not set
-# CONFIG_PKG_USING_NNOM is not set
-
-#
-# Privated Packages of RealThread
-#
-# CONFIG_PKG_USING_CODEC is not set
-# CONFIG_PKG_USING_PLAYER is not set
-# CONFIG_PKG_USING_MPLAYER is not set
-# CONFIG_PKG_USING_PERSIMMON_SRC is not set
-# CONFIG_PKG_USING_JS_PERSIMMON is not set
-# CONFIG_PKG_USING_JERRYSCRIPT_WIN32 is not set
-
-#
-# Network Utilities
-#
-# CONFIG_PKG_USING_WICED is not set
-# CONFIG_PKG_USING_CLOUDSDK is not set
-# CONFIG_PKG_USING_COREMARK is not set
-# CONFIG_PKG_USING_POWER_MANAGER is not set
-# CONFIG_PKG_USING_RT_OTA is not set
-# CONFIG_PKG_USING_RDBD_SRC is not set
-# CONFIG_PKG_USING_RTINSIGHT is not set
-# CONFIG_PKG_USING_SMARTCONFIG is not set
-# CONFIG_PKG_USING_RTX is not set
-# CONFIG_RT_USING_TESTCASE is not set
-# CONFIG_PKG_USING_NGHTTP2 is not set
-# CONFIG_PKG_USING_AVS is not set
-# CONFIG_PKG_USING_STS is not set
-# CONFIG_PKG_USING_DLMS is not set
CONFIG_SOC_FAMILY_STM32=y
CONFIG_SOC_SERIES_STM32F4=y
@@ -376,6 +355,7 @@ CONFIG_SOC_STM32F469NI=y
# Onboard Peripheral Drivers
#
# CONFIG_BSP_USING_SDRAM is not set
+# CONFIG_BSP_USING_LCD_OTM8009A is not set
# CONFIG_BSP_USING_QSPI_FLASH is not set
#
@@ -389,6 +369,7 @@ CONFIG_BSP_USING_UART3=y
# CONFIG_BSP_USING_ON_CHIP_FLASH is not set
# CONFIG_BSP_USING_FMC is not set
# CONFIG_BSP_USING_USBD_FS is not set
+# CONFIG_BSP_USING_LTDC is not set
#
# Board extended module Drivers
diff --git a/bsp/stm32/stm32f469-st-disco/applications/SConscript b/bsp/stm32/stm32f469-st-disco/applications/SConscript
index c25223940b..f5ed01d2ce 100644
--- a/bsp/stm32/stm32f469-st-disco/applications/SConscript
+++ b/bsp/stm32/stm32f469-st-disco/applications/SConscript
@@ -5,6 +5,7 @@ cwd = GetCurrentDir()
CPPPATH = [cwd]
src = Split("""
main.c
+lcd_init.c
""")
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
diff --git a/bsp/stm32/stm32f469-st-disco/applications/lcd_init.c b/bsp/stm32/stm32f469-st-disco/applications/lcd_init.c
new file mode 100644
index 0000000000..277a754ae6
--- /dev/null
+++ b/bsp/stm32/stm32f469-st-disco/applications/lcd_init.c
@@ -0,0 +1,28 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2018-06-12 Tanek first version
+ */
+
+#include <rtthread.h>
+
+#if defined(PKG_USING_GUIENGINE)
+
+#include <rtgui/driver.h>
+int lcd_init(void)
+{
+ struct rt_device *device;
+ device = rt_device_find("lcd");
+ if (device)
+ {
+ rtgui_graphic_set_device(device);
+ }
+
+ return 0;
+}
+INIT_ENV_EXPORT(lcd_init);
+#endif
diff --git a/bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/.mxproject b/bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/.mxproject
index 6f279698a9..4877dbe795 100644
--- a/bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/.mxproject
+++ b/bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/.mxproject
@@ -1,13 +1,13 @@
[PreviousGenFiles]
-HeaderPath=D:/Work_RT-Thread/GitHub/rt-thread/bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/Inc
+HeaderPath=D:/Work_RT-Thread/My_GitHub/rt-thread/bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/Inc
HeaderFiles=stm32f4xx_it.h;stm32f4xx_hal_conf.h;main.h;pdm2pcm.h;
-SourcePath=D:/Work_RT-Thread/GitHub/rt-thread/bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/Src
+SourcePath=D:/Work_RT-Thread/My_GitHub/rt-thread/bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/Src
SourceFiles=stm32f4xx_it.c;stm32f4xx_hal_msp.c;main.c;pdm2pcm.c;
[PreviousLibFiles]
-LibFiles=Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2s.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2s_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_qspi.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h;Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h;Middlewares/ST/STM32_Audio/Addons/PDM/Inc/pdm2pcm_glo.h;Middlewares/ST/STM32_Audio/Addons/PDM/Lib/libPDMFilter_CM4_Keil_wc16.lib;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2s.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2s_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_qspi.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2s.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2s_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_qspi.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h;Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h;Middlewares/ST/STM32_Audio/Addons/PDM/Inc/pdm2pcm_glo.h;Middlewares/ST/STM32_Audio/Addons/PDM/Lib/libPDMFilter_CM4_Keil_wc16.lib;Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f469xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h;
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ortex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h;Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h;Middlewares/ST/STM32_Audio/Addons/PDM/Inc/pdm2pcm_glo.h;Middlewares/ST/STM32_Audio/Addons/PDM/Lib/libPDMFilter_CM4_Keil_wc16.lib;Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f469xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h;
[PreviousUsedKeilFiles]
-SourceFiles=..\Src\main.c;..\Src\pdm2pcm.c;..\Src\stm32f4xx_it.c;..\Src\stm32f4xx_hal_msp.c;../Middlewares/ST/STM32_Audio/Addons/PDM/Lib/libPDMFilter_CM4_Keil_wc16.lib;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2s.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2s_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_qspi.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c;../Middlewares/ST/STM32_Audio/Addons/PDM/Lib/libPDMFilter_CM4_Keil_wc16.lib;../\Src/system_stm32f4xx.c;../Middlewares/ST/STM32_Audio/Addons/PDM/Lib/libPDMFilter_CM4_Keil_wc16.lib;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2s.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2s_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_qspi.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c;../Middlewares/ST/STM32_Audio/Addons/PDM/Lib/libPDMFilter_CM4_Keil_wc16.lib;../\Src/system_stm32f4xx.c;../Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c;null;../Middlewares/ST/STM32_Audio/Addons/PDM/Lib/libPDMFilter_CM4_Keil_wc16.lib;
+SourceFiles=..\Src\main.c;..\Src\pdm2pcm.c;..\Src\stm32f4xx_it.c;..\Src\stm32f4xx_hal_msp.c;../Middlewares/ST/STM32_Audio/Addons/PDM/Lib/libPDMFilter_CM4_Keil_wc16.lib;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dsi.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2s.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2s_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_qspi.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c;../Middlewares/ST/STM32_Audio/Addons/PDM/Lib/libPDMFilter_CM4_Keil_wc16.lib;../\Src/system_stm32f4xx.c;../Middlewares/ST/STM32_Audio/Addons/PDM/Lib/libPDMFilter_CM4_Keil_wc16.lib;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dsi.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2s.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2s_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_qspi.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c;../Middlewares/ST/STM32_Audio/Addons/PDM/Lib/libPDMFilter_CM4_Keil_wc16.lib;../\Src/system_stm32f4xx.c;../Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c;null;../Middlewares/ST/STM32_Audio/Addons/PDM/Lib/libPDMFilter_CM4_Keil_wc16.lib;
HeaderPath=..\Drivers\STM32F4xx_HAL_Driver\Inc;..\Drivers\STM32F4xx_HAL_Driver\Inc\Legacy;..\Middlewares\ST\STM32_Audio\Addons\PDM\Inc;..\Drivers\CMSIS\Device\ST\STM32F4xx\Include;..\Drivers\CMSIS\Include;..\Inc;
diff --git a/bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/CubeMX_Config.ioc b/bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/CubeMX_Config.ioc
index 3e25b8f2fc..afc40f437f 100644
--- a/bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/CubeMX_Config.ioc
+++ b/bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/CubeMX_Config.ioc
@@ -1,4 +1,16 @@
#MicroXplorer Configuration settings - do not modify
+DSIHOST_CKN.Mode=DSIHost_Video
+DSIHOST_CKN.Signal=DSIHOST_CKN
+DSIHOST_CKP.Mode=DSIHost_Video
+DSIHOST_CKP.Signal=DSIHOST_CKP
+DSIHOST_D0N.Mode=DSIHost_Video
+DSIHOST_D0N.Signal=DSIHOST_D0N
+DSIHOST_D0P.Mode=DSIHost_Video
+DSIHOST_D0P.Signal=DSIHOST_D0P
+DSIHOST_D1N.Mode=DSIHost_Video
+DSIHOST_D1N.Signal=DSIHOST_D1N
+DSIHOST_D1P.Mode=DSIHost_Video
+DSIHOST_D1P.Signal=DSIHOST_D1P
FMC.CASLatency1=FMC_SDRAM_CAS_LATENCY_3
FMC.ExitSelfRefreshDelay1=7
FMC.IPParameters=CASLatency1,ReadBurst1,ReadBurst2,SDClockPeriod1,SDClockPeriod2,LoadToActiveDelay1,ExitSelfRefreshDelay1,SelfRefreshTime1,RowCycleDelay1,RowCycleDelay2,WriteRecoveryTime1,RPDelay1,RPDelay2,RCDDelay1
@@ -16,29 +28,32 @@ FMC.SelfRefreshTime1=4
FMC.WriteRecoveryTime1=3
File.Version=6
I2S3.AudioFreq=I2S_AUDIOFREQ_16K
-I2S3.ErrorAudioFreq=0.0 %
+I2S3.ErrorAudioFreq=-0.26 %
I2S3.FullDuplexMode=I2S_FULLDUPLEXMODE_DISABLE
I2S3.IPParameters=Instance,VirtualMode,FullDuplexMode,RealAudioFreq,ErrorAudioFreq,AudioFreq,Standard,Mode
I2S3.Instance=SPI$Index
I2S3.Mode=I2S_MODE_MASTER_RX
-I2S3.RealAudioFreq=16.0 KHz
+I2S3.RealAudioFreq=15.957 KHz
I2S3.Standard=I2S_STANDARD_LSB
I2S3.VirtualMode=I2S_MODE_MASTER
KeepUserPlacement=false
Mcu.Family=STM32F4
Mcu.IP0=CRC
-Mcu.IP1=FMC
-Mcu.IP10=USART3
-Mcu.IP11=USB_OTG_FS
-Mcu.IP2=GFXSIMULATOR
-Mcu.IP3=I2S3
-Mcu.IP4=NVIC
-Mcu.IP5=PDM2PCM
-Mcu.IP6=QUADSPI
-Mcu.IP7=RCC
-Mcu.IP8=SYS
-Mcu.IP9=TIM4
-Mcu.IPNb=12
+Mcu.IP1=DMA2D
+Mcu.IP10=RCC
+Mcu.IP11=SYS
+Mcu.IP12=TIM4
+Mcu.IP13=USART3
+Mcu.IP14=USB_OTG_FS
+Mcu.IP2=DSIHOST
+Mcu.IP3=FMC
+Mcu.IP4=GFXSIMULATOR
+Mcu.IP5=I2S3
+Mcu.IP6=LTDC
+Mcu.IP7=NVIC
+Mcu.IP8=PDM2PCM
+Mcu.IP9=QUADSPI
+Mcu.IPNb=15
Mcu.Name=STM32F469NIHx
Mcu.Package=TFBGA216
Mcu.Pin0=PE1
@@ -65,64 +80,72 @@ Mcu.Pin27=PH14
Mcu.Pin28=PI0
Mcu.Pin29=PC15/OSC32_OUT
Mcu.Pin3=PA15
-Mcu.Pin30=PH0/OSC_IN
-Mcu.Pin31=PF2
-Mcu.Pin32=PH1/OSC_OUT
-Mcu.Pin33=PF3
-Mcu.Pin34=PG8
-Mcu.Pin35=PF4
-Mcu.Pin36=PH3
-Mcu.Pin37=PF7
-Mcu.Pin38=PF6
-Mcu.Pin39=PF5
+Mcu.Pin30=DSIHOST_D1P
+Mcu.Pin31=DSIHOST_D1N
+Mcu.Pin32=PH0/OSC_IN
+Mcu.Pin33=PF2
+Mcu.Pin34=PH1/OSC_OUT
+Mcu.Pin35=PF3
+Mcu.Pin36=DSIHOST_CKP
+Mcu.Pin37=DSIHOST_CKN
+Mcu.Pin38=PG8
+Mcu.Pin39=PF4
Mcu.Pin4=PA14
-Mcu.Pin40=PH2
-Mcu.Pin41=PD15
-Mcu.Pin42=PD10
-Mcu.Pin43=PF10
-Mcu.Pin44=PF9
-Mcu.Pin45=PF8
-Mcu.Pin46=PD14
-Mcu.Pin47=PD9
-Mcu.Pin48=PD8
-Mcu.Pin49=PC0
+Mcu.Pin40=PH3
+Mcu.Pin41=DSIHOST_D0P
+Mcu.Pin42=DSIHOST_D0N
+Mcu.Pin43=PF7
+Mcu.Pin44=PF6
+Mcu.Pin45=PF5
+Mcu.Pin46=PH2
+Mcu.Pin47=PD15
+Mcu.Pin48=PD10
+Mcu.Pin49=PF10
Mcu.Pin5=PA13
-Mcu.Pin50=PF12
-Mcu.Pin51=PG1
-Mcu.Pin52=PF15
-Mcu.Pin53=PD12
-Mcu.Pin54=PD13
-Mcu.Pin55=PH12
-Mcu.Pin56=PF13
-Mcu.Pin57=PG0
-Mcu.Pin58=PE8
-Mcu.Pin59=PG5
+Mcu.Pin50=PF9
+Mcu.Pin51=PF8
+Mcu.Pin52=PD14
+Mcu.Pin53=PD9
+Mcu.Pin54=PD8
+Mcu.Pin55=PC0
+Mcu.Pin56=PF12
+Mcu.Pin57=PG1
+Mcu.Pin58=PF15
+Mcu.Pin59=PD12
Mcu.Pin6=PB6
-Mcu.Pin60=PG4
-Mcu.Pin61=PH9
-Mcu.Pin62=PH11
-Mcu.Pin63=PF14
-Mcu.Pin64=PF11
-Mcu.Pin65=PE9
-Mcu.Pin66=PE11
-Mcu.Pin67=PE14
-Mcu.Pin68=PB10
-Mcu.Pin69=PH8
+Mcu.Pin60=PD13
+Mcu.Pin61=PH12
+Mcu.Pin62=PF13
+Mcu.Pin63=PG0
+Mcu.Pin64=PE8
+Mcu.Pin65=PG5
+Mcu.Pin66=PG4
+Mcu.Pin67=PH9
+Mcu.Pin68=PH11
+Mcu.Pin69=PF14
Mcu.Pin7=PG15
-Mcu.Pin70=PH10
-Mcu.Pin71=PE7
-Mcu.Pin72=PE10
-Mcu.Pin73=PE12
-Mcu.Pin74=PE15
-Mcu.Pin75=PE13
-Mcu.Pin76=PB11
-Mcu.Pin77=VP_CRC_VS_CRC
-Mcu.Pin78=VP_PDM2PCM_VS_PDM2PCM
-Mcu.Pin79=VP_SYS_VS_Systick
+Mcu.Pin70=PF11
+Mcu.Pin71=PE9
+Mcu.Pin72=PE11
+Mcu.Pin73=PE14
+Mcu.Pin74=PB10
+Mcu.Pin75=PH8
+Mcu.Pin76=PH10
+Mcu.Pin77=PE7
+Mcu.Pin78=PE10
+Mcu.Pin79=PE12
Mcu.Pin8=PD6
-Mcu.Pin80=VP_TIM4_VS_ControllerModeClock
+Mcu.Pin80=PE15
+Mcu.Pin81=PE13
+Mcu.Pin82=PB11
+Mcu.Pin83=VP_CRC_VS_CRC
+Mcu.Pin84=VP_DMA2D_VS_DMA2D
+Mcu.Pin85=VP_LTDC_DSIMode
+Mcu.Pin86=VP_PDM2PCM_VS_PDM2PCM
+Mcu.Pin87=VP_SYS_VS_Systick
+Mcu.Pin88=VP_TIM4_VS_ControllerModeClock
Mcu.Pin9=PD0
-Mcu.PinsNb=81
+Mcu.PinsNb=89
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32F469NIHx
@@ -292,7 +315,7 @@ ProjectManager.StackSize=0x400
ProjectManager.TargetToolchain=MDK-ARM V5
ProjectManager.ToolChainLocation=
ProjectManager.UnderRoot=false
-ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_USART3_UART_Init-USART3-false-HAL-true,3-MX_FMC_Init-FMC-false-HAL-true,4-MX_QUADSPI_Init-QUADSPI-false-HAL-true,5-MX_GFXSIMULATOR_Init-GFXSIMULATOR-false-HAL-true,6-MX_CRC_Init-CRC-false-HAL-true,7-MX_I2S3_Init-I2S3-false-HAL-true,8-MX_TIM4_Init-TIM4-false-HAL-true,9-MX_PDM2PCM_Init-PDM2PCM-false-HAL-true,10-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-false-HAL-true,11-SystemClock_Config-RCC-false-HAL-false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_USART3_UART_Init-USART3-false-HAL-true,3-MX_FMC_Init-FMC-false-HAL-true,4-MX_QUADSPI_Init-QUADSPI-false-HAL-true,5-MX_GFXSIMULATOR_Init-GFXSIMULATOR-false-HAL-true,6-MX_CRC_Init-CRC-false-HAL-true,7-MX_I2S3_Init-I2S3-false-HAL-true,8-MX_TIM4_Init-TIM4-false-HAL-true,9-MX_PDM2PCM_Init-PDM2PCM-false-HAL-true,10-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-false-HAL-true,11-SystemClock_Config-RCC-false-HAL-false,12-MX_LTDC_Init-LTDC-false-HAL-true,13-MX_DMA2D_Init-DMA2D-false-HAL-true,14-MX_DSIHOST_DSI_Init-DSIHOST-false-HAL-true
QUADSPI.ChipSelectHighTime=QSPI_CS_HIGH_TIME_5_CYCLE
QUADSPI.ClockPrescaler=1
QUADSPI.FifoThreshold=4
@@ -307,29 +330,30 @@ RCC.APB2CLKDivider=RCC_HCLK_DIV2
RCC.APB2Freq_Value=90000000
RCC.APB2TimFreq_Value=180000000
RCC.CortexFreq_Value=180000000
-RCC.DSIFreq_Value=20000000
-RCC.DSITXEscFreq_Value=5000000
+RCC.DSIFreq_Value=32000000
+RCC.DSITXEscFreq_Value=8000000
RCC.EthernetFreq_Value=180000000
RCC.FCLKCortexFreq_Value=180000000
RCC.FamilyName=M
RCC.HCLKFreq_Value=180000000
RCC.HSE_VALUE=8000000
-RCC.I2SFreq_Value=192000000
-RCC.IPParameters=AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,DSIFreq_Value,DSITXEscFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,I2SFreq_Value,LCDTFTFreq_Value,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLDSIFreq_Value,PLLDSIVCOFreq_Value,PLLI2SQCLKFreq_Value,PLLI2SRCLKFreq_Value,PLLM,PLLN,PLLQ,PLLQCLKFreq_Value,PLLRCLKFreq_Value,PLLRFreq_Value,PLLSAIN,PLLSAIP,PLLSAIPCLKFreq_Value,PLLSAIQCLKFreq_Value,PLLSAIRCLKFreq_Value,PLLSourceVirtual,RTCFreq_Value,RTCHSEDivFreq_Value,SAIAFreq_Value,SAIBFreq_Value,SDIOFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,USBCLockSelection,USBFreq_Value,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAIOutputFreq_Value
+RCC.I2SFreq_Value=96000000
+RCC.IPParameters=AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,DSIFreq_Value,DSITXEscFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,I2SFreq_Value,LCDTFTFreq_Value,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLDSIFreq_Value,PLLDSINDIV,PLLDSIVCOFreq_Value,PLLI2SQCLKFreq_Value,PLLI2SRCLKFreq_Value,PLLM,PLLN,PLLQ,PLLQCLKFreq_Value,PLLR,PLLRCLKFreq_Value,PLLRFreq_Value,PLLSAIP,PLLSAIPCLKFreq_Value,PLLSAIQCLKFreq_Value,PLLSAIRCLKFreq_Value,PLLSourceVirtual,RTCFreq_Value,RTCHSEDivFreq_Value,SAIAFreq_Value,SAIBFreq_Value,SDIOFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,USBCLockSelection,USBFreq_Value,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAIOutputFreq_Value
RCC.LCDTFTFreq_Value=48000000
RCC.MCO2PinFreq_Value=180000000
RCC.PLLCLKFreq_Value=180000000
-RCC.PLLDSIFreq_Value=160000000
-RCC.PLLDSIVCOFreq_Value=320000000
-RCC.PLLI2SQCLKFreq_Value=96000000
-RCC.PLLI2SRCLKFreq_Value=192000000
-RCC.PLLM=4
-RCC.PLLN=180
-RCC.PLLQ=3
-RCC.PLLQCLKFreq_Value=120000000
-RCC.PLLRCLKFreq_Value=180000000
-RCC.PLLRFreq_Value=180000000
-RCC.PLLSAIN=96
+RCC.PLLDSIFreq_Value=256000000
+RCC.PLLDSINDIV=32
+RCC.PLLDSIVCOFreq_Value=512000000
+RCC.PLLI2SQCLKFreq_Value=48000000
+RCC.PLLI2SRCLKFreq_Value=96000000
+RCC.PLLM=8
+RCC.PLLN=360
+RCC.PLLQ=9
+RCC.PLLQCLKFreq_Value=40000000
+RCC.PLLR=6
+RCC.PLLRCLKFreq_Value=60000000
+RCC.PLLRFreq_Value=60000000
RCC.PLLSAIP=RCC_PLLSAIP_DIV4
RCC.PLLSAIPCLKFreq_Value=48000000
RCC.PLLSAIQCLKFreq_Value=48000000
@@ -344,8 +368,8 @@ RCC.SYSCLKFreq_VALUE=180000000
RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
RCC.USBCLockSelection=RCC_CLK48CLKSOURCE_PLLSAIP
RCC.USBFreq_Value=48000000
-RCC.VCOI2SOutputFreq_Value=384000000
-RCC.VCOInputFreq_Value=2000000
+RCC.VCOI2SOutputFreq_Value=192000000
+RCC.VCOInputFreq_Value=1000000
RCC.VCOOutputFreq_Value=360000000
RCC.VCOSAIOutputFreq_Value=192000000
SH.FMC_A0.0=FMC_A0,12b-sda1
@@ -472,6 +496,10 @@ USB_OTG_FS.IPParameters=VirtualMode
USB_OTG_FS.VirtualMode=Device_Only
VP_CRC_VS_CRC.Mode=CRC_Activate
VP_CRC_VS_CRC.Signal=CRC_VS_CRC
+VP_DMA2D_VS_DMA2D.Mode=DMA2D_Activate
+VP_DMA2D_VS_DMA2D.Signal=DMA2D_VS_DMA2D
+VP_LTDC_DSIMode.Mode=RGB888
+VP_LTDC_DSIMode.Signal=LTDC_DSIMode
VP_PDM2PCM_VS_PDM2PCM.Mode=PDM2PCM_Channel
VP_PDM2PCM_VS_PDM2PCM.Signal=PDM2PCM_VS_PDM2PCM
VP_SYS_VS_Systick.Mode=SysTick
diff --git a/bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/Inc/stm32f4xx_hal_conf.h b/bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/Inc/stm32f4xx_hal_conf.h
index d44543a961..89062b36eb 100644
--- a/bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/Inc/stm32f4xx_hal_conf.h
+++ b/bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/Inc/stm32f4xx_hal_conf.h
@@ -56,7 +56,7 @@
/* #define HAL_CRYP_MODULE_ENABLED */
/* #define HAL_DAC_MODULE_ENABLED */
/* #define HAL_DCMI_MODULE_ENABLED */
-/* #define HAL_DMA2D_MODULE_ENABLED */
+#define HAL_DMA2D_MODULE_ENABLED
/* #define HAL_ETH_MODULE_ENABLED */
/* #define HAL_NAND_MODULE_ENABLED */
/* #define HAL_NOR_MODULE_ENABLED */
@@ -67,7 +67,7 @@
/* #define HAL_I2C_MODULE_ENABLED */
#define HAL_I2S_MODULE_ENABLED
/* #define HAL_IWDG_MODULE_ENABLED */
-/* #define HAL_LTDC_MODULE_ENABLED */
+#define HAL_LTDC_MODULE_ENABLED
/* #define HAL_RNG_MODULE_ENABLED */
/* #define HAL_RTC_MODULE_ENABLED */
/* #define HAL_SAI_MODULE_ENABLED */
@@ -82,7 +82,7 @@
/* #define HAL_WWDG_MODULE_ENABLED */
#define HAL_PCD_MODULE_ENABLED
/* #define HAL_HCD_MODULE_ENABLED */
-/* #define HAL_DSI_MODULE_ENABLED */
+#define HAL_DSI_MODULE_ENABLED
/* #define HAL_QSPI_MODULE_ENABLED */
#define HAL_QSPI_MODULE_ENABLED
/* #define HAL_CEC_MODULE_ENABLED */
diff --git a/bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/Middlewares/ST/STM32_Audio/Addons/PDM/Inc/pdm2pcm_glo.h b/bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/Middlewares/ST/STM32_Audio/Addons/PDM/Inc/pdm2pcm_glo.h
deleted file mode 100644
index 5722cefb98..0000000000
--- a/bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/Middlewares/ST/STM32_Audio/Addons/PDM/Inc/pdm2pcm_glo.h
+++ /dev/null
@@ -1,97 +0,0 @@
-/**
- ******************************************************************************
- * @file pdm2pcm_glo.h
- * @author MCD Application Team
- * @version V3.0.0
- * @date 28-February-2017
- * @brief Global header for PDM2PCM conversion code
- ******************************************************************************
- * @attention
- *
- * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
- *
- * Licensed under MCD-ST Image SW License Agreement V2, (the "License");
- * You may not use this file except in compliance with the License.
- * You may obtain a copy of the License at:
- *
- * http://www.st.com/software_license_agreement_image_v2
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- *
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __PDM2PCM_FILTER_H
-#define __PDM2PCM_FILTER_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include <stdint.h>
-
-/* Exported constants --------------------------------------------------------*/
-#define PDM_FILTER_ENDIANNESS_LE ((uint16_t)0x0000)
-#define PDM_FILTER_ENDIANNESS_BE ((uint16_t)0x0001)
-
-#define PDM_FILTER_BIT_ORDER_LSB ((uint16_t)0x0000)
-#define PDM_FILTER_BIT_ORDER_MSB ((uint16_t)0x0001)
-
-#define PDM_FILTER_DEC_FACTOR_48 ((uint16_t)0x0001)
-#define PDM_FILTER_DEC_FACTOR_64 ((uint16_t)0x0002)
-#define PDM_FILTER_DEC_FACTOR_80 ((uint16_t)0x0003)
-#define PDM_FILTER_DEC_FACTOR_128 ((uint16_t)0x0004)
-#define PDM_FILTER_DEC_FACTOR_16 ((uint16_t)0x0005)
-#define PDM_FILTER_DEC_FACTOR_24 ((uint16_t)0x0006)
-#define PDM_FILTER_DEC_FACTOR_32 ((uint16_t)0x0007)
-
-#define PDM_FILTER_INIT_ERROR ((uint16_t)0x0010)
-#define PDM_FILTER_CONFIG_ERROR ((uint16_t)0x0020)
-#define PDM_FILTER_ENDIANNESS_ERROR ((uint16_t)0x0001)
-#define PDM_FILTER_BIT_ORDER_ERROR ((uint16_t)0x0002)
-#define PDM_FILTER_CRC_LOCK_ERROR ((uint16_t)0x0004)
-#define PDM_FILTER_DECIMATION_ERROR ((uint16_t)0x0008)
-#define PDM_FILTER_GAIN_ERROR ((uint16_t)0x0040)
-#define PDM_FILTER_SAMPLES_NUMBER_ERROR ((uint16_t)0x0080)
-#define PDM2PCM_INTERNAL_MEMORY_SIZE 16
-
-/* Exported types ------------------------------------------------------------*/
-typedef struct{
- uint16_t bit_order;
- uint16_t endianness;
- uint32_t high_pass_tap;
- uint16_t in_ptr_channels;
- uint16_t out_ptr_channels;
- uint32_t pInternalMemory[PDM2PCM_INTERNAL_MEMORY_SIZE];
-}PDM_Filter_Handler_t;
-
-typedef struct{
- uint16_t decimation_factor;
- uint16_t output_samples_number;
- int16_t mic_gain;
-}PDM_Filter_Config_t;
-
-/* Exported macros -----------------------------------------------------------*/
-
-/* Exported functions ------------------------------------------------------- */
-uint32_t PDM_Filter_Init(PDM_Filter_Handler_t *pHandler);
-uint32_t PDM_Filter_setConfig(PDM_Filter_Handler_t *pHandler, PDM_Filter_Config_t *pConfig);
-uint32_t PDM_Filter_getConfig(PDM_Filter_Handler_t *pHandler, PDM_Filter_Config_t *pConfig);
-uint32_t PDM_Filter_deInterleave(void *pDataIn, void *pDataOut, PDM_Filter_Handler_t * pHandler);
-uint32_t PDM_Filter(void *pDataIn, void *pDataOut, PDM_Filter_Handler_t *pHandler);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __PDM2PCM_FILTER_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/Src/main.c b/bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/Src/main.c
index 4bef0a95b2..0ae7ded650 100644
--- a/bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/Src/main.c
+++ b/bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/Src/main.c
@@ -45,8 +45,14 @@
/* Private variables ---------------------------------------------------------*/
CRC_HandleTypeDef hcrc;
+DMA2D_HandleTypeDef hdma2d;
+
+DSI_HandleTypeDef hdsi;
+
I2S_HandleTypeDef hi2s3;
+LTDC_HandleTypeDef hltdc;
+
QSPI_HandleTypeDef hqspi;
TIM_HandleTypeDef htim4;
@@ -72,6 +78,9 @@ static void MX_CRC_Init(void);
static void MX_I2S3_Init(void);
static void MX_TIM4_Init(void);
static void MX_USB_OTG_FS_PCD_Init(void);
+static void MX_LTDC_Init(void);
+static void MX_DMA2D_Init(void);
+static void MX_DSIHOST_DSI_Init(void);
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
@@ -118,6 +127,9 @@ int main(void)
MX_TIM4_Init();
MX_PDM2PCM_Init();
MX_USB_OTG_FS_PCD_Init();
+ MX_LTDC_Init();
+ MX_DMA2D_Init();
+ MX_DSIHOST_DSI_Init();
/* USER CODE BEGIN 2 */
/* USER CODE END 2 */
@@ -155,11 +167,11 @@ void SystemClock_Config(void)
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
- RCC_OscInitStruct.PLL.PLLM = 4;
- RCC_OscInitStruct.PLL.PLLN = 180;
+ RCC_OscInitStruct.PLL.PLLM = 8;
+ RCC_OscInitStruct.PLL.PLLN = 360;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
- RCC_OscInitStruct.PLL.PLLQ = 3;
- RCC_OscInitStruct.PLL.PLLR = 2;
+ RCC_OscInitStruct.PLL.PLLQ = 9;
+ RCC_OscInitStruct.PLL.PLLR = 6;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
@@ -183,11 +195,14 @@ void SystemClock_Config(void)
{
Error_Handler();
}
- PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_I2S|RCC_PERIPHCLK_CLK48;
+ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_I2S|RCC_PERIPHCLK_CLK48
+ |RCC_PERIPHCLK_LTDC;
PeriphClkInitStruct.PLLI2S.PLLI2SN = 192;
PeriphClkInitStruct.PLLI2S.PLLI2SR = 2;
- PeriphClkInitStruct.PLLSAI.PLLSAIN = 96;
+ PeriphClkInitStruct.PLLSAI.PLLSAIN = 192;
+ PeriphClkInitStruct.PLLSAI.PLLSAIR = 2;
PeriphClkInitStruct.PLLSAI.PLLSAIP = RCC_PLLSAIP_DIV4;
+ PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_2;
PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLSAIP;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{
@@ -223,6 +238,150 @@ static void MX_CRC_Init(void)
}
/**
+ * @brief DMA2D Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_DMA2D_Init(void)
+{
+
+ /* USER CODE BEGIN DMA2D_Init 0 */
+
+ /* USER CODE END DMA2D_Init 0 */
+
+ /* USER CODE BEGIN DMA2D_Init 1 */
+
+ /* USER CODE END DMA2D_Init 1 */
+ hdma2d.Instance = DMA2D;
+ hdma2d.Init.Mode = DMA2D_M2M;
+ hdma2d.Init.ColorMode = DMA2D_OUTPUT_ARGB8888;
+ hdma2d.Init.OutputOffset = 0;
+ hdma2d.LayerCfg[1].InputOffset = 0;
+ hdma2d.LayerCfg[1].InputColorMode = DMA2D_INPUT_ARGB8888;
+ hdma2d.LayerCfg[1].AlphaMode = DMA2D_NO_MODIF_ALPHA;
+ hdma2d.LayerCfg[1].InputAlpha = 0;
+ if (HAL_DMA2D_Init(&hdma2d) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ if (HAL_DMA2D_ConfigLayer(&hdma2d, 1) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN DMA2D_Init 2 */
+
+ /* USER CODE END DMA2D_Init 2 */
+
+}
+
+/**
+ * @brief DSIHOST Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_DSIHOST_DSI_Init(void)
+{
+
+ /* USER CODE BEGIN DSIHOST_Init 0 */
+
+ /* USER CODE END DSIHOST_Init 0 */
+
+ DSI_PLLInitTypeDef PLLInit = {0};
+ DSI_HOST_TimeoutTypeDef HostTimeouts = {0};
+ DSI_PHY_TimerTypeDef PhyTimings = {0};
+ DSI_VidCfgTypeDef VidCfg = {0};
+
+ /* USER CODE BEGIN DSIHOST_Init 1 */
+
+ /* USER CODE END DSIHOST_Init 1 */
+ hdsi.Instance = DSI;
+ hdsi.Init.AutomaticClockLaneControl = DSI_AUTO_CLK_LANE_CTRL_DISABLE;
+ hdsi.Init.TXEscapeCkdiv = 4;
+ hdsi.Init.NumberOfLanes = DSI_ONE_DATA_LANE;
+ PLLInit.PLLNDIV = 32;
+ PLLInit.PLLIDF = DSI_PLL_IN_DIV1;
+ PLLInit.PLLODF = DSI_PLL_OUT_DIV1;
+ if (HAL_DSI_Init(&hdsi, &PLLInit) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ HostTimeouts.TimeoutCkdiv = 1;
+ HostTimeouts.HighSpeedTransmissionTimeout = 0;
+ HostTimeouts.LowPowerReceptionTimeout = 0;
+ HostTimeouts.HighSpeedReadTimeout = 0;
+ HostTimeouts.LowPowerReadTimeout = 0;
+ HostTimeouts.HighSpeedWriteTimeout = 0;
+ HostTimeouts.HighSpeedWritePrespMode = DSI_HS_PM_DISABLE;
+ HostTimeouts.LowPowerWriteTimeout = 0;
+ HostTimeouts.BTATimeout = 0;
+ if (HAL_DSI_ConfigHostTimeouts(&hdsi, &HostTimeouts) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ PhyTimings.ClockLaneHS2LPTime = 20;
+ PhyTimings.ClockLaneLP2HSTime = 18;
+ PhyTimings.DataLaneHS2LPTime = 10;
+ PhyTimings.DataLaneLP2HSTime = 13;
+ PhyTimings.DataLaneMaxReadTime = 0;
+ PhyTimings.StopWaitTime = 0;
+ if (HAL_DSI_ConfigPhyTimer(&hdsi, &PhyTimings) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ if (HAL_DSI_ConfigFlowControl(&hdsi, DSI_FLOW_CONTROL_BTA) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ if (HAL_DSI_SetLowPowerRXFilter(&hdsi, 10000) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ if (HAL_DSI_ConfigErrorMonitor(&hdsi, HAL_DSI_ERROR_NONE) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ VidCfg.VirtualChannelID = 0;
+ VidCfg.ColorCoding = DSI_RGB888;
+ VidCfg.LooselyPacked = DSI_LOOSELY_PACKED_DISABLE;
+ VidCfg.Mode = DSI_VID_MODE_NB_PULSES;
+ VidCfg.PacketSize = 1;
+ VidCfg.NumberOfChunks = 640;
+ VidCfg.NullPacketSize = 0;
+ VidCfg.HSPolarity = DSI_HSYNC_ACTIVE_LOW;
+ VidCfg.VSPolarity = DSI_VSYNC_ACTIVE_LOW;
+ VidCfg.DEPolarity = DSI_DATA_ENABLE_ACTIVE_HIGH;
+ VidCfg.HorizontalSyncActive = 5;
+ VidCfg.HorizontalBackPorch = 5;
+ VidCfg.HorizontalLine = 441;
+ VidCfg.VerticalSyncActive = 4;
+ VidCfg.VerticalBackPorch = 2;
+ VidCfg.VerticalFrontPorch = 2;
+ VidCfg.VerticalActive = 480;
+ VidCfg.LPCommandEnable = DSI_LP_COMMAND_DISABLE;
+ VidCfg.LPLargestPacketSize = 0;
+ VidCfg.LPVACTLargestPacketSize = 0;
+ VidCfg.LPHorizontalFrontPorchEnable = DSI_LP_HFP_DISABLE;
+ VidCfg.LPHorizontalBackPorchEnable = DSI_LP_HBP_DISABLE;
+ VidCfg.LPVerticalActiveEnable = DSI_LP_VACT_DISABLE;
+ VidCfg.LPVerticalFrontPorchEnable = DSI_LP_VFP_DISABLE;
+ VidCfg.LPVerticalBackPorchEnable = DSI_LP_VBP_DISABLE;
+ VidCfg.LPVerticalSyncActiveEnable = DSI_LP_VSYNC_DISABLE;
+ VidCfg.FrameBTAAcknowledgeEnable = DSI_FBTAA_DISABLE;
+ if (HAL_DSI_ConfigVideoMode(&hdsi, &VidCfg) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ if (HAL_DSI_SetGenericVCID(&hdsi, 0) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN DSIHOST_Init 2 */
+
+ /* USER CODE END DSIHOST_Init 2 */
+
+}
+
+/**
* @brief GFXSIMULATOR Initialization Function
* @param None
* @retval None
@@ -278,6 +437,88 @@ static void MX_I2S3_Init(void)
}
/**
+ * @brief LTDC Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_LTDC_Init(void)
+{
+
+ /* USER CODE BEGIN LTDC_Init 0 */
+
+ /* USER CODE END LTDC_Init 0 */
+
+ LTDC_LayerCfgTypeDef pLayerCfg = {0};
+ LTDC_LayerCfgTypeDef pLayerCfg1 = {0};
+
+ /* USER CODE BEGIN LTDC_Init 1 */
+
+ /* USER CODE END LTDC_Init 1 */
+ hltdc.Instance = LTDC;
+ hltdc.Init.HSPolarity = LTDC_HSPOLARITY_AL;
+ hltdc.Init.VSPolarity = LTDC_VSPOLARITY_AL;
+ hltdc.Init.DEPolarity = LTDC_DEPOLARITY_AL;
+ hltdc.Init.PCPolarity = LTDC_PCPOLARITY_IPC;
+ hltdc.Init.HorizontalSync = 7;
+ hltdc.Init.VerticalSync = 3;
+ hltdc.Init.AccumulatedHBP = 14;
+ hltdc.Init.AccumulatedVBP = 5;
+ hltdc.Init.AccumulatedActiveW = 654;
+ hltdc.Init.AccumulatedActiveH = 485;
+ hltdc.Init.TotalWidth = 660;
+ hltdc.Init.TotalHeigh = 487;
+ hltdc.Init.Backcolor.Blue = 0;
+ hltdc.Init.Backcolor.Green = 0;
+ hltdc.Init.Backcolor.Red = 0;
+ if (HAL_LTDC_Init(&hltdc) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ pLayerCfg.WindowX0 = 0;
+ pLayerCfg.WindowX1 = 0;
+ pLayerCfg.WindowY0 = 0;
+ pLayerCfg.WindowY1 = 0;
+ pLayerCfg.PixelFormat = LTDC_PIXEL_FORMAT_ARGB8888;
+ pLayerCfg.Alpha = 0;
+ pLayerCfg.Alpha0 = 0;
+ pLayerCfg.BlendingFactor1 = LTDC_BLENDING_FACTOR1_CA;
+ pLayerCfg.BlendingFactor2 = LTDC_BLENDING_FACTOR2_CA;
+ pLayerCfg.FBStartAdress = 0;
+ pLayerCfg.ImageWidth = 0;
+ pLayerCfg.ImageHeight = 0;
+ pLayerCfg.Backcolor.Blue = 0;
+ pLayerCfg.Backcolor.Green = 0;
+ pLayerCfg.Backcolor.Red = 0;
+ if (HAL_LTDC_ConfigLayer(&hltdc, &pLayerCfg, 0) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ pLayerCfg1.WindowX0 = 0;
+ pLayerCfg1.WindowX1 = 0;
+ pLayerCfg1.WindowY0 = 0;
+ pLayerCfg1.WindowY1 = 0;
+ pLayerCfg1.PixelFormat = LTDC_PIXEL_FORMAT_ARGB8888;
+ pLayerCfg1.Alpha = 0;
+ pLayerCfg1.Alpha0 = 0;
+ pLayerCfg1.BlendingFactor1 = LTDC_BLENDING_FACTOR1_CA;
+ pLayerCfg1.BlendingFactor2 = LTDC_BLENDING_FACTOR2_CA;
+ pLayerCfg1.FBStartAdress = 0;
+ pLayerCfg1.ImageWidth = 0;
+ pLayerCfg1.ImageHeight = 0;
+ pLayerCfg1.Backcolor.Blue = 0;
+ pLayerCfg1.Backcolor.Green = 0;
+ pLayerCfg1.Backcolor.Red = 0;
+ if (HAL_LTDC_ConfigLayer(&hltdc, &pLayerCfg1, 1) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN LTDC_Init 2 */
+
+ /* USER CODE END LTDC_Init 2 */
+
+}
+
+/**
* @brief QUADSPI Initialization Function
* @param None
* @retval None
diff --git a/bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/Src/stm32f4xx_hal_msp.c b/bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/Src/stm32f4xx_hal_msp.c
index 27498017d8..d8c4d222f8 100644
--- a/bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/Src/stm32f4xx_hal_msp.c
+++ b/bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/Src/stm32f4xx_hal_msp.c
@@ -124,6 +124,94 @@ void HAL_CRC_MspDeInit(CRC_HandleTypeDef* hcrc)
}
/**
+* @brief DMA2D MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hdma2d: DMA2D handle pointer
+* @retval None
+*/
+void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d)
+{
+ if(hdma2d->Instance==DMA2D)
+ {
+ /* USER CODE BEGIN DMA2D_MspInit 0 */
+
+ /* USER CODE END DMA2D_MspInit 0 */
+ /* Peripheral clock enable */
+ __HAL_RCC_DMA2D_CLK_ENABLE();
+ /* USER CODE BEGIN DMA2D_MspInit 1 */
+
+ /* USER CODE END DMA2D_MspInit 1 */
+ }
+
+}
+
+/**
+* @brief DMA2D MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hdma2d: DMA2D handle pointer
+* @retval None
+*/
+void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d)
+{
+ if(hdma2d->Instance==DMA2D)
+ {
+ /* USER CODE BEGIN DMA2D_MspDeInit 0 */
+
+ /* USER CODE END DMA2D_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_DMA2D_CLK_DISABLE();
+ /* USER CODE BEGIN DMA2D_MspDeInit 1 */
+
+ /* USER CODE END DMA2D_MspDeInit 1 */
+ }
+
+}
+
+/**
+* @brief DSI MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hdsi: DSI handle pointer
+* @retval None
+*/
+void HAL_DSI_MspInit(DSI_HandleTypeDef* hdsi)
+{
+ if(hdsi->Instance==DSI)
+ {
+ /* USER CODE BEGIN DSI_MspInit 0 */
+
+ /* USER CODE END DSI_MspInit 0 */
+ /* Peripheral clock enable */
+ __HAL_RCC_DSI_CLK_ENABLE();
+ /* USER CODE BEGIN DSI_MspInit 1 */
+
+ /* USER CODE END DSI_MspInit 1 */
+ }
+
+}
+
+/**
+* @brief DSI MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hdsi: DSI handle pointer
+* @retval None
+*/
+void HAL_DSI_MspDeInit(DSI_HandleTypeDef* hdsi)
+{
+ if(hdsi->Instance==DSI)
+ {
+ /* USER CODE BEGIN DSI_MspDeInit 0 */
+
+ /* USER CODE END DSI_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_DSI_CLK_DISABLE();
+ /* USER CODE BEGIN DSI_MspDeInit 1 */
+
+ /* USER CODE END DSI_MspDeInit 1 */
+ }
+
+}
+
+/**
* @brief I2S MSP Initialization
* This function configures the hardware resources used in this example
* @param hi2s: I2S handle pointer
@@ -216,6 +304,50 @@ void HAL_I2S_MspDeInit(I2S_HandleTypeDef* hi2s)
}
/**
+* @brief LTDC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hltdc: LTDC handle pointer
+* @retval None
+*/
+void HAL_LTDC_MspInit(LTDC_HandleTypeDef* hltdc)
+{
+ if(hltdc->Instance==LTDC)
+ {
+ /* USER CODE BEGIN LTDC_MspInit 0 */
+
+ /* USER CODE END LTDC_MspInit 0 */
+ /* Peripheral clock enable */
+ __HAL_RCC_LTDC_CLK_ENABLE();
+ /* USER CODE BEGIN LTDC_MspInit 1 */
+
+ /* USER CODE END LTDC_MspInit 1 */
+ }
+
+}
+
+/**
+* @brief LTDC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hltdc: LTDC handle pointer
+* @retval None
+*/
+void HAL_LTDC_MspDeInit(LTDC_HandleTypeDef* hltdc)
+{
+ if(hltdc->Instance==LTDC)
+ {
+ /* USER CODE BEGIN LTDC_MspDeInit 0 */
+
+ /* USER CODE END LTDC_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_LTDC_CLK_DISABLE();
+ /* USER CODE BEGIN LTDC_MspDeInit 1 */
+
+ /* USER CODE END LTDC_MspDeInit 1 */
+ }
+
+}
+
+/**
* @brief QSPI MSP Initialization
* This function configures the hardware resources used in this example
* @param hqspi: QSPI handle pointer
diff --git a/bsp/stm32/stm32f469-st-disco/board/Kconfig b/bsp/stm32/stm32f469-st-disco/board/Kconfig
index 6cc3da51ac..3e5272eb8b 100644
--- a/bsp/stm32/stm32f469-st-disco/board/Kconfig
+++ b/bsp/stm32/stm32f469-st-disco/board/Kconfig
@@ -6,11 +6,17 @@ config SOC_STM32F469NI
default y
menu "Onboard Peripheral Drivers"
-
config BSP_USING_SDRAM
bool "Enable SDRAM"
select BSP_USING_FMC
default n
+
+ config BSP_USING_LCD_OTM8009A
+ bool "Enable LCD OTM8009A"
+ select BSP_USING_SDRAM
+ select BSP_USING_LTDC
+ default n
+
config BSP_USING_QSPI_FLASH
bool "Enable QSPI FLASH (N25Q128A qspi1)"
select BSP_USING_QSPI
@@ -19,6 +25,7 @@ menu "Onboard Peripheral Drivers"
select PKG_USING_FAL
select FAL_USING_SFUD_PORT
default n
+
config BSP_MOUNT_QSPI_WITH_LFS
bool "Mount QSPI flash to / with little fs"
depends on BSP_USING_QSPI_FLASH
@@ -29,7 +36,6 @@ menu "Onboard Peripheral Drivers"
endmenu
menu "On-chip Peripheral Drivers"
-
config BSP_USING_GPIO
bool "Enable GPIO"
select RT_USING_PIN
@@ -68,6 +74,10 @@ menu "On-chip Peripheral Drivers"
bool "Enable OTGFS as USB device"
select RT_USING_USB_DEVICE
default n
+
+ config BSP_USING_LTDC
+ bool "Enable LTDC"
+ default n
endmenu
menu "Board extended module Drivers"
diff --git a/bsp/stm32/stm32f469-st-disco/board/SConscript b/bsp/stm32/stm32f469-st-disco/board/SConscript
index 60308b3d5a..c3801987c2 100644
--- a/bsp/stm32/stm32f469-st-disco/board/SConscript
+++ b/bsp/stm32/stm32f469-st-disco/board/SConscript
@@ -17,6 +17,9 @@ if GetDepend(['BSP_USING_QSPI_FLASH']):
if GetDepend(['PKG_USING_FAL']):
src += Glob('ports/qspi_mnt.c')
+
+if GetDepend(['BSP_USING_LCD_OTM8009A']):
+ src += Glob('ports/drv_lcd_otm8009a.c')
path = [cwd]
path += [cwd + '/CubeMX_Config/Inc']
diff --git a/bsp/stm32/stm32f469-st-disco/board/board.c b/bsp/stm32/stm32f469-st-disco/board/board.c
index 5fedac0a1b..8c4c361dcc 100644
--- a/bsp/stm32/stm32f469-st-disco/board/board.c
+++ b/bsp/stm32/stm32f469-st-disco/board/board.c
@@ -27,11 +27,11 @@ void SystemClock_Config(void)
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
- RCC_OscInitStruct.PLL.PLLM = 4;
- RCC_OscInitStruct.PLL.PLLN = 180;
+ RCC_OscInitStruct.PLL.PLLM = 8;
+ RCC_OscInitStruct.PLL.PLLN = 360;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
- RCC_OscInitStruct.PLL.PLLQ = 3;
- RCC_OscInitStruct.PLL.PLLR = 2;
+ RCC_OscInitStruct.PLL.PLLQ = 9;
+ RCC_OscInitStruct.PLL.PLLR = 6;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
@@ -55,11 +55,14 @@ void SystemClock_Config(void)
{
Error_Handler();
}
- PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_I2S|RCC_PERIPHCLK_CLK48;
+ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_I2S|RCC_PERIPHCLK_CLK48
+ |RCC_PERIPHCLK_LTDC;
PeriphClkInitStruct.PLLI2S.PLLI2SN = 192;
PeriphClkInitStruct.PLLI2S.PLLI2SR = 2;
- PeriphClkInitStruct.PLLSAI.PLLSAIN = 96;
+ PeriphClkInitStruct.PLLSAI.PLLSAIN = 192;
+ PeriphClkInitStruct.PLLSAI.PLLSAIR = 2;
PeriphClkInitStruct.PLLSAI.PLLSAIP = RCC_PLLSAIP_DIV4;
+ PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_2;
PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLSAIP;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{
diff --git a/bsp/stm32/stm32f469-st-disco/board/ports/drv_lcd_otm8009a.c b/bsp/stm32/stm32f469-st-disco/board/ports/drv_lcd_otm8009a.c
new file mode 100644
index 0000000000..661042796f
--- /dev/null
+++ b/bsp/stm32/stm32f469-st-disco/board/ports/drv_lcd_otm8009a.c
@@ -0,0 +1,525 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2018-07-28 liu2guang the first version for STM32F469NI-Discovery.
+ * 2019-04-19 WillianChan porting STM32F469NI-Discovery lcd driver to
+ * the new STM32 BSP framework.
+ */
+
+#include <board.h>
+
+#ifdef BSP_USING_LCD_OTM8009A
+#include <lcd_port.h>
+
+struct stm32_lcd
+{
+ struct rt_device device;
+ struct rt_device_graphic_info info;
+
+ LTDC_HandleTypeDef ltdc;
+ DSI_HandleTypeDef dsi;
+ DSI_VidCfgTypeDef dsi_video;
+ DMA2D_HandleTypeDef dma2d;
+};
+static struct stm32_lcd lcd;
+
+#define LCD_WIDTH ((uint16_t)800)
+#define LCD_HEIGHT ((uint16_t)480)
+
+#define LCD_HSYNC ((uint16_t)1)
+#define LCD_HBP ((uint16_t)15)
+#define LCD_HFP ((uint16_t)16)
+#define LCD_VSYNC ((uint16_t)2)
+#define LCD_VBP ((uint16_t)34)
+#define LCD_VFP ((uint16_t)34)
+
+const rt_uint8_t RDL01[] = {0x80, 0x09, 0x01, 0xFF};
+const rt_uint8_t RDL02[] = {0x80, 0x09, 0xFF};
+const rt_uint8_t RDL03[] = {0x00, 0x09, 0x0F, 0x0E, 0x07, 0x10, 0x0B, 0x0A, 0x04, 0x07, 0x0B, 0x08, 0x0F, 0x10, 0x0A, 0x01, 0xE1};
+const rt_uint8_t RDL04[] = {0x00, 0x09, 0x0F, 0x0E, 0x07, 0x10, 0x0B, 0x0A, 0x04, 0x07, 0x0B, 0x08, 0x0F, 0x10, 0x0A, 0x01, 0xE2};
+const rt_uint8_t RDL05[] = {0x79, 0x79, 0xD8};
+const rt_uint8_t RDL06[] = {0x00, 0x01, 0xB3};
+const rt_uint8_t RDL07[] = {0x85, 0x01, 0x00, 0x84, 0x01, 0x00, 0xCE};
+const rt_uint8_t RDL08[] = {0x18, 0x04, 0x03, 0x39, 0x00, 0x00, 0x00, 0x18, 0x03, 0x03, 0x3A, 0x00, 0x00, 0x00, 0xCE};
+const rt_uint8_t RDL09[] = {0x18, 0x02, 0x03, 0x3B, 0x00, 0x00, 0x00, 0x18, 0x01, 0x03, 0x3C, 0x00, 0x00, 0x00, 0xCE};
+const rt_uint8_t RDL10[] = {0x01, 0x01, 0x20, 0x20, 0x00, 0x00, 0x01, 0x02, 0x00, 0x00, 0xCF};
+const rt_uint8_t RDL11[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xCB};
+const rt_uint8_t RDL12[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xCB};
+const rt_uint8_t RDL13[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xCB};
+const rt_uint8_t RDL14[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xCB};
+const rt_uint8_t RDL15[] = {0x00, 0x04, 0x04, 0x04, 0x04, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xCB};
+const rt_uint8_t RDL16[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x04, 0x04, 0x04, 0x04, 0x00, 0x00, 0x00, 0x00, 0xCB};
+const rt_uint8_t RDL17[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xCB};
+const rt_uint8_t RDL18[] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xCB};
+const rt_uint8_t RDL19[] = {0x00, 0x26, 0x09, 0x0B, 0x01, 0x25, 0x00, 0x00, 0x00, 0x00, 0xCC};
+const rt_uint8_t RDL20[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x26, 0x0A, 0x0C, 0x02, 0xCC};
+const rt_uint8_t RDL21[] = {0x25, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xCC};
+const rt_uint8_t RDL22[] = {0x00, 0x25, 0x0C, 0x0A, 0x02, 0x26, 0x00, 0x00, 0x00, 0x00, 0xCC};
+const rt_uint8_t RDL23[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x25, 0x0B, 0x09, 0x01, 0xCC};
+const rt_uint8_t RDL24[] = {0x26, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xCC};
+const rt_uint8_t RDL25[] = {0xFF, 0xFF, 0xFF, 0xFF};
+const rt_uint8_t RDL27[] = {0x00, 0x00, 0x03, 0x1F, 0x2A};
+const rt_uint8_t RDL28[] = {0x00, 0x00, 0x01, 0xDF, 0x2B};
+
+const rt_uint8_t RDS01[] = {0x00, 0x00};
+const rt_uint8_t RDS02[] = {0x00, 0x80};
+const rt_uint8_t RDS03[] = {0xC4, 0x30};
+const rt_uint8_t RDS04[] = {0x00, 0x8A};
+const rt_uint8_t RDS05[] = {0xC4, 0x40};
+const rt_uint8_t RDS06[] = {0x00, 0xB1};
+const rt_uint8_t RDS07[] = {0xC5, 0xA9};
+const rt_uint8_t RDS08[] = {0x00, 0x91};
+const rt_uint8_t RDS09[] = {0xC5, 0x34};
+const rt_uint8_t RDS10[] = {0x00, 0xB4};
+const rt_uint8_t RDS11[] = {0xC0, 0x50};
+const rt_uint8_t RDS12[] = {0xD9, 0x4E};
+const rt_uint8_t RDS13[] = {0x00, 0x81};
+const rt_uint8_t RDS14[] = {0xC1, 0x66};
+const rt_uint8_t RDS15[] = {0x00, 0xA1};
+const rt_uint8_t RDS16[] = {0xC1, 0x08};
+const rt_uint8_t RDS17[] = {0x00, 0x92};
+const rt_uint8_t RDS18[] = {0xC5, 0x01};
+const rt_uint8_t RDS19[] = {0x00, 0x95};
+const rt_uint8_t RDS20[] = {0x00, 0x94};
+const rt_uint8_t RDS21[] = {0xC5, 0x33};
+const rt_uint8_t RDS22[] = {0x00, 0xA3};
+const rt_uint8_t RDS23[] = {0xC0, 0x1B};
+const rt_uint8_t RDS24[] = {0x00, 0x82};
+const rt_uint8_t RDS25[] = {0xC5, 0x83};
+const rt_uint8_t RDS26[] = {0xC4, 0x83};
+const rt_uint8_t RDS27[] = {0xC1, 0x0E};
+const rt_uint8_t RDS28[] = {0x00, 0xA6};
+const rt_uint8_t RDS29[] = {0x00, 0xA0};
+const rt_uint8_t RDS30[] = {0x00, 0xB0};
+const rt_uint8_t RDS31[] = {0x00, 0xC0};
+const rt_uint8_t RDS32[] = {0x00, 0xD0};
+const rt_uint8_t RDS33[] = {0x00, 0x90};
+const rt_uint8_t RDS34[] = {0x00, 0xE0};
+const rt_uint8_t RDS35[] = {0x00, 0xF0};
+const rt_uint8_t RDS36[] = {0x11, 0x00};
+const rt_uint8_t RDS37[] = {0x3A, 0x55};
+const rt_uint8_t RDS38[] = {0x3A, 0x77};
+const rt_uint8_t RDS39[] = {0x36, 0x60};
+const rt_uint8_t RDS40[] = {0x51, 0x7F};
+const rt_uint8_t RDS41[] = {0x53, 0x2C};
+const rt_uint8_t RDS42[] = {0x55, 0x02};
+const rt_uint8_t RDS43[] = {0x5E, 0xFF};
+const rt_uint8_t RDS44[] = {0x29, 0x00};
+const rt_uint8_t RDS45[] = {0x2C, 0x00};
+const rt_uint8_t RDS46[] = {0xCF, 0x00};
+const rt_uint8_t RDS47[] = {0xC5, 0x66};
+const rt_uint8_t RDS48[] = {0x00, 0xB6};
+const rt_uint8_t RDS49[] = {0xF5, 0x06};
+const rt_uint8_t RDS50[] = {0x00, 0xB1};
+const rt_uint8_t RDS51[] = {0xC6, 0x06};
+
+static void otm8009a_reset(void)
+{
+ rt_pin_mode (GET_PIN(H, 7), PIN_MODE_OUTPUT);
+ rt_pin_write(GET_PIN(H, 7), PIN_LOW);
+ rt_thread_delay(rt_tick_from_millisecond(20));
+ rt_pin_write(GET_PIN(H, 7), PIN_HIGH);
+ rt_thread_delay(rt_tick_from_millisecond(20));
+}
+
+void otm8009a_write_cmd(uint8_t *p, uint32_t num)
+{
+ if (num <= 1)
+ {
+ HAL_DSI_ShortWrite(&(lcd.dsi), lcd.dsi_video.VirtualChannelID, DSI_DCS_SHORT_PKT_WRITE_P1, p[0], p[1]);
+ }
+ else
+ {
+ HAL_DSI_LongWrite(&(lcd.dsi), lcd.dsi_video.VirtualChannelID, DSI_DCS_LONG_PKT_WRITE, num, p[num], p);
+ }
+}
+
+void otm8009a_delay(uint32_t d)
+{
+ rt_thread_delay(rt_tick_from_millisecond(d));
+}
+
+static void otm8009a_config(rt_uint32_t pixel_format)
+{
+ otm8009a_write_cmd((rt_uint8_t *)RDS01, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDL01, 3);
+ otm8009a_write_cmd((rt_uint8_t *)RDS02, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDL02, 2);
+ otm8009a_write_cmd((rt_uint8_t *)RDS02, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS03, 0);
+ otm8009a_delay(10);
+
+ otm8009a_write_cmd((rt_uint8_t *)RDS04, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS05, 0);
+ otm8009a_delay(10);
+
+ otm8009a_write_cmd((rt_uint8_t *)RDS06, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS07, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS08, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS09, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS10, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS11, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS01, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS12, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS13, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS14, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS15, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS16, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS17, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS18, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS19, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS09, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS01, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDL05, 2);
+ otm8009a_write_cmd((rt_uint8_t *)RDS20, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS21, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS22, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS23, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS24, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS25, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS13, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS26, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS15, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS27, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS28, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDL06, 2);
+ otm8009a_write_cmd((rt_uint8_t *)RDS02, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDL07, 6);
+ otm8009a_write_cmd((rt_uint8_t *)RDS29, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDL08, 14);
+ otm8009a_write_cmd((rt_uint8_t *)RDS30, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDL09, 14);
+ otm8009a_write_cmd((rt_uint8_t *)RDS31, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDL10, 10);
+ otm8009a_write_cmd((rt_uint8_t *)RDS32, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS46, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS02, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDL11, 10);
+ otm8009a_write_cmd((rt_uint8_t *)RDS33, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDL12, 15);
+ otm8009a_write_cmd((rt_uint8_t *)RDS29, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDL13, 15);
+ otm8009a_write_cmd((rt_uint8_t *)RDS30, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDL14, 10);
+ otm8009a_write_cmd((rt_uint8_t *)RDS31, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDL15, 15);
+ otm8009a_write_cmd((rt_uint8_t *)RDS32, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDL16, 15);
+ otm8009a_write_cmd((rt_uint8_t *)RDS34, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDL17, 10);
+ otm8009a_write_cmd((rt_uint8_t *)RDS35, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDL18, 10);
+ otm8009a_write_cmd((rt_uint8_t *)RDS02, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDL19, 10);
+ otm8009a_write_cmd((rt_uint8_t *)RDS33, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDL20, 15);
+ otm8009a_write_cmd((rt_uint8_t *)RDS29, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDL21, 15);
+ otm8009a_write_cmd((rt_uint8_t *)RDS30, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDL22, 10);
+ otm8009a_write_cmd((rt_uint8_t *)RDS31, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDL23, 15);
+ otm8009a_write_cmd((rt_uint8_t *)RDS32, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDL24, 15);
+ otm8009a_write_cmd((rt_uint8_t *)RDS13, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS47, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS48, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS49, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS50, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS51, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS01, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDL25, 3);
+ otm8009a_write_cmd((rt_uint8_t *)RDS01, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS01, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDL03, 16);
+ otm8009a_write_cmd((rt_uint8_t *)RDS01, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDL04, 16);
+ otm8009a_write_cmd((rt_uint8_t *)RDS36, 0);
+ otm8009a_delay(120);
+
+ switch (pixel_format)
+ {
+ case RTGRAPHIC_PIXEL_FORMAT_RGB565:
+ otm8009a_write_cmd((rt_uint8_t *)RDS37, 0);
+ break;
+ case RTGRAPHIC_PIXEL_FORMAT_RGB888:
+ case RTGRAPHIC_PIXEL_FORMAT_ARGB888:
+ otm8009a_write_cmd((rt_uint8_t *)RDS38, 0);
+ break;
+ }
+
+ otm8009a_write_cmd((rt_uint8_t *)RDS39, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDL27, 4);
+ otm8009a_write_cmd((rt_uint8_t *)RDL28, 4);
+ otm8009a_write_cmd((rt_uint8_t *)RDS40, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS41, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS42, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS43, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS44, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS01, 0);
+ otm8009a_write_cmd((rt_uint8_t *)RDS45, 0);
+}
+
+rt_err_t otm8009a_init(void)
+{
+ uint32_t lcd_clock = 27429;
+ uint32_t lanebyte_clock = 62500;
+
+ uint32_t HSA = LCD_HSYNC, HFP = LCD_HFP, HBP = LCD_HBP, HACT = LCD_WIDTH;
+ uint32_t VSA = LCD_VSYNC, VFP = LCD_VFP, VBP = LCD_VBP, VACT = LCD_HEIGHT;
+
+ /* ��λOTM8009A��ʾ�� */
+ otm8009a_reset();
+
+ /* ��ʼ��STM32��ʾ��ʱ�� */
+ __HAL_RCC_LTDC_CLK_ENABLE();
+ __HAL_RCC_LTDC_FORCE_RESET();
+ __HAL_RCC_LTDC_RELEASE_RESET();
+
+ __HAL_RCC_DMA2D_CLK_ENABLE();
+ __HAL_RCC_DMA2D_FORCE_RESET();
+ __HAL_RCC_DMA2D_RELEASE_RESET();
+
+ __HAL_RCC_DSI_CLK_ENABLE();
+ __HAL_RCC_DSI_FORCE_RESET();
+ __HAL_RCC_DSI_RELEASE_RESET();
+
+ RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
+
+ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LTDC;
+ PeriphClkInitStruct.PLLSAI.PLLSAIN = 384;
+ PeriphClkInitStruct.PLLSAI.PLLSAIR = 7;
+ PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_2;
+ HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
+
+ /* ����NVIC */
+ HAL_NVIC_SetPriority(LTDC_IRQn, 3, 0);
+ HAL_NVIC_SetPriority(DMA2D_IRQn, 3, 0);
+ HAL_NVIC_SetPriority(DSI_IRQn, 3, 0);
+
+ HAL_NVIC_EnableIRQ(LTDC_IRQn);
+ HAL_NVIC_EnableIRQ(DMA2D_IRQn);
+ HAL_NVIC_EnableIRQ(DSI_IRQn);
+
+ /* ����DSI */
+ DSI_PLLInitTypeDef dsi_pll;
+
+ lcd.dsi.Instance = DSI;
+ lcd.dsi.Init.NumberOfLanes = DSI_TWO_DATA_LANES;
+ lcd.dsi.Init.TXEscapeCkdiv = lanebyte_clock / 15620;
+
+ dsi_pll.PLLNDIV = 125;
+ dsi_pll.PLLIDF = DSI_PLL_IN_DIV2;
+ dsi_pll.PLLODF = DSI_PLL_OUT_DIV1;
+
+ HAL_DSI_DeInit(&(lcd.dsi));
+ HAL_DSI_Init(&(lcd.dsi), &(dsi_pll));
+
+ /* ����DSI Video */
+ lcd.dsi_video.VirtualChannelID = 0;
+ lcd.dsi_video.ColorCoding = DSI_RGB888;
+ lcd.dsi_video.VSPolarity = DSI_VSYNC_ACTIVE_HIGH;
+ lcd.dsi_video.HSPolarity = DSI_HSYNC_ACTIVE_HIGH;
+ lcd.dsi_video.DEPolarity = DSI_DATA_ENABLE_ACTIVE_HIGH;
+ lcd.dsi_video.Mode = DSI_VID_MODE_BURST;
+ lcd.dsi_video.NullPacketSize = 0xFFF;
+ lcd.dsi_video.NumberOfChunks = 0;
+ lcd.dsi_video.PacketSize = HACT;
+ lcd.dsi_video.HorizontalSyncActive = (HSA * lanebyte_clock) / lcd_clock;
+ lcd.dsi_video.HorizontalBackPorch = (HBP * lanebyte_clock) / lcd_clock;
+ lcd.dsi_video.HorizontalLine = ((HACT + HSA + HBP + HFP) * lanebyte_clock) / lcd_clock;
+ lcd.dsi_video.VerticalSyncActive = VSA;
+ lcd.dsi_video.VerticalBackPorch = VBP;
+ lcd.dsi_video.VerticalFrontPorch = VFP;
+ lcd.dsi_video.VerticalActive = VACT;
+ lcd.dsi_video.LPCommandEnable = DSI_LP_COMMAND_ENABLE;
+ lcd.dsi_video.LPLargestPacketSize = 16;
+ lcd.dsi_video.LPVACTLargestPacketSize = 0;
+ lcd.dsi_video.LPHorizontalFrontPorchEnable = DSI_LP_HFP_ENABLE;
+ lcd.dsi_video.LPHorizontalBackPorchEnable = DSI_LP_HBP_ENABLE;
+ lcd.dsi_video.LPVerticalActiveEnable = DSI_LP_VACT_ENABLE;
+ lcd.dsi_video.LPVerticalFrontPorchEnable = DSI_LP_VFP_ENABLE;
+ lcd.dsi_video.LPVerticalBackPorchEnable = DSI_LP_VBP_ENABLE;
+ lcd.dsi_video.LPVerticalSyncActiveEnable = DSI_LP_VSYNC_ENABLE;
+ HAL_DSI_ConfigVideoMode(&(lcd.dsi), &(lcd.dsi_video));
+
+ /* ����DSI PHY */
+ DSI_PHY_TimerTypeDef dsi_phy;
+
+ dsi_phy.ClockLaneHS2LPTime = 35;
+ dsi_phy.ClockLaneLP2HSTime = 35;
+ dsi_phy.DataLaneHS2LPTime = 35;
+ dsi_phy.DataLaneLP2HSTime = 35;
+ dsi_phy.DataLaneMaxReadTime = 0;
+ dsi_phy.StopWaitTime = 10;
+ HAL_DSI_ConfigPhyTimer(&(lcd.dsi), &dsi_phy);
+
+ /* ����LTDC */
+ lcd.ltdc.Instance = LTDC;
+
+ lcd.ltdc.Init.PCPolarity = LTDC_PCPOLARITY_IPC;
+ lcd.ltdc.Init.HorizontalSync = (HSA - 1);
+ lcd.ltdc.Init.AccumulatedHBP = (HSA + HBP - 1);
+ lcd.ltdc.Init.AccumulatedActiveW = (LCD_WIDTH + HSA + HBP - 1);
+ lcd.ltdc.Init.TotalWidth = (LCD_WIDTH + HSA + HBP + HFP - 1);
+
+ lcd.ltdc.LayerCfg->ImageWidth = LCD_WIDTH;
+ lcd.ltdc.LayerCfg->ImageHeight = LCD_HEIGHT;
+ lcd.ltdc.Init.Backcolor.Blue = 0x00;
+ lcd.ltdc.Init.Backcolor.Green = 0x00;
+ lcd.ltdc.Init.Backcolor.Red = 0x00;
+ HAL_LTDCEx_StructInitFromVideoConfig(&(lcd.ltdc), &(lcd.dsi_video));
+ HAL_LTDC_Init(&(lcd.ltdc));
+
+ HAL_DSI_Start(&(lcd.dsi));
+
+ otm8009a_config(RTGRAPHIC_PIXEL_FORMAT_ARGB888);
+
+ return RT_EOK;
+}
+
+void otm8009a_layer_init(uint16_t index, uint32_t framebuffer)
+{
+ LTDC_LayerCfgTypeDef layer_cfg;
+
+ layer_cfg.WindowX0 = 0;
+ layer_cfg.WindowX1 = LCD_WIDTH;
+ layer_cfg.WindowY0 = 0;
+ layer_cfg.WindowY1 = LCD_HEIGHT;
+ layer_cfg.PixelFormat = LTDC_PIXEL_FORMAT_ARGB8888;
+ layer_cfg.BlendingFactor1 = LTDC_BLENDING_FACTOR1_PAxCA;
+ layer_cfg.BlendingFactor2 = LTDC_BLENDING_FACTOR2_PAxCA;
+ layer_cfg.Alpha = 255;
+ layer_cfg.Alpha0 = 0;
+ layer_cfg.ImageWidth = LCD_WIDTH;
+ layer_cfg.ImageHeight = LCD_HEIGHT;
+ layer_cfg.Backcolor.Blue = 0;
+ layer_cfg.Backcolor.Green = 0;
+ layer_cfg.Backcolor.Red = 0;
+ layer_cfg.FBStartAdress = framebuffer;
+
+ HAL_LTDC_ConfigLayer(&(lcd.ltdc), &layer_cfg, index);
+}
+
+static void otm8009a_display_on(void)
+{
+ HAL_DSI_ShortWrite(&(lcd.dsi), lcd.dsi_video.VirtualChannelID, DSI_DCS_SHORT_PKT_WRITE_P1, 0x29, 0x00);
+}
+
+static void otm8009a_display_off(void)
+{
+ HAL_DSI_ShortWrite(&(lcd.dsi), lcd.dsi_video.VirtualChannelID, DSI_DCS_SHORT_PKT_WRITE_P1, 0x28, 0x00);
+}
+
+void LTDC_IRQHandler(void)
+{
+ rt_interrupt_enter();
+ HAL_LTDC_IRQHandler(&(lcd.ltdc));
+ rt_interrupt_leave();
+}
+
+/* ���Դ���: ---------------------------------------- */
+static void lcd_fill_buffer(void *addr, uint32_t x_size, uint32_t y_size, uint32_t offset, uint32_t color)
+{
+ lcd.dma2d.Instance = DMA2D;
+
+ lcd.dma2d.Init.Mode = DMA2D_R2M;
+ lcd.dma2d.Init.ColorMode = DMA2D_ARGB8888;
+ lcd.dma2d.Init.OutputOffset = offset;
+
+ if (HAL_DMA2D_Init(&lcd.dma2d) == HAL_OK)
+ {
+ if (HAL_DMA2D_ConfigLayer(&lcd.dma2d, 0) == HAL_OK)
+ {
+ if (HAL_DMA2D_Start(&lcd.dma2d, color, (uint32_t)addr, x_size, y_size) == HAL_OK)
+ {
+ HAL_DMA2D_PollForTransfer(&lcd.dma2d, 10);
+ }
+ }
+ }
+}
+
+void lcd_clear(uint32_t color)
+{
+ /* Clear the LCD */
+ lcd_fill_buffer((uint32_t *)(lcd.ltdc.LayerCfg[0].FBStartAdress), LCD_WIDTH, LCD_HEIGHT, 0, color);
+}
+
+void lcd_fill_rect(uint16_t x_pos, uint16_t y_pos, uint16_t width, uint16_t height)
+{
+ uint32_t Xaddress = (lcd.ltdc.LayerCfg[0].FBStartAdress) + 4 * (LCD_WIDTH * x_pos + y_pos);
+ lcd_fill_buffer((uint32_t *)Xaddress, width, height, (LCD_WIDTH - width), 0xFF00FF00);
+}
+
+/* ���Դ��� ----------------------------------------- */
+
+static rt_err_t stm32_lcd_init(rt_device_t device)
+{
+ lcd.info.width = LCD_WIDTH;
+ lcd.info.height = LCD_HEIGHT;
+ lcd.info.pixel_format = RTGRAPHIC_PIXEL_FORMAT_ARGB888;
+ lcd.info.bits_per_pixel = 32;
+ lcd.info.framebuffer = (void *)rt_malloc_align(LCD_WIDTH * LCD_HEIGHT * (lcd.info.bits_per_pixel / 8), 32);
+ otm8009a_init();
+ otm8009a_layer_init(0, (uint32_t)lcd.info.framebuffer);
+ lcd_clear(0xFF000000);
+
+ return RT_EOK;
+}
+
+static rt_err_t stm32_lcd_control(rt_device_t device, int cmd, void *args)
+{
+ switch(cmd)
+ {
+ case RTGRAPHIC_CTRL_RECT_UPDATE:
+ break;
+
+ case RTGRAPHIC_CTRL_POWERON:
+ otm8009a_display_on();
+ break;
+
+ case RTGRAPHIC_CTRL_POWEROFF:
+ otm8009a_display_off();
+ break;
+
+ case RTGRAPHIC_CTRL_GET_INFO:
+ rt_memcpy(args, &lcd.info, sizeof(lcd.info));
+ break;
+
+ case RTGRAPHIC_CTRL_SET_MODE:
+ break;
+
+ case RTGRAPHIC_CTRL_GET_EXT:
+ break;
+ }
+
+ return RT_EOK;
+}
+
+int rt_hw_lcd_init(void)
+{
+ rt_err_t ret;
+
+ rt_memset(&lcd, 0x00, sizeof(lcd));
+
+ lcd.device.type = RT_Device_Class_Graphic;
+ lcd.device.init = stm32_lcd_init;
+ lcd.device.open = RT_NULL;
+ lcd.device.close = RT_NULL;
+ lcd.device.read = RT_NULL;
+ lcd.device.write = RT_NULL;
+ lcd.device.control = stm32_lcd_control;
+
+ lcd.device.user_data = (void *)&lcd.info;
+
+ ret = rt_device_register(&lcd.device, "lcd", RT_DEVICE_FLAG_RDWR);
+
+ return ret;
+}
+INIT_DEVICE_EXPORT(rt_hw_lcd_init);
+
+#endif /* BSP_USING_LCD_OTM8009A */
diff --git a/bsp/stm32/stm32f469-st-disco/board/ports/lcd_port.h b/bsp/stm32/stm32f469-st-disco/board/ports/lcd_port.h
new file mode 100644
index 0000000000..76df5528dc
--- /dev/null
+++ b/bsp/stm32/stm32f469-st-disco/board/ports/lcd_port.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2018-07-28 liu2guang the first version for STM32F469NI-Discovery.
+ */
+
+#ifndef __DRV_LCD_H_
+#define __DRV_LCD_H_
+
+#include <rtthread.h>
+#include <rtdevice.h>
+#include <board.h>
+
+rt_err_t otm8009a_init(void);
+void otm8009a_layer_init(uint16_t index, uint32_t framebuffer);
+void lcd_clear(uint32_t color);
+void lcd_fill_rect(uint16_t x_pos, uint16_t y_pos, uint16_t width, uint16_t height);
+
+#endif
diff --git a/bsp/stm32/stm32f469-st-disco/project.ewp b/bsp/stm32/stm32f469-st-disco/project.ewp
index 3f37575373..03017d11a6 100644
--- a/bsp/stm32/stm32f469-st-disco/project.ewp
+++ b/bsp/stm32/stm32f469-st-disco/project.ewp
@@ -346,6 +346,7 @@
<state>$PROJ_DIR$\..\..\..\components\finsh</state>
<state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state>
<state>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4</state>
+ <state>$PROJ_DIR$\board\ports</state>
<state>$PROJ_DIR$\..\..\..\components\drivers\include</state>
<state>$PROJ_DIR$\.</state>
<state>$PROJ_DIR$\applications</state>
@@ -1375,6 +1376,7 @@
<state>$PROJ_DIR$\..\..\..\components\finsh</state>
<state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state>
<state>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4</state>
+ <state>$PROJ_DIR$\board\ports</state>
<state>$PROJ_DIR$\..\..\..\components\drivers\include</state>
<state>$PROJ_DIR$\.</state>
<state>$PROJ_DIR$\applications</state>
@@ -2086,7 +2088,7 @@
<name>$PROJ_DIR$\..\..\..\src\kservice.c</name>
</file>
<file>
- <name>$PROJ_DIR$\..\..\..\src\mem.c</name>
+ <name>$PROJ_DIR$\..\..\..\src\memheap.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\src\mempool.c</name>
@@ -2112,6 +2114,9 @@
<file>
<name>$PROJ_DIR$\applications\main.c</name>
</file>
+ <file>
+ <name>$PROJ_DIR$\applications\lcd_init.c</name>
+ </file>
</group>
<group>
<name>Drivers</name>
@@ -2202,6 +2207,36 @@
<file>
<name>$PROJ_DIR$\..\..\..\components\finsh\msh_file.c</name>
</file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\finsh\finsh_compiler.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\finsh\finsh_error.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\finsh\finsh_heap.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\finsh\finsh_init.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\finsh\finsh_node.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\finsh\finsh_ops.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\finsh\finsh_parser.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\finsh\finsh_var.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\finsh\finsh_vm.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\finsh\finsh_token.c</name>
+ </file>
</group>
<group>
<name>STM32_HAL</name>
diff --git a/bsp/stm32/stm32f469-st-disco/project.uvopt b/bsp/stm32/stm32f469-st-disco/project.uvopt
index 739e2ceaf2..ed90c9e187 100644
--- a/bsp/stm32/stm32f469-st-disco/project.uvopt
+++ b/bsp/stm32/stm32f469-st-disco/project.uvopt
@@ -71,7 +71,7 @@
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
- <tvExp>1</tvExp>
+ <tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
@@ -96,10 +96,10 @@
<tRtrace>0</tRtrace>
<sRSysVw>1</sRSysVw>
<tRSysVw>1</tRSysVw>
- <tPdscDbg>1</tPdscDbg>
+ <tPdscDbg>0</tPdscDbg>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
- <nTsel>-1</nTsel>
+ <nTsel>11</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
@@ -164,1004 +164,4 @@
</TargetOption>
</Target>
- <Group>
- <GroupName>Kernel</GroupName>
- <tvExp>0</tvExp>
- <tvExpOptDlg>0</tvExpOptDlg>
- <cbSel>0</cbSel>
- <RteFlg>0</RteFlg>
- <File>
- <GroupNumber>1</GroupNumber>
- <FileNumber>1</FileNumber>
- <FileType>1</FileType>
- <tvExp>0</tvExp>
- <Focus>1</Focus>
- <ColumnNumber>9376076</ColumnNumber>
- <tvExpOptDlg>0</tvExpOptDlg>
- <TopLine>0</TopLine>
- <CurrentLine>5</CurrentLine>
- <bDave2>0</bDave2>
- <PathWithFileName>..\..\..\src\clock.c</PathWithFileName>
- <FilenameWithoutPath>clock.c</FilenameWithoutPath>
- <RteFlg>0</RteFlg>
- <bShared>0</bShared>
- </File>
- <File>
- <GroupNumber>1</GroupNumber>
- <FileNumber>2</FileNumber>
- <FileType>1</FileType>
- <tvExp>0</tvExp>
- <Focus>1</Focus>
- <ColumnNumber>9376076</ColumnNumber>
- <tvExpOptDlg>0</tvExpOptDlg>
- <TopLine>0</TopLine>
- <CurrentLine>5</CurrentLine>
- <bDave2>0</bDave2>
- <PathWithFileName>..\..\..\src\components.c</PathWithFileName>
- <FilenameWithoutPath>components.c</FilenameWithoutPath>
- <RteFlg>0</RteFlg>
- <bShared>0</bShared>
- </File>
- <File>
- <GroupNumber>1</GroupNumber>
- <FileNumber>3</FileNumber>
- <FileType>1</FileType>
- <tvExp>0</tvExp>
- <Focus>1</Focus>
- <ColumnNumber>9376076</ColumnNumber>
- <tvExpOptDlg>0</tvExpOptDlg>
- <TopLine>0</TopLine>
- <CurrentLine>5</CurrentLine>
- <bDave2>0</bDave2>
- <PathWithFileName>..\..\..\src\cpu.c</PathWithFileName>
- <FilenameWithoutPath>cpu.c</FilenameWithoutPath>
- <RteFlg>0</RteFlg>
- <bShared>0</bShared>
- </File>
- <File>
- <GroupNumber>1</GroupNumber>
- <FileNumber>4</FileNumber>
- <FileType>1</FileType>
- <tvExp>0</tvExp>
- <Focus>1</Focus>
- <ColumnNumber>9376076</ColumnNumber>
- <tvExpOptDlg>0</tvExpOptDlg>
- <TopLine>0</TopLine>
- <CurrentLine>5</CurrentLine>
- <bDave2>0</bDave2>
- <PathWithFileName>..\..\..\src\device.c</PathWithFileName>
- <FilenameWithoutPath>device.c</FilenameWithoutPath>
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+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\components\finsh\finsh_ops.c</PathWithFileName>
+ <FilenameWithoutPath>finsh_ops.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>6</GroupNumber>
+ <FileNumber>50</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\components\finsh\finsh_parser.c</PathWithFileName>
+ <FilenameWithoutPath>finsh_parser.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>6</GroupNumber>
+ <FileNumber>51</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\components\finsh\finsh_var.c</PathWithFileName>
+ <FilenameWithoutPath>finsh_var.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>6</GroupNumber>
+ <FileNumber>52</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\components\finsh\finsh_vm.c</PathWithFileName>
+ <FilenameWithoutPath>finsh_vm.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>6</GroupNumber>
+ <FileNumber>53</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <bDave2>0</bDave2>
+ <PathWithFileName>..\..\..\components\finsh\finsh_token.c</PathWithFileName>
+ <FilenameWithoutPath>finsh_token.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
</Group>
<Group>
@@ -746,7 +878,7 @@
<RteFlg>0</RteFlg>
<File>
<GroupNumber>7</GroupNumber>
- <FileNumber>43</FileNumber>
+ <FileNumber>54</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -758,7 +890,7 @@
</File>
<File>
<GroupNumber>7</GroupNumber>
- <FileNumber>44</FileNumber>
+ <FileNumber>55</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -770,7 +902,7 @@
</File>
<File>
<GroupNumber>7</GroupNumber>
- <FileNumber>45</FileNumber>
+ <FileNumber>56</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -782,7 +914,7 @@
</File>
<File>
<GroupNumber>7</GroupNumber>
- <FileNumber>46</FileNumber>
+ <FileNumber>57</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -794,7 +926,7 @@
</File>
<File>
<GroupNumber>7</GroupNumber>
- <FileNumber>47</FileNumber>
+ <FileNumber>58</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -806,7 +938,7 @@
</File>
<File>
<GroupNumber>7</GroupNumber>
- <FileNumber>48</FileNumber>
+ <FileNumber>59</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -818,7 +950,7 @@
</File>
<File>
<GroupNumber>7</GroupNumber>
- <FileNumber>49</FileNumber>
+ <FileNumber>60</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -830,7 +962,7 @@
</File>
<File>
<GroupNumber>7</GroupNumber>
- <FileNumber>50</FileNumber>
+ <FileNumber>61</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -842,7 +974,7 @@
</File>
<File>
<GroupNumber>7</GroupNumber>
- <FileNumber>51</FileNumber>
+ <FileNumber>62</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -854,7 +986,7 @@
</File>
<File>
<GroupNumber>7</GroupNumber>
- <FileNumber>52</FileNumber>
+ <FileNumber>63</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -866,7 +998,7 @@
</File>
<File>
<GroupNumber>7</GroupNumber>
- <FileNumber>53</FileNumber>
+ <FileNumber>64</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -878,7 +1010,7 @@
</File>
<File>
<GroupNumber>7</GroupNumber>
- <FileNumber>54</FileNumber>
+ <FileNumber>65</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -890,7 +1022,7 @@
</File>
<File>
<GroupNumber>7</GroupNumber>
- <FileNumber>55</FileNumber>
+ <FileNumber>66</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -902,7 +1034,7 @@
</File>
<File>
<GroupNumber>7</GroupNumber>
- <FileNumber>56</FileNumber>
+ <FileNumber>67</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -914,7 +1046,7 @@
</File>
<File>
<GroupNumber>7</GroupNumber>
- <FileNumber>57</FileNumber>
+ <FileNumber>68</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -926,7 +1058,7 @@
</File>
<File>
<GroupNumber>7</GroupNumber>
- <FileNumber>58</FileNumber>
+ <FileNumber>69</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -938,7 +1070,7 @@
</File>
<File>
<GroupNumber>7</GroupNumber>
- <FileNumber>59</FileNumber>
+ <FileNumber>70</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
diff --git a/bsp/stm32/stm32f469-st-disco/project.uvproj b/bsp/stm32/stm32f469-st-disco/project.uvproj
index e3f25c70e9..a2d91b54f3 100644
--- a/bsp/stm32/stm32f469-st-disco/project.uvproj
+++ b/bsp/stm32/stm32f469-st-disco/project.uvproj
@@ -1,10 +1,7 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
-
<SchemaVersion>1.1</SchemaVersion>
-
<Header>### uVision Project, (C) Keil Software</Header>
-
<Targets>
<Target>
<TargetName>rt-thread</TargetName>
@@ -15,26 +12,26 @@
<Device>STM32F407ZG</Device>
<Vendor>STMicroelectronics</Vendor>
<Cpu>IRAM(0x20000000-0x2001FFFF) IRAM2(0x10000000-0x1000FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(25000000) CPUTYPE("Cortex-M4") FPU2</Cpu>
- <FlashUtilSpec></FlashUtilSpec>
+ <FlashUtilSpec />
<StartupFile>"Startup\ST\STM32F4xx\startup_stm32f40_41xxx.s" ("STM32F40/41xxx Startup Code")</StartupFile>
<FlashDriverDll>UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000)</FlashDriverDll>
<DeviceId>6105</DeviceId>
<RegisterFile>stm32f4xx.h</RegisterFile>
- <MemoryEnv></MemoryEnv>
- <Cmp></Cmp>
- <Asm></Asm>
- <Linker></Linker>
- <OHString></OHString>
- <InfinionOptionDll></InfinionOptionDll>
+ <MemoryEnv />
+ <Cmp />
+ <Asm />
+ <Linker />
+ <OHString />
+ <InfinionOptionDll />
<SLE66CMisc>-DSTM32F40_41xxx</SLE66CMisc>
- <SLE66AMisc></SLE66AMisc>
- <SLE66LinkerMisc></SLE66LinkerMisc>
+ <SLE66AMisc />
+ <SLE66LinkerMisc />
<SFDFile>SFD\ST\STM32F4xx\STM32F40x.sfr</SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
- <BinPath></BinPath>
- <IncludePath></IncludePath>
- <LibPath></LibPath>
+ <BinPath />
+ <IncludePath />
+ <LibPath />
<RegisterFilePath>ST\STM32F4xx\</RegisterFilePath>
<DBRegisterFilePath>ST\STM32F4xx\</DBRegisterFilePath>
<TargetStatus>
@@ -58,8 +55,8 @@
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name></UserProg1Name>
- <UserProg2Name></UserProg2Name>
+ <UserProg1Name />
+ <UserProg2Name />
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
@@ -68,8 +65,8 @@
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
- <UserProg1Name></UserProg1Name>
- <UserProg2Name></UserProg2Name>
+ <UserProg1Name />
+ <UserProg2Name />
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
</BeforeMake>
@@ -77,12 +74,12 @@
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name>
- <UserProg2Name></UserProg2Name>
+ <UserProg2Name />
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
- <SVCSIdString></SVCSIdString>
+ <SVCSIdString />
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
@@ -96,8 +93,8 @@
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
- <CustomArgument></CustomArgument>
- <IncludeLibraryModules></IncludeLibraryModules>
+ <CustomArgument />
+ <IncludeLibraryModules />
<ComprImg>1</ComprImg>
</CommonProperty>
<DllOption>
@@ -141,23 +138,23 @@
<RestoreToolbox>1</RestoreToolbox>
<RestoreTracepoints>0</RestoreTracepoints>
<RestoreSysVw>1</RestoreSysVw>
- <UsePdscDebugDescription>1</UsePdscDebugDescription>
+ <UsePdscDebugDescription>0</UsePdscDebugDescription>
</Target>
<RunDebugAfterBuild>0</RunDebugAfterBuild>
- <TargetSelection>-1</TargetSelection>
+ <TargetSelection>11</TargetSelection>
<SimDlls>
- <CpuDll></CpuDll>
- <CpuDllArguments></CpuDllArguments>
- <PeripheralDll></PeripheralDll>
- <PeripheralDllArguments></PeripheralDllArguments>
- <InitializationFile></InitializationFile>
+ <CpuDll />
+ <CpuDllArguments />
+ <PeripheralDll />
+ <PeripheralDllArguments />
+ <InitializationFile />
</SimDlls>
<TargetDlls>
- <CpuDll></CpuDll>
- <CpuDllArguments></CpuDllArguments>
- <PeripheralDll></PeripheralDll>
- <PeripheralDllArguments></PeripheralDllArguments>
- <InitializationFile></InitializationFile>
+ <CpuDll />
+ <CpuDllArguments />
+ <PeripheralDll />
+ <PeripheralDllArguments />
+ <InitializationFile />
<Driver>STLink\ST-LINKIII-KEIL_SWO.dll</Driver>
</TargetDlls>
</DebugOption>
@@ -173,10 +170,10 @@
<bUseTDR>1</bUseTDR>
<Flash2>BIN\UL2CM3.DLL</Flash2>
<Flash3>"" ()</Flash3>
- <Flash4></Flash4>
- <pFcarmOut></pFcarmOut>
- <pFcarmGrp></pFcarmGrp>
- <pFcArmRoot></pFcArmRoot>
+ <Flash4 />
+ <pFcarmOut />
+ <pFcarmGrp />
+ <pFcArmRoot />
<FcArmLst>0</FcArmLst>
</Utilities>
<TargetArmAds>
@@ -209,7 +206,7 @@
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M4"</AdsCpuType>
- <RvctDeviceName></RvctDeviceName>
+ <RvctDeviceName />
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
@@ -340,7 +337,7 @@
<Size>0x10000</Size>
</OCR_RVCT10>
</OnChipMemories>
- <RvctStartVector></RvctStartVector>
+ <RvctStartVector />
</ArmAdsMisc>
<Cads>
<interw>1</interw>
@@ -359,10 +356,10 @@
<uC99>1</uC99>
<useXO>0</useXO>
<VariousControls>
- <MiscControls></MiscControls>
+ <MiscControls />
<Define>USE_HAL_DRIVER, STM32F469xx</Define>
- <Undefine></Undefine>
- <IncludePath>.;..\..\..\include;applications;.;board;board\CubeMX_Config\Inc;..\libraries\HAL_Drivers;..\libraries\HAL_Drivers\config;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\finsh;..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Inc;..\libraries\STM32F4xx_HAL\CMSIS\Device\ST\STM32F4xx\Include;..\libraries\STM32F4xx_HAL\CMSIS\Include</IncludePath>
+ <Undefine />
+ <IncludePath>.;..\..\..\include;applications;board;board\CubeMX_Config\Inc;board\ports;..\libraries\HAL_Drivers;..\libraries\HAL_Drivers\config;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\finsh;..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Inc;..\libraries\STM32F4xx_HAL\CMSIS\Device\ST\STM32F4xx\Include;..\libraries\STM32F4xx_HAL\CMSIS\Include</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -376,10 +373,10 @@
<uSurpInc>0</uSurpInc>
<useXO>0</useXO>
<VariousControls>
- <MiscControls></MiscControls>
- <Define></Define>
- <Undefine></Undefine>
- <IncludePath></IncludePath>
+ <MiscControls />
+ <Define />
+ <Undefine />
+ <IncludePath />
</VariousControls>
</Aads>
<LDads>
@@ -391,13 +388,13 @@
<useFile>0</useFile>
<TextAddressRange>0x08000000</TextAddressRange>
<DataAddressRange>0x20000000</DataAddressRange>
- <pXoBase></pXoBase>
+ <pXoBase />
<ScatterFile>.\board\linker_scripts\link.sct</ScatterFile>
- <IncludeLibs></IncludeLibs>
- <IncludeLibsPath></IncludeLibsPath>
- <Misc></Misc>
- <LinkerInputFile></LinkerInputFile>
- <DisabledWarnings></DisabledWarnings>
+ <IncludeLibs />
+ <IncludeLibsPath />
+ <Misc />
+ <LinkerInputFile />
+ <DisabledWarnings />
</LDads>
</TargetArmAds>
</TargetOption>
@@ -410,71 +407,99 @@
<FileType>1</FileType>
<FilePath>..\..\..\src\clock.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>components.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\components.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>cpu.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\cpu.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>device.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\device.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>idle.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\idle.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>ipc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\ipc.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>irq.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\irq.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>kservice.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\kservice.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
- <FileName>mem.c</FileName>
+ <FileName>memheap.c</FileName>
<FileType>1</FileType>
- <FilePath>..\..\..\src\mem.c</FilePath>
+ <FilePath>..\..\..\src\memheap.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>mempool.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\mempool.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>object.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\object.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>scheduler.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\scheduler.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>signal.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\signal.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>thread.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\thread.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>timer.c</FileName>
<FileType>1</FileType>
@@ -491,6 +516,13 @@
<FilePath>applications\main.c</FilePath>
</File>
</Files>
+ <Files>
+ <File>
+ <FileName>lcd_init.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>applications\lcd_init.c</FilePath>
+ </File>
+ </Files>
</Group>
<Group>
<GroupName>Drivers</GroupName>
@@ -500,26 +532,36 @@
<FileType>1</FileType>
<FilePath>board\board.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>stm32f4xx_hal_msp.c</FileName>
<FileType>1</FileType>
<FilePath>board\CubeMX_Config\Src\stm32f4xx_hal_msp.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>startup_stm32f469xx.s</FileName>
<FileType>2</FileType>
<FilePath>..\libraries\STM32F4xx_HAL\CMSIS\Device\ST\STM32F4xx\Source\Templates\arm\startup_stm32f469xx.s</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>drv_gpio.c</FileName>
<FileType>1</FileType>
<FilePath>..\libraries\HAL_Drivers\drv_gpio.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>drv_usart.c</FileName>
<FileType>1</FileType>
<FilePath>..\libraries\HAL_Drivers\drv_usart.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>drv_common.c</FileName>
<FileType>1</FileType>
@@ -535,21 +577,29 @@
<FileType>1</FileType>
<FilePath>..\..\..\libcpu\arm\common\backtrace.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>div0.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\libcpu\arm\common\div0.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>showmem.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\libcpu\arm\common\showmem.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>cpuport.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\libcpu\arm\cortex-m4\cpuport.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>context_rvds.S</FileName>
<FileType>2</FileType>
@@ -565,41 +615,57 @@
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\misc\pin.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>serial.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\serial\serial.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>completion.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\src\completion.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>dataqueue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\src\dataqueue.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>pipe.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\src\pipe.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>ringblk_buf.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\src\ringblk_buf.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>ringbuffer.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\src\ringbuffer.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>waitqueue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\src\waitqueue.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>workqueue.c</FileName>
<FileType>1</FileType>
@@ -615,32 +681,112 @@
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\shell.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>symbol.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\symbol.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>cmd.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\cmd.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>msh.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\msh.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>msh_cmd.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\msh_cmd.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>msh_file.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\msh_file.c</FilePath>
</File>
</Files>
+ <Files>
+ <File>
+ <FileName>finsh_compiler.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\components\finsh\finsh_compiler.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>finsh_error.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\components\finsh\finsh_error.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>finsh_heap.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\components\finsh\finsh_heap.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>finsh_init.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\components\finsh\finsh_init.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>finsh_node.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\components\finsh\finsh_node.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>finsh_ops.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\components\finsh\finsh_ops.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>finsh_parser.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\components\finsh\finsh_parser.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>finsh_var.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\components\finsh\finsh_var.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>finsh_vm.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\components\finsh\finsh_vm.c</FilePath>
+ </File>
+ </Files>
+ <Files>
+ <File>
+ <FileName>finsh_token.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\components\finsh\finsh_token.c</FilePath>
+ </File>
+ </Files>
</Group>
<Group>
<GroupName>STM32_HAL</GroupName>
@@ -650,81 +796,113 @@
<FileType>1</FileType>
<FilePath>..\libraries\STM32F4xx_HAL\CMSIS\Device\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>stm32f4xx_hal.c</FileName>
<FileType>1</FileType>
<FilePath>..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>stm32f4xx_hal_cec.c</FileName>
<FileType>1</FileType>
<FilePath>..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cec.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>stm32f4xx_hal_cortex.c</FileName>
<FileType>1</FileType>
<FilePath>..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>stm32f4xx_hal_crc.c</FileName>
<FileType>1</FileType>
<FilePath>..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_crc.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>stm32f4xx_hal_cryp.c</FileName>
<FileType>1</FileType>
<FilePath>..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cryp.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>stm32f4xx_hal_cryp_ex.c</FileName>
<FileType>1</FileType>
<FilePath>..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cryp_ex.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>stm32f4xx_hal_dma.c</FileName>
<FileType>1</FileType>
<FilePath>..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>stm32f4xx_hal_dma_ex.c</FileName>
<FileType>1</FileType>
<FilePath>..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma_ex.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>stm32f4xx_hal_pwr.c</FileName>
<FileType>1</FileType>
<FilePath>..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>stm32f4xx_hal_pwr_ex.c</FileName>
<FileType>1</FileType>
<FilePath>..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>stm32f4xx_hal_rcc.c</FileName>
<FileType>1</FileType>
<FilePath>..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>stm32f4xx_hal_rcc_ex.c</FileName>
<FileType>1</FileType>
<FilePath>..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc_ex.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>stm32f4xx_hal_rng.c</FileName>
<FileType>1</FileType>
<FilePath>..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rng.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>stm32f4xx_hal_gpio.c</FileName>
<FileType>1</FileType>
<FilePath>..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_gpio.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>stm32f4xx_hal_uart.c</FileName>
<FileType>1</FileType>
<FilePath>..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c</FilePath>
</File>
+ </Files>
+ <Files>
<File>
<FileName>stm32f4xx_hal_usart.c</FileName>
<FileType>1</FileType>
@@ -735,5 +913,4 @@
</Groups>
</Target>
</Targets>
-
</Project>
diff --git a/bsp/stm32/stm32f469-st-disco/project.uvprojx b/bsp/stm32/stm32f469-st-disco/project.uvprojx
index 18a38d600f..e7d26b6d60 100644
--- a/bsp/stm32/stm32f469-st-disco/project.uvprojx
+++ b/bsp/stm32/stm32f469-st-disco/project.uvprojx
@@ -467,6 +467,11 @@
<FileType>1</FileType>
<FilePath>applications\main.c</FilePath>
</File>
+ <File>
+ <FileName>lcd_init.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>applications\lcd_init.c</FilePath>
+ </File>
</Files>
</Group>
<Group>
@@ -617,6 +622,56 @@
<FileType>1</FileType>
<FilePath>..\..\..\components\finsh\msh_file.c</FilePath>
</File>
+ <File>
+ <FileName>finsh_compiler.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\components\finsh\finsh_compiler.c</FilePath>
+ </File>
+ <File>
+ <FileName>finsh_error.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\components\finsh\finsh_error.c</FilePath>
+ </File>
+ <File>
+ <FileName>finsh_heap.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\components\finsh\finsh_heap.c</FilePath>
+ </File>
+ <File>
+ <FileName>finsh_init.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\components\finsh\finsh_init.c</FilePath>
+ </File>
+ <File>
+ <FileName>finsh_node.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\components\finsh\finsh_node.c</FilePath>
+ </File>
+ <File>
+ <FileName>finsh_ops.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\components\finsh\finsh_ops.c</FilePath>
+ </File>
+ <File>
+ <FileName>finsh_parser.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\components\finsh\finsh_parser.c</FilePath>
+ </File>
+ <File>
+ <FileName>finsh_var.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\components\finsh\finsh_var.c</FilePath>
+ </File>
+ <File>
+ <FileName>finsh_vm.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\components\finsh\finsh_vm.c</FilePath>
+ </File>
+ <File>
+ <FileName>finsh_token.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\components\finsh\finsh_token.c</FilePath>
+ </File>
</Files>
</Group>
<Group>
diff --git a/bsp/stm32/stm32f469-st-disco/rtconfig.h b/bsp/stm32/stm32f469-st-disco/rtconfig.h
index 9b59bd4623..d6a6b7b6b6 100644
--- a/bsp/stm32/stm32f469-st-disco/rtconfig.h
+++ b/bsp/stm32/stm32f469-st-disco/rtconfig.h
@@ -7,32 +7,19 @@
/* RT-Thread Kernel */
#define RT_NAME_MAX 8
-/* RT_USING_ARCH_DATA_TYPE is not set */
-/* RT_USING_SMP is not set */
#define RT_ALIGN_SIZE 4
-/* RT_THREAD_PRIORITY_8 is not set */
#define RT_THREAD_PRIORITY_32
-/* RT_THREAD_PRIORITY_256 is not set */
#define RT_THREAD_PRIORITY_MAX 32
-#define RT_TICK_PER_SECOND 1000
+#define RT_TICK_PER_SECOND 100
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_USING_IDLE_HOOK
#define RT_IDEL_HOOK_LIST_SIZE 4
#define IDLE_THREAD_STACK_SIZE 256
-/* RT_USING_TIMER_SOFT is not set */
+#define RT_USING_TIMER_SOFT
+#define RT_TIMER_THREAD_PRIO 4
+#define RT_TIMER_THREAD_STACK_SIZE 512
#define RT_DEBUG
-#define RT_DEBUG_COLOR
-/* RT_DEBUG_INIT_CONFIG is not set */
-/* RT_DEBUG_THREAD_CONFIG is not set */
-/* RT_DEBUG_SCHEDULER_CONFIG is not set */
-/* RT_DEBUG_IPC_CONFIG is not set */
-/* RT_DEBUG_TIMER_CONFIG is not set */
-/* RT_DEBUG_IRQ_CONFIG is not set */
-/* RT_DEBUG_MEM_CONFIG is not set */
-/* RT_DEBUG_SLAB_CONFIG is not set */
-/* RT_DEBUG_MEMHEAP_CONFIG is not set */
-/* RT_DEBUG_MODULE_CONFIG is not set */
/* Inter-Thread communication */
@@ -41,23 +28,17 @@
#define RT_USING_EVENT
#define RT_USING_MAILBOX
#define RT_USING_MESSAGEQUEUE
-/* RT_USING_SIGNALS is not set */
/* Memory Management */
#define RT_USING_MEMPOOL
#define RT_USING_MEMHEAP
-/* RT_USING_NOHEAP is not set */
-/* RT_USING_SMALL_MEM is not set */
-/* RT_USING_SLAB is not set */
#define RT_USING_MEMHEAP_AS_HEAP
#define RT_USING_HEAP
/* Kernel Device Object */
#define RT_USING_DEVICE
-/* RT_USING_DEVICE_OPS is not set */
-/* RT_USING_INTERRUPT_INFO is not set */
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart3"
@@ -65,7 +46,6 @@
#define ARCH_ARM
#define ARCH_ARM_CORTEX_M
#define ARCH_ARM_CORTEX_M4
-/* ARCH_CPU_STACK_GROWS_UPWARD is not set */
/* RT-Thread Components */
@@ -76,7 +56,6 @@
/* C++ features */
-/* RT_USING_CPLUSPLUS is not set */
/* Command shell */
@@ -86,247 +65,95 @@
#define FINSH_HISTORY_LINES 5
#define FINSH_USING_SYMTAB
#define FINSH_USING_DESCRIPTION
-/* FINSH_ECHO_DISABLE_DEFAULT is not set */
#define FINSH_THREAD_PRIORITY 20
#define FINSH_THREAD_STACK_SIZE 4096
#define FINSH_CMD_SIZE 80
-/* FINSH_USING_AUTH is not set */
#define FINSH_USING_MSH
#define FINSH_USING_MSH_DEFAULT
-#define FINSH_USING_MSH_ONLY
#define FINSH_ARG_MAX 10
/* Device virtual file system */
-/* RT_USING_DFS is not set */
/* Device Drivers */
#define RT_USING_DEVICE_IPC
#define RT_PIPE_BUFSZ 512
-/* RT_USING_SYSTEM_WORKQUEUE is not set */
#define RT_USING_SERIAL
#define RT_SERIAL_USING_DMA
#define RT_SERIAL_RB_BUFSZ 64
-/* RT_USING_CAN is not set */
-/* RT_USING_HWTIMER is not set */
-/* RT_USING_CPUTIME is not set */
-/* RT_USING_I2C is not set */
#define RT_USING_PIN
-/* RT_USING_ADC is not set */
-/* RT_USING_PWM is not set */
-/* RT_USING_MTD_NOR is not set */
-/* RT_USING_MTD_NAND is not set */
-/* RT_USING_MTD is not set */
-/* RT_USING_PM is not set */
-/* RT_USING_RTC is not set */
-/* RT_USING_SDIO is not set */
-/* RT_USING_SPI is not set */
-/* RT_USING_WDT is not set */
-/* RT_USING_AUDIO is not set */
-/* RT_USING_SENSOR is not set */
/* Using WiFi */
-/* RT_USING_WIFI is not set */
/* Using USB */
-/* RT_USING_USB_HOST is not set */
-/* RT_USING_USB_DEVICE is not set */
/* POSIX layer and C standard library */
-/* RT_USING_LIBC is not set */
-/* RT_USING_PTHREADS is not set */
/* Network */
/* Socket abstraction layer */
-/* RT_USING_SAL is not set */
/* light weight TCP/IP stack */
-/* RT_USING_LWIP is not set */
/* Modbus master and slave stack */
-/* RT_USING_MODBUS is not set */
/* AT commands */
-/* RT_USING_AT is not set */
/* VBUS(Virtual Software BUS) */
-/* RT_USING_VBUS is not set */
/* Utilities */
-/* RT_USING_LOGTRACE is not set */
-/* RT_USING_RYM is not set */
-/* RT_USING_ULOG is not set */
-/* RT_USING_UTEST is not set */
-/* RT_USING_LWP is not set */
/* RT-Thread online packages */
/* IoT - internet of things */
-/* PKG_USING_PAHOMQTT is not set */
-/* PKG_USING_WEBCLIENT is not set */
-/* PKG_USING_WEBNET is not set */
-/* PKG_USING_MONGOOSE is not set */
-/* PKG_USING_WEBTERMINAL is not set */
-/* PKG_USING_CJSON is not set */
-/* PKG_USING_JSMN is not set */
-/* PKG_USING_LIBMODBUS is not set */
-/* PKG_USING_LJSON is not set */
-/* PKG_USING_EZXML is not set */
-/* PKG_USING_NANOPB is not set */
/* Wi-Fi */
/* Marvell WiFi */
-/* PKG_USING_WLANMARVELL is not set */
/* Wiced WiFi */
-/* PKG_USING_WLAN_WICED is not set */
-/* PKG_USING_RW007 is not set */
-/* PKG_USING_COAP is not set */
-/* PKG_USING_NOPOLL is not set */
-/* PKG_USING_NETUTILS is not set */
-/* PKG_USING_AT_DEVICE is not set */
-/* PKG_USING_WIZNET is not set */
/* IoT Cloud */
-/* PKG_USING_ONENET is not set */
-/* PKG_USING_GAGENT_CLOUD is not set */
-/* PKG_USING_ALI_IOTKIT is not set */
-/* PKG_USING_AZURE is not set */
-/* PKG_USING_TENCENT_IOTKIT is not set */
-/* PKG_USING_NIMBLE is not set */
-/* PKG_USING_OTA_DOWNLOADER is not set */
/* security packages */
-/* PKG_USING_MBEDTLS is not set */
-/* PKG_USING_libsodium is not set */
-/* PKG_USING_TINYCRYPT is not set */
/* language packages */
-/* PKG_USING_LUA is not set */
-/* PKG_USING_JERRYSCRIPT is not set */
-/* PKG_USING_MICROPYTHON is not set */
/* multimedia packages */
-/* PKG_USING_OPENMV is not set */
-/* PKG_USING_MUPDF is not set */
-/* PKG_USING_STEMWIN is not set */
/* tools packages */
-/* PKG_USING_CMBACKTRACE is not set */
-/* PKG_USING_EASYFLASH is not set */
-/* PKG_USING_EASYLOGGER is not set */
-/* PKG_USING_SYSTEMVIEW is not set */
-/* PKG_USING_RDB is not set */
-/* PKG_USING_QRCODE is not set */
-/* PKG_USING_ULOG_EASYFLASH is not set */
-/* PKG_USING_ADBD is not set */
/* system packages */
-/* PKG_USING_GUIENGINE is not set */
-/* PKG_USING_PERSIMMON is not set */
-/* PKG_USING_CAIRO is not set */
-/* PKG_USING_PIXMAN is not set */
-/* PKG_USING_LWEXT4 is not set */
-/* PKG_USING_PARTITION is not set */
-/* PKG_USING_FAL is not set */
-/* PKG_USING_SQLITE is not set */
-/* PKG_USING_RTI is not set */
-/* PKG_USING_LITTLEVGL2RTT is not set */
-/* PKG_USING_CMSIS is not set */
-/* PKG_USING_DFS_YAFFS is not set */
-/* PKG_USING_LITTLEFS is not set */
-/* PKG_USING_THREAD_POOL is not set */
/* peripheral libraries and drivers */
-/* PKG_USING_SENSORS_DRIVERS is not set */
-/* PKG_USING_REALTEK_AMEBA is not set */
-/* PKG_USING_SHT2X is not set */
-/* PKG_USING_AHT10 is not set */
-/* PKG_USING_AP3216C is not set */
-/* PKG_USING_STM32_SDIO is not set */
-/* PKG_USING_ICM20608 is not set */
-/* PKG_USING_U8G2 is not set */
-/* PKG_USING_BUTTON is not set */
-/* PKG_USING_MPU6XXX is not set */
-/* PKG_USING_PCF8574 is not set */
-/* PKG_USING_SX12XX is not set */
-/* PKG_USING_SIGNAL_LED is not set */
-/* PKG_USING_WM_LIBRARIES is not set */
-/* PKG_USING_KENDRYTE_SDK is not set */
-/* PKG_USING_INFRARED is not set */
-/* PKG_USING_ROSSERIAL is not set */
+/* sensors drivers */
+
/* miscellaneous packages */
-/* PKG_USING_LIBCSV is not set */
-/* PKG_USING_OPTPARSE is not set */
-/* PKG_USING_FASTLZ is not set */
-/* PKG_USING_MINILZO is not set */
-/* PKG_USING_QUICKLZ is not set */
-/* PKG_USING_MULTIBUTTON is not set */
-/* PKG_USING_CANFESTIVAL is not set */
-/* PKG_USING_ZLIB is not set */
-/* PKG_USING_DSTR is not set */
-/* PKG_USING_TINYFRAME is not set */
-/* PKG_USING_KENDRYTE_DEMO is not set */
/* samples: kernel and components samples */
-/* PKG_USING_KERNEL_SAMPLES is not set */
-/* PKG_USING_FILESYSTEM_SAMPLES is not set */
-/* PKG_USING_NETWORK_SAMPLES is not set */
-/* PKG_USING_PERIPHERAL_SAMPLES is not set */
-/* PKG_USING_HELLO is not set */
-/* PKG_USING_VI is not set */
-/* PKG_USING_NNOM is not set */
-
-/* Privated Packages of RealThread */
-
-/* PKG_USING_CODEC is not set */
-/* PKG_USING_PLAYER is not set */
-/* PKG_USING_MPLAYER is not set */
-/* PKG_USING_PERSIMMON_SRC is not set */
-/* PKG_USING_JS_PERSIMMON is not set */
-/* PKG_USING_JERRYSCRIPT_WIN32 is not set */
-
-/* Network Utilities */
-
-/* PKG_USING_WICED is not set */
-/* PKG_USING_CLOUDSDK is not set */
-/* PKG_USING_COREMARK is not set */
-/* PKG_USING_POWER_MANAGER is not set */
-/* PKG_USING_RT_OTA is not set */
-/* PKG_USING_RDBD_SRC is not set */
-/* PKG_USING_RTINSIGHT is not set */
-/* PKG_USING_SMARTCONFIG is not set */
-/* PKG_USING_RTX is not set */
-/* RT_USING_TESTCASE is not set */
-/* PKG_USING_NGHTTP2 is not set */
-/* PKG_USING_AVS is not set */
-/* PKG_USING_STS is not set */
-/* PKG_USING_DLMS is not set */
#define SOC_FAMILY_STM32
#define SOC_SERIES_STM32F4
@@ -336,19 +163,12 @@
/* Onboard Peripheral Drivers */
-/* BSP_USING_SDRAM is not set */
-/* BSP_USING_QSPI_FLASH is not set */
/* On-chip Peripheral Drivers */
#define BSP_USING_GPIO
#define BSP_USING_UART
#define BSP_USING_UART3
-/* BSP_UART3_RX_USING_DMA is not set */
-/* BSP_USING_QSPI is not set */
-/* BSP_USING_ON_CHIP_FLASH is not set */
-/* BSP_USING_FMC is not set */
-/* BSP_USING_USBD_FS is not set */
/* Board extended module Drivers */