diff options
| author | wangqinglin <[email protected]> | 2023-06-26 21:30:27 +0800 |
|---|---|---|
| committer | GitHub <[email protected]> | 2023-06-26 21:30:27 +0800 |
| commit | d6f6ae56fdd562a110516adfc9d68bbd33b8f3bf (patch) | |
| tree | 0a0f4739fc09d8f968407bef4ac10b2c9e446734 | |
| parent | e65509a58eea37f504654a6fba1e11dd69026ebe (diff) | |
修复gicv2默认邦核失败 (#7723)
| -rw-r--r-- | libcpu/aarch64/common/interrupt.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/libcpu/aarch64/common/interrupt.c b/libcpu/aarch64/common/interrupt.c index 63a6c36286..7a93bfb250 100644 --- a/libcpu/aarch64/common/interrupt.c +++ b/libcpu/aarch64/common/interrupt.c @@ -389,7 +389,7 @@ rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler, __asm__ volatile ("mrs %0, mpidr_el1":"=r"(cpu_affinity_val)); rt_hw_interrupt_set_target_cpus(vector, cpu_affinity_val); #else - rt_hw_interrupt_set_target_cpus(vector, rt_hw_cpu_id()); + rt_hw_interrupt_set_target_cpus(vector, 1 << rt_hw_cpu_id()); #endif /* BSP_USING_GICV3 */ } #endif |