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authormysterywolf <[email protected]>2020-11-07 14:00:54 +0800
committermysterywolf <[email protected]>2020-11-07 14:00:54 +0800
commite71a3f7b4c1311479a51b96701cd691177bc45f2 (patch)
treebb5d8f176341742fdd66c7ecf602993023815711
parent97b820e48d70d0b6936ca321a4e55878aaed16ac (diff)
[update] readme.md
-rw-r--r--bsp/stm32/stm32f410-st-nucleo/README.md2
1 files changed, 1 insertions, 1 deletions
diff --git a/bsp/stm32/stm32f410-st-nucleo/README.md b/bsp/stm32/stm32f410-st-nucleo/README.md
index 3d5042fbe8..b75c883509 100644
--- a/bsp/stm32/stm32f410-st-nucleo/README.md
+++ b/bsp/stm32/stm32f410-st-nucleo/README.md
@@ -42,7 +42,7 @@ All devices offer one 12-bit ADC, one 12-bit DAC, a low-power RTC, three general
- Three 16-bit general purpose timers
- One 32-bit timer up to 100 MHz with up to four IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
- Two watchdog timers (independent window)
- - SysTick timer.
+ - SysTick timer
- Debug mode
- Serial wire debug (SWD) & JTAG interfaces