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authortanek liang <[email protected]>2017-12-11 12:57:16 +0800
committertanek liang <[email protected]>2017-12-11 12:57:16 +0800
commit8278e3b3446874f6c15c824dd3ca3e46fee04f09 (patch)
tree0c82627d9caceb747e61e4734fb2071bcf20e4d8
parent3b44eac542c5418537c6fcf0db7e3818351574bd (diff)
[bsp] update linker file configuration
-rw-r--r--bsp/imxrt1052-evk/imxrt1052_sdram.icf103
-rw-r--r--bsp/imxrt1052-evk/imxrt1052_sdram.sct99
-rw-r--r--bsp/imxrt1052-evk/rtconfig.py4
3 files changed, 2 insertions, 204 deletions
diff --git a/bsp/imxrt1052-evk/imxrt1052_sdram.icf b/bsp/imxrt1052-evk/imxrt1052_sdram.icf
deleted file mode 100644
index 6d431b6a7f..0000000000
--- a/bsp/imxrt1052-evk/imxrt1052_sdram.icf
+++ /dev/null
@@ -1,103 +0,0 @@
-/*
-** ###################################################################
-** Processor: MIMXRT1052DVL6A
-** Compiler: IAR ANSI C/C++ Compiler for ARM
-** Reference manual: i.MX 6RT for ROM
-** Version: rev. 0.1, 2017-01-10
-** Build: b170608
-**
-** Abstract:
-** Linker file for the IAR ANSI C/C++ Compiler for ARM
-**
-** Copyright 2016 Freescale Semiconductor, Inc.
-** Copyright 2016-2017 NXP
-** Redistribution and use in source and binary forms, with or without modification,
-** are permitted provided that the following conditions are met:
-**
-** 1. Redistributions of source code must retain the above copyright notice, this list
-** of conditions and the following disclaimer.
-**
-** 2. Redistributions in binary form must reproduce the above copyright notice, this
-** list of conditions and the following disclaimer in the documentation and/or
-** other materials provided with the distribution.
-**
-** 3. Neither the name of the copyright holder nor the names of its
-** contributors may be used to endorse or promote products derived from this
-** software without specific prior written permission.
-**
-** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
-** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-**
-** http: www.nxp.com
-**
-** ###################################################################
-*/
-
-define symbol m_base_addr = 0x00000000;
-
-define symbol m_interrupts_start = 0x00000000 + m_base_addr;
-define symbol m_interrupts_end = 0x000003FF + m_base_addr;
-
-define symbol m_text_start = 0x00000400 + m_base_addr;
-define symbol m_text_end = 0x0007FFFF + m_base_addr;
-
-define symbol m_data_start = 0x80000000;
-define symbol m_data_end = 0x81DFFFFF;
-
-define symbol m_ncache_start = 0x81E00000;
-define symbol m_ncache_end = 0x81FFFFFF;
-
-/* Sizes */
-if (isdefinedsymbol(__stack_size__)) {
- define symbol __size_cstack__ = __stack_size__;
-} else {
- define symbol __size_cstack__ = 0x0400;
-}
-
-if (isdefinedsymbol(__heap_size__)) {
- define symbol __size_heap__ = __heap_size__;
-} else {
- define symbol __size_heap__ = 0x0400;
-}
-
-define exported symbol __VECTOR_TABLE = m_interrupts_start;
-define exported symbol __VECTOR_RAM = m_interrupts_start;
-define exported symbol __RAM_VECTOR_TABLE_SIZE = 0x0;
-
-define memory mem with size = 4G;
-define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end]
- | mem:[from m_text_start to m_text_end];
-define region DATA_region = mem:[from m_data_start to m_data_end-__size_cstack__];
-define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_end];
-define region NCACHE_region = mem:[from m_ncache_start to m_ncache_end];
-
-define block CSTACK with alignment = 8, size = __size_cstack__ { };
-define block HEAP with alignment = 8, size = __size_heap__ { };
-define block RW { readwrite };
-define block ZI { zi };
-define block RTT_INIT_FUNC with fixed order { readonly section .rti_fn* };
-define block NCACHE_VAR with size = 0x200000 , alignment = 0x100000 { section NonCacheable , section NonCacheable.init };
-
-initialize by copy { readwrite, section .textrw };
-do not initialize { section .noinit };
-
-keep { section FSymTab };
-keep { section VSymTab };
-keep { section .rti_fn* };
-
-place at address mem: m_interrupts_start { readonly section .intvec };
-place in TEXT_region { readonly, block RTT_INIT_FUNC };
-place in DATA_region { block RW };
-place in DATA_region { block ZI };
-place in DATA_region { last block HEAP };
-place in CSTACK_region { block CSTACK };
-place in NCACHE_region { block NCACHE_VAR };
diff --git a/bsp/imxrt1052-evk/imxrt1052_sdram.sct b/bsp/imxrt1052-evk/imxrt1052_sdram.sct
deleted file mode 100644
index 16f8588351..0000000000
--- a/bsp/imxrt1052-evk/imxrt1052_sdram.sct
+++ /dev/null
@@ -1,99 +0,0 @@
-#! armcc -E
-/*
-** ###################################################################
-** Processors: MIMXRT1052CVL5A
-** MIMXRT1052DVL6A
-**
-** Compiler: Keil ARM C/C++ Compiler
-** Reference manual: IMXRT1050RM Rev.C, 08/2017
-** Version: rev. 0.1, 2017-01-10
-** Build: b170927
-**
-** Abstract:
-** Linker file for the Keil ARM C/C++ Compiler
-**
-** Copyright 2016 Freescale Semiconductor, Inc.
-** Copyright 2016-2017 NXP
-** Redistribution and use in source and binary forms, with or without modification,
-** are permitted provided that the following conditions are met:
-**
-** 1. Redistributions of source code must retain the above copyright notice, this list
-** of conditions and the following disclaimer.
-**
-** 2. Redistributions in binary form must reproduce the above copyright notice, this
-** list of conditions and the following disclaimer in the documentation and/or
-** other materials provided with the distribution.
-**
-** 3. Neither the name of the copyright holder nor the names of its
-** contributors may be used to endorse or promote products derived from this
-** software without specific prior written permission.
-**
-** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
-** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-**
-** http: www.nxp.com
-**
-** ###################################################################
-*/
-
-#define m_start_address 0x00000000
-
-#define m_interrupts_start (0x00000000 + m_start_address)
-#define m_interrupts_size 0x00000400
-
-#define m_text_start (m_interrupts_start + m_interrupts_size)
-#define m_text_size 0x0001FC00
-
-#define m_data_start 0x80000000
-#define m_data_size 0x01E00000
-
-#define m_ncache_start 0x81E00000
-#define m_ncache_size 0x00200000
-
-/* Sizes */
-#if (defined(__stack_size__))
- #define Stack_Size __stack_size__
-#else
- #define Stack_Size 0x0400
-#endif
-
-#if (defined(__heap_size__))
- #define Heap_Size __heap_size__
-#else
- #define Heap_Size 0x0400
-#endif
-
-LR_m_text m_text_start m_text_size { ; load region size_region
- ER_m_text m_text_start m_text_size { ; load address = execution address
- * (InRoot$$Sections)
- .ANY (+RO)
- }
- RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data
- .ANY (+RW +ZI)
- }
- RW_m_ncache m_ncache_start m_ncache_size { ; ncache RW data
- * (NonCacheable.init)
- * (NonCacheable)
- }
- ARM_LIB_HEAP +0 EMPTY Heap_Size { ; Heap region growing up
- }
- ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down
- }
-}
-
-LR_m_interrupts m_interrupts_start m_interrupts_size {
- VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
- * (RESET,+FIRST)
- }
-}
-
-
diff --git a/bsp/imxrt1052-evk/rtconfig.py b/bsp/imxrt1052-evk/rtconfig.py
index 27718a2484..ad41902c1a 100644
--- a/bsp/imxrt1052-evk/rtconfig.py
+++ b/bsp/imxrt1052-evk/rtconfig.py
@@ -77,7 +77,7 @@ elif PLATFORM == 'armcc':
DEVICE = ' --cpu Cortex-M7.fp.sp'
CFLAGS = DEVICE + ' --apcs=interwork'
AFLAGS = DEVICE
- LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rtthread-imxrt.map --scatter imxrt1052_sdram.sct'
+ LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rtthread-imxrt.map --scatter ./Libraries/arm/MIMXRT1052xxxxx_flexspi_nor.scf'
CFLAGS += ' --c99 --diag_suppress=66,1296,186'
CFLAGS += ' -I' + EXEC_PATH + '/ARM/RV31/INC'
@@ -128,7 +128,7 @@ elif PLATFORM == 'iar':
AFLAGS += ' --cpu Cortex-M7'
AFLAGS += ' --fpu None'
- LFLAGS = ' --config imxrt1052_sdram.icf'
+ LFLAGS = ' --config ./Libraries/iar/MIMXRT1052xxxxx_flexspi_nor.icf'
LFLAGS += ' --redirect _Printf=_PrintfTiny'
LFLAGS += ' --redirect _Scanf=_ScanfSmall'
LFLAGS += ' --entry __iar_program_start'