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authorZYH <[email protected]>2018-06-29 22:38:16 +0800
committerGitHub <[email protected]>2018-06-29 22:38:16 +0800
commit0616f81ef684c5f8d316c31b7c75e77424696521 (patch)
treeb1422a288482e16f03747f6d248d4c43fbedf2ad
parent5b863eb89b4830cad373b061674a0ed0e59224a1 (diff)
parente7df811926bb603c09eb01626a2b87b29bafd5c4 (diff)
Merge pull request #1584 from liu2guang/master
[bsp][stm32f10x] Fix compile error when configuring HSI.
-rw-r--r--bsp/stm32f10x-HAL/drivers/board.c65
-rw-r--r--bsp/stm32f10x-HAL/drivers/stm32f1xx_hal_conf.h4
2 files changed, 47 insertions, 22 deletions
diff --git a/bsp/stm32f10x-HAL/drivers/board.c b/bsp/stm32f10x-HAL/drivers/board.c
index 61029214c1..0c880d4746 100644
--- a/bsp/stm32f10x-HAL/drivers/board.c
+++ b/bsp/stm32f10x-HAL/drivers/board.c
@@ -49,37 +49,58 @@ void HAL_MspInit(void)
void SystemClock_Config(void)
{
- rt_err_t result;
+ rt_err_t ret = RT_EOK;
RCC_OscInitTypeDef RCC_OscInitStruct;
RCC_ClkInitTypeDef RCC_ClkInitStruct;
- /**Initializes the CPU, AHB and APB busses clocks
- */
+
+#if !defined(RT_USING_HSI)
+ /* Initializes the CPU, AHB and APB busses clocks */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
- RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+ RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
- RCC_OscInitStruct.HSIState = RCC_HSI_ON;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
- RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
- RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
- result = HAL_RCC_OscConfig(&RCC_OscInitStruct);
- RT_ASSERT(result == HAL_OK);
- /**Initializes the CPU, AHB and APB busses clocks
- */
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
- RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+ RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
+ ret = HAL_RCC_OscConfig(&RCC_OscInitStruct);
+ RT_ASSERT(ret == HAL_OK);
+
+ /* Initializes the CPU, AHB and APB busses clocks */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK |
+ RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
- result = HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2);
- RT_ASSERT(result == HAL_OK);
- /**Configure the Systick interrupt time
- */
+ ret = HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2);
+ RT_ASSERT(ret == HAL_OK);
+
HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq() / RT_TICK_PER_SECOND);
- /**Configure the Systick
- */
HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
- /* SysTick_IRQn interrupt configuration */
HAL_NVIC_SetPriority(SysTick_IRQn, 15, 0);
+#else
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSICalibrationValue = 16;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2;
+ RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL16;
+ ret = HAL_RCC_OscConfig(&RCC_OscInitStruct);
+ RT_ASSERT(ret == HAL_OK);
+
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |
+ RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+ ret = HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2);
+ RT_ASSERT(ret == HAL_OK);
+
+ HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/RT_TICK_PER_SECOND);
+ HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
+ HAL_NVIC_SetPriority(SysTick_IRQn, 15, 0);
+#endif
}
/**
diff --git a/bsp/stm32f10x-HAL/drivers/stm32f1xx_hal_conf.h b/bsp/stm32f10x-HAL/drivers/stm32f1xx_hal_conf.h
index e50abfd1fc..32be5f38d0 100644
--- a/bsp/stm32f10x-HAL/drivers/stm32f1xx_hal_conf.h
+++ b/bsp/stm32f10x-HAL/drivers/stm32f1xx_hal_conf.h
@@ -103,7 +103,11 @@ extern "C" {
* This value is used by the RCC HAL module to compute the system frequency
* (when HSE is used as system clock source, directly or through the PLL).
*/
+#if !defined(RT_USING_HSI)
#define HSE_VALUE ((unsigned int)RT_HSE_VALUE)
+#endif
+
+//#define HSE_VALUE ((unsigned int)RT_HSE_VALUE)
#if !defined (HSE_VALUE)
#if defined(USE_STM3210C_EVAL)