diff options
| author | Tanek <[email protected]> | 2018-05-09 10:02:23 +0800 |
|---|---|---|
| committer | GitHub <[email protected]> | 2018-05-09 10:02:23 +0800 |
| commit | c3ce528d9f692ff8659b0e97e214132949922cdc (patch) | |
| tree | 3b378906a815ea958a5d604339b4995c7fcdf7b8 | |
| parent | 72af51204bc9fcac1467b4a173a15f1c990e16a0 (diff) | |
| parent | cec2ee4cdcf5e2ba716d28fdab9313170c7d7f5d (diff) | |
Merge pull request #1414 from liu2guang/master
[BSP][RT1050] Fix RT1050 PIN 125~127 reg addr error. | 修复PIN驱动125~127…
| -rw-r--r-- | bsp/imxrt1052-evk/drivers/drv_pin.c | 52 |
1 files changed, 12 insertions, 40 deletions
diff --git a/bsp/imxrt1052-evk/drivers/drv_pin.c b/bsp/imxrt1052-evk/drivers/drv_pin.c index f426ae6929..7d553f5f3d 100644 --- a/bsp/imxrt1052-evk/drivers/drv_pin.c +++ b/bsp/imxrt1052-evk/drivers/drv_pin.c @@ -246,10 +246,6 @@ void GPIO1_Combined_0_15_IRQHandler(void) gpio_isr(GPIO1, gpio_pin); } -#if defined __CORTEX_M && (__CORTEX_M == 4U) - __DSB(); -#endif - rt_interrupt_leave(); } @@ -264,10 +260,6 @@ void GPIO1_Combined_16_31_IRQHandler(void) gpio_isr(GPIO1, gpio_pin); } -#if defined __CORTEX_M && (__CORTEX_M == 4U) - __DSB(); -#endif - rt_interrupt_leave(); } @@ -282,10 +274,6 @@ void GPIO2_Combined_0_15_IRQHandler(void) gpio_isr(GPIO2, gpio_pin); } -#if defined __CORTEX_M && (__CORTEX_M == 4U) - __DSB(); -#endif - rt_interrupt_leave(); } @@ -300,10 +288,6 @@ void GPIO2_Combined_16_31_IRQHandler(void) gpio_isr(GPIO2, gpio_pin); } -#if defined __CORTEX_M && (__CORTEX_M == 4U) - __DSB(); -#endif - rt_interrupt_leave(); } @@ -318,10 +302,6 @@ void GPIO3_Combined_0_15_IRQHandler(void) gpio_isr(GPIO3, gpio_pin); } -#if defined __CORTEX_M && (__CORTEX_M == 4U) - __DSB(); -#endif - rt_interrupt_leave(); } @@ -336,10 +316,6 @@ void GPIO3_Combined_16_31_IRQHandler(void) gpio_isr(GPIO3, gpio_pin); } -#if defined __CORTEX_M && (__CORTEX_M == 4U) - __DSB(); -#endif - rt_interrupt_leave(); } @@ -354,10 +330,6 @@ void GPIO4_Combined_0_15_IRQHandler(void) gpio_isr(GPIO4, gpio_pin); } -#if defined __CORTEX_M && (__CORTEX_M == 4U) - __DSB(); -#endif - rt_interrupt_leave(); } void GPIO4_Combined_16_31_IRQHandler(void) @@ -371,10 +343,6 @@ void GPIO4_Combined_16_31_IRQHandler(void) gpio_isr(GPIO4, gpio_pin); } -#if defined __CORTEX_M && (__CORTEX_M == 4U) - __DSB(); -#endif - rt_interrupt_leave(); } @@ -388,10 +356,7 @@ void GPIO5_Combined_0_15_IRQHandler(void) { gpio_isr(GPIO5, gpio_pin); } - -#if defined __CORTEX_M && (__CORTEX_M == 4U) - __DSB(); -#endif + rt_interrupt_leave(); } @@ -478,7 +443,7 @@ static void rt1052_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode) { CLOCK_EnableClock(kCLOCK_IomuxcSnvs); - IOMUXC_SetPinMux(0x401F8000U + (pin-125)*4, 0x5U, 0, 0, 0, 1); + IOMUXC_SetPinMux(0x400A8000U + (pin-125)*4, 0x5U, 0, 0, 0, 1); } gpio.outputLogic = 0; @@ -521,8 +486,15 @@ static void rt1052_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode) } break; } - - IOMUXC_SetPinConfig(0, 0, 0, 0, 0x401F8200U + pin*4, config_value); + + if(rt1052_pin_map[pin].gpio != GPIO5) + { + IOMUXC_SetPinConfig(0, 0, 0, 0, 0x401F8200U + pin*4, config_value); + } + else + { + IOMUXC_SetPinConfig(0, 0, 0, 0, 0x400A8018U + (pin-125)*4, config_value); + } GPIO_PinInit(rt1052_pin_map[pin].gpio, rt1052_pin_map[pin].gpio_pin, &gpio); } @@ -628,7 +600,7 @@ static rt_err_t rt1052_pin_irq_enable(struct rt_device *device, rt_base_t pin, r else { CLOCK_EnableClock(kCLOCK_IomuxcSnvs); - IOMUXC_SetPinMux(0x401F8000U + (pin-125)*4, 0x5U, 0, 0, 0, 0); + IOMUXC_SetPinMux(0x400A8000U + (pin-125)*4, 0x5U, 0, 0, 0, 0); } gpio.direction = kGPIO_DigitalInput; |
