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authorzst123 <[email protected]>2023-06-15 21:46:48 +0800
committerMan, Jianting (Meco) <[email protected]>2023-06-15 18:37:31 -0400
commit96207d424693cfe33365204523061d0d159d74b9 (patch)
tree9888dcafdee0c78c319fc784495641c189f7736f
parent5a07d137b8a662c47e04f080e202f282b742e330 (diff)
[bsp][stm32u575] add ADC support
-rw-r--r--bsp/stm32/libraries/HAL_Drivers/drv_adc.c23
1 files changed, 17 insertions, 6 deletions
diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_adc.c b/bsp/stm32/libraries/HAL_Drivers/drv_adc.c
index 36d6a4433b..3a9f379028 100644
--- a/bsp/stm32/libraries/HAL_Drivers/drv_adc.c
+++ b/bsp/stm32/libraries/HAL_Drivers/drv_adc.c
@@ -155,7 +155,7 @@ static rt_err_t stm32_adc_enabled(struct rt_adc_device *device, rt_int8_t channe
return -RT_EINVAL;
}
-#if defined(SOC_SERIES_STM32MP1) || defined (SOC_SERIES_STM32H7) || defined (SOC_SERIES_STM32WB)
+#if defined(SOC_SERIES_STM32MP1) || defined (SOC_SERIES_STM32H7) || defined (SOC_SERIES_STM32WB) || defined(SOC_SERIES_STM32U5)
ADC_ChanConf.Rank = ADC_REGULAR_RANK_1;
#else
ADC_ChanConf.Rank = 1;
@@ -173,6 +173,8 @@ static rt_err_t stm32_adc_enabled(struct rt_adc_device *device, rt_int8_t channe
ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_810CYCLES_5;
#elif defined(SOC_SERIES_STM32H7)
ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_810CYCLES_5;
+#elif defined(SOC_SERIES_STM32U5)
+ ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_814CYCLES;
#elif defined (SOC_SERIES_STM32WB)
ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_2CYCLES_5;
#endif
@@ -184,11 +186,18 @@ static rt_err_t stm32_adc_enabled(struct rt_adc_device *device, rt_int8_t channe
#if defined(SOC_SERIES_STM32L4)
ADC_ChanConf.OffsetNumber = ADC_OFFSET_NONE;
ADC_ChanConf.SingleDiff = LL_ADC_SINGLE_ENDED;
-#elif defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32H7) || defined (SOC_SERIES_STM32WB)
+#elif defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32H7) || defined (SOC_SERIES_STM32WB) || defined(SOC_SERIES_STM32U5)
ADC_ChanConf.OffsetNumber = ADC_OFFSET_NONE; /* ADC channel affected to offset number */
ADC_ChanConf.Offset = 0;
ADC_ChanConf.SingleDiff = ADC_SINGLE_ENDED; /* ADC channel differential mode */
#endif
+
+ /* enable the analog power domain before configuring channel */
+#if defined(SOC_SERIES_STM32U5)
+ __HAL_RCC_PWR_CLK_ENABLE();
+ HAL_PWREx_EnableVddA();
+#endif /* defined(SOC_SERIES_STM32U5) */
+
if(HAL_ADC_ConfigChannel(stm32_adc_handler, &ADC_ChanConf) != HAL_OK)
{
LOG_E("Failed to configure ADC channel %d", channel);
@@ -201,7 +210,7 @@ static rt_err_t stm32_adc_enabled(struct rt_adc_device *device, rt_int8_t channe
LOG_E("ADC calibration error!\n");
return -RT_ERROR;
}
-#elif defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32H7)
+#elif defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32U5)
/* Run the ADC linear calibration in single-ended mode */
if (HAL_ADCEx_Calibration_Start(stm32_adc_handler, ADC_CALIB_OFFSET_LINEARITY, ADC_ChanConf.SingleDiff) != HAL_OK)
{
@@ -234,19 +243,21 @@ static rt_uint8_t stm32_adc_get_resolution(struct rt_adc_device *device)
#ifdef SOC_SERIES_STM32H7
case ADC_RESOLUTION_16B:
return 16;
+#endif /* SOC_SERIES_STM32H7 */
+#if defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32U5)
case ADC_RESOLUTION_14B:
return 14;
-#endif /* SOC_SERIES_STM32H7 */
+#endif /* defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32U5) */
case ADC_RESOLUTION_12B:
return 12;
case ADC_RESOLUTION_10B:
return 10;
case ADC_RESOLUTION_8B:
return 8;
-#ifndef SOC_SERIES_STM32H7
+#if defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32U5)
case ADC_RESOLUTION_6B:
return 6;
-#endif /* SOC_SERIES_STM32H7 */
+#endif /* defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32U5) */
default:
return 0;
}