[bsp][cvitek] 在Milk-V Duo 256M开发板中支持ARM核运行RT-Thread标准版和Smart版内核 (#8800)

* Supports ARM core of Milk-V Duo 256M development board

* add fip.bin(arm)

3 files changed, 23 insertions, 3 deletions

diff --git a/bsp/cvitek/drivers/drv_uart.c b/bsp/cvitek/drivers/drv_uart.c
index b629cd5a0d..845e6708f6 100644
--- a/bsp/cvitek/drivers/drv_uart.c
+++ b/bsp/cvitek/drivers/drv_uart.c
@@ -252,30 +252,45 @@ int rt_hw_uart_init(void)
     PINMUX_CONFIG(UART0_RX, UART0_RX);
     PINMUX_CONFIG(UART0_TX, UART0_TX);
     BSP_INSTALL_UART_DEVICE(0);
+#if defined(ARCH_ARM) && defined(RT_USING_SMART)
+    uart->hw_base = (rt_size_t)rt_ioremap((void*)uart->hw_base, 0x10000);
+#endif /* defined(ARCH_ARM) && defined(RT_USING_SMART) */
 #endif
 
 #ifdef RT_USING_UART1
     PINMUX_CONFIG(IIC0_SDA, UART1_RX);
     PINMUX_CONFIG(IIC0_SCL, UART1_TX);
     BSP_INSTALL_UART_DEVICE(1);
+#if defined(ARCH_ARM) && defined(RT_USING_SMART)
+    uart->hw_base = (rt_size_t)rt_ioremap((void*)uart->hw_base, 0x10000);
+#endif /* defined(ARCH_ARM) && defined(RT_USING_SMART) */
 #endif
 
 #ifdef RT_USING_UART2
     PINMUX_CONFIG(SD1_D1, UART2_RX);
     PINMUX_CONFIG(SD1_D2, UART2_TX);
     BSP_INSTALL_UART_DEVICE(2);
+#if defined(ARCH_ARM) && defined(RT_USING_SMART)
+    uart->hw_base = (rt_size_t)rt_ioremap((void*)uart->hw_base, 0x10000);
+#endif /* defined(ARCH_ARM) && defined(RT_USING_SMART) */
 #endif
 
 #ifdef RT_USING_UART3
     PINMUX_CONFIG(SD1_D1, UART3_RX);
     PINMUX_CONFIG(SD1_D2, UART3_TX);
     BSP_INSTALL_UART_DEVICE(3);
+#if defined(ARCH_ARM) && defined(RT_USING_SMART)
+    uart->hw_base = (rt_size_t)rt_ioremap((void*)uart->hw_base, 0x10000);
+#endif /* defined(ARCH_ARM) && defined(RT_USING_SMART) */
 #endif
 
 #ifdef RT_USING_UART4
     PINMUX_CONFIG(SD1_GP0, UART4_RX);
     PINMUX_CONFIG(SD1_GP1, UART4_TX);
     BSP_INSTALL_UART_DEVICE(4);
+#if defined(ARCH_ARM) && defined(RT_USING_SMART)
+    uart->hw_base = (rt_size_t)rt_ioremap((void*)uart->hw_base, 0x10000);
+#endif /* defined(ARCH_ARM) && defined(RT_USING_SMART) */
 #endif
 
     return 0;
diff --git a/bsp/cvitek/drivers/libraries/cv181x/pinctrl.h b/bsp/cvitek/drivers/libraries/cv181x/pinctrl.h
index 58bd0938d3..1f064ebd73 100755
--- a/bsp/cvitek/drivers/libraries/cv181x/pinctrl.h
+++ b/bsp/cvitek/drivers/libraries/cv181x/pinctrl.h
@@ -23,7 +23,12 @@
 #define  PAD_MIPI_TXM0__MIPI_TXM0 0
 #define  PAD_MIPI_TXP0__MIPI_TXP0 0
 
+#if defined(ARCH_ARM) && defined(RT_USING_SMART)
+extern rt_ubase_t pinmux_base_ioremap(void);
+#define PINMUX_BASE pinmux_base_ioremap()
+#else
 #define PINMUX_BASE 0x03001000
+#endif /* defined(ARCH_ARM) && defined(RT_USING_SMART) */
 #define PINMUX_MASK(PIN_NAME) FMUX_GPIO_FUNCSEL_##PIN_NAME##_MASK
 #define PINMUX_OFFSET(PIN_NAME) FMUX_GPIO_FUNCSEL_##PIN_NAME##_OFFSET
 #define PINMUX_VALUE(PIN_NAME, FUNC_NAME) PIN_NAME##__##FUNC_NAME
diff --git a/bsp/cvitek/drivers/libraries/mmio.h b/bsp/cvitek/drivers/libraries/mmio.h
index bc36d5a3ca..2ef1930a1c 100755
--- a/bsp/cvitek/drivers/libraries/mmio.h
+++ b/bsp/cvitek/drivers/libraries/mmio.h
@@ -9,6 +9,7 @@
 #include <stdint.h>
 #include "types.h"
 
+#ifndef ARCH_ARM
 #define __raw_readb(a)        (*(volatile unsigned char *)(a))
 #define __raw_readw(a)        (*(volatile unsigned short *)(a))
 #define __raw_readl(a)        (*(volatile unsigned int *)(a))
@@ -39,13 +40,12 @@
 #define writew(v, c)    ({ __io_bw(); __raw_writew((v), (c)); __io_aw(); })
 #define writel(v, c)    ({ __io_bw(); __raw_writel((v), (c)); __io_aw(); })
 
-
 #ifdef CONFIG_64BIT
 #define readq(c)    ({ u64 __v; __io_br(); __v = __raw_readq(c); __io_ar(__v); __v; })
 #define writeq(v, c)    ({ __io_bw(); __raw_writeq((v), (c)); __io_aw(); })
 #endif // CONFIG_64BIT
 
-/*
+#else
 #define __raw_readb(a)        (*(volatile unsigned char *)(a))
 #define __raw_readw(a)        (*(volatile unsigned short *)(a))
 #define __raw_readl(a)        (*(volatile unsigned int *)(a))
@@ -69,7 +69,7 @@
 #define cpu_write8(a, v)    writeb(a, v)
 #define cpu_write16(a, v)   writew(a, v)
 #define cpu_write32(a, v)   writel(a, v)
-*/
+#endif /* ARCH_ARM */
 
 #define mmio_wr32 mmio_write_32
 #define mmio_rd32 mmio_read_32