add init loongson soc3210 porting.

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1012 bbd45198-f89e-11dd-88c7-29a3b14d5316

12 files changed, 1274 insertions, 0 deletions

diff --git a/bsp/dev3210/SConstruct b/bsp/dev3210/SConstruct
new file mode 100644
index 0000000000..daef695079
--- /dev/null
+++ b/bsp/dev3210/SConstruct
@@ -0,0 +1,40 @@
+import os

+import sys

+import rtconfig

+

+RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')

+sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]

+

+target = 'rtthread'

+projects = []

+

+env = Environment(tools = ['mingw'],

+	AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,

+	CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,

+	AR = rtconfig.AR, ARFLAGS = '-rc',

+	LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)

+env.PrependENVPath('PATH', rtconfig.EXEC_PATH)

+

+Export('env')

+Export('RTT_ROOT')

+Export('rtconfig')

+Export('projects')

+

+# kernel building script

+objs = SConscript(RTT_ROOT + '/src/SConscript', variant_dir='build/src', duplicate=0)

+# arch building script

+objs = objs + SConscript(RTT_ROOT + '/libcpu/SConscript', variant_dir='build/libcpu', duplicate=0)

+

+# component script

+Repository(RTT_ROOT)

+objs = objs + SConscript('components/SConscript')

+

+# board build script

+objs = objs + SConscript('SConscript', variant_dir='build/bsp', duplicate=0)

+

+if rtconfig.RT_USING_RTGUI:

+	objs = objs + SConscript(RTT_ROOT + '/examples/gui/SConscript', variant_dir='build/examples/gui', duplicate=0)

+

+TARGET = target + '.' + rtconfig.TARGET_EXT

+env.Program(TARGET, objs)

+env.AddPostAction(TARGET, rtconfig.POST_ACTION)

diff --git a/bsp/dev3210/application.c b/bsp/dev3210/application.c
new file mode 100644
index 0000000000..4400f2caf0
--- /dev/null
+++ b/bsp/dev3210/application.c
@@ -0,0 +1,132 @@
+/*
+ * File      : app.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2010-06-25     Bernard      first version
+ */
+
+/**
+ * @addtogroup Loongson SoC3210
+ */
+/*@{*/
+#include <rtthread.h>
+#include <soc3210.h>
+
+struct rt_thread thread;
+ALIGN(4)
+rt_uint8_t thread_stack[1024];
+
+#include <finsh.h>
+void thread_entry(void* parameter)
+{
+	int i = 0;
+
+	while (1)
+	{
+		rt_kprintf("i = %d, cause: 0x%08x, config: 0x%08x\n", i++, read_c0_cause(), read_c0_config());
+		rt_kprintf("HSB_MISC_CFG 0x%08x\n", HSB_MISC_REG);
+		rt_thread_delay(100);
+	}
+}
+void thread_test()
+{
+	rt_err_t result = rt_thread_init(&thread, 
+		"tid", 
+		thread_entry, RT_NULL,
+		&thread_stack, sizeof(thread_stack), 
+		200,
+		5);
+	if (result == RT_EOK)
+		rt_thread_startup(&thread);
+	else
+		rt_kprintf("init thread failed\n");
+}
+FINSH_FUNCTION_EXPORT(thread_test, test thread!!);
+
+#include <rtgui/rtgui.h>
+#include <rtgui/event.h>
+#include <rtgui/rtgui_server.h>
+
+int rt_application_init()
+{
+	rtgui_rect_t rect;
+
+	rtgui_system_server_init();
+
+	/* register dock panel */
+	rect.x1 = 0;
+	rect.y1 = 0;
+	rect.x2 = 400;
+	rect.y2 = 480;
+	rtgui_panel_register("panel", &rect);
+
+	/* register main panel */
+	rect.x1 = 400;
+	rect.y1 = 0;
+	rect.x2 = 800;
+	rect.y2 = 480;
+	rtgui_panel_register("main", &rect);
+	rtgui_panel_set_default_focused("main");
+
+	rt_hw_lcd_init();
+
+	/* init example workbench */
+	// workbench_init();
+
+	return 0;
+}
+
+/* key simulator */
+static struct rtgui_event_kbd kbd_event;
+void key_simulator(int key)
+{
+    /* init keyboard event */
+    RTGUI_EVENT_KBD_INIT(&kbd_event);
+    kbd_event.mod  = RTGUI_KMOD_NONE;
+    kbd_event.unicode = 0;
+    kbd_event.type = RTGUI_KEYDOWN;
+	kbd_event.key  = key;
+
+	/* post down event */
+	rtgui_server_post_event(&(kbd_event.parent), sizeof(kbd_event));
+	
+	/* delay to post up event */
+	rt_thread_delay(50);
+
+	/* post up event */
+	kbd_event.type = RTGUI_KEYUP;
+	rtgui_server_post_event(&(kbd_event.parent), sizeof(kbd_event));
+}
+
+void left()
+{
+	key_simulator(RTGUIK_LEFT);
+}
+FINSH_FUNCTION_EXPORT(left, left key);
+
+void right()
+{
+	key_simulator(RTGUIK_LEFT);
+}
+FINSH_FUNCTION_EXPORT(right, right key);
+
+void down()
+{
+	key_simulator(RTGUIK_DOWN);
+}
+FINSH_FUNCTION_EXPORT(down, down key);
+
+void up()
+{
+	key_simulator(RTGUI_KEYUP);
+}
+FINSH_FUNCTION_EXPORT(up, up key);
+
+/*@}*/
diff --git a/bsp/dev3210/board.c b/bsp/dev3210/board.c
new file mode 100644
index 0000000000..c0f6710f02
--- /dev/null
+++ b/bsp/dev3210/board.c
@@ -0,0 +1,102 @@
+/*
+ * File      : board.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006, RT-Thread Develop Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2010-06-25     Bernard      first version
+ */
+
+#include <rtthread.h>
+#include <rthw.h>
+
+#include "board.h"
+#include "uart.h"
+#include <soc3210.h>
+
+/**
+ * @addtogroup Loongson SoC3210
+ */
+/*@{*/
+
+/**
+ * This is the timer interrupt service routine.
+ */
+void rt_hw_timer_handler()
+{
+    unsigned int count;
+
+    count = read_c0_compare();
+    write_c0_compare(count);
+    write_c0_count(0);
+
+	/* increase a OS tick */
+	rt_tick_increase();
+}
+
+/**
+ * This function will initial OS timer
+ */
+void rt_hw_timer_init()
+{
+    write_c0_compare(CPU_HZ/2/RT_TICK_PER_SECOND);
+    write_c0_count(0);
+}
+
+/**
+ * This function will initial sam7s64 board.
+ */
+void rt_hw_board_init()
+{
+#ifdef RT_USING_UART
+	/* init hardware UART device */
+	rt_hw_uart_init();
+#endif
+
+#ifdef RT_USING_CONSOLE
+	/* set console device */
+	rt_console_set_device("uart");
+#endif
+
+	/* init operating system timer */
+	rt_hw_timer_init();
+
+	rt_kprintf("current sr: 0x%08x\n", read_c0_status());
+}
+/*@}*/
+
+/* UART line status register value */
+#define UARTLSR_ERROR	(1 << 7)
+#define UARTLSR_TE		(1 << 6)
+#define UARTLSR_TFE		(1 << 5)
+#define UARTLSR_BI		(1 << 4)
+#define UARTLSR_FE		(1 << 3)
+#define UARTLSR_PE		(1 << 2)
+#define UARTLSR_OE		(1 << 1)
+#define UARTLSR_DR		(1 << 0)
+void rt_hw_console_output(const char* ptr)
+{
+	/* stream mode */
+	while (*ptr)
+	{
+		if (*ptr == '\n')
+		{
+			/* FIFO status, contain valid data */
+			while (!(UART_LSR(UART0_BASE) & (UARTLSR_TE | UARTLSR_TFE)));
+			/* write data */
+			UART_DAT(UART0_BASE) = '\r';
+		}
+
+		/* FIFO status, contain valid data */
+		while (!(UART_LSR(UART0_BASE) & (UARTLSR_TE | UARTLSR_TFE)));
+		/* write data */
+		UART_DAT(UART0_BASE) = *ptr;
+
+		ptr ++;
+	}
+}
diff --git a/bsp/dev3210/board.h b/bsp/dev3210/board.h
new file mode 100644
index 0000000000..51c083310f
--- /dev/null
+++ b/bsp/dev3210/board.h
@@ -0,0 +1,24 @@
+/*
+ * File      : board.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006-2010, RT-Thread Develop Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2010-06-25     Bernard      first version
+ */
+
+#ifndef __BOARD_H__
+#define __BOARD_H__
+
+void rt_hw_board_init(void);
+
+/* 32M SDRAM */
+#define RT_HW_HEAP_END	(0x80000000 + 32 * 1024 * 1024)
+#define CPU_HZ			(250 * 1000000)
+
+#endif
diff --git a/bsp/dev3210/dev3210_ram.lds b/bsp/dev3210/dev3210_ram.lds
new file mode 100644
index 0000000000..d3e177d02b
--- /dev/null
+++ b/bsp/dev3210/dev3210_ram.lds
@@ -0,0 +1,153 @@
+/*
+ * File      : jz47xx_ram.lds
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2010, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2010-05-17     swkyer       first version
+ * 2010-09-04     bernard      move the beginning entry to 0x80200000
+ */
+
+OUTPUT_FORMAT("elf32-tradlittlemips", "elf32-tradlittlemips", "elf32-tradlittlemips")
+OUTPUT_ARCH(mips)
+
+MEMORY
+{
+   /* 16M SDRAM */
+   DRAM : ORIGIN = 0x80200000, LENGTH = 0x01000000
+   /* 16K SRAM  */
+   IRAM : ORIGIN = 0x80000000, LENGTH = 0x00004000
+}
+
+ENTRY(_start)
+SECTIONS
+{
+	. = 0x80200000 ;
+
+	.start :
+    {
+        *(.start);
+    } > DRAM
+
+    . = ALIGN(4);
+
+	.text : 
+    {
+     *(.text)
+     *(.text.*)
+     *(.rodata)
+     *(.rodata.*)
+     *(.rodata1)
+     *(.rodata1.*)
+     
+     /* section information for finsh shell */
+     . = ALIGN(4);
+     __fsymtab_start = .;
+     KEEP(*(FSymTab))
+     __fsymtab_end = .;
+     . = ALIGN(4);
+     __vsymtab_start = .;
+     KEEP(*(VSymTab))
+     __vsymtab_end = .;
+     . = ALIGN(4);
+    } > DRAM
+
+    . = ALIGN(4);
+
+	.data : 
+    {
+     *(.data)
+     *(.data.*)
+    
+     *(.data1)
+     *(.data1.*)
+     
+     . = ALIGN(8);
+     _gp = ABSOLUTE(.);     /* Base of small data */
+     
+     *(.sdata)
+     *(.sdata.*)
+    } > DRAM
+
+    . = ALIGN(4);
+	_iramat = .;
+
+	.iram : AT(_iramat)
+    {
+		_iramstart = .;
+        *(.vectors.1);
+        . = 0x100;
+        *(.vectors.2);
+        . = 0x180;
+        *(.vectors.3);
+        . = 0x200;
+        *(.vectors.4);
+        *(.vectors);
+
+        *(.icode);
+        *(.irodata);
+        *(.idata);
+        KEEP(*(.vectors*))
+		_iramend = .;
+    } > IRAM
+    _iramcopy = LOADADDR(.iram);
+
+	.sbss : 
+  	{
+	__bss_start = .;
+		*(.sbss)
+        *(.sbss.*)
+        *(.dynsbss)
+		*(.scommon)
+ 	} > DRAM
+
+ 	.bss :
+ 	{
+		*(.bss)
+        *(.bss.*)
+        *(.dynbss)
+		*(COMMON)
+	__bss_end = .;
+ 	} > DRAM
+	
+    _end = .;
+
+    /* Stabs debugging sections.  */
+    .stab          0 : { *(.stab) }
+    .stabstr       0 : { *(.stabstr) }
+    .stab.excl     0 : { *(.stab.excl) }
+    .stab.exclstr  0 : { *(.stab.exclstr) }
+    .stab.index    0 : { *(.stab.index) }
+    .stab.indexstr 0 : { *(.stab.indexstr) }
+    .comment       0 : { *(.comment) }
+    /* DWARF debug sections.
+     * Symbols in the DWARF debugging sections are relative to the beginning
+     * of the section so we begin them at 0.  */
+    /* DWARF 1 */
+    .debug          0 : { *(.debug) }
+    .line           0 : { *(.line) }
+    /* GNU DWARF 1 extensions */
+    .debug_srcinfo  0 : { *(.debug_srcinfo) }
+    .debug_sfnames  0 : { *(.debug_sfnames) }
+    /* DWARF 1.1 and DWARF 2 */
+    .debug_aranges  0 : { *(.debug_aranges) }
+    .debug_pubnames 0 : { *(.debug_pubnames) }
+    /* DWARF 2 */
+    .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
+    .debug_abbrev   0 : { *(.debug_abbrev) }
+    .debug_line     0 : { *(.debug_line) }
+    .debug_frame    0 : { *(.debug_frame) }
+    .debug_str      0 : { *(.debug_str) }
+    .debug_loc      0 : { *(.debug_loc) }
+    .debug_macinfo  0 : { *(.debug_macinfo) }
+    /* SGI/MIPS DWARF 2 extensions */
+    .debug_weaknames 0 : { *(.debug_weaknames) }
+    .debug_funcnames 0 : { *(.debug_funcnames) }
+    .debug_typenames 0 : { *(.debug_typenames) }
+    .debug_varnames  0 : { *(.debug_varnames) }
+}
diff --git a/bsp/dev3210/dw.txt b/bsp/dev3210/dw.txt
new file mode 100644
index 0000000000..e58da7fea4
--- /dev/null
+++ b/bsp/dev3210/dw.txt
@@ -0,0 +1,6 @@
+ifaddr dmfe0 192.168.1.100

+load tftp://192.168.1.5/boot_3210 0x80200000

+

+ifaddr dmfe0 192.168.1.100

+load tftp://192.168.1.5/rtthread.elf 0x80200000

+oload tftp://192.168.1.5/rtthread.bin 0x80200000

diff --git a/bsp/dev3210/lnn800x480.c b/bsp/dev3210/lnn800x480.c
new file mode 100644
index 0000000000..380034de84
--- /dev/null
+++ b/bsp/dev3210/lnn800x480.c
@@ -0,0 +1,184 @@
+/*

+ * File      : lcd_800480.c

+ * This file is part of RT-Thread RTOS

+ * COPYRIGHT (C) 2010, RT-Thread Develop Team

+ *

+ * The license and distribution terms for this file may be

+ * found in the file LICENSE in this distribution or at

+ * http://www.rt-thread.org/license/LICENSE

+ *

+ * Change Logs:

+ * Date           Author       Notes

+ * 2010-01-01     bernard      first version from QiuYi's driver

+ */

+

+#include <rtthread.h>

+#include <soc3210.h>

+#include <rtgui/driver.h>

+#include <rtgui/color.h>

+

+/* LCD driver for 800x480 16bit */

+#define RT_HW_LCD_WIDTH		800

+#define RT_HW_LCD_HEIGHT	480

+

+ALIGN(4)

+volatile rt_uint16_t _rt_framebuffer[RT_HW_LCD_HEIGHT][RT_HW_LCD_WIDTH];

+

+#define K1BASE				0xA0000000

+#define KSEG1(addr)			((void *)(K1BASE | (rt_uint32_t)(addr)))

+#define HW_FB_ADDR			KSEG1(_rt_framebuffer)

+#define HW_FB_PIXEL(x, y)	*(volatile rt_uint16_t*)((rt_uint8_t*)HW_FB_ADDR + (y * RT_HW_LCD_WIDTH * 2) + x * 2)

+

+void rt_hw_lcd_update(rtgui_rect_t *rect)

+{

+}

+

+rt_uint8_t * rt_hw_lcd_get_framebuffer(void)

+{

+	return (rt_uint8_t *)HW_FB_ADDR;

+}

+

+void rt_hw_lcd_set_pixel(rtgui_color_t *c, rt_base_t x, rt_base_t y)

+{

+    if (x < RT_HW_LCD_WIDTH && y < RT_HW_LCD_HEIGHT)

+	{

+		HW_FB_PIXEL(x, y) = rtgui_color_to_565p(*c);

+	}

+}

+

+void rt_hw_lcd_get_pixel(rtgui_color_t *c, rt_base_t x, rt_base_t y)

+{

+    if (x < RT_HW_LCD_WIDTH && y < RT_HW_LCD_HEIGHT)

+	{

+		*c = rtgui_color_from_565p(HW_FB_PIXEL(x, y));

+	}

+

+    return ;

+}

+

+void rt_hw_lcd_draw_hline(rtgui_color_t *c, rt_base_t x1, rt_base_t x2, rt_base_t y)

+{

+	rt_uint32_t idx;

+	rt_uint16_t color;

+

+	/* get color pixel */

+	color = rtgui_color_to_565p(*c);

+

+	for (idx = x1; idx < x2; idx ++)

+	{

+		HW_FB_PIXEL(idx, y) = color;

+	}

+}

+

+void rt_hw_lcd_draw_vline(rtgui_color_t *c, rt_base_t x, rt_base_t y1, rt_base_t y2)

+{

+    rt_uint32_t idy;

+	rt_uint16_t color;

+

+	/* get color pixel */

+	color = rtgui_color_to_565p(*c);

+

+	for (idy = y1; idy < y2; idy ++)

+	{

+		HW_FB_PIXEL(x, idy) = color;

+	}

+}

+

+void rt_hw_lcd_draw_raw_hline(rt_uint8_t *pixels, rt_base_t x1, rt_base_t x2, rt_base_t y)

+{

+	rt_uint8_t* ptr;

+

+	ptr = (rt_uint8_t*)&HW_FB_PIXEL(x1, y);

+	rt_memcpy(ptr, pixels, (x2 - x1) * 2);

+}

+

+struct rtgui_graphic_driver _rtgui_lcd_driver =

+{

+	"lcd",

+	2,

+	RT_HW_LCD_WIDTH,

+	RT_HW_LCD_HEIGHT,

+	rt_hw_lcd_update,

+	rt_hw_lcd_get_framebuffer,

+	rt_hw_lcd_set_pixel,

+	rt_hw_lcd_get_pixel,

+	rt_hw_lcd_draw_hline,

+	rt_hw_lcd_draw_vline,

+	rt_hw_lcd_draw_raw_hline

+};

+

+#include "finsh.h"

+void hline(rt_uint32_t c, int x1, int x2, int y)

+{

+    rtgui_color_t color = (rtgui_color_t)c;

+    rt_hw_lcd_draw_hline(&color, x1, x2, y);

+}

+FINSH_FUNCTION_EXPORT(hline, draw a hline);

+

+void vline(rt_uint32_t c, int x, int y1, int y2)

+{

+    rtgui_color_t color = (rtgui_color_t)c;

+    rt_hw_lcd_draw_vline(&color, x, y1, y2);

+}

+FINSH_FUNCTION_EXPORT(vline, draw a vline);

+

+void clear()

+{

+    int y;

+

+    for (y = 0; y < _rtgui_lcd_driver.height; y ++)

+    {

+        rt_hw_lcd_draw_hline((rtgui_color_t*)&white, 0, 240, y);

+    }

+}

+FINSH_FUNCTION_EXPORT(clear, clear screen);

+

+void fill(rt_uint32_t c)

+{

+    int y;

+	rtgui_color_t color = (rtgui_color_t)c;

+

+    for (y = 0; y < _rtgui_lcd_driver.height; y ++)

+    {

+        rt_hw_lcd_draw_hline(&color, 0, _rtgui_lcd_driver.width, y);

+    }

+}

+FINSH_FUNCTION_EXPORT(fill, fill screen with color);

+

+void lcd_init()

+{

+	/* disable LCD controller */

+	LCD_CTRL = LCD_CTRL & 0xfffe;

+

+	/* set LCD clock */

+	HSB_MISC_REG = (HSB_MISC_REG & 0xFFFD01FF) | 

+		(0x01 << 17) | /* enable LCD */

+		(0x05 << 9);    /* clock */

+

+	LCD_VBARA = (rt_uint32_t)_rt_framebuffer - 0x80000000;

+	LCD_VBARB = (rt_uint32_t)_rt_framebuffer - 0x80000000;

+

+	LCD_HTIM  = 0x12c031f;

+	LCD_VTIM  = 0x11501df;

+	LCD_HVLEN = 0x41e0279;

+

+	LCD_CTRL = 0x8709;

+

+	rt_kprintf("VBARA 0x%08x\n", LCD_VBARA);

+	rt_kprintf("CTRL 0x%08x\n", LCD_CTRL);

+	rt_kprintf("HTIM 0x%08x\n", LCD_HTIM);

+	rt_kprintf("VTIM 0x%08x\n", LCD_VTIM);

+	rt_kprintf("HVLEN 0x%08x\n", LCD_HVLEN);

+	rt_kprintf("HSB_MISC 0x%08x\n", HSB_MISC_REG);

+

+#ifdef RT_USING_RTGUI

+	/* add lcd driver into graphic driver */

+	rtgui_graphic_driver_add(&_rtgui_lcd_driver);

+#endif

+}

+FINSH_FUNCTION_EXPORT(lcd_init, init lcd);

+

+void rt_hw_lcd_init()

+{

+	lcd_init();

+}

diff --git a/bsp/dev3210/rtconfig.h b/bsp/dev3210/rtconfig.h
new file mode 100644
index 0000000000..7b8b32600f
--- /dev/null
+++ b/bsp/dev3210/rtconfig.h
@@ -0,0 +1,154 @@
+/* RT-Thread config file */

+#ifndef __RTTHREAD_CFG_H__

+#define __RTTHREAD_CFG_H__

+

+/* RT_NAME_MAX*/

+#define RT_NAME_MAX	10

+

+/* RT_ALIGN_SIZE*/

+#define RT_ALIGN_SIZE	4

+

+/* PRIORITY_MAX */

+#define RT_THREAD_PRIORITY_MAX	256

+

+/* Tick per Second */

+#define RT_TICK_PER_SECOND	100

+

+/* SECTION: RT_DEBUG */

+/* Thread Debug */

+#define RT_DEBUG

+#define RT_USING_OVERFLOW_CHECK

+

+/* Using Hook */

+#define RT_USING_HOOK

+

+/* Using Software Timer */

+/* #define RT_USING_TIMER_SOFT */

+#define RT_TIMER_THREAD_PRIO		4

+#define RT_TIMER_THREAD_STACK_SIZE	512

+#define RT_TIMER_TICK_PER_SECOND	10

+

+/* SECTION: IPC */

+/* Using Semaphore */

+#define RT_USING_SEMAPHORE

+

+/* Using Mutex */

+#define RT_USING_MUTEX

+

+/* Using Event */

+#define RT_USING_EVENT

+

+/* Using MailBox */

+#define RT_USING_MAILBOX

+

+/* Using Message Queue */

+#define RT_USING_MESSAGEQUEUE

+

+/* SECTION: Memory Management */

+/* Using Memory Pool Management*/

+#define RT_USING_MEMPOOL

+

+/* Using Dynamic Heap Management */

+#define RT_USING_HEAP

+

+/* Using SLAB MM */

+#define RT_USING_SLAB

+

+/* SECTION: Device System */

+/* Using Device System */

+#define RT_USING_DEVICE

+#define RT_USING_UART

+#define RT_USING_UART1

+#define RT_UART_RX_BUFFER_SIZE	64

+

+/* SECTION: Console options */

+/* the buffer size of console */

+#define RT_USING_CONSOLE

+#define RT_CONSOLEBUF_SIZE	128

+

+/* SECTION: finsh, a C-Express shell */

+/* Using FinSH as Shell*/

+#define RT_USING_FINSH

+/* Using symbol table */

+#define FINSH_USING_SYMTAB

+#define FINSH_USING_DESCRIPTION

+#define FINSH_DEVICE_NAME "uart"

+

+/* SECTION: device filesystem support */

+/* #define RT_USING_DFS */

+#define RT_USING_DFS_ELMFAT

+

+/* the max number of mounted filesystem */

+#define DFS_FILESYSTEMS_MAX			2

+/* the max number of opened files 		*/

+#define DFS_FD_MAX					4

+/* the max number of cached sector 		*/

+#define DFS_CACHE_MAX_NUM   		4

+

+/* SECTION: lwip, a lighwight TCP/IP protocol stack */

+/* #define RT_USING_LWIP */

+#define RT_LWIP_USING_RT_MEM

+

+/* Enable ICMP protocol*/

+#define RT_LWIP_ICMP

+/* Enable UDP protocol*/

+#define RT_LWIP_UDP

+/* Enable TCP protocol*/

+#define RT_LWIP_TCP

+/* Enable DNS */

+#define RT_LWIP_DNS

+

+/* the number of simulatenously active TCP connections*/

+#define RT_LWIP_TCP_PCB_NUM	5

+

+/* ip address of target*/

+#define RT_LWIP_IPADDR0	192

+#define RT_LWIP_IPADDR1	168

+#define RT_LWIP_IPADDR2	1

+#define RT_LWIP_IPADDR3	30

+

+/* gateway address of target*/

+#define RT_LWIP_GWADDR0	192

+#define RT_LWIP_GWADDR1	168

+#define RT_LWIP_GWADDR2	1

+#define RT_LWIP_GWADDR3	1

+

+/* mask address of target*/

+#define RT_LWIP_MSKADDR0	255

+#define RT_LWIP_MSKADDR1	255

+#define RT_LWIP_MSKADDR2	255

+#define RT_LWIP_MSKADDR3	0

+

+/* tcp thread options */

+#define RT_LWIP_TCPTHREAD_PRIORITY		12

+#define RT_LWIP_TCPTHREAD_MBOX_SIZE		4

+#define RT_LWIP_TCPTHREAD_STACKSIZE		1024

+

+/* ethernet if thread options */

+#define RT_LWIP_ETHTHREAD_PRIORITY		15

+#define RT_LWIP_ETHTHREAD_MBOX_SIZE		4

+#define RT_LWIP_ETHTHREAD_STACKSIZE		512

+

+/* SECTION: RT-Thread/GUI */

+#define RT_USING_RTGUI

+

+/* name length of RTGUI object */

+#define RTGUI_NAME_MAX		12

+/* support 16 weight font */

+#define RTGUI_USING_FONT16

+/* support 12 weight font */

+#define RTGUI_USING_FONT12

+/* support Chinese font */

+#define RTGUI_USING_FONTHZ

+/* use DFS as file interface */

+#define RTGUI_USING_DFS_FILERW

+/* use bmp font as Chinese font */

+#define RTGUI_USING_HZ_BMP

+/* use small size in RTGUI */

+#define RTGUI_USING_SMALL_SIZE

+/* use mouse cursor */

+/* #define RTGUI_USING_MOUSE_CURSOR */

+/* default font size in RTGUI */

+#define RTGUI_DEFAULT_FONT_SIZE	16

+

+#endif

diff --git a/bsp/dev3210/rtconfig.py b/bsp/dev3210/rtconfig.py
new file mode 100644
index 0000000000..2f7b09c52f
--- /dev/null
+++ b/bsp/dev3210/rtconfig.py
@@ -0,0 +1,88 @@
+import SCons.cpp

+

+# component options

+

+# make all component false

+RT_USING_FINSH 		= False

+RT_USING_DFS 		= False

+RT_USING_DFS_ELMFAT = False

+RT_USING_DFS_YAFFS2	= False

+RT_USING_LWIP 		= False

+RT_USING_WEBSERVER	= False

+RT_USING_RTGUI 		= False

+RT_USING_MODULE		= False

+

+# parse rtconfig.h to get used component

+PreProcessor = SCons.cpp.PreProcessor()

+f = file('rtconfig.h', 'r')

+contents = f.read()

+f.close()

+PreProcessor.process_contents(contents)

+rtconfig_ns = PreProcessor.cpp_namespace

+

+# finsh shell options

+if rtconfig_ns.has_key('RT_USING_FINSH'):

+	RT_USING_FINSH = True

+

+# device virtual filesystem options

+if rtconfig_ns.has_key('RT_USING_DFS'):

+    RT_USING_DFS = True

+

+    if rtconfig_ns.has_key('RT_USING_DFS_ELMFAT'):

+        RT_USING_DFS_ELMFAT = True

+    if rtconfig_ns.has_key('RT_USING_DFS_YAFFS2'):

+        RT_USING_DFS_YAFFS2 = True

+

+# lwip options

+if rtconfig_ns.has_key('RT_USING_LWIP'):

+    RT_USING_LWIP = True

+    if rtconfig_ns.has_key('RT_USING_WEBSERVER'):

+        RT_USING_WEBSERVER = True

+

+# rtgui options

+if rtconfig_ns.has_key('RT_USING_RTGUI'):

+    RT_USING_RTGUI = True

+

+# module options

+if rtconfig_ns.has_key('RT_USING_MODULE'):

+    RT_USING_MODULE = True

+

+# CPU options

+ARCH='mips'

+CPU ='loongson'

+

+# toolchains options

+CROSS_TOOL  = 'gcc'

+PLATFORM 	= 'gcc'

+EXEC_PATH 	= 'E:/Program Files/CodeSourcery/Sourcery G++ Lite/bin'

+BUILD		= 'debug'

+

+PREFIX = 'mips-sde-elf-'

+CC = PREFIX + 'gcc'

+AS = PREFIX + 'gcc'

+AR = PREFIX + 'ar'

+LINK = PREFIX + 'gcc'

+TARGET_EXT = 'elf'

+SIZE = PREFIX + 'size'

+OBJDUMP = PREFIX + 'objdump'

+OBJCPY = PREFIX + 'objcopy'

+READELF = PREFIX + 'readelf'

+

+DEVICE = ' -mips2'

+CFLAGS = DEVICE + ' -EL -G0 -DRT_USING_MINILIBC -mno-abicalls -fno-pic -fno-builtin -fno-exceptions -ffunction-sections -fomit-frame-pointer'

+AFLAGS = ' -c' + DEVICE + ' -EL -fno-pic -fno-builtin -mno-abicalls -x assembler-with-cpp'

+LFLAGS = DEVICE + ' -EL -Wl,--gc-sections,-Map=rtthread-3210.map,-cref,-u,Reset_Handler -T dev3210_ram.lds'

+

+CPATH = ''

+LPATH = ''

+

+if BUILD == 'debug':

+	CFLAGS += ' -O0 -gdwarf-2'

+	AFLAGS += ' -gdwarf-2'

+else:

+	CFLAGS += ' -O2'

+

+RT_USING_MINILIBC = True

+DUMP_ACTION = OBJDUMP + ' -D -S $TARGET > rtt.asm\n'

+READELF_ACTION = READELF + ' -a $TARGET > rtt.map\n'

+POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' + READELF_ACTION

diff --git a/bsp/dev3210/startup.c b/bsp/dev3210/startup.c
new file mode 100644
index 0000000000..29aa38e2ec
--- /dev/null
+++ b/bsp/dev3210/startup.c
@@ -0,0 +1,103 @@
+/*
+ * File      : startup.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006, RT-Thread Develop Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2010-06-25     Bernard      first version
+ */
+
+#include <rthw.h>
+#include <rtthread.h>
+#include <cache.h>
+
+#include "board.h"
+
+/**
+ * @addtogroup Loongson SoC3210
+ */
+
+/*@{*/
+extern unsigned char __bss_start;
+extern unsigned char __bss_end;
+
+extern int rt_application_init(void);
+
+void dump_mem(const unsigned char* addr)
+{
+	int size;
+	rt_kprintf("---- memory: 0x%08x ----\n", addr);
+	for (size = 0; size < 32 * 4; size ++)
+	{
+		rt_kprintf("%02x ", (*addr) & 0xff);
+		addr ++;
+		if ((size + 1) % 16 == 0)
+			rt_kprintf("\n");
+	}
+	rt_kprintf("\n");
+}
+
+/**
+ * This function will startup RT-Thread RTOS.
+ */
+void rtthread_startup(void)
+{
+	/* init cache */
+	rt_hw_cache_init();
+	/* init hardware interrupt */
+	rt_hw_interrupt_init();
+
+	/*
+	dump_mem((rt_uint8_t*)0x80000000);
+	dump_mem((rt_uint8_t*)0x80000100);
+	dump_mem((rt_uint8_t*)0x80000180);
+	dump_mem((rt_uint8_t*)0x80000200);
+	*/
+
+	/* init board */
+	rt_hw_board_init();
+	rt_show_version();
+
+	/* init tick */
+	rt_system_tick_init();
+
+	/* init timer system */
+	rt_system_timer_init();
+
+#ifdef RT_USING_HEAP
+	rt_system_heap_init((void*)&__bss_end, (void*)RT_HW_HEAP_END);
+#endif
+
+	/* init scheduler system */
+	rt_system_scheduler_init();
+
+#ifdef RT_USING_DEVICE
+	/* init all device */
+	rt_device_init_all();
+#endif
+
+	/* init application */
+	rt_application_init();
+
+#ifdef RT_USING_FINSH
+	/* init finsh */
+	finsh_system_init();
+	finsh_set_device(FINSH_DEVICE_NAME);
+#endif
+
+	/* init idle thread */
+	rt_thread_idle_init();
+
+	/* start scheduler */
+	rt_system_scheduler_start();
+
+	/* never reach here */
+	return ;
+}
+
+/*@}*/
diff --git a/bsp/dev3210/uart.c b/bsp/dev3210/uart.c
new file mode 100644
index 0000000000..8851678e68
--- /dev/null
+++ b/bsp/dev3210/uart.c
@@ -0,0 +1,282 @@
+#include <rthw.h>

+#include <rtthread.h>

+

+#include <soc3210.h>

+

+/**

+ * @addtogroup Loongson SoC3210

+ */

+

+/*@{*/

+#if defined(RT_USING_UART) && defined(RT_USING_DEVICE)

+

+/* UART interrupt enable register value */

+#define UARTIER_IME		(1 << 3)

+#define UARTIER_ILE		(1 << 2) 

+#define UARTIER_ITXE	(1 << 1)

+#define UARTIER_IRXE	(1 << 0)

+

+/* UART line control register value */

+#define UARTLCR_DLAB	(1 << 7)

+#define UARTLCR_BCB		(1 << 6)

+#define UARTLCR_SPB		(1 << 5)

+#define UARTLCR_EPS		(1 << 4)

+#define UARTLCR_PE		(1 << 3)

+#define UARTLCR_SB		(1 << 2)

+

+/* UART line status register value */

+#define UARTLSR_ERROR	(1 << 7)

+#define UARTLSR_TE		(1 << 6)

+#define UARTLSR_TFE		(1 << 5)

+#define UARTLSR_BI		(1 << 4)

+#define UARTLSR_FE		(1 << 3)

+#define UARTLSR_PE		(1 << 2)

+#define UARTLSR_OE		(1 << 1)

+#define UARTLSR_DR		(1 << 0)

+

+struct rt_uart_soc3210

+{

+	struct rt_device parent;

+

+	rt_uint32_t hw_base;

+	rt_uint32_t irq;

+

+	/* buffer for reception */

+	rt_uint8_t read_index, save_index;

+	rt_uint8_t rx_buffer[RT_UART_RX_BUFFER_SIZE];

+}uart_device;

+

+static void rt_uart_irqhandler(int irqno)

+{

+	rt_ubase_t level;

+	rt_uint8_t isr;

+    struct rt_uart_soc3210* uart = &uart_device;

+

+    /* read interrupt status and clear it */

+	isr = UART_IIR(uart->hw_base);

+	isr = (isr >> 1) & 0x3;

+

+	if (isr & 0x02) /* receive data available */

+	{

+		/* Receive Data Available */

+		while (UART_LSR(uart->hw_base) & UARTLSR_DR)

+		{

+			uart->rx_buffer[uart->save_index] = UART_DAT(uart->hw_base);

+

+			level = rt_hw_interrupt_disable();

+			uart->save_index ++;

+			if (uart->save_index >= RT_UART_RX_BUFFER_SIZE)

+				uart->save_index = 0;

+			rt_hw_interrupt_enable(level);

+		}

+

+		/* invoke callback */

+		if(uart->parent.rx_indicate != RT_NULL)

+		{

+			rt_size_t length;

+			if (uart->read_index > uart->save_index)

+				length = RT_UART_RX_BUFFER_SIZE - uart->read_index + uart->save_index;

+			else

+				length = uart->save_index - uart->read_index;

+

+			uart->parent.rx_indicate(&uart->parent, length);

+		}

+	}

+

+	return;

+}

+

+static rt_err_t rt_uart_init (rt_device_t dev)

+{

+	rt_uint32_t baud_div;

+	struct rt_uart_soc3210 *uart = (struct rt_uart_soc3210*)dev;

+

+	RT_ASSERT(uart != RT_NULL);

+

+#if 0

+	/* init UART Hardware */

+	UART_IER(uart->hw_base) = 0; /* clear interrupt */

+	UART_FCR(uart->hw_base) = 0x60; /* reset UART Rx/Tx */

+

+	/* enable UART clock */

+	/* set databits, stopbits and parity. (8-bit data, 1 stopbit, no parity) */

+	UART_LCR(uart->hw_base) = 0x3;

+

+    /* set baudrate */

+	baud_div = DEV_CLK / 16 / UART_BAUDRATE;

+	UART_LCR(uart->hw_base) |= UARTLCR_DLAB;

+

+	UART_MSB(uart->hw_base) = (baud_div >> 8) & 0xff;

+	UART_LSB(uart->hw_base) = baud_div & 0xff;

+

+	UART_LCR(uart->hw_base) &= ~UARTLCR_DLAB;

+

+	/* Enable UART unit, enable and clear FIFO */

+	UART_FCR(uart->hw_base) = UARTFCR_UUE | UARTFCR_FE | UARTFCR_TFLS | UARTFCR_RFLS;

+#endif

+

+	return RT_EOK;

+}

+

+static rt_err_t rt_uart_open(rt_device_t dev, rt_uint16_t oflag)

+{

+	struct rt_uart_soc3210 *uart = (struct rt_uart_soc3210*)dev;

+

+	RT_ASSERT(uart != RT_NULL);

+	if (dev->flag & RT_DEVICE_FLAG_INT_RX)

+	{

+		/* Enable the UART Interrupt */

+		UART_IER(uart->hw_base) |= UARTIER_IRXE;

+

+		/* install interrupt */

+		rt_hw_interrupt_install(uart->irq, rt_uart_irqhandler, RT_NULL);

+		rt_hw_interrupt_umask(uart->irq);

+	}

+	return RT_EOK;

+}

+

+static rt_err_t rt_uart_close(rt_device_t dev)

+{

+	struct rt_uart_soc3210 *uart = (struct rt_uart_soc3210*)dev;

+

+	RT_ASSERT(uart != RT_NULL);

+	if (dev->flag & RT_DEVICE_FLAG_INT_RX)

+	{

+		/* Disable the UART Interrupt */

+		UART_IER(uart->hw_base) &= ~(UARTIER_IRXE);

+	}

+

+	return RT_EOK;

+}

+

+static rt_size_t rt_uart_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)

+{

+	rt_uint8_t* ptr;

+	struct rt_uart_soc3210 *uart = (struct rt_uart_soc3210*)dev;

+

+	RT_ASSERT(uart != RT_NULL);

+

+	/* point to buffer */

+	ptr = (rt_uint8_t*) buffer;

+	if (dev->flag & RT_DEVICE_FLAG_INT_RX)

+	{

+		while (size)

+		{

+			/* interrupt receive */

+			rt_base_t level;

+

+			/* disable interrupt */

+			level = rt_hw_interrupt_disable();

+			if (uart->read_index != uart->save_index)

+			{

+				*ptr = uart->rx_buffer[uart->read_index];

+

+				uart->read_index ++;

+				if (uart->read_index >= RT_UART_RX_BUFFER_SIZE)

+					uart->read_index = 0;

+			}

+			else

+			{

+				/* no data in rx buffer */

+

+				/* enable interrupt */

+				rt_hw_interrupt_enable(level);

+				break;

+			}

+

+			/* enable interrupt */

+			rt_hw_interrupt_enable(level);

+

+			ptr ++;

+			size --;

+		}

+

+		return (rt_uint32_t)ptr - (rt_uint32_t)buffer;

+	}

+

+	return 0;

+}

+

+static rt_size_t rt_uart_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)

+{

+	char *ptr;

+	struct rt_uart_soc3210 *uart = (struct rt_uart_soc3210*)dev;

+

+	RT_ASSERT(uart != RT_NULL);

+

+	ptr = (char*)buffer;

+

+	if (dev->flag & RT_DEVICE_FLAG_STREAM)

+	{

+		/* stream mode */

+		while (size)

+		{

+			if (*ptr == '\n')

+			{

+				/* FIFO status, contain valid data */

+				while (!(UART_LSR(uart->hw_base) & (UARTLSR_TE | UARTLSR_TFE)));

+				/* write data */

+				UART_DAT(uart->hw_base) = '\r';

+			}

+

+			/* FIFO status, contain valid data */

+			while (!(UART_LSR(uart->hw_base) & (UARTLSR_TE | UARTLSR_TFE)));

+			/* write data */

+			UART_DAT(uart->hw_base) = *ptr;

+

+			ptr ++;

+			size --;

+		}

+	}

+	else

+	{

+		while ( size != 0 )

+		{

+			/* FIFO status, contain valid data */

+			while (!(UART_LSR(uart->hw_base) & (UARTLSR_TE | UARTLSR_TFE)));

+

+			/* write data */

+			UART_DAT(uart->hw_base) = *ptr;

+

+			ptr++;

+			size--;

+		}

+	}

+

+	return (rt_size_t) ptr - (rt_size_t) buffer;

+}

+

+void rt_hw_uart_init(void)

+{

+	struct rt_uart_soc3210* uart;

+

+	/* get uart device */

+	uart = &uart_device;

+

+	/* device initialization */

+	uart->parent.type = RT_Device_Class_Char;

+	rt_memset(uart->rx_buffer, 0, sizeof(uart->rx_buffer));

+	uart->read_index = uart->save_index = 0;

+#if defined(RT_USING_UART1)

+	uart->hw_base = UART0_BASE;

+	uart->irq = IRQ_UART0;

+#elif defined(RT_USING_UART2)

+	uart->hw_base = UART1_BASE;

+	uart->irq = IRQ_UART1;

+#endif

+

+	/* device interface */

+	uart->parent.init 	    = rt_uart_init;

+	uart->parent.open 	    = rt_uart_open;

+	uart->parent.close      = rt_uart_close;

+	uart->parent.read 	    = rt_uart_read;

+	uart->parent.write      = rt_uart_write;

+	uart->parent.control    = RT_NULL;

+	uart->parent.private    = RT_NULL;

+

+	rt_device_register(&uart->parent,

+		"uart", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_STREAM | RT_DEVICE_FLAG_INT_RX);

+}

+#endif /* end of UART */

+

+/*@}*/

diff --git a/bsp/dev3210/uart.h b/bsp/dev3210/uart.h
new file mode 100644
index 0000000000..7b4663aa3d
--- /dev/null
+++ b/bsp/dev3210/uart.h
@@ -0,0 +1,6 @@
+#ifndef __UART_H__

+#define __UART_H__

+

+void rt_hw_uart_init(void);

+

+#endif