[bsp] 修改 PR 审核意见~

3 files changed, 197 insertions, 0 deletions

diff --git a/bsp/gd32105c-eval/board/linker_script/gd32_rom.icf b/bsp/gd32105c-eval/board/linker_script/gd32_rom.icf
new file mode 100644
index 0000000000..d6665c3649
--- /dev/null
+++ b/bsp/gd32105c-eval/board/linker_script/gd32_rom.icf
@@ -0,0 +1,40 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/

+/*-Editor annotation file-*/

+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */

+/*-Specials-*/

+define symbol __ICFEDIT_intvec_start__ = 0x08000000;

+/*-Memory Regions-*/

+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;

+define symbol __ICFEDIT_region_ROM_end__   = 0x0807ffff;

+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;

+define symbol __ICFEDIT_region_RAM_end__   = 0x2000FFFF;

+/*-Sizes-*/

+define symbol __ICFEDIT_size_cstack__ = 0x2000;

+define symbol __ICFEDIT_size_heap__   = 0x2000;

+/**** End of ICF editor section. ###ICF###*/

+

+export symbol __ICFEDIT_region_RAM_end__;

+

+define symbol __region_RAM1_start__ = 0x10000000;

+define symbol __region_RAM1_end__   = 0x1000FFFF;

+

+define memory mem with size = 4G;

+define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];

+define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];

+define region RAM1_region  = mem:[from __region_RAM1_start__   to __region_RAM1_end__];

+

+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };

+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };

+

+initialize by copy { readwrite };

+do not initialize  { section .noinit };

+

+keep { section FSymTab };

+keep { section VSymTab };

+keep { section .rti_fn* };

+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };

+

+place in ROM_region   { readonly };

+place in RAM_region   { readwrite,

+                        block CSTACK, block HEAP };                        

+place in RAM1_region  { section .sram };
\ No newline at end of file
diff --git a/bsp/gd32105c-eval/board/linker_script/gd32_rom.ld b/bsp/gd32105c-eval/board/linker_script/gd32_rom.ld
new file mode 100644
index 0000000000..4af47d1dcb
--- /dev/null
+++ b/bsp/gd32105c-eval/board/linker_script/gd32_rom.ld
@@ -0,0 +1,142 @@
+/*
+ * linker script for GD32F30x with GNU ld
+ * bernard.xiong 2009-10-14
+ */
+
+/* Program Entry, set to mark it as "used" and avoid gc */
+MEMORY
+{
+    CODE (rx) : ORIGIN = 0x08000000, LENGTH = 256k /* 512KB flash */
+    DATA (rw) : ORIGIN = 0x20000000, LENGTH =  96k /* 64KB sram */
+}
+ENTRY(Reset_Handler)
+_system_stack_size = 0x200;
+
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _stext = .;
+        KEEP(*(.isr_vector))            /* Startup code */
+        . = ALIGN(4);
+        *(.text)                        /* remaining code */
+        *(.text.*)                      /* remaining code */
+        *(.rodata)                      /* read-only data (constants) */
+        *(.rodata*)
+        *(.glue_7)
+        *(.glue_7t)
+        *(.gnu.linkonce.t*)
+
+        /* section information for finsh shell */
+        . = ALIGN(4);
+        __fsymtab_start = .;
+        KEEP(*(FSymTab))
+        __fsymtab_end = .;
+        . = ALIGN(4);
+        __vsymtab_start = .;
+        KEEP(*(VSymTab))
+        __vsymtab_end = .;
+        . = ALIGN(4);
+
+        /* section information for initial. */
+        . = ALIGN(4);
+        __rt_init_start = .;
+        KEEP(*(SORT(.rti_fn*)))
+        __rt_init_end = .;
+        . = ALIGN(4);
+
+        . = ALIGN(4);
+        _etext = .;
+    } > CODE = 0
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    __exidx_start = .;
+    .ARM.exidx :
+    {
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+
+        /* This is used by the startup in order to initialize the .data secion */
+        _sidata = .;
+    } > CODE
+    __exidx_end = .;
+
+    /* .data section which is used for initialized data */
+
+    .data : AT (_sidata)
+    {
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .data secion */
+        _sdata = . ;
+
+        *(.data)
+        *(.data.*)
+        *(.gnu.linkonce.d*)
+
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .data secion */
+        _edata = . ;
+    } >DATA
+
+    .stack : 
+    {
+        . = . + _system_stack_size;
+        . = ALIGN(4);
+        _estack = .;
+    } >DATA
+
+    __bss_start = .;
+    .bss :
+    {
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .bss secion */
+        _sbss = .;
+
+        *(.bss)
+        *(.bss.*)
+        *(COMMON)
+
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .bss secion */
+        _ebss = . ;
+        
+        *(.bss.init)
+    } > DATA
+    __bss_end = .;
+
+    _end = .;
+
+    /* Stabs debugging sections.  */
+    .stab          0 : { *(.stab) }
+    .stabstr       0 : { *(.stabstr) }
+    .stab.excl     0 : { *(.stab.excl) }
+    .stab.exclstr  0 : { *(.stab.exclstr) }
+    .stab.index    0 : { *(.stab.index) }
+    .stab.indexstr 0 : { *(.stab.indexstr) }
+    .comment       0 : { *(.comment) }
+    /* DWARF debug sections.
+     * Symbols in the DWARF debugging sections are relative to the beginning
+     * of the section so we begin them at 0.  */
+    /* DWARF 1 */
+    .debug          0 : { *(.debug) }
+    .line           0 : { *(.line) }
+    /* GNU DWARF 1 extensions */
+    .debug_srcinfo  0 : { *(.debug_srcinfo) }
+    .debug_sfnames  0 : { *(.debug_sfnames) }
+    /* DWARF 1.1 and DWARF 2 */
+    .debug_aranges  0 : { *(.debug_aranges) }
+    .debug_pubnames 0 : { *(.debug_pubnames) }
+    /* DWARF 2 */
+    .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
+    .debug_abbrev   0 : { *(.debug_abbrev) }
+    .debug_line     0 : { *(.debug_line) }
+    .debug_frame    0 : { *(.debug_frame) }
+    .debug_str      0 : { *(.debug_str) }
+    .debug_loc      0 : { *(.debug_loc) }
+    .debug_macinfo  0 : { *(.debug_macinfo) }
+    /* SGI/MIPS DWARF 2 extensions */
+    .debug_weaknames 0 : { *(.debug_weaknames) }
+    .debug_funcnames 0 : { *(.debug_funcnames) }
+    .debug_typenames 0 : { *(.debug_typenames) }
+    .debug_varnames  0 : { *(.debug_varnames) }
+}
diff --git a/bsp/gd32105c-eval/board/linker_script/gd32_rom.sct b/bsp/gd32105c-eval/board/linker_script/gd32_rom.sct
new file mode 100644
index 0000000000..b3144a70e0
--- /dev/null
+++ b/bsp/gd32105c-eval/board/linker_script/gd32_rom.sct
@@ -0,0 +1,15 @@
+; *************************************************************

+; *** Scatter-Loading Description File generated by uVision ***

+; *************************************************************

+

+LR_IROM1 0x08000000 0x000040000  {    ; load region size_region

+  ER_IROM1 0x08000000 0x000040000  {  ; load address = execution address

+   *.o (RESET, +First)

+   *(InRoot$$Sections)

+   .ANY (+RO)

+  }

+  RW_IRAM1 0x20000000 0x00018000  {  ; RW data

+   .ANY (+RW +ZI)

+  }

+}

+