[bsp][nxp][lpc] move lpc BSPs into nxp/lpc folders

6 files changed, 0 insertions, 546 deletions

diff --git a/bsp/lpc1114/driver/SConscript b/bsp/lpc1114/driver/SConscript
deleted file mode 100644
index 2331e725c9..0000000000
--- a/bsp/lpc1114/driver/SConscript
+++ /dev/null
@@ -1,16 +0,0 @@
-from building import *
-
-cwd  = GetCurrentDir()
-src  = Glob('*.[cs]')
-list = os.listdir(cwd)
-CPPPATH = [cwd]
-objs = []
-
-group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
-
-for d in list:
-    path = os.path.join(cwd, d)
-    if os.path.isfile(os.path.join(path, 'SConscript')):
-        objs = objs + SConscript(os.path.join(d, 'SConscript'))
-objs = objs + group
-Return('objs')
diff --git a/bsp/lpc1114/driver/board.c b/bsp/lpc1114/driver/board.c
deleted file mode 100644
index f092f26e6e..0000000000
--- a/bsp/lpc1114/driver/board.c
+++ /dev/null
@@ -1,182 +0,0 @@
-/*
- * Copyright (c) 2006-2021, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2019-05-05     jg1uaa       the first version
- */
-
-#include <rtthread.h>
-#include <rthw.h>
-
-#include "board.h"
-#include "drv_uart.h"
-
-#define SYSCON_BASE     0x40048000
-#define MEMMAP          HWREG32(SYSCON_BASE + 0x000)
-#define SYSPLLCTRL      HWREG32(SYSCON_BASE + 0x008)
-#define SYSPLLSTAT      HWREG32(SYSCON_BASE + 0x00c)
-#define SYSPLLCLKSEL    HWREG32(SYSCON_BASE + 0x040)
-#define SYSPLLCLKUEN    HWREG32(SYSCON_BASE + 0x044)
-#define MAINCLKSEL      HWREG32(SYSCON_BASE + 0x070)
-#define MAINCLKUEN      HWREG32(SYSCON_BASE + 0x074)
-#define AHBCLKCTRL      HWREG32(SYSCON_BASE + 0x080)
-#define PDRUNCFG        HWREG32(SYSCON_BASE + 0x238)
-
-#define SCB_BASE        0xe000e000
-#define SYST_CSR        HWREG32(SCB_BASE + 0x010)
-#define SYST_RVR        HWREG32(SCB_BASE + 0x014)
-#define NVIC_ISER       HWREG32(SCB_BASE + 0x100)
-#define NVIC_ICER       HWREG32(SCB_BASE + 0x180)
-#define NVIC_ISPR       HWREG32(SCB_BASE + 0x200)
-#define NVIC_ICPR       HWREG32(SCB_BASE + 0x280)
-#define NVIC_IPR(irqno) HWREG32(SCB_BASE + 0x400 + (((irqno) / 4) << 2))
-#define SCB_SHPR3       HWREG32(SCB_BASE + 0xd20)
-
-extern unsigned char __bss_end__[];
-extern unsigned char _ram_end[];
-
-/**
- * This is the timer interrupt service routine.
- */
-void SysTick_Handler(void)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-
-    rt_tick_increase();
-
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-
-void os_clock_init(void)
-{
-    /* bump up system clock 12MHz to 48MHz, using IRC (internal RC) osc. */
-
-    MAINCLKSEL = 0;             // main clock: IRC @12MHz (default, for safety)
-    MAINCLKUEN = 0;
-    MAINCLKUEN = 1;
-
-    PDRUNCFG &= ~0x80;           // power up System PLL
-
-    SYSPLLCLKSEL = 0;           // PLL clock source: IRC osc
-    SYSPLLCLKUEN = 0;
-    SYSPLLCLKUEN = 1;
-
-    SYSPLLCTRL = 0x23;          // Fcco = 2 x P x FCLKOUT
-                                //  192MHz = 2 x 2 x 48MHz
-                                // M = FCLKOUT / FCLKIN
-                                //  4 = 48MHz / 12MHz
-
-    while (!(SYSPLLSTAT & 1));  // wait for lock PLL
-
-    MAINCLKSEL = 3;             // main clock: system PLL
-    MAINCLKUEN = 0;
-    MAINCLKUEN = 1;
-
-    AHBCLKCTRL |= (1 << 16);    // power up IOCON
-}
-
-void SysTick_init(void)
-{
-    rt_uint32_t shpr3;
-
-    /* set SysTick interrupt priority */
-    shpr3 = SCB_SHPR3;
-    shpr3 &= ~0xff000000;
-    shpr3 |= 0x40 << 24;
-    SCB_SHPR3 = shpr3;
-
-    /* start SysTick */
-    SYST_CSR = 0x06;    // Clock source:Core, SysTick Exception:enable
-    SYST_RVR = (CPU_CLOCK / RT_TICK_PER_SECOND) - 1;
-    SYST_CSR = 0x07;    // Counter:enable
-}
-
-/**
- * This function initializes LPC1114 SoC.
- */
-void rt_hw_board_init(void)
-{
-    os_clock_init();
-
-    /* init SysTick */
-    SysTick_init();
-
-#ifdef RT_USING_HEAP
-    /* initialize system heap */
-    rt_system_heap_init((void *)&__bss_end__, (void *)&_ram_end);
-#endif
-    /* initialize uart */
-    rt_hw_uart_init();
-
-#if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE)
-    /* set console device */
-    rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
-#endif
-
-#ifdef RT_USING_COMPONENTS_INIT
-    rt_components_board_init();
-#endif
-}
-
-/**
- * Enable External Interrupt
- */
-void NVIC_EnableIRQ(rt_int32_t irqno)
-{
-    NVIC_ISER = 1UL << (irqno & 0x1f);
-}
-
-/**
- * Disable External Interrupt
- */
-void NVIC_DisableIRQ(rt_int32_t irqno)
-{
-    NVIC_ICER = 1UL << (irqno & 0x1f);
-}
-
-/**
- * Get Pending Interrupt
- *      Different from CMSIS implementation,
- *      returns zero/non-zero, not zero/one.
- */
-rt_uint32_t NVIC_GetPendingIRQ(rt_int32_t irqno)
-{
-    return NVIC_ISPR & (1UL << (irqno & 0x1f));
-}
-
-/**
- * Set Pending Interrupt
- */
-void NVIC_SetPendingIRQ(rt_int32_t irqno)
-{
-    NVIC_ISPR = 1UL << (irqno & 0x1f);
-}
-
-/**
- * Clear Pending Interrupt
- */
-void NVIC_ClearPendingIRQ(rt_int32_t irqno)
-{
-    NVIC_ICPR = 1UL << (irqno & 0x1f);
-}
-
-/**
- * Set Interrupt Priority
- *      Different from CMSIS implementation,
- *      this code supports only external (device specific) interrupt.
- */
-void NVIC_SetPriority(rt_int32_t irqno, rt_uint32_t priority)
-{
-    rt_uint32_t shift, ipr;
-
-    shift = (irqno % 4) * 8;
-    ipr = NVIC_IPR(irqno);
-    ipr &= ~(0xffUL << shift);
-    ipr |= (priority & 0xff) << shift;
-    NVIC_IPR(irqno) = ipr;
-}
diff --git a/bsp/lpc1114/driver/board.h b/bsp/lpc1114/driver/board.h
deleted file mode 100644
index a0022a8c59..0000000000
--- a/bsp/lpc1114/driver/board.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * Copyright (c) 2019, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2019-05-05     jg1uaa       the first version
- */
-
-#ifndef __BOARD_H__
-#define __BOARD_H__
-
-#define CPU_CLOCK       48000000        // Hz
-
-void rt_hw_board_init(void);
-
-void NVIC_EnableIRQ(rt_int32_t irqno);
-void NVIC_DisableIRQ(rt_int32_t irqno);
-rt_uint32_t NVIC_GetPendingIRQ(rt_int32_t irqno);
-void NVIC_SetPendingIRQ(rt_int32_t irqno);
-void NVIC_ClearPendingIRQ(rt_int32_t irqno);
-void NVIC_SetPriority(rt_int32_t irqno, rt_uint32_t priority);
-
-#endif /* __BOARD_H__ */
diff --git a/bsp/lpc1114/driver/drv_uart.c b/bsp/lpc1114/driver/drv_uart.c
deleted file mode 100644
index 515310ed5f..0000000000
--- a/bsp/lpc1114/driver/drv_uart.c
+++ /dev/null
@@ -1,177 +0,0 @@
-/*
- * Copyright (c) 2006-2021, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2013-05-18     Bernard      The first version for LPC40xx
- * 2019-05-05     jg1uaa       port to LPC1114
- */
-#include <stddef.h>
-#include <rtthread.h>
-#include <rtdevice.h>
-#include <rthw.h>
-#include "board.h"      // CPU_CLOCK
-#include "drv_uart.h"
-
-#ifdef RT_USING_SERIAL
-
-#define UART_BASE       0x40008000              // UART (only one)
-#define UART_IRQ        21
-#define UART_CLOCK      (CPU_CLOCK / 1)         // Hz
-
-#define URBR            HWREG32(UART_BASE + 0x00)       // R-
-#define UTHR            HWREG32(UART_BASE + 0x00)       // -W
-#define UIER            HWREG32(UART_BASE + 0x04)       // RW
-#define UIIR            HWREG32(UART_BASE + 0x08)       // R-
-#define UFCR            HWREG32(UART_BASE + 0x08)       // -W
-#define ULCR            HWREG32(UART_BASE + 0x0c)       // RW
-#define UMCR            HWREG32(UART_BASE + 0x10)       // RW
-#define ULSR            HWREG32(UART_BASE + 0x14)       // R-
-#define UMSR            HWREG32(UART_BASE + 0x18)       // R-
-
-#define UDLL            HWREG32(UART_BASE + 0x00)       // RW
-#define UDLM            HWREG32(UART_BASE + 0x04)       // RW
-
-#define IOCONFIG_BASE   0x40044000
-#define IOCON_PIO1_6    HWREG32(IOCONFIG_BASE + 0xa4)
-#define IOCON_PIO1_7    HWREG32(IOCONFIG_BASE + 0xa8)
-
-#define SYSCON_BASE     0x40048000
-#define AHBCLKCTRL      HWREG32(SYSCON_BASE + 0x80)
-#define UARTCLKDIV      HWREG32(SYSCON_BASE + 0x98)
-
-static rt_err_t lpc_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
-{
-    rt_uint32_t Fdiv = 0;
-
-    RT_ASSERT(serial != RT_NULL);
-
-    /* Initialize UART Configuration parameter structure to default state:
-     * Baudrate = 115200 bps
-     * 8 data bit
-     * 1 Stop bit
-     * None parity
-     */
-    /* set DLAB=1 */
-    ULCR |= 0x80;
-    /* config uart baudrate */
-    Fdiv = UART_CLOCK / (cfg->baud_rate * 16);
-    UDLM = Fdiv / 256;
-    UDLL = Fdiv % 256;
-    /* set DLAB=0 */
-    ULCR &= ~0x80;
-    /* config to 8 data bit,1 Stop bit,None parity */
-    ULCR |= 0x03;
-
-    /*enable and reset FIFO*/
-    UFCR = 0x07;
-
-    return RT_EOK;
-}
-
-static rt_err_t lpc_control(struct rt_serial_device *serial, int cmd, void *arg)
-{
-    RT_ASSERT(serial != RT_NULL);
-
-    switch (cmd)
-    {
-    case RT_DEVICE_CTRL_CLR_INT:
-        /* disable rx irq */
-        UIER &= ~0x01;
-        break;
-    case RT_DEVICE_CTRL_SET_INT:
-        /* enable rx irq */
-        UIER |= 0x01;
-        break;
-    }
-
-    return RT_EOK;
-}
-
-static int lpc_putc(struct rt_serial_device *serial, char c)
-{
-    while (!(ULSR & 0x20));
-    UTHR = c;
-
-    return 1;
-}
-
-static int lpc_getc(struct rt_serial_device *serial)
-{
-    if (ULSR & 0x01)
-        return URBR;
-    else
-        return -1;
-}
-
-static const struct rt_uart_ops lpc_uart_ops =
-{
-    lpc_configure,
-    lpc_control,
-    lpc_putc,
-    lpc_getc,
-};
-
-struct rt_serial_device serial;
-
-void UART_IRQHandler(void)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-
-    switch (UIIR & 0x0e)
-    {
-    case 0x04:
-    case 0x0C:
-        rt_hw_serial_isr(&serial, RT_SERIAL_EVENT_RX_IND);
-        break;
-    case 0x06:
-        (void)ULSR;
-        break;
-    default:
-        (void)ULSR;
-        break;
-    }
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-
-int rt_hw_uart_init(void)
-{
-    rt_err_t ret = RT_EOK;
-    struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
-
-    serial.ops    = &lpc_uart_ops;
-    serial.config = config;
-    serial.parent.user_data = NULL;
-
-    /*
-     * Initialize UART pin connect
-     * P1.6: U0_RXD
-     * P1.7: U0_TXD
-     */
-    IOCON_PIO1_6 = 0xc1;
-    IOCON_PIO1_7 = 0xc1;
-
-    /* setup the uart power and clock */
-    UARTCLKDIV = 0x01;          // UART PCLK = system clock / 1
-    AHBCLKCTRL |= (1 << 12);    // UART power-up
-
-    /* priority = 1 */
-    NVIC_SetPriority(UART_IRQ, 0x01 << 6);
-
-    /* Enable Interrupt for UART channel */
-    NVIC_EnableIRQ(UART_IRQ);
-
-    /* register UART device */
-    ret = rt_hw_serial_register(&serial, "uart",
-                                RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
-                                NULL);
-
-    return ret;
-}
-INIT_BOARD_EXPORT(rt_hw_uart_init);
-
-#endif /* RT_USING_SERIAL */
diff --git a/bsp/lpc1114/driver/drv_uart.h b/bsp/lpc1114/driver/drv_uart.h
deleted file mode 100644
index b5de18269b..0000000000
--- a/bsp/lpc1114/driver/drv_uart.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * Copyright (c) 2019, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2019-05-05     jg1uaa       the first version
- */
-
-#ifndef __DRV_UART_H__
-#define __DRV_UART_H__
-
-int rt_hw_uart_init(void);
-
-#endif
diff --git a/bsp/lpc1114/driver/startup_gcc.s b/bsp/lpc1114/driver/startup_gcc.s
deleted file mode 100644
index b7b951cfe0..0000000000
--- a/bsp/lpc1114/driver/startup_gcc.s
+++ /dev/null
@@ -1,130 +0,0 @@
-/*
- * Copyright (c) 2019, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2019-05-05     jg1uaa       the first version
- */
-
-#include "../rtconfig.h"
-
-/* Interrupt Vectors */
-        .section .isr_vector
-        .thumb
-        .align 0
-
-        .long   _estack                 // MSP default value
-        .long   Reset_Handler + 1       //  1: Reset
-        .long   default_handler + 1     //  2: NMI
-        .long   HardFault_Handler + 1   //  3: HardFault
-        .long   default_handler + 1     //  4: reserved
-        .long   default_handler + 1     //  5: reserved
-        .long   default_handler + 1     //  6: reserved
-        .long   default_handler + 1     //  7: reserved
-        .long   default_handler + 1     //  8: reserved
-        .long   default_handler + 1     //  9: reserved
-        .long   default_handler + 1     // 10: reserved
-        .long   default_handler + 1     // 11: SVCall
-        .long   default_handler + 1     // 12: reserved
-        .long   default_handler + 1     // 13: reserved
-        .long   PendSV_Handler + 1     // 14: PendSV
-        .long   SysTick_Handler + 1     // 15: SysTick
-        .long   default_handler + 1     // 16: External Interrupt(0)
-        .long   default_handler + 1     // 17: External Interrupt(1)
-        .long   default_handler + 1     // 18: External Interrupt(2)
-        .long   default_handler + 1     // 19: External Interrupt(3)
-        .long   default_handler + 1     // 20: External Interrupt(4)
-        .long   default_handler + 1     // 21: External Interrupt(5)
-        .long   default_handler + 1     // 22: External Interrupt(6)
-        .long   default_handler + 1     // 23: External Interrupt(7)
-        .long   default_handler + 1     // 24: External Interrupt(8)
-        .long   default_handler + 1     // 25: External Interrupt(9)
-        .long   default_handler + 1     // 26: External Interrupt(10)
-        .long   default_handler + 1     // 27: External Interrupt(11)
-        .long   default_handler + 1     // 28: External Interrupt(12)
-        .long   default_handler + 1     // 29: External Interrupt(13) C_CAN
-        .long   default_handler + 1     // 30: External Interrupt(14) SPI/SSP1
-        .long   default_handler + 1     // 31: External Interrupt(15) I2C
-        .long   default_handler + 1     // 32: External Interrupt(16) CT16B0
-        .long   default_handler + 1     // 33: External Interrupt(17) CT16B1
-        .long   default_handler + 1     // 34: External Interrupt(18) CT32B0
-        .long   default_handler + 1     // 35: External Interrupt(19) CT32B1
-        .long   default_handler + 1     // 36: External Interrupt(20) SPI/SSP0
-        .long   UART_IRQHandler + 1     // 37: External Interrupt(21) UART
-        .long   default_handler + 1     // 38: External Interrupt(22)
-        .long   default_handler + 1     // 39: External Interrupt(23)
-        .long   default_handler + 1     // 40: External Interrupt(24) ADC
-        .long   default_handler + 1     // 41: External Interrupt(25) WDT
-        .long   default_handler + 1     // 42: External Interrupt(26) BOD
-        .long   default_handler + 1     // 43: External Interrupt(27)
-        .long   default_handler + 1     // 44: External Interrupt(28) PIO_3
-        .long   default_handler + 1     // 45: External Interrupt(29) PIO_2
-        .long   default_handler + 1     // 46: External Interrupt(30) PIO_1
-        .long   default_handler + 1     // 47: External Interrupt(31) PIO_0
-        .long   default_handler + 1     // 48: External Interrupt(32)
-        .long   default_handler + 1     // 49: External Interrupt(33)
-        .long   default_handler + 1     // 50: External Interrupt(34)
-        .long   default_handler + 1     // 51: External Interrupt(35)
-        .long   default_handler + 1     // 52: External Interrupt(36)
-        .long   default_handler + 1     // 53: External Interrupt(37)
-        .long   default_handler + 1     // 54: External Interrupt(38)
-        .long   default_handler + 1     // 55: External Interrupt(39)
-        .long   default_handler + 1     // 56: External Interrupt(40)
-        .long   default_handler + 1     // 57: External Interrupt(41)
-        .long   default_handler + 1     // 58: External Interrupt(42)
-        .long   default_handler + 1     // 59: External Interrupt(43)
-        .long   default_handler + 1     // 60: External Interrupt(44)
-        .long   default_handler + 1     // 61: External Interrupt(45)
-        .long   default_handler + 1     // 62: External Interrupt(46)
-        .long   default_handler + 1     // 63: External Interrupt(47)
-
-/* startup */
-        .section .text
-        .thumb
-        .align 0
-        .global Reset_Handler
-Reset_Handler:
-
-        /* initialize .data */
-data_init:
-        ldr     r1, =_sidata
-        ldr     r2, =_sdata
-        ldr     r3, =_edata
-        cmp     r2, r3
-        beq     bss_init
-data_loop:
-        ldrb    r0, [r1]
-        add     r1, r1, #1
-        strb    r0, [r2]
-        add     r2, r2, #1
-        cmp     r2, r3
-        bne     data_loop
-
-        /* initialize .bss */
-bss_init:
-        mov     r0, #0
-        ldr     r2, =_sbss      // sbss/ebss is 4byte aligned by link.lds
-        ldr     r3, =_ebss
-        cmp     r2, r3
-        beq     start_main
-bss_loop:
-        str     r0, [r2]
-        add     r2, r2, #4
-        cmp     r2, r3
-        bne     bss_loop
-
-        /* launch main() */
-start_main:
-#ifdef RT_USING_USER_MAIN
-        bl      entry
-#else
-        bl      main
-#endif
-
-default_handler:
-die:
-        b       die
-
-        .pool