diff options
| author | meng-plus <[email protected]> | 2023-06-06 12:02:54 +0800 |
|---|---|---|
| committer | GitHub <[email protected]> | 2023-06-06 00:02:54 -0400 |
| commit | dd4a068e765cd98bbda41985c9ecb1cd4db0e45b (patch) | |
| tree | 20cdc65073ee84e4639d8e65fa01e9935a21629b /bsp/lpc408x/Libraries | |
| parent | ff8064c02edd5522ec56bfde275d7aeeaa2a9097 (diff) | |
[bsp][LPC4088] 增加IAR环境的支持 (#7611)
Diffstat (limited to 'bsp/lpc408x/Libraries')
| -rw-r--r-- | bsp/lpc408x/Libraries/Device/NXP/LPC407x_8x_177x_8x/Source/Templates/IAR/startup_LPC407x_8x_177x_8x.s | 233 |
1 files changed, 128 insertions, 105 deletions
diff --git a/bsp/lpc408x/Libraries/Device/NXP/LPC407x_8x_177x_8x/Source/Templates/IAR/startup_LPC407x_8x_177x_8x.s b/bsp/lpc408x/Libraries/Device/NXP/LPC407x_8x_177x_8x/Source/Templates/IAR/startup_LPC407x_8x_177x_8x.s index 55f4be7484..81a4008c85 100644 --- a/bsp/lpc408x/Libraries/Device/NXP/LPC407x_8x_177x_8x/Source/Templates/IAR/startup_LPC407x_8x_177x_8x.s +++ b/bsp/lpc408x/Libraries/Device/NXP/LPC407x_8x_177x_8x/Source/Templates/IAR/startup_LPC407x_8x_177x_8x.s @@ -1,9 +1,9 @@ ;/***************************************************************************** -; * @file: startup_LPC177x_8x.s -; * @purpose: CMSIS Cortex-M3 Core Device Startup File -; * for the NXP LPC17xx Device Series -; * @version: V1.03 -; * @date: 09. February 2010 +; * @file: startup_LPC407x_8x.s +; * @purpose: CMSIS Cortex-M4 Core Device Startup File +; * for the NXP LPC40xx Device Series +; * @version: V1.00 +; * @date: September 2012 ; *---------------------------------------------------------------------------- ; * ; * Copyright (C) 2010 ARM Limited. All rights reserved. @@ -75,49 +75,47 @@ __vector_table_0x1c DCD SysTick_Handler ; External Interrupts - DCD WDT_IRQHandler ; 16: Watchdog Timer - DCD TIMER0_IRQHandler ; 17: Timer0 - DCD TIMER1_IRQHandler ; 18: Timer1 - DCD TIMER2_IRQHandler ; 19: Timer2 - DCD TIMER3_IRQHandler ; 20: Timer3 - DCD UART0_IRQHandler ; 21: UART0 - DCD UART1_IRQHandler ; 22: UART1 - DCD UART2_IRQHandler ; 23: UART2 - DCD UART3_IRQHandler ; 24: UART3 - DCD PWM1_IRQHandler ; 25: PWM1 - DCD I2C0_IRQHandler ; 26: I2C0 - DCD I2C1_IRQHandler ; 27: I2C1 - DCD I2C2_IRQHandler ; 28: I2C2 - DCD 0 ; 29: reserved; not for SPIFI anymore - DCD SSP0_IRQHandler ; 30: SSP0 - DCD SSP1_IRQHandler ; 31: SSP1 - DCD PLL0_IRQHandler ; 32: PLL0 Lock (Main PLL) - DCD RTC_IRQHandler ; 33: Real Time Clock - DCD EINT0_IRQHandler ; 34: External Interrupt 0 - DCD EINT1_IRQHandler ; 35: External Interrupt 1 - DCD EINT2_IRQHandler ; 36: External Interrupt 2 - DCD EINT3_IRQHandler ; 37: External Interrupt 3 - DCD ADC_IRQHandler ; 38: A/D Converter - DCD BOD_IRQHandler ; 39: Brown-Out Detect - DCD USB_IRQHandler ; 40: USB - DCD CAN_IRQHandler ; 41: CAN - DCD DMA_IRQHandler ; 42: General Purpose DMA - DCD I2S_IRQHandler ; 43: I2S - DCD ENET_IRQHandler ; 44: Ethernet - DCD MCI_IRQHandler ; 45: MCI Card - DCD MCPWM_IRQHandler ; 46: Motor Control PWM - DCD QEI_IRQHandler ; 47: Quadrature Encoder Interface - DCD PLL1_IRQHandler ; 48: PLL1 Lock (USB PLL) - DCD USBActivity_IRQHandler ; 49: USB Activity Interrupt - DCD CANActivity_IRQHandler ; 50: CAN Activity Interrupt - DCD UART4_IRQHandler ; 51: UART4 - DCD SSP2_IRQHandler ; 52: SSP2 - DCD LCD_IRQHandler ; 53: LCD - DCD GPIO_IRQHandler ; 54: GPIO - DCD PWM0_IRQHandler ; 55: PWM0 - DCD EEPROM_IRQHandler ; 56: EEPROM - - + DCD WDT_IRQHandler ; 16: Watchdog Timer + DCD TIMER0_IRQHandler ; 17: Timer0 + DCD TIMER1_IRQHandler ; 18: Timer1 + DCD TIMER2_IRQHandler ; 19: Timer2 + DCD TIMER3_IRQHandler ; 20: Timer3 + DCD UART0_IRQHandler ; 21: UART0 + DCD UART1_IRQHandler ; 22: UART1 + DCD UART2_IRQHandler ; 23: UART2 + DCD UART3_IRQHandler ; 24: UART3 + DCD PWM1_IRQHandler ; 25: PWM1 + DCD I2C0_IRQHandler ; 26: I2C0 + DCD I2C1_IRQHandler ; 27: I2C1 + DCD I2C2_IRQHandler ; 28: I2C2 + DCD 0 ; 29: Reserved + DCD SSP0_IRQHandler ; 30: SSP0 + DCD SSP1_IRQHandler ; 31: SSP1 + DCD PLL0_IRQHandler ; 32: PLL0 Lock (Main PLL) + DCD RTC_IRQHandler ; 33: Real Time Clock + DCD EINT0_IRQHandler ; 34: External Interrupt 0 + DCD EINT1_IRQHandler ; 35: External Interrupt 1 + DCD EINT2_IRQHandler ; 36: External Interrupt 2 + DCD EINT3_IRQHandler ; 37: External Interrupt 3 + DCD ADC_IRQHandler ; 38: A/D Converter + DCD BOD_IRQHandler ; 39: Brown-Out Detect + DCD USB_IRQHandler ; 40: USB + DCD CAN_IRQHandler ; 41: CAN + DCD DMA_IRQHandler ; 42: General Purpose DMA + DCD I2S_IRQHandler ; 43: I2S + DCD ENET_IRQHandler ; 44: Ethernet + DCD MCI_IRQHandler ; 45: MCI Card + DCD MCPWM_IRQHandler ; 46: Motor Control PWM + DCD QEI_IRQHandler ; 47: Quadrature Encoder Interface + DCD PLL1_IRQHandler ; 48: PLL1 Lock (USB PLL) + DCD USBActivity_IRQHandler ; 49: USB Activity Interrupt + DCD CANActivity_IRQHandler ; 50: CAN Activity Interrupt + DCD UART4_IRQHandler ; 51: UART4 + DCD SSP2_IRQHandler ; 52: SSP2 + DCD LCD_IRQHandler ; 53: LCD + DCD GPIO_IRQHandler ; 54: GPIO + DCD PWM0_IRQHandler ; 55: PWM0 + DCD EEPROM_IRQHandler ; 56: EEPROM __Vectors_End @@ -125,10 +123,7 @@ __Vectors_End __Vectors EQU __vector_table __Vectors_Size EQU __Vectors_End - __Vectors - PUBLIC CRP_Value - RSEG CRPKEY : CODE(2) -CRP_Value - DCD 0xFFFFFFFF + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; ;; Default interrupt handlers. @@ -136,7 +131,7 @@ CRP_Value THUMB PUBWEAK Reset_Handler - SECTION .text:CODE:REORDER(2) + SECTION .text:CODE:REORDER:NOROOT(2) Reset_Handler LDR R0, =SystemInit BLX R0 @@ -144,253 +139,281 @@ Reset_Handler BX R0 PUBWEAK NMI_Handler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) NMI_Handler B NMI_Handler PUBWEAK HardFault_Handler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) HardFault_Handler B HardFault_Handler PUBWEAK MemManage_Handler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) MemManage_Handler B MemManage_Handler PUBWEAK BusFault_Handler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) BusFault_Handler B BusFault_Handler PUBWEAK UsageFault_Handler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) UsageFault_Handler B UsageFault_Handler PUBWEAK SVC_Handler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) SVC_Handler B SVC_Handler PUBWEAK DebugMon_Handler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) DebugMon_Handler B DebugMon_Handler PUBWEAK PendSV_Handler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) PendSV_Handler B PendSV_Handler PUBWEAK SysTick_Handler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) SysTick_Handler B SysTick_Handler PUBWEAK WDT_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) WDT_IRQHandler B WDT_IRQHandler PUBWEAK TIMER0_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) TIMER0_IRQHandler B TIMER0_IRQHandler PUBWEAK TIMER1_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) TIMER1_IRQHandler B TIMER1_IRQHandler PUBWEAK TIMER2_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) TIMER2_IRQHandler B TIMER2_IRQHandler PUBWEAK TIMER3_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) TIMER3_IRQHandler B TIMER3_IRQHandler PUBWEAK UART0_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) UART0_IRQHandler B UART0_IRQHandler PUBWEAK UART1_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) UART1_IRQHandler B UART1_IRQHandler PUBWEAK UART2_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) UART2_IRQHandler B UART2_IRQHandler PUBWEAK UART3_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) UART3_IRQHandler B UART3_IRQHandler PUBWEAK PWM1_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) PWM1_IRQHandler B PWM1_IRQHandler PUBWEAK I2C0_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) I2C0_IRQHandler B I2C0_IRQHandler PUBWEAK I2C1_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) I2C1_IRQHandler B I2C1_IRQHandler PUBWEAK I2C2_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) I2C2_IRQHandler B I2C2_IRQHandler - ;PUBWEAK SPIFI_IRQHandler - ;SECTION .text:CODE:REORDER(1) +; PUBWEAK SPIFI_IRQHandler +; SECTION .text:CODE:REORDER:NOROOT(1) ;SPIFI_IRQHandler - ;B SPIFI_IRQHandler +; B SPIFI_IRQHandler PUBWEAK SSP0_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) SSP0_IRQHandler B SSP0_IRQHandler PUBWEAK SSP1_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) SSP1_IRQHandler B SSP1_IRQHandler PUBWEAK PLL0_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) PLL0_IRQHandler B PLL0_IRQHandler PUBWEAK RTC_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) RTC_IRQHandler B RTC_IRQHandler PUBWEAK EINT0_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) EINT0_IRQHandler B EINT0_IRQHandler PUBWEAK EINT1_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) EINT1_IRQHandler B EINT1_IRQHandler PUBWEAK EINT2_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) EINT2_IRQHandler B EINT2_IRQHandler PUBWEAK EINT3_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) EINT3_IRQHandler B EINT3_IRQHandler PUBWEAK ADC_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) ADC_IRQHandler B ADC_IRQHandler PUBWEAK BOD_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) BOD_IRQHandler B BOD_IRQHandler PUBWEAK USB_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) USB_IRQHandler B USB_IRQHandler PUBWEAK CAN_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) CAN_IRQHandler B CAN_IRQHandler PUBWEAK DMA_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) DMA_IRQHandler B DMA_IRQHandler PUBWEAK I2S_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) I2S_IRQHandler B I2S_IRQHandler PUBWEAK ENET_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) ENET_IRQHandler B ENET_IRQHandler PUBWEAK MCI_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) MCI_IRQHandler B MCI_IRQHandler PUBWEAK MCPWM_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) MCPWM_IRQHandler B MCPWM_IRQHandler PUBWEAK QEI_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) QEI_IRQHandler B QEI_IRQHandler PUBWEAK PLL1_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) PLL1_IRQHandler B PLL1_IRQHandler PUBWEAK USBActivity_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) USBActivity_IRQHandler B USBActivity_IRQHandler PUBWEAK CANActivity_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) CANActivity_IRQHandler B CANActivity_IRQHandler PUBWEAK UART4_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) UART4_IRQHandler B UART4_IRQHandler PUBWEAK SSP2_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) SSP2_IRQHandler B SSP2_IRQHandler PUBWEAK LCD_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) LCD_IRQHandler B LCD_IRQHandler PUBWEAK GPIO_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) GPIO_IRQHandler B GPIO_IRQHandler PUBWEAK PWM0_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) PWM0_IRQHandler B PWM0_IRQHandler PUBWEAK EEPROM_IRQHandler - SECTION .text:CODE:REORDER(1) + SECTION .text:CODE:REORDER:NOROOT(1) EEPROM_IRQHandler B EEPROM_IRQHandler +#ifndef SRAM + SECTION .crp:CODE:ROOT(2) + DATA + +/* Code Read Protection +CRP1 0x12345678 - Write to RAM command can not access RAM below 0x10000200. + - Read Memory command: disabled. + - Copy RAM to Flash command: cannot write to Sector 0. + - "Go" command: disabled. + - Erase sector(s) command: can erase any individual sector except + sector 0 only, or can erase all sectors at once. + - Compare command: disabled +CRP2 0x87654321 - Write to RAM command: disabled. + - Copy RAM to Flash: disabled. + - Erase command: only allows erase of all sectors. +CRP3 0x43218765 - Access to chip via the SWD pins is disabled. ISP entry + by pulling PIO0_1 LOW is disabled if a valid user code is + present in flash sector 0. +Caution: If CRP3 is selected, no future factory testing can be +performed on the device. +*/ + +#ifndef CRP + #define CRP 0xFFFFFFFF +#endif + + DCD CRP +#endif END |
