bsp:ls1b:rework uart driver and fix some bugs to make it work. tested on ls1b dev board which make by Loongson(GuangZhou)

6 files changed, 325 insertions, 382 deletions

diff --git a/bsp/ls1bdev/drivers/board.c b/bsp/ls1bdev/drivers/board.c
index a3f907f664..8a42f8e3a0 100644
--- a/bsp/ls1bdev/drivers/board.c
+++ b/bsp/ls1bdev/drivers/board.c
@@ -19,7 +19,7 @@
 #include <mips_fpu.h>
 
 #include "board.h"
-#include "uart.h"
+#include "drv_uart.h"
 #include "ls1b.h"
 
 #ifdef RT_USING_RTGUI
@@ -84,6 +84,6 @@ void rt_hw_board_init(void)
 #ifdef RT_USING_COMPONENTS_INIT
     rt_components_board_init();
 #endif
-
+    rt_kprintf("current sr: 0x%08x\n", read_c0_status());
 }
 /*@}*/
diff --git a/bsp/ls1bdev/drivers/board.h b/bsp/ls1bdev/drivers/board.h
index 9ba4f9f25c..fbe2ed8f9c 100644
--- a/bsp/ls1bdev/drivers/board.h
+++ b/bsp/ls1bdev/drivers/board.h
@@ -19,7 +19,7 @@
 void rt_hw_board_init(void);
 
 /* 64M SDRAM */
-#define RT_HW_HEAP_END	(0x80000000 + 64 * 1024 * 1024)
+#define RT_HW_HEAP_END	(0x80000000 + RT_MEM_SIZE * 1024 * 1024)
 #define CPU_HZ			(125 * 1000000)
 
 #endif
diff --git a/bsp/ls1bdev/drivers/drv_uart.c b/bsp/ls1bdev/drivers/drv_uart.c
new file mode 100644
index 0000000000..8f469f26ed
--- /dev/null
+++ b/bsp/ls1bdev/drivers/drv_uart.c
@@ -0,0 +1,222 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-05-08     zhuangwei    the first version
+ * 2021-02-02     [email protected]    adapt to ls1b
+ */
+#include <rtthread.h>
+#include <rtdevice.h>
+#include <rthw.h>
+#include "drv_uart.h"
+#include "ls1b_pin.h"
+#include "ls1b_uart.h"
+
+/* STM32 uart driver */
+struct rt_uart_ls1b
+{
+    ls1b_uart_t UARTx;
+    rt_uint32_t IRQ;
+};
+
+static rt_err_t ls1b_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
+{
+    struct rt_uart_ls1b *uart_dev = RT_NULL;
+    ls1b_uart_info_t uart_info = {0};
+
+    RT_ASSERT(serial != RT_NULL);
+    RT_ASSERT(cfg != RT_NULL);
+
+    uart_dev = (struct rt_uart_ls1b *)serial->parent.user_data;
+
+    // 初始化串口
+    uart_info.UARTx    = uart_dev->UARTx;
+    uart_info.baudrate = cfg->baud_rate;
+    uart_info.rx_enable = TRUE;
+    uart_init(&uart_info);
+
+    return RT_EOK;
+
+}
+
+static rt_err_t ls1b_uart_control(struct rt_serial_device *serial, int cmd, void *arg)
+{
+    struct rt_uart_ls1b *uart_dev = RT_NULL;
+
+    RT_ASSERT(serial != RT_NULL);
+    uart_dev = (struct rt_uart_ls1b *)serial->parent.user_data;
+
+    switch (cmd)
+    {
+    case RT_DEVICE_CTRL_CLR_INT: /* disable rx irq */
+        rt_hw_interrupt_mask(uart_dev->IRQ);
+        break;
+
+    case RT_DEVICE_CTRL_SET_INT: /* enable rx irq */
+        rt_hw_interrupt_umask(uart_dev->IRQ);
+        break;
+
+    default:
+        break;
+    }
+
+    return RT_EOK;
+
+}
+
+static int ls1b_uart_putc(struct rt_serial_device *serial, char c)
+{
+    struct rt_uart_ls1b *uart_dev = RT_NULL;
+
+    RT_ASSERT(serial != RT_NULL);
+
+    uart_dev = (struct rt_uart_ls1b *)serial->parent.user_data;
+    uart_putc(uart_dev->UARTx, c);
+
+    return 1;
+}
+
+static int ls1b_uart_getc(struct rt_serial_device *serial)
+{
+    struct rt_uart_ls1b *uart_dev = RT_NULL;
+
+    RT_ASSERT(serial != RT_NULL);
+
+    uart_dev = (struct rt_uart_ls1b *)serial->parent.user_data;
+    void *uart_base = uart_get_base(uart_dev->UARTx);
+
+    if (LSR_RXRDY & reg_read_8(uart_base + LS1B_UART_LSR_OFFSET))
+    {
+        return reg_read_8(uart_base + LS1B_UART_DAT_OFFSET);
+    }
+
+    return -1;
+}
+
+/* UART interrupt handler */
+static void uart_irq_handler(int vector, void *param)
+{
+    struct rt_serial_device *serial = (struct rt_serial_device *)param;
+    struct rt_uart_ls1b *uart_dev = RT_NULL;
+
+    RT_ASSERT(serial != RT_NULL);
+
+    uart_dev = (struct rt_uart_ls1b *)serial->parent.user_data;
+    void *uart_base = uart_get_base(uart_dev->UARTx);
+    unsigned char iir = reg_read_8(uart_base + LS1B_UART_IIR_OFFSET);
+
+    // 判断是否为接收超时或接收到有效数据
+    if ((IIR_RXTOUT & iir) || (IIR_RXRDY & iir))
+    {
+        rt_interrupt_enter();
+        rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
+        rt_interrupt_leave();
+    }
+
+}
+
+static const struct rt_uart_ops ls1b_uart_ops =
+{
+    ls1b_uart_configure,
+    ls1b_uart_control,
+    ls1b_uart_putc,
+    ls1b_uart_getc,
+};
+
+
+#if defined(RT_USING_UART1)
+struct rt_uart_ls1b uart1 =
+{
+    LS1B_UART1,
+    LS1B_UART1_IRQ,
+};
+struct rt_serial_device serial1;
+#endif /* RT_USING_UART1 */
+
+#if defined(RT_USING_UART2)
+struct rt_uart_ls1b uart2 =
+{
+    LS1B_UART2,
+    LS1B_UART2_IRQ,
+};
+struct rt_serial_device serial2;
+#endif /* RT_USING_UART2 */
+
+
+#if defined(RT_USING_UART3)
+struct rt_uart_ls1b uart3 =
+{
+    LS1B_UART3,
+    LS1B_UART3_IRQ,
+};
+struct rt_serial_device serial3;
+#endif /* RT_USING_UART3 */
+
+#if defined(RT_USING_UART4)
+struct rt_uart_ls1b uart4 =
+{
+    LS1B_UART4,
+    LS1B_UART4_IRQ,
+};
+struct rt_serial_device serial4;
+#endif /* RT_USING_UART4 */
+
+#if defined(RT_USING_UART5)
+struct rt_uart_ls1b uart5 =
+{
+    LS1B_UART5,
+    LS1B_UART5_IRQ,
+};
+struct rt_serial_device serial5;
+#endif /* RT_USING_UART5 */
+
+
+
+void rt_hw_uart_init(void)
+{
+    struct rt_uart_ls1b *uart;
+    struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
+
+#ifdef RT_USING_UART5
+		uart = &uart5;
+	
+		serial5.ops    = &ls1b_uart_ops;
+		serial5.config = config;
+	
+		rt_hw_interrupt_install(uart->IRQ, uart_irq_handler, &serial5, "UART5");
+	
+		/* register UART5 device */
+		rt_hw_serial_register(&serial5,
+							  "uart5",
+							  //RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_RX,
+							  RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
+							  uart);
+#endif /* RT_USING_UART5 */
+
+
+#ifdef RT_USING_UART2
+    uart = &uart2;
+
+    serial2.ops    = &ls1b_uart_ops;
+    serial2.config = config;
+
+    pin_set_purpose(36, PIN_PURPOSE_OTHER);
+    pin_set_purpose(37, PIN_PURPOSE_OTHER);
+    pin_set_remap(36, PIN_REMAP_SECOND);
+    pin_set_remap(37, PIN_REMAP_SECOND);
+
+    rt_hw_interrupt_install(uart->IRQ, uart_irq_handler, &serial2, "UART2");
+
+    /* register UART2 device */
+    rt_hw_serial_register(&serial2,
+                          "uart2",
+                          //RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_RX,
+                          RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
+                          uart);
+#endif /* RT_USING_UART2 */
+
+}
+
diff --git a/bsp/ls1bdev/drivers/drv_uart.h b/bsp/ls1bdev/drivers/drv_uart.h
new file mode 100644
index 0000000000..01dfd9aae0
--- /dev/null
+++ b/bsp/ls1bdev/drivers/drv_uart.h
@@ -0,0 +1,100 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-05-08     zhuangwei    the first version
+ */
+
+#ifndef __DRV_UART_H__
+#define __DRV_UART_H__
+
+#include "ls1b.h"
+#include <rthw.h>
+
+#define DEV_CLK 252000000 // 252MHz
+#define UART_BAUDRATE 115200
+
+#define UART0_BASE          0xBFE40000
+//#define UART0_1_BASE      0xBFE41000
+#define UART1_BASE          0xBFE44000
+#define UART2_BASE          0xBFE48000
+#define UART3_BASE          0xBFE4C000
+#define UART4_BASE          0xBFE4C400
+#define UART5_BASE          0xBFE4C500
+#define UART6_BASE          0xBFE4C600
+#define UART7_BASE          0xBFE4C700
+#define UART8_BASE          0xBFE4C800
+#define UART9_BASE          0xBFE4C900
+#define UART10_BASE         0xBFE4Ca00
+#define UART11_BASE         0xBFE4Cb00
+
+/* UART registers */
+#define UART_DAT(base)      HWREG8(base + 0x00)
+#define UART_IER(base)      HWREG8(base + 0x01)
+#define UART_IIR(base)      HWREG8(base + 0x02)
+#define UART_FCR(base)      HWREG8(base + 0x02)
+#define UART_LCR(base)      HWREG8(base + 0x03)
+#define UART_MCR(base)      HWREG8(base + 0x04)
+#define UART_LSR(base)      HWREG8(base + 0x05)
+#define UART_MSR(base)      HWREG8(base + 0x06)
+
+#define UART_LSB(base)      HWREG8(base + 0x00)
+#define UART_MSB(base)      HWREG8(base + 0x01)
+
+/* UART0 registers */
+#define UART0_DAT           HWREG8(UART0_BASE + 0x00)
+#define UART0_IER           HWREG8(UART0_BASE + 0x01)
+#define UART0_IIR           HWREG8(UART0_BASE + 0x02)
+#define UART0_FCR           HWREG8(UART0_BASE + 0x02)
+#define UART0_LCR           HWREG8(UART0_BASE + 0x03)
+#define UART0_MCR           HWREG8(UART0_BASE + 0x04)
+#define UART0_LSR           HWREG8(UART0_BASE + 0x05)
+#define UART0_MSR           HWREG8(UART0_BASE + 0x06)
+
+#define UART0_LSB           HWREG8(UART0_BASE + 0x00)
+#define UART0_MSB           HWREG8(UART0_BASE + 0x01)
+
+/* UART1 registers */
+#define UART1_DAT           HWREG8(UART1_BASE + 0x00)
+#define UART1_IER           HWREG8(UART1_BASE + 0x01)
+#define UART1_IIR           HWREG8(UART1_BASE + 0x02)
+#define UART1_FCR           HWREG8(UART1_BASE + 0x02)
+#define UART1_LCR           HWREG8(UART1_BASE + 0x03)
+#define UART1_MCR           HWREG8(UART1_BASE + 0x04)
+#define UART1_LSR           HWREG8(UART1_BASE + 0x05)
+#define UART1_MSR           HWREG8(UART1_BASE + 0x06)
+
+#define UART1_LSB           HWREG8(UART1_BASE + 0x00)
+#define UART1_MSB           HWREG8(UART1_BASE + 0x01)
+
+/* UART interrupt enable register value */
+#define UARTIER_IME     (1 << 3)
+#define UARTIER_ILE     (1 << 2)
+#define UARTIER_ITXE    (1 << 1)
+#define UARTIER_IRXE    (1 << 0)
+
+/* UART line control register value */
+#define UARTLCR_DLAB    (1 << 7)
+#define UARTLCR_BCB     (1 << 6)
+#define UARTLCR_SPB     (1 << 5)
+#define UARTLCR_EPS     (1 << 4)
+#define UARTLCR_PE      (1 << 3)
+#define UARTLCR_SB      (1 << 2)
+
+/* UART line status register value */
+#define UARTLSR_ERROR   (1 << 7)
+#define UARTLSR_TE      (1 << 6)
+#define UARTLSR_TFE     (1 << 5)
+#define UARTLSR_BI      (1 << 4)
+#define UARTLSR_FE      (1 << 3)
+#define UARTLSR_PE      (1 << 2)
+#define UARTLSR_OE      (1 << 1)
+#define UARTLSR_DR      (1 << 0)
+
+void rt_hw_uart_init(void);
+
+
+#endif
diff --git a/bsp/ls1bdev/drivers/uart.c b/bsp/ls1bdev/drivers/uart.c
deleted file mode 100644
index e920d33057..0000000000
--- a/bsp/ls1bdev/drivers/uart.c
+++ /dev/null
@@ -1,280 +0,0 @@
-/*
- * File      : board.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006-2012, RT-Thread Develop Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date           Author       Notes
- * 2011-08-08     lgnq         first version
- */
-
-#include <rthw.h>
-#include <rtthread.h>
-
-#include "uart.h"
-
-/**
- * @addtogroup Loongson LS1B
- */
-
-/*@{*/
-
-#if defined(RT_USING_DEVICE)
-
-struct rt_uart_ls1b
-{
-    struct rt_device parent;
-
-    rt_uint32_t hw_base;
-    rt_uint32_t irq;
-
-    /* buffer for reception */
-    rt_uint8_t read_index, save_index;
-    rt_uint8_t rx_buffer[RT_UART_RX_BUFFER_SIZE];
-}uart_device;
-
-static void rt_uart_irqhandler(int irqno, void *param)
-{
-    rt_ubase_t level;
-    rt_uint8_t isr;
-    struct rt_uart_ls1b *uart = &uart_device;
-
-    /* read interrupt status and clear it */
-    isr = UART_IIR(uart->hw_base);
-    isr = (isr >> 1) & 0x3;
-
-    /* receive data available */
-    if (isr & 0x02)
-    {
-        /* Receive Data Available */
-        while (UART_LSR(uart->hw_base) & UARTLSR_DR)
-        {
-            uart->rx_buffer[uart->save_index] = UART_DAT(uart->hw_base);
-
-            level = rt_hw_interrupt_disable();
-            uart->save_index ++;
-            if (uart->save_index >= RT_UART_RX_BUFFER_SIZE)
-                uart->save_index = 0;
-            rt_hw_interrupt_enable(level);
-        }
-
-        /* invoke callback */
-        if (uart->parent.rx_indicate != RT_NULL)
-        {
-            rt_size_t length;
-            if (uart->read_index > uart->save_index)
-                length = RT_UART_RX_BUFFER_SIZE - uart->read_index + uart->save_index;
-            else
-                length = uart->save_index - uart->read_index;
-
-            uart->parent.rx_indicate(&uart->parent, length);
-        }
-    }
-
-    return;
-}
-
-static rt_err_t rt_uart_init(rt_device_t dev)
-{
-    rt_uint32_t baud_div;
-    struct rt_uart_ls1b *uart = (struct rt_uart_ls1b *)dev;
-
-    RT_ASSERT(uart != RT_NULL);
-
-#if 0
-    /* init UART Hardware */
-    UART_IER(uart->hw_base) = 0; /* clear interrupt */
-    UART_FCR(uart->hw_base) = 0x60; /* reset UART Rx/Tx */
-
-    /* enable UART clock */
-    /* set databits, stopbits and parity. (8-bit data, 1 stopbit, no parity) */
-    UART_LCR(uart->hw_base) = 0x3;
-
-    /* set baudrate */
-    baud_div = DEV_CLK / 16 / UART_BAUDRATE;
-    UART_LCR(uart->hw_base) |= UARTLCR_DLAB;
-
-    UART_MSB(uart->hw_base) = (baud_div >> 8) & 0xff;
-    UART_LSB(uart->hw_base) = baud_div & 0xff;
-
-    UART_LCR(uart->hw_base) &= ~UARTLCR_DLAB;
-
-    /* Enable UART unit, enable and clear FIFO */
-    UART_FCR(uart->hw_base) = UARTFCR_UUE | UARTFCR_FE | UARTFCR_TFLS | UARTFCR_RFLS;
-#endif
-
-    return RT_EOK;
-}
-
-static rt_err_t rt_uart_open(rt_device_t dev, rt_uint16_t oflag)
-{
-    struct rt_uart_ls1b *uart = (struct rt_uart_ls1b *)dev;
-
-    RT_ASSERT(uart != RT_NULL);
-    if (dev->flag & RT_DEVICE_FLAG_INT_RX)
-    {
-        /* Enable the UART Interrupt */
-        UART_IER(uart->hw_base) |= UARTIER_IRXE;
-
-        /* install interrupt */
-        rt_hw_interrupt_install(uart->irq, rt_uart_irqhandler, RT_NULL, "UART");
-        rt_hw_interrupt_umask(uart->irq);
-    }
-    return RT_EOK;
-}
-
-static rt_err_t rt_uart_close(rt_device_t dev)
-{
-    struct rt_uart_ls1b *uart = (struct rt_uart_ls1b *)dev;
-
-    RT_ASSERT(uart != RT_NULL);
-    if (dev->flag & RT_DEVICE_FLAG_INT_RX)
-    {
-        /* Disable the UART Interrupt */
-        UART_IER(uart->hw_base) &= ~(UARTIER_IRXE);
-    }
-
-    return RT_EOK;
-}
-
-static rt_size_t rt_uart_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
-{
-    rt_uint8_t *ptr;
-    struct rt_uart_ls1b *uart = (struct rt_uart_ls1b *)dev;
-
-    RT_ASSERT(uart != RT_NULL);
-
-    /* point to buffer */
-    ptr = (rt_uint8_t *)buffer;
-    if (dev->flag & RT_DEVICE_FLAG_INT_RX)
-    {
-        while (size)
-        {
-            /* interrupt receive */
-            rt_base_t level;
-
-            /* disable interrupt */
-            level = rt_hw_interrupt_disable();
-            if (uart->read_index != uart->save_index)
-            {
-                *ptr = uart->rx_buffer[uart->read_index];
-
-                uart->read_index ++;
-                if (uart->read_index >= RT_UART_RX_BUFFER_SIZE)
-                    uart->read_index = 0;
-            }
-            else
-            {
-                /* no data in rx buffer */
-
-                /* enable interrupt */
-                rt_hw_interrupt_enable(level);
-                break;
-            }
-
-            /* enable interrupt */
-            rt_hw_interrupt_enable(level);
-
-            ptr ++;
-            size --;
-        }
-
-        return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
-    }
-
-    return 0;
-}
-
-static rt_size_t rt_uart_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
-{
-    char *ptr;
-    struct rt_uart_ls1b *uart = (struct rt_uart_ls1b *)dev;
-
-    RT_ASSERT(uart != RT_NULL);
-
-    ptr = (char *)buffer;
-
-    if (dev->flag & RT_DEVICE_FLAG_STREAM)
-    {
-        /* stream mode */
-        while (size)
-        {
-            if (*ptr == '\n')
-            {
-                /* FIFO status, contain valid data */
-                while (!(UART_LSR(uart->hw_base) & (UARTLSR_TE | UARTLSR_TFE)));
-                /* write data */
-                UART_DAT(uart->hw_base) = '\r';
-            }
-
-            /* FIFO status, contain valid data */
-            while (!(UART_LSR(uart->hw_base) & (UARTLSR_TE | UARTLSR_TFE)));
-            /* write data */
-            UART_DAT(uart->hw_base) = *ptr;
-
-            ptr ++;
-            size --;
-        }
-    }
-    else
-    {
-        while (size != 0)
-        {
-            /* FIFO status, contain valid data */
-            while (!(UART_LSR(uart->hw_base) & (UARTLSR_TE | UARTLSR_TFE)));
-
-            /* write data */
-            UART_DAT(uart->hw_base) = *ptr;
-
-            ptr++;
-            size--;
-        }
-    }
-
-    return (rt_size_t)ptr - (rt_size_t)buffer;
-}
-
-void rt_hw_uart_init(void)
-{
-    struct rt_uart_ls1b *uart;
-
-    /* get uart device */
-    uart = &uart_device;
-
-    /* device initialization */
-    uart->parent.type = RT_Device_Class_Char;
-    rt_memset(uart->rx_buffer, 0, sizeof(uart->rx_buffer));
-    uart->read_index = uart->save_index = 0;
-
-#if defined(RT_USING_UART0)
-    uart->hw_base = UART0_BASE;
-    uart->irq = LS1B_UART0_IRQ;
-#elif defined(RT_USING_UART1)
-    uart->hw_base = UART1_BASE;
-    uart->irq = LS1B_UART1_IRQ;
-#elif defined(RT_USING_UART3)
-    uart->hw_base = UART3_BASE;
-    uart->irq = LS1B_UART3_IRQ;
-#endif
-
-    /* device interface */
-    uart->parent.init       = rt_uart_init;
-    uart->parent.open       = rt_uart_open;
-    uart->parent.close      = rt_uart_close;
-    uart->parent.read       = rt_uart_read;
-    uart->parent.write      = rt_uart_write;
-    uart->parent.control    = RT_NULL;
-    uart->parent.user_data  = RT_NULL;
-
-    rt_device_register(&uart->parent, "uart0",
-                        RT_DEVICE_FLAG_RDWR |
-                        RT_DEVICE_FLAG_STREAM |
-                        RT_DEVICE_FLAG_INT_RX);
-}
-#endif /* end of UART */
-
-/*@}*/
diff --git a/bsp/ls1bdev/drivers/uart.h b/bsp/ls1bdev/drivers/uart.h
deleted file mode 100644
index bec660b740..0000000000
--- a/bsp/ls1bdev/drivers/uart.h
+++ /dev/null
@@ -1,99 +0,0 @@
-/*
- * File      : uart.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006-2012, RT-Thread Develop Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date           Author       Notes
- * 2011-08-08     lgnq         first version for LS1B
- */
-
-#ifndef __UART_H__
-#define __UART_H__
-
-#include "ls1b.h"
-#include <rthw.h>
-
-#define UART0_BASE		    0xBFE40000
-#define UART0_1_BASE		0xBFE41000
-#define UART0_2_BASE		0xBFE42000
-#define UART0_3_BASE		0xBFE43000
-#define UART1_BASE			0xBFE44000
-#define UART1_1_BASE		0xBFE45000
-#define UART1_2_BASE		0xBFE46000
-#define UART1_3_BASE		0xBFE47000
-#define UART2_BASE			0xBFE48000
-#define UART3_BASE			0xBFE4C000
-#define UART4_BASE			0xBFE6C000
-#define UART5_BASE			0xBFE7C000
-
-/* UART registers */
-#define UART_DAT(base)		HWREG8(base + 0x00)
-#define UART_IER(base)		HWREG8(base + 0x01)
-#define UART_IIR(base)		HWREG8(base + 0x02)
-#define UART_FCR(base)		HWREG8(base + 0x02)
-#define UART_LCR(base)		HWREG8(base + 0x03)
-#define UART_MCR(base)		HWREG8(base + 0x04)
-#define UART_LSR(base)		HWREG8(base + 0x05)
-#define UART_MSR(base)		HWREG8(base + 0x06)
-
-#define UART_LSB(base)		HWREG8(base + 0x00)
-#define UART_MSB(base)		HWREG8(base + 0x01)
-
-/* UART0 registers */
-#define UART0_DAT			HWREG8(UART0_BASE + 0x00)
-#define UART0_IER			HWREG8(UART0_BASE + 0x01)
-#define UART0_IIR			HWREG8(UART0_BASE + 0x02)
-#define UART0_FCR			HWREG8(UART0_BASE + 0x02)
-#define UART0_LCR			HWREG8(UART0_BASE + 0x03)
-#define UART0_MCR			HWREG8(UART0_BASE + 0x04)
-#define UART0_LSR			HWREG8(UART0_BASE + 0x05)
-#define UART0_MSR			HWREG8(UART0_BASE + 0x06)
-
-#define UART0_LSB			HWREG8(UART0_BASE + 0x00)
-#define UART0_MSB			HWREG8(UART0_BASE + 0x01)
-
-/* UART1 registers */
-#define UART1_DAT			HWREG8(UART1_BASE + 0x00)
-#define UART1_IER			HWREG8(UART1_BASE + 0x01)
-#define UART1_IIR			HWREG8(UART1_BASE + 0x02)
-#define UART1_FCR			HWREG8(UART1_BASE + 0x02)
-#define UART1_LCR			HWREG8(UART1_BASE + 0x03)
-#define UART1_MCR			HWREG8(UART1_BASE + 0x04)
-#define UART1_LSR			HWREG8(UART1_BASE + 0x05)
-#define UART1_MSR			HWREG8(UART1_BASE + 0x06)
-
-#define UART1_LSB			HWREG8(UART1_BASE + 0x00)
-#define UART1_MSB			HWREG8(UART1_BASE + 0x01)
-
-/* UART interrupt enable register value */
-#define UARTIER_IME		(1 << 3)
-#define UARTIER_ILE		(1 << 2) 
-#define UARTIER_ITXE	(1 << 1)
-#define UARTIER_IRXE	(1 << 0)
-
-/* UART line control register value */
-#define UARTLCR_DLAB	(1 << 7)
-#define UARTLCR_BCB		(1 << 6)
-#define UARTLCR_SPB		(1 << 5)
-#define UARTLCR_EPS		(1 << 4)
-#define UARTLCR_PE		(1 << 3)
-#define UARTLCR_SB		(1 << 2)
-
-/* UART line status register value */
-#define UARTLSR_ERROR	(1 << 7)
-#define UARTLSR_TE		(1 << 6)
-#define UARTLSR_TFE		(1 << 5)
-#define UARTLSR_BI		(1 << 4)
-#define UARTLSR_FE		(1 << 3)
-#define UARTLSR_PE		(1 << 2)
-#define UARTLSR_OE		(1 << 1)
-#define UARTLSR_DR		(1 << 0)
-
-void rt_hw_uart_init(void);
-
-#endif