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authordzzxzz <[email protected]>2011-08-08 09:24:44 +0000
committerdzzxzz <[email protected]>2011-08-08 09:24:44 +0000
commit922b40f61454fb014c53e8c0610a78da0db0d500 (patch)
treec2b1e27524834d1382a0e6fce5301419de74df69 /bsp/ls1bdev
parenta39d7f73ad4b70900aa42105e512cdca7b123318 (diff)
add Loongson 1B porting
based on LS1G DEMO BOARD V1.1 git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1667 bbd45198-f89e-11dd-88c7-29a3b14d5316
Diffstat (limited to 'bsp/ls1bdev')
-rw-r--r--bsp/ls1bdev/SConscript12
-rw-r--r--bsp/ls1bdev/SConstruct28
-rw-r--r--bsp/ls1bdev/application.c35
-rw-r--r--bsp/ls1bdev/board.c104
-rw-r--r--bsp/ls1bdev/board.h25
-rw-r--r--bsp/ls1bdev/ls1b_ram.lds119
-rw-r--r--bsp/ls1bdev/readme.txt4
-rw-r--r--bsp/ls1bdev/rtconfig.h164
-rw-r--r--bsp/ls1bdev/rtconfig.py38
-rw-r--r--bsp/ls1bdev/startup.c94
-rw-r--r--bsp/ls1bdev/uart.c299
-rw-r--r--bsp/ls1bdev/uart.h20
12 files changed, 942 insertions, 0 deletions
diff --git a/bsp/ls1bdev/SConscript b/bsp/ls1bdev/SConscript
new file mode 100644
index 0000000000..a0c60722c0
--- /dev/null
+++ b/bsp/ls1bdev/SConscript
@@ -0,0 +1,12 @@
+Import('RTT_ROOT')
+from building import *
+
+src_bsp = ['application.c', 'startup.c', 'board.c']
+
+src_drv = ['uart.c']
+
+src = File(src_bsp + src_drv)
+CPPPATH = [GetCurrentDir()]
+group = DefineGroup('Startup', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')
diff --git a/bsp/ls1bdev/SConstruct b/bsp/ls1bdev/SConstruct
new file mode 100644
index 0000000000..0980f7a2ab
--- /dev/null
+++ b/bsp/ls1bdev/SConstruct
@@ -0,0 +1,28 @@
+import os
+import sys
+import rtconfig
+
+RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
+sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
+from building import *
+
+TARGET = 'rtthread.' + rtconfig.TARGET_EXT
+
+env = Environment(tools = ['mingw'],
+ AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
+ CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
+ AR = rtconfig.AR, ARFLAGS = '-rc',
+ LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
+env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
+
+Export('RTT_ROOT')
+Export('rtconfig')
+
+# prepare building environment
+objs = PrepareBuilding(env, RTT_ROOT)
+
+# build program
+env.Program(TARGET, objs)
+
+# end building
+EndBuilding(TARGET)
diff --git a/bsp/ls1bdev/application.c b/bsp/ls1bdev/application.c
new file mode 100644
index 0000000000..0a810452b5
--- /dev/null
+++ b/bsp/ls1bdev/application.c
@@ -0,0 +1,35 @@
+/*
+ * File : application.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006-2011, RT-Thread Develop Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2010-06-25 Bernard first version
+ * 2011-08-08 lgnq modified for Loongson LS1B
+ */
+
+#include <rtthread.h>
+#include <ls1b.h>
+
+void rt_init_thread_entry(void* parameter)
+{
+}
+
+int rt_application_init()
+{
+ rt_thread_t tid;
+
+ /* create initialization thread */
+ tid = rt_thread_create("init",
+ rt_init_thread_entry, RT_NULL,
+ 4096, 8, 20);
+ if (tid != RT_NULL)
+ rt_thread_startup(tid);
+
+ return 0;
+}
diff --git a/bsp/ls1bdev/board.c b/bsp/ls1bdev/board.c
new file mode 100644
index 0000000000..dbfe6038e0
--- /dev/null
+++ b/bsp/ls1bdev/board.c
@@ -0,0 +1,104 @@
+/*
+ * File : board.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006-2011, RT-Thread Develop Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2010-06-25 Bernard first version
+ * 2011-08-08 lgnq modified for Loongson LS1B
+ */
+
+#include <rtthread.h>
+#include <rthw.h>
+
+#include "board.h"
+#include "uart.h"
+#include "ls1b.h"
+
+/**
+ * @addtogroup Loongson LS1B
+ */
+/*@{*/
+
+/**
+ * This is the timer interrupt service routine.
+ */
+void rt_hw_timer_handler()
+{
+ unsigned int count;
+
+ count = read_c0_compare();
+ write_c0_compare(count);
+ write_c0_count(0);
+
+ /* increase a OS tick */
+ rt_tick_increase();
+}
+
+/**
+ * This function will initial OS timer
+ */
+void rt_hw_timer_init()
+{
+ write_c0_compare(CPU_HZ/2/RT_TICK_PER_SECOND);
+ write_c0_count(0);
+}
+
+/**
+ * This function will initial sam7s64 board.
+ */
+void rt_hw_board_init()
+{
+#ifdef RT_USING_UART
+ /* init hardware UART device */
+ rt_hw_uart_init();
+#endif
+
+#ifdef RT_USING_CONSOLE
+ /* set console device */
+ rt_console_set_device("uart0");
+#endif
+
+ /* init operating system timer */
+ rt_hw_timer_init();
+
+ rt_kprintf("current sr: 0x%08x\n", read_c0_status());
+}
+
+/* UART line status register value */
+#define UARTLSR_ERROR (1 << 7)
+#define UARTLSR_TE (1 << 6)
+#define UARTLSR_TFE (1 << 5)
+#define UARTLSR_BI (1 << 4)
+#define UARTLSR_FE (1 << 3)
+#define UARTLSR_PE (1 << 2)
+#define UARTLSR_OE (1 << 1)
+#define UARTLSR_DR (1 << 0)
+void rt_hw_console_output(const char* ptr)
+{
+ /* stream mode */
+ while (*ptr)
+ {
+ if (*ptr == '\n')
+ {
+ /* FIFO status, contain valid data */
+ while (!(UART_LSR(UART0_BASE) & (UARTLSR_TE | UARTLSR_TFE)));
+ /* write data */
+ UART_DAT(UART0_BASE) = '\r';
+ }
+
+ /* FIFO status, contain valid data */
+ while (!(UART_LSR(UART0_BASE) & (UARTLSR_TE | UARTLSR_TFE)));
+ /* write data */
+ UART_DAT(UART0_BASE) = *ptr;
+
+ ptr ++;
+ }
+}
+
+/*@}*/
diff --git a/bsp/ls1bdev/board.h b/bsp/ls1bdev/board.h
new file mode 100644
index 0000000000..62481a2a45
--- /dev/null
+++ b/bsp/ls1bdev/board.h
@@ -0,0 +1,25 @@
+/*
+ * File : board.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006-2011, RT-Thread Develop Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2010-06-25 Bernard first version
+ * 2011-08-08 lgnq modified for Loongson LS1B
+ */
+
+#ifndef __BOARD_H__
+#define __BOARD_H__
+
+void rt_hw_board_init(void);
+
+/* 64M SDRAM */
+#define RT_HW_HEAP_END (0x80000000 + 64 * 1024 * 1024)
+#define CPU_HZ (125 * 1000000)
+
+#endif
diff --git a/bsp/ls1bdev/ls1b_ram.lds b/bsp/ls1bdev/ls1b_ram.lds
new file mode 100644
index 0000000000..e55c645865
--- /dev/null
+++ b/bsp/ls1bdev/ls1b_ram.lds
@@ -0,0 +1,119 @@
+/*
+ * File : ls1b_ram.lds
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2011, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2010-05-17 swkyer first version
+ * 2010-09-04 bernard move the beginning entry to 0x80200000
+ */
+
+OUTPUT_ARCH(mips)
+GROUP(-lgcc -lc)
+
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x80200000 ;
+
+ .start :
+ {
+ *(.start);
+ }
+
+ . = ALIGN(4);
+ .text :
+ {
+ *(.text)
+ *(.text.*)
+ *(.rodata)
+ *(.rodata.*)
+ *(.rodata1)
+ *(.rodata1.*)
+
+ /* section information for finsh shell */
+ . = ALIGN(4);
+ __fsymtab_start = .;
+ KEEP(*(FSymTab))
+ __fsymtab_end = .;
+ . = ALIGN(4);
+ __vsymtab_start = .;
+ KEEP(*(VSymTab))
+ __vsymtab_end = .;
+ . = ALIGN(4);
+ }
+
+ . = ALIGN(4);
+ .data :
+ {
+ *(.data)
+ *(.data.*)
+
+ *(.data1)
+ *(.data1.*)
+
+ . = ALIGN(8);
+ _gp = ABSOLUTE(.); /* Base of small data */
+
+ *(.sdata)
+ *(.sdata.*)
+ }
+
+ .sbss :
+ {
+ __bss_start = .;
+ *(.sbss)
+ *(.sbss.*)
+ *(.dynsbss)
+ *(.scommon)
+ }
+
+ .bss :
+ {
+ *(.bss)
+ *(.bss.*)
+ *(.dynbss)
+ *(COMMON)
+ __bss_end = .;
+ }
+ _end = .;
+
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ * Symbols in the DWARF debugging sections are relative to the beginning
+ * of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+}
diff --git a/bsp/ls1bdev/readme.txt b/bsp/ls1bdev/readme.txt
new file mode 100644
index 0000000000..7081f59415
--- /dev/null
+++ b/bsp/ls1bdev/readme.txt
@@ -0,0 +1,4 @@
+this bsp is based on LS1G DEMO BOARD V1.1
+
+# download script for RT-Thread
+ifaddr syn0 192.168.1.100;load tftp://192.168.1.5/rtthread.elf;g \ No newline at end of file
diff --git a/bsp/ls1bdev/rtconfig.h b/bsp/ls1bdev/rtconfig.h
new file mode 100644
index 0000000000..2e454662c2
--- /dev/null
+++ b/bsp/ls1bdev/rtconfig.h
@@ -0,0 +1,164 @@
+/* RT-Thread config file */
+#ifndef __RTTHREAD_CFG_H__
+#define __RTTHREAD_CFG_H__
+
+/* RT_NAME_MAX*/
+#define RT_NAME_MAX 10
+
+/* RT_ALIGN_SIZE*/
+#define RT_ALIGN_SIZE 4
+
+/* PRIORITY_MAX */
+#define RT_THREAD_PRIORITY_MAX 256
+
+/* Tick per Second */
+#define RT_TICK_PER_SECOND 100
+
+/* SECTION: RT_DEBUG */
+/* Thread Debug */
+#define RT_DEBUG
+#define RT_USING_OVERFLOW_CHECK
+
+/* Using Hook */
+#define RT_USING_HOOK
+
+/* Using Software Timer */
+/* #define RT_USING_TIMER_SOFT */
+#define RT_TIMER_THREAD_PRIO 4
+#define RT_TIMER_THREAD_STACK_SIZE 512
+#define RT_TIMER_TICK_PER_SECOND 10
+
+/* SECTION: IPC */
+/* Using Semaphore */
+#define RT_USING_SEMAPHORE
+
+/* Using Mutex */
+#define RT_USING_MUTEX
+
+/* Using Event */
+#define RT_USING_EVENT
+
+/* Using MailBox */
+#define RT_USING_MAILBOX
+
+/* Using Message Queue */
+#define RT_USING_MESSAGEQUEUE
+
+/* SECTION: Memory Management */
+/* Using Memory Pool Management*/
+#define RT_USING_MEMPOOL
+
+/* Using Dynamic Heap Management */
+#define RT_USING_HEAP
+
+/* Using SLAB MM */
+#define RT_USING_SLAB
+/* #define RT_USING_SMALL_MEM */
+
+/* SECTION: Device System */
+/* Using Device System */
+#define RT_USING_DEVICE
+#define RT_USING_UART
+#define RT_USING_UART0
+#define RT_UART_RX_BUFFER_SIZE 64
+
+/* SECTION: Console options */
+/* the buffer size of console */
+#define RT_USING_CONSOLE
+#define RT_CONSOLEBUF_SIZE 128
+
+/* SECTION: the runtime libc library */
+/* the runtime libc library */
+/* #define RT_USING_NEWLIB */
+/* #define RT_USING_PTHREADS */
+
+/* SECTION: finsh, a C-Express shell */
+/* Using FinSH as Shell*/
+#define RT_USING_FINSH
+/* Using symbol table */
+#define FINSH_USING_SYMTAB
+#define FINSH_USING_DESCRIPTION
+#define FINSH_DEVICE_NAME "uart0"
+
+/* SECTION: device filesystem support */
+/* #define RT_USING_DFS */
+/* #define RT_USING_DFS_ELMFAT */
+#define RT_USING_DFS_ROMFS
+/* #define RT_USING_DFS_DEVFS */
+
+/* the max number of mounted filesystem */
+#define DFS_FILESYSTEMS_MAX 2
+/* the max number of opened files */
+#define DFS_FD_MAX 4
+/* the max number of cached sector */
+#define DFS_CACHE_MAX_NUM 4
+/* Using working directory */
+#define DFS_USING_WORKDIR
+
+/* SECTION: lwip, a lighwight TCP/IP protocol stack */
+/* #define RT_USING_LWIP */
+#define RT_LWIP_USING_RT_MEM
+
+/* Enable ICMP protocol*/
+#define RT_LWIP_ICMP
+/* Enable UDP protocol*/
+#define RT_LWIP_UDP
+/* Enable TCP protocol*/
+#define RT_LWIP_TCP
+/* Enable DNS */
+#define RT_LWIP_DNS
+
+/* the number of simulatenously active TCP connections*/
+#define RT_LWIP_TCP_PCB_NUM 5
+
+/* ip address of target*/
+#define RT_LWIP_IPADDR0 192
+#define RT_LWIP_IPADDR1 168
+#define RT_LWIP_IPADDR2 1
+#define RT_LWIP_IPADDR3 30
+
+/* gateway address of target*/
+#define RT_LWIP_GWADDR0 192
+#define RT_LWIP_GWADDR1 168
+#define RT_LWIP_GWADDR2 1
+#define RT_LWIP_GWADDR3 1
+
+/* mask address of target*/
+#define RT_LWIP_MSKADDR0 255
+#define RT_LWIP_MSKADDR1 255
+#define RT_LWIP_MSKADDR2 255
+#define RT_LWIP_MSKADDR3 0
+
+/* tcp thread options */
+#define RT_LWIP_TCPTHREAD_PRIORITY 12
+#define RT_LWIP_TCPTHREAD_MBOX_SIZE 4
+#define RT_LWIP_TCPTHREAD_STACKSIZE 1024
+
+/* ethernet if thread options */
+#define RT_LWIP_ETHTHREAD_PRIORITY 15
+#define RT_LWIP_ETHTHREAD_MBOX_SIZE 4
+#define RT_LWIP_ETHTHREAD_STACKSIZE 512
+
+/* SECTION: RT-Thread/GUI */
+/* #define RT_USING_RTGUI */
+
+/* name length of RTGUI object */
+#define RTGUI_NAME_MAX 12
+/* support 16 weight font */
+#define RTGUI_USING_FONT16
+/* support 12 weight font */
+#define RTGUI_USING_FONT12
+/* support Chinese font */
+#define RTGUI_USING_FONTHZ
+/* use DFS as file interface */
+#define RTGUI_USING_DFS_FILERW
+/* use bmp font as Chinese font */
+#define RTGUI_USING_HZ_BMP
+/* use small size in RTGUI */
+#define RTGUI_USING_SMALL_SIZE
+/* use mouse cursor */
+/* #define RTGUI_USING_MOUSE_CURSOR */
+/* default font size in RTGUI */
+#define RTGUI_DEFAULT_FONT_SIZE 16
+
+#endif
diff --git a/bsp/ls1bdev/rtconfig.py b/bsp/ls1bdev/rtconfig.py
new file mode 100644
index 0000000000..336c94df3b
--- /dev/null
+++ b/bsp/ls1bdev/rtconfig.py
@@ -0,0 +1,38 @@
+# CPU options
+ARCH='mips'
+CPU ='loongson_1b'
+
+# toolchains options
+CROSS_TOOL = 'gcc'
+PLATFORM = 'gcc'
+EXEC_PATH = 'E:/Program Files/CodeSourcery/Sourcery G++ Lite/bin'
+BUILD = 'debug'
+
+PREFIX = 'mips-sde-elf-'
+CC = PREFIX + 'gcc'
+AS = PREFIX + 'gcc'
+AR = PREFIX + 'ar'
+LINK = PREFIX + 'gcc'
+TARGET_EXT = 'elf'
+SIZE = PREFIX + 'size'
+OBJDUMP = PREFIX + 'objdump'
+OBJCPY = PREFIX + 'objcopy'
+READELF = PREFIX + 'readelf'
+
+DEVICE = ' -mips32'
+CFLAGS = DEVICE + ' -EL -G0 -mno-abicalls -fno-pic -fno-builtin -fno-exceptions -ffunction-sections -fomit-frame-pointer'
+AFLAGS = ' -c' + DEVICE + ' -EL -fno-pic -fno-builtin -mno-abicalls -x assembler-with-cpp -DSYSTEM_STACK=0x80003fe8'
+LFLAGS = DEVICE + ' -EL -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T ls1b_ram.lds'
+
+CPATH = ''
+LPATH = ''
+
+if BUILD == 'debug':
+ CFLAGS += ' -O0 -gdwarf-2'
+ AFLAGS += ' -gdwarf-2'
+else:
+ CFLAGS += ' -O2'
+
+DUMP_ACTION = OBJDUMP + ' -D -S $TARGET > rtt.asm\n'
+READELF_ACTION = READELF + ' -a $TARGET > rtt.map\n'
+POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
diff --git a/bsp/ls1bdev/startup.c b/bsp/ls1bdev/startup.c
new file mode 100644
index 0000000000..79cce38978
--- /dev/null
+++ b/bsp/ls1bdev/startup.c
@@ -0,0 +1,94 @@
+/*
+ * File : startup.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006-2011, RT-Thread Develop Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2010-06-25 Bernard first version
+ * 2011-08-08 lgnq modified for Loongson LS1B
+ */
+
+#include <rthw.h>
+#include <rtthread.h>
+
+#include "board.h"
+#define A_K0BASE 0x80000000
+
+/**
+ * @addtogroup Loongson LS1B
+ */
+
+/*@{*/
+extern unsigned char __bss_end;
+
+extern int rt_application_init(void);
+
+extern void tlb_refill_exception(void);
+extern void general_exception(void);
+extern void irq_exception(void);
+
+/**
+ * This function will startup RT-Thread RTOS.
+ */
+void rtthread_startup(void)
+{
+ /* disable interrupt first */
+ rt_hw_interrupt_disable();
+
+ /* init cache */
+ rt_hw_cache_init();
+ /* init hardware interrupt */
+ rt_hw_interrupt_init();
+
+ /* copy vector */
+ memcpy((void *)A_K0BASE, tlb_refill_exception, 0x20);
+ memcpy((void *)(A_K0BASE + 0x180), general_exception, 0x20);
+ memcpy((void *)(A_K0BASE + 0x200), irq_exception, 0x20);
+
+ /* init board */
+ rt_hw_board_init();
+ rt_show_version();
+
+ /* init tick */
+ rt_system_tick_init();
+
+ /* init timer system */
+ rt_system_timer_init();
+
+#ifdef RT_USING_HEAP
+ rt_system_heap_init((void*)&__bss_end, (void*)RT_HW_HEAP_END);
+#endif
+
+ /* init scheduler system */
+ rt_system_scheduler_init();
+
+#ifdef RT_USING_DEVICE
+ /* init all device */
+ rt_device_init_all();
+#endif
+
+ /* init application */
+ rt_application_init();
+
+#ifdef RT_USING_FINSH
+ /* init finsh */
+ finsh_system_init();
+ finsh_set_device(FINSH_DEVICE_NAME);
+#endif
+
+ /* init idle thread */
+ rt_thread_idle_init();
+
+ /* start scheduler */
+ rt_system_scheduler_start();
+
+ /* never reach here */
+ return ;
+}
+
+/*@}*/
diff --git a/bsp/ls1bdev/uart.c b/bsp/ls1bdev/uart.c
new file mode 100644
index 0000000000..fa33194bb8
--- /dev/null
+++ b/bsp/ls1bdev/uart.c
@@ -0,0 +1,299 @@
+/*
+ * File : board.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006-2011, RT-Thread Develop Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2011-08-08 lgnq first version
+ */
+
+#include <rthw.h>
+#include <rtthread.h>
+
+#include "ls1b.h"
+
+/**
+ * @addtogroup Loongson LS1B
+ */
+
+/*@{*/
+#if defined(RT_USING_UART) && defined(RT_USING_DEVICE)
+
+/* UART interrupt enable register value */
+#define UARTIER_IME (1 << 3)
+#define UARTIER_ILE (1 << 2)
+#define UARTIER_ITXE (1 << 1)
+#define UARTIER_IRXE (1 << 0)
+
+/* UART line control register value */
+#define UARTLCR_DLAB (1 << 7)
+#define UARTLCR_BCB (1 << 6)
+#define UARTLCR_SPB (1 << 5)
+#define UARTLCR_EPS (1 << 4)
+#define UARTLCR_PE (1 << 3)
+#define UARTLCR_SB (1 << 2)
+
+/* UART line status register value */
+#define UARTLSR_ERROR (1 << 7)
+#define UARTLSR_TE (1 << 6)
+#define UARTLSR_TFE (1 << 5)
+#define UARTLSR_BI (1 << 4)
+#define UARTLSR_FE (1 << 3)
+#define UARTLSR_PE (1 << 2)
+#define UARTLSR_OE (1 << 1)
+#define UARTLSR_DR (1 << 0)
+
+struct rt_uart_ls1b
+{
+ struct rt_device parent;
+
+ rt_uint32_t hw_base;
+ rt_uint32_t irq;
+
+ /* buffer for reception */
+ rt_uint8_t read_index, save_index;
+ rt_uint8_t rx_buffer[RT_UART_RX_BUFFER_SIZE];
+}uart_device;
+
+static void rt_uart_irqhandler(int irqno)
+{
+ rt_ubase_t level;
+ rt_uint8_t isr;
+ struct rt_uart_ls1b* uart = &uart_device;
+
+ /* read interrupt status and clear it */
+ isr = UART_IIR(uart->hw_base);
+ isr = (isr >> 1) & 0x3;
+
+ if (isr & 0x02) /* receive data available */
+ {
+ /* Receive Data Available */
+ while (UART_LSR(uart->hw_base) & UARTLSR_DR)
+ {
+ uart->rx_buffer[uart->save_index] = UART_DAT(uart->hw_base);
+
+ level = rt_hw_interrupt_disable();
+ uart->save_index ++;
+ if (uart->save_index >= RT_UART_RX_BUFFER_SIZE)
+ uart->save_index = 0;
+ rt_hw_interrupt_enable(level);
+ }
+
+ /* invoke callback */
+ if(uart->parent.rx_indicate != RT_NULL)
+ {
+ rt_size_t length;
+ if (uart->read_index > uart->save_index)
+ length = RT_UART_RX_BUFFER_SIZE - uart->read_index + uart->save_index;
+ else
+ length = uart->save_index - uart->read_index;
+
+ uart->parent.rx_indicate(&uart->parent, length);
+ }
+ }
+
+ return;
+}
+
+static rt_err_t rt_uart_init (rt_device_t dev)
+{
+ rt_uint32_t baud_div;
+ struct rt_uart_ls1b *uart = (struct rt_uart_ls1b*)dev;
+
+ RT_ASSERT(uart != RT_NULL);
+
+#if 0
+ /* init UART Hardware */
+ UART_IER(uart->hw_base) = 0; /* clear interrupt */
+ UART_FCR(uart->hw_base) = 0x60; /* reset UART Rx/Tx */
+
+ /* enable UART clock */
+ /* set databits, stopbits and parity. (8-bit data, 1 stopbit, no parity) */
+ UART_LCR(uart->hw_base) = 0x3;
+
+ /* set baudrate */
+ baud_div = DEV_CLK / 16 / UART_BAUDRATE;
+ UART_LCR(uart->hw_base) |= UARTLCR_DLAB;
+
+ UART_MSB(uart->hw_base) = (baud_div >> 8) & 0xff;
+ UART_LSB(uart->hw_base) = baud_div & 0xff;
+
+ UART_LCR(uart->hw_base) &= ~UARTLCR_DLAB;
+
+ /* Enable UART unit, enable and clear FIFO */
+ UART_FCR(uart->hw_base) = UARTFCR_UUE | UARTFCR_FE | UARTFCR_TFLS | UARTFCR_RFLS;
+#endif
+
+ return RT_EOK;
+}
+
+static rt_err_t rt_uart_open(rt_device_t dev, rt_uint16_t oflag)
+{
+ struct rt_uart_ls1b *uart = (struct rt_uart_ls1b*)dev;
+
+ RT_ASSERT(uart != RT_NULL);
+ if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+ {
+ /* Enable the UART Interrupt */
+ UART_IER(uart->hw_base) |= UARTIER_IRXE;
+
+ /* install interrupt */
+ rt_hw_interrupt_install(uart->irq, rt_uart_irqhandler, RT_NULL);
+ rt_hw_interrupt_umask(uart->irq);
+ }
+ return RT_EOK;
+}
+
+static rt_err_t rt_uart_close(rt_device_t dev)
+{
+ struct rt_uart_ls1b *uart = (struct rt_uart_ls1b*)dev;
+
+ RT_ASSERT(uart != RT_NULL);
+ if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+ {
+ /* Disable the UART Interrupt */
+ UART_IER(uart->hw_base) &= ~(UARTIER_IRXE);
+ }
+
+ return RT_EOK;
+}
+
+static rt_size_t rt_uart_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
+{
+ rt_uint8_t* ptr;
+ struct rt_uart_ls1b *uart = (struct rt_uart_ls1b*)dev;
+
+ RT_ASSERT(uart != RT_NULL);
+
+ /* point to buffer */
+ ptr = (rt_uint8_t*) buffer;
+ if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+ {
+ while (size)
+ {
+ /* interrupt receive */
+ rt_base_t level;
+
+ /* disable interrupt */
+ level = rt_hw_interrupt_disable();
+ if (uart->read_index != uart->save_index)
+ {
+ *ptr = uart->rx_buffer[uart->read_index];
+
+ uart->read_index ++;
+ if (uart->read_index >= RT_UART_RX_BUFFER_SIZE)
+ uart->read_index = 0;
+ }
+ else
+ {
+ /* no data in rx buffer */
+
+ /* enable interrupt */
+ rt_hw_interrupt_enable(level);
+ break;
+ }
+
+ /* enable interrupt */
+ rt_hw_interrupt_enable(level);
+
+ ptr ++;
+ size --;
+ }
+
+ return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
+ }
+
+ return 0;
+}
+
+static rt_size_t rt_uart_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
+{
+ char *ptr;
+ struct rt_uart_ls1b *uart = (struct rt_uart_ls1b*)dev;
+
+ RT_ASSERT(uart != RT_NULL);
+
+ ptr = (char*)buffer;
+
+ if (dev->flag & RT_DEVICE_FLAG_STREAM)
+ {
+ /* stream mode */
+ while (size)
+ {
+ if (*ptr == '\n')
+ {
+ /* FIFO status, contain valid data */
+ while (!(UART_LSR(uart->hw_base) & (UARTLSR_TE | UARTLSR_TFE)));
+ /* write data */
+ UART_DAT(uart->hw_base) = '\r';
+ }
+
+ /* FIFO status, contain valid data */
+ while (!(UART_LSR(uart->hw_base) & (UARTLSR_TE | UARTLSR_TFE)));
+ /* write data */
+ UART_DAT(uart->hw_base) = *ptr;
+
+ ptr ++;
+ size --;
+ }
+ }
+ else
+ {
+ while ( size != 0 )
+ {
+ /* FIFO status, contain valid data */
+ while (!(UART_LSR(uart->hw_base) & (UARTLSR_TE | UARTLSR_TFE)));
+
+ /* write data */
+ UART_DAT(uart->hw_base) = *ptr;
+
+ ptr++;
+ size--;
+ }
+ }
+
+ return (rt_size_t) ptr - (rt_size_t) buffer;
+}
+
+void rt_hw_uart_init(void)
+{
+ struct rt_uart_ls1b* uart;
+
+ /* get uart device */
+ uart = &uart_device;
+
+ /* device initialization */
+ uart->parent.type = RT_Device_Class_Char;
+ rt_memset(uart->rx_buffer, 0, sizeof(uart->rx_buffer));
+ uart->read_index = uart->save_index = 0;
+
+#if defined(RT_USING_UART0)
+ uart->hw_base = UART0_BASE;
+ uart->irq = LS1B_UART0_IRQ;
+#elif defined(RT_USING_UART1)
+ uart->hw_base = UART1_BASE;
+ uart->irq = LS1B_UART1_IRQ;
+#endif
+
+ /* device interface */
+ uart->parent.init = rt_uart_init;
+ uart->parent.open = rt_uart_open;
+ uart->parent.close = rt_uart_close;
+ uart->parent.read = rt_uart_read;
+ uart->parent.write = rt_uart_write;
+ uart->parent.control = RT_NULL;
+ uart->parent.user_data = RT_NULL;
+
+ rt_device_register(&uart->parent, "uart0",
+ RT_DEVICE_FLAG_RDWR |
+ RT_DEVICE_FLAG_STREAM |
+ RT_DEVICE_FLAG_INT_RX);
+}
+#endif /* end of UART */
+
+/*@}*/
diff --git a/bsp/ls1bdev/uart.h b/bsp/ls1bdev/uart.h
new file mode 100644
index 0000000000..14844ad835
--- /dev/null
+++ b/bsp/ls1bdev/uart.h
@@ -0,0 +1,20 @@
+/*
+ * File : board.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006-2011, RT-Thread Develop Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2011-08-08 lgnq first version
+ */
+
+#ifndef __UART_H__
+#define __UART_H__
+
+void rt_hw_uart_init(void);
+
+#endif