update ls1bdev

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2176 bbd45198-f89e-11dd-88c7-29a3b14d5316

12 files changed, 1153 insertions, 124 deletions

diff --git a/bsp/ls1bdev/SConscript b/bsp/ls1bdev/SConscript
index dc4ae18a10..d9c64eb9f9 100644
--- a/bsp/ls1bdev/SConscript
+++ b/bsp/ls1bdev/SConscript
@@ -1,15 +1,12 @@
-Import('RTT_ROOT')

 from building import *

 

-src_bsp = ['application.c', 'startup.c', 'board.c']

+cwd  = GetCurrentDir()

+objs = []

+list = os.listdir(cwd)

 

-src_drv = ['uart.c']

-    

-if GetDepend('RT_USING_RTGUI'):

-    src_drv += ['display_controller.c']

-        

-src	= File(src_bsp + src_drv)

-CPPPATH = [GetCurrentDir()]

-group = DefineGroup('Startup', src, depend = [''], CPPPATH = CPPPATH)

+for d in list:

+    path = os.path.join(cwd, d)

+    if os.path.isfile(os.path.join(path, 'SConscript')):

+        objs = objs + SConscript(os.path.join(d, 'SConscript'))

 

-Return('group')

+Return('objs')

diff --git a/bsp/ls1bdev/applications/SConscript b/bsp/ls1bdev/applications/SConscript
new file mode 100644
index 0000000000..4fe38ed0cf
--- /dev/null
+++ b/bsp/ls1bdev/applications/SConscript
@@ -0,0 +1,9 @@
+from building import *

+

+cwd     = GetCurrentDir()

+src	= Glob('*.c')

+CPPPATH = [cwd, str(Dir('#'))]

+

+group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)

+

+Return('group')

diff --git a/bsp/ls1bdev/applications/application.c b/bsp/ls1bdev/applications/application.c
new file mode 100644
index 0000000000..282620fff2
--- /dev/null
+++ b/bsp/ls1bdev/applications/application.c
@@ -0,0 +1,66 @@
+/*
+ * File      : application.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006-2012, RT-Thread Develop Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2010-06-25     Bernard      first version
+ * 2011-08-08     lgnq         modified for Loongson LS1B
+ */
+
+#include <rtthread.h>
+#include <ls1b.h>
+
+#ifdef RT_USING_COMPONENTS_INIT
+#include <components_init.h>
+#endif
+
+#ifdef RT_USING_RTGUI
+#include <rtgui/rtgui.h>
+extern void rt_hw_dc_init(void);
+#endif
+
+void rt_init_thread_entry(void *parameter)
+{
+#ifdef RT_USING_RTGUI
+	{
+		rt_device_t dc;
+
+		/* init Display Controller */
+		rt_hw_dc_init();
+			
+		/* re-init device driver */
+		rt_device_init_all();
+	
+		/* find Display Controller device */
+		dc = rt_device_find("dc");
+	
+		/* set Display Controller device as rtgui graphic driver */		
+		rtgui_graphic_set_device(dc);
+	}
+#endif
+
+#ifdef RT_USING_COMPONENTS_INIT
+	/* initialization RT-Thread Components */
+	rt_components_init();
+#endif
+}
+
+int rt_application_init(void)
+{
+	rt_thread_t tid;
+
+	/* create initialization thread */
+	tid = rt_thread_create("init",
+							rt_init_thread_entry, RT_NULL,
+							4096, 8, 20);
+	if (tid != RT_NULL) 
+		rt_thread_startup(tid);
+
+	return 0;
+}
diff --git a/bsp/ls1bdev/applications/startup.c b/bsp/ls1bdev/applications/startup.c
new file mode 100644
index 0000000000..2fdfa700ba
--- /dev/null
+++ b/bsp/ls1bdev/applications/startup.c
@@ -0,0 +1,88 @@
+/*
+ * File      : startup.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006-2012, RT-Thread Develop Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2010-06-25     Bernard      first version
+ * 2011-08-08     lgnq         modified for Loongson LS1B
+ */
+
+#include <rthw.h>
+#include <rtthread.h>
+
+#include "board.h"
+#define A_K0BASE		0x80000000
+
+/**
+ * @addtogroup Loongson LS1B
+ */
+
+/*@{*/
+
+extern unsigned char __bss_end;
+
+extern int rt_application_init(void);
+
+extern void tlb_refill_exception(void);
+extern void general_exception(void);
+extern void irq_exception(void);
+
+/**
+ * This function will startup RT-Thread RTOS.
+ */
+void rtthread_startup(void)
+{
+	/* disable interrupt first */
+	rt_hw_interrupt_disable();
+
+	/* init cache */
+	rt_hw_cache_init();
+	/* init hardware interrupt */
+	rt_hw_interrupt_init();
+
+	/* copy vector */
+	memcpy((void *)A_K0BASE, tlb_refill_exception, 0x20);
+	memcpy((void *)(A_K0BASE + 0x180), general_exception, 0x20);
+	memcpy((void *)(A_K0BASE + 0x200), irq_exception, 0x20);
+
+	/* init board */
+	rt_hw_board_init();
+
+	/* show version */
+	rt_show_version();
+
+#ifdef RT_USING_HEAP
+	rt_system_heap_init((void*)&__bss_end, (void*)RT_HW_HEAP_END);
+#endif
+
+	/* init scheduler system */
+	rt_system_scheduler_init();
+
+#ifdef RT_USING_DEVICE
+	/* init all device */
+	rt_device_init_all();
+#endif
+
+	/* init application */
+	rt_application_init();
+
+	/* initialize timer thread */
+	rt_system_timer_thread_init();
+
+	/* init idle thread */
+	rt_thread_idle_init();
+
+	/* start scheduler */
+	rt_system_scheduler_start();
+
+	/* never reach here */
+	return ;
+}
+
+/*@}*/
diff --git a/bsp/ls1bdev/drivers/SConscript b/bsp/ls1bdev/drivers/SConscript
new file mode 100644
index 0000000000..9e7b13fc2c
--- /dev/null
+++ b/bsp/ls1bdev/drivers/SConscript
@@ -0,0 +1,14 @@
+from building import *

+

+cwd = GetCurrentDir()

+src = Glob('*.c')

+

+# remove no need file.

+if GetDepend('RT_USING_RTGUI') == False:

+    SrcRemove(src, 'display_controller.c')

+

+CPPPATH = [cwd]

+

+group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)

+

+Return('group')

diff --git a/bsp/ls1bdev/drivers/board.c b/bsp/ls1bdev/drivers/board.c
new file mode 100644
index 0000000000..cea1fb5b56
--- /dev/null
+++ b/bsp/ls1bdev/drivers/board.c
@@ -0,0 +1,105 @@
+/*
+ * File      : board.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006-2011, RT-Thread Develop Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2010-06-25     Bernard      first version
+ * 2011-08-08     lgnq         modified for Loongson LS1B
+ */
+
+#include <rtthread.h>
+#include <rthw.h>
+
+#include "board.h"
+#include "uart.h"
+#include "ls1b.h"
+
+/**
+ * @addtogroup Loongson LS1B
+ */
+ 
+/*@{*/
+
+/**
+ * This is the timer interrupt service routine.
+ */
+void rt_hw_timer_handler(void)
+{
+    unsigned int count;
+
+    count = read_c0_compare();
+    write_c0_compare(count);
+    write_c0_count(0);
+
+	/* increase a OS tick */
+	rt_tick_increase();
+}
+
+/**
+ * This function will initial OS timer
+ */
+void rt_hw_timer_init(void)
+{
+    write_c0_compare(CPU_HZ/2/RT_TICK_PER_SECOND);
+    write_c0_count(0);
+}
+
+/**
+ * This function will initial sam7s64 board.
+ */
+void rt_hw_board_init(void)
+{
+#ifdef RT_USING_UART
+	/* init hardware UART device */
+	rt_hw_uart_init();
+#endif
+
+#ifdef RT_USING_CONSOLE
+	/* set console device */
+	rt_console_set_device("uart0");
+#endif
+
+	/* init operating system timer */
+	rt_hw_timer_init();
+
+	rt_kprintf("current sr: 0x%08x\n", read_c0_status());
+}
+
+/* UART line status register value */
+#define UARTLSR_ERROR	(1 << 7)
+#define UARTLSR_TE		(1 << 6)
+#define UARTLSR_TFE		(1 << 5)
+#define UARTLSR_BI		(1 << 4)
+#define UARTLSR_FE		(1 << 3)
+#define UARTLSR_PE		(1 << 2)
+#define UARTLSR_OE		(1 << 1)
+#define UARTLSR_DR		(1 << 0)
+void rt_hw_console_output(const char* ptr)
+{
+	/* stream mode */
+	while (*ptr)
+	{
+		if (*ptr == '\n')
+		{
+			/* FIFO status, contain valid data */
+			while (!(UART_LSR(UART0_BASE) & (UARTLSR_TE | UARTLSR_TFE)));
+			/* write data */
+			UART_DAT(UART0_BASE) = '\r';
+		}
+
+		/* FIFO status, contain valid data */
+		while (!(UART_LSR(UART0_BASE) & (UARTLSR_TE | UARTLSR_TFE)));
+		/* write data */
+		UART_DAT(UART0_BASE) = *ptr;
+
+		ptr ++;
+	}
+}
+
+/*@}*/
diff --git a/bsp/ls1bdev/drivers/board.h b/bsp/ls1bdev/drivers/board.h
new file mode 100644
index 0000000000..62481a2a45
--- /dev/null
+++ b/bsp/ls1bdev/drivers/board.h
@@ -0,0 +1,25 @@
+/*
+ * File      : board.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006-2011, RT-Thread Develop Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2010-06-25     Bernard      first version
+ * 2011-08-08     lgnq         modified for Loongson LS1B
+ */
+
+#ifndef __BOARD_H__
+#define __BOARD_H__
+
+void rt_hw_board_init(void);
+
+/* 64M SDRAM */
+#define RT_HW_HEAP_END	(0x80000000 + 64 * 1024 * 1024)
+#define CPU_HZ			(125 * 1000000)
+
+#endif
diff --git a/bsp/ls1bdev/drivers/display_controller.c b/bsp/ls1bdev/drivers/display_controller.c
new file mode 100644
index 0000000000..511f2dbe0d
--- /dev/null
+++ b/bsp/ls1bdev/drivers/display_controller.c
@@ -0,0 +1,234 @@
+/*

+ * File      : display_controller.c

+ * This file is part of RT-Thread RTOS

+ * COPYRIGHT (C) 2006-2011, RT-Thread Develop Team

+ *

+ * The license and distribution terms for this file may be

+ * found in the file LICENSE in this distribution or at

+ * http://www.rt-thread.org/license/LICENSE

+ *

+ * Change Logs:

+ * Date           Author       Notes

+ * 2011-08-09     lgnq         first version for LS1B DC

+ */

+

+#include <rtthread.h>

+#include "display_controller.h"

+

+struct vga_struct vga_mode[] =

+{

+	{/*"640x480_70.00"*/    28560,  640,    664,    728,    816,    480,    481,    484,    500,    },

+	{/*"640x640_60.00"*/	33100,	640,	672,	736,	832,	640,	641,	644,	663,	},

+	{/*"640x768_60.00"*/	39690,	640,	672,	736,	832,	768,	769,	772,	795,	},

+	{/*"640x800_60.00"*/	42130,	640,	680,	744,	848,	800,	801,	804,	828,	},

+	{/*"800x480_70.00"*/    35840,  800,    832,    912,    1024,   480,    481,    484,    500,    },

+	{/*"800x600_60.00"*/	38220,	800,	832,	912,	1024,	600,	601,	604,	622,	},

+	{/*"800x640_60.00"*/	40730,	800,	832,	912,	1024,	640,	641,	644,	663,	},

+	{/*"832x600_60.00"*/	40010,	832,	864,	952,	1072,	600,	601,	604,	622,	},

+	{/*"832x608_60.00"*/	40520,	832,	864,	952,	1072,	608,	609,	612,	630,	},

+	{/*"1024x480_60.00"*/	38170,	1024,	1048,	1152,	1280,	480,	481,	484,	497,	},

+	{/*"1024x600_60.00"*/	48960,	1024,	1064,	1168,	1312,	600,	601,	604,	622,	},

+	{/*"1024x640_60.00"*/	52830,	1024,	1072,	1176,	1328,	640,	641,	644,	663,	},

+	{/*"1024x768_60.00"*/	64110,	1024,	1080,	1184,	1344,	768,	769,	772,	795,	},

+	{/*"1152x764_60.00"*/   71380,  1152,   1208,   1328,   1504,   764,    765,    768,    791,    },

+	{/*"1280x800_60.00"*/   83460,  1280,   1344,   1480,   1680,   800,    801,    804,    828,    },

+	{/*"1280x1024_55.00"*/  98600,  1280,   1352,   1488,   1696,   1024,   1025,   1028,   1057,   },

+	{/*"1440x800_60.00"*/   93800,  1440,   1512,   1664,   1888,   800,    801,    804,    828,    },

+	{/*"1440x900_67.00"*/   120280, 1440,   1528,   1680,   1920,   900,    901,    904,    935,    },

+};

+

+ALIGN(16)

+volatile rt_uint16_t _rt_framebuffer[FB_YSIZE][FB_XSIZE];

+static struct rt_device_graphic_info _dc_info;

+

+#define abs(x) ((x<0)?(-x):x)

+#define min(a,b) ((a<b)?a:b)

+

+int caclulate_freq(long long XIN, long long PCLK)

+{

+	int i;

+	long long clk, clk1;

+	int start, end;

+	int mi;

+	int pll,ctrl,div,div1,frac;

+

+	pll = PLL_FREQ;

+	ctrl = PLL_DIV_PARAM;

+	rt_kprintf("pll=0x%x, ctrl=0x%x\n", pll, ctrl);

+//	rt_kprintf("cpu freq is %d\n", tgt_pipefreq());

+	start = -1;

+	end = 1;

+

+	for (i=start; i<=end; i++)

+	{

+		clk = (12+i+(pll&0x3f))*33333333/2;

+		div = clk/(long)PCLK/1000;

+		clk1 = (12+i+1+(pll&0x3f))*33333333/2;

+		div1 = clk1/(long)PCLK/1000;

+		if (div!=div1)

+			break;

+	}

+

+	if (div!=div1)

+	{

+		frac = ((PCLK*1000*div1)*2*1024/33333333 - (12+i+(pll&0x3f))*1024)&0x3ff;

+		pll = (pll & ~0x3ff3f)|(frac<<8)|((pll&0x3f)+i);

+		ctrl = ctrl&~(0x1f<<26)|(div1<<26)|(1<<31);

+	}

+	else

+	{

+		clk = (12+start+(pll&0x3f))*33333333/2;

+		clk1 = (12+end+(pll&0x3f))*33333333/2;

+		if (abs((long)clk/div/1000-PCLK)<abs((long)clk1/(div+1)/1000-PCLK))

+		{

+			pll = (pll & ~0x3ff3f)|((pll&0x3f)+start);

+			ctrl = ctrl&~(0x1f<<26)|(div<<26)|(1<<31);

+		}

+		else

+		{

+			pll = (pll & ~0x3ff3f)|((pll&0x3f)+end);

+			ctrl = ctrl&~(0x1f<<26)|((div+1)<<26)|(1<<31);

+		}

+	}

+

+	rt_kprintf("new pll=0x%x, ctrl=0x%x\n", pll, ctrl);

+	ctrl |= 0x2a00;

+	PLL_DIV_PARAM = ctrl; 

+	PLL_FREQ = pll;

+	rt_thread_delay(10);

+//	initserial(0);

+//	_probe_frequencies();

+//	rt_kprintf("cpu freq is %d\n",tgt_pipefreq());

+	return 0;

+}

+

+static rt_err_t rt_dc_init(rt_device_t dev)

+{

+	int i, out, mode=-1;

+	int val;

+

+	for (i=0; i<sizeof(vga_mode)/sizeof(struct vga_struct); i++)

+	{

+		if (vga_mode[i].hr == FB_XSIZE && vga_mode[i].vr == FB_YSIZE)

+		{

+			mode=i;

+#ifdef LS1FSOC

+//			out = caclulatefreq(APB_CLK/1000,vga_mode[i].pclk);

+//			rt_kprintf("out=%x\n",out);

+			/*inner gpu dc logic fifo pll ctrl,must large then outclk*/

+//			*(volatile int *)0xbfd00414 = out+1;

+			/*output pix1 clock  pll ctrl*/

+//			*(volatile int *)0xbfd00410 = out;

+			/*output pix2 clock pll ctrl */

+//			*(volatile int *)0xbfd00424 = out;

+#else

+			caclulate_freq(APB_CLK/1000, vga_mode[i].pclk);

+#endif

+			break;

+		}

+	}

+

+	if (mode<0)

+	{

+		rt_kprintf("\n\n\nunsupported framebuffer resolution\n\n\n");

+		return;

+	}

+

+	DC_FB_CONFIG = 0x0;

+	DC_FB_CONFIG = 0x3; //	// framebuffer configuration RGB565

+ 	DC_FB_BUFFER_ADDR0 = (rt_uint32_t)_rt_framebuffer - 0x80000000;

+	DC_FB_BUFFER_ADDR1 = (rt_uint32_t)_rt_framebuffer - 0x80000000;

+	DC_DITHER_CONFIG = 0x0;

+	DC_DITHER_TABLE_LOW = 0x0;

+	DC_DITHER_TABLE_HIGH = 0x0;

+	DC_PANEL_CONFIG = 0x80001311;

+	DC_PANEL_TIMING = 0x0;

+

+	DC_HDISPLAY = (vga_mode[mode].hfl<<16) | vga_mode[mode].hr;

+	DC_HSYNC = 0x40000000 | (vga_mode[mode].hse<<16) | vga_mode[mode].hss;

+	DC_VDISPLAY = (vga_mode[mode].vfl<<16) | vga_mode[mode].vr;

+	DC_VSYNC = 0x40000000 | (vga_mode[mode].vse<<16) | vga_mode[mode].vss;

+

+#if defined(CONFIG_VIDEO_32BPP)

+	DC_FB_CONFIG = 0x00100104;

+	DC_FB_BUFFER_STRIDE = FB_XSIZE*4;

+#elif defined(CONFIG_VIDEO_16BPP)

+	DC_FB_CONFIG = 0x00100103;

+	DC_FB_BUFFER_STRIDE = (FB_XSIZE*2+255)&(~255);

+#elif defined(CONFIG_VIDEO_15BPP)

+	DC_FB_CONFIG = 0x00100102;

+	DC_FB_BUFFER_STRIDE = FB_XSIZE*2;

+#elif defined(CONFIG_VIDEO_12BPP)

+	DC_FB_CONFIG = 0x00100101;

+	DC_FB_BUFFER_STRIDE = FB_XSIZE*2;

+#else  //640x480-32Bits

+	DC_FB_CONFIG = 0x00100104;

+	DC_FB_BUFFER_STRIDE = FB_XSIZE*4;

+#endif //32Bits

+

+#ifdef LS1GSOC

+	/*fix ls1g dc

+	 *first switch to tile mode

+	 *change origin register to 0

+	 *goback nomal mode

+	 */

+	{

+		val = DC_FB_CONFIG;

+		DC_FB_CONFIG = val | 0x10;

+		DC_FB_BUFFER_ORIGIN = 0;

+		DC_FB_BUFFER_ORIGIN;

+		rt_thread_delay(10);

+		DC_FB_CONFIG;

+		DC_FB_CONFIG = val;

+	}

+#endif

+

+	return RT_EOK;

+}

+

+static rt_err_t rt_dc_control(rt_device_t dev, rt_uint8_t cmd, void *args)

+{

+	switch (cmd)

+	{

+	case RTGRAPHIC_CTRL_RECT_UPDATE:

+		break;

+	case RTGRAPHIC_CTRL_POWERON:

+		break;

+	case RTGRAPHIC_CTRL_POWEROFF:

+		break;

+	case RTGRAPHIC_CTRL_GET_INFO:		

+		rt_memcpy(args, &_dc_info, sizeof(_dc_info));

+		break;

+	case RTGRAPHIC_CTRL_SET_MODE:

+		break;

+	}

+

+	return RT_EOK;

+}

+

+void rt_hw_dc_init(void)

+{

+	rt_device_t dc = rt_malloc(sizeof(struct rt_device));

+	if (dc == RT_NULL) 

+	{

+		rt_kprintf("dc == RT_NULL\n");

+		return; /* no memory yet */

+	}

+

+	_dc_info.bits_per_pixel = 16;

+	_dc_info.pixel_format = RTGRAPHIC_PIXEL_FORMAT_RGB565P;

+	_dc_info.framebuffer = (rt_uint8_t*)HW_FB_ADDR;

+	_dc_info.width = FB_XSIZE;

+	_dc_info.height = FB_YSIZE;

+

+	/* init device structure */

+	dc->type = RT_Device_Class_Graphic;

+	dc->init = rt_dc_init;

+	dc->open = RT_NULL;

+	dc->close = RT_NULL;

+	dc->control = rt_dc_control;

+	dc->user_data = (void*)&_dc_info;

+	

+	/* register Display Controller device to RT-Thread */

+	rt_device_register(dc, "dc", RT_DEVICE_FLAG_RDWR);

+}

diff --git a/bsp/ls1bdev/drivers/display_controller.h b/bsp/ls1bdev/drivers/display_controller.h
new file mode 100644
index 0000000000..85086daf31
--- /dev/null
+++ b/bsp/ls1bdev/drivers/display_controller.h
@@ -0,0 +1,58 @@
+/*

+ * File      : display_controller.h

+ * This file is part of RT-Thread RTOS

+ * COPYRIGHT (C) 2006-2011, RT-Thread Develop Team

+ *

+ * The license and distribution terms for this file may be

+ * found in the file LICENSE in this distribution or at

+ * http://www.rt-thread.org/license/LICENSE

+ *

+ * Change Logs:

+ * Date           Author       Notes

+ * 2011-08-08     lgnq         first version for LS1B

+ */

+ 

+#ifndef __DISPLAY_CONTROLLER_H__

+#define __DISPLAY_CONTROLLER_H__

+

+#include <rtthread.h>

+#include "ls1b.h"

+

+#define DC_BASE					0xBC301240  //Display Controller

+

+/* Frame Buffer registers */

+#define DC_FB_CONFIG			__REG32(DC_BASE + 0x000)
+#define DC_FB_BUFFER_ADDR0		__REG32(DC_BASE + 0x020)
+#define DC_FB_BUFFER_STRIDE		__REG32(DC_BASE + 0x040)
+#define DC_FB_BUFFER_ORIGIN		__REG32(DC_BASE + 0x060)
+#define DC_DITHER_CONFIG		__REG32(DC_BASE + 0x120)
+#define DC_DITHER_TABLE_LOW		__REG32(DC_BASE + 0x140)
+#define DC_DITHER_TABLE_HIGH	__REG32(DC_BASE + 0x160)
+#define DC_PANEL_CONFIG			__REG32(DC_BASE + 0x180)
+#define DC_PANEL_TIMING			__REG32(DC_BASE + 0x1A0)
+#define DC_HDISPLAY				__REG32(DC_BASE + 0x1C0)
+#define DC_HSYNC				__REG32(DC_BASE + 0x1E0)
+#define DC_VDISPLAY				__REG32(DC_BASE + 0x240)
+#define DC_VSYNC				__REG32(DC_BASE + 0x260)
+#define DC_FB_BUFFER_ADDR1		__REG32(DC_BASE + 0x340)

+

+/* Display Controller driver for 1024x768 16bit */

+#define FB_XSIZE		1024

+#define FB_YSIZE		768

+#define CONFIG_VIDEO_16BPP

+

+#define APB_CLK 33333333

+

+#define K1BASE				0xA0000000

+#define KSEG1(addr)			((void *)(K1BASE | (rt_uint32_t)(addr)))

+#define HW_FB_ADDR			KSEG1(_rt_framebuffer)

+#define HW_FB_PIXEL(x, y)	*(volatile rt_uint16_t*)((rt_uint8_t*)HW_FB_ADDR + (y * FB_XSIZE * 2) + x * 2)

+

+struct vga_struct

+{

+	long pclk;

+	int hr,hss,hse,hfl;

+	int vr,vss,vse,vfl;

+};

+

+#endif

diff --git a/bsp/ls1bdev/drivers/uart.c b/bsp/ls1bdev/drivers/uart.c
new file mode 100644
index 0000000000..71273fd595
--- /dev/null
+++ b/bsp/ls1bdev/drivers/uart.c
@@ -0,0 +1,277 @@
+/*

+ * File      : board.c

+ * This file is part of RT-Thread RTOS

+ * COPYRIGHT (C) 2006-2012, RT-Thread Develop Team

+ *

+ * The license and distribution terms for this file may be

+ * found in the file LICENSE in this distribution or at

+ * http://www.rt-thread.org/license/LICENSE

+ *

+ * Change Logs:

+ * Date           Author       Notes

+ * 2011-08-08     lgnq         first version

+ */

+

+#include <rthw.h>

+#include <rtthread.h>

+

+#include "uart.h"

+

+/**

+ * @addtogroup Loongson LS1B

+ */

+

+/*@{*/

+

+#if defined(RT_USING_UART) && defined(RT_USING_DEVICE)

+

+struct rt_uart_ls1b

+{

+	struct rt_device parent;

+

+	rt_uint32_t hw_base;

+	rt_uint32_t irq;

+

+	/* buffer for reception */

+	rt_uint8_t read_index, save_index;

+	rt_uint8_t rx_buffer[RT_UART_RX_BUFFER_SIZE];

+}uart_device;

+

+static void rt_uart_irqhandler(int irqno)

+{

+	rt_ubase_t level;

+	rt_uint8_t isr;

+	struct rt_uart_ls1b* uart = &uart_device;

+

+	/* read interrupt status and clear it */

+	isr = UART_IIR(uart->hw_base);

+	isr = (isr >> 1) & 0x3;

+

+	/* receive data available */

+	if (isr & 0x02)

+	{

+		/* Receive Data Available */

+		while (UART_LSR(uart->hw_base) & UARTLSR_DR)

+		{

+			uart->rx_buffer[uart->save_index] = UART_DAT(uart->hw_base);

+

+			level = rt_hw_interrupt_disable();

+			uart->save_index ++;

+			if (uart->save_index >= RT_UART_RX_BUFFER_SIZE)

+				uart->save_index = 0;

+			rt_hw_interrupt_enable(level);

+		}

+

+		/* invoke callback */

+		if (uart->parent.rx_indicate != RT_NULL)

+		{

+			rt_size_t length;

+			if (uart->read_index > uart->save_index)

+				length = RT_UART_RX_BUFFER_SIZE - uart->read_index + uart->save_index;

+			else

+				length = uart->save_index - uart->read_index;

+

+			uart->parent.rx_indicate(&uart->parent, length);

+		}

+	}

+

+	return;

+}

+

+static rt_err_t rt_uart_init(rt_device_t dev)

+{

+	rt_uint32_t baud_div;

+	struct rt_uart_ls1b *uart = (struct rt_uart_ls1b *)dev;

+

+	RT_ASSERT(uart != RT_NULL);

+

+#if 0

+	/* init UART Hardware */

+	UART_IER(uart->hw_base) = 0; /* clear interrupt */

+	UART_FCR(uart->hw_base) = 0x60; /* reset UART Rx/Tx */

+

+	/* enable UART clock */

+	/* set databits, stopbits and parity. (8-bit data, 1 stopbit, no parity) */

+	UART_LCR(uart->hw_base) = 0x3;

+

+	/* set baudrate */

+	baud_div = DEV_CLK / 16 / UART_BAUDRATE;

+	UART_LCR(uart->hw_base) |= UARTLCR_DLAB;

+

+	UART_MSB(uart->hw_base) = (baud_div >> 8) & 0xff;

+	UART_LSB(uart->hw_base) = baud_div & 0xff;

+

+	UART_LCR(uart->hw_base) &= ~UARTLCR_DLAB;

+

+	/* Enable UART unit, enable and clear FIFO */

+	UART_FCR(uart->hw_base) = UARTFCR_UUE | UARTFCR_FE | UARTFCR_TFLS | UARTFCR_RFLS;

+#endif

+

+	return RT_EOK;

+}

+

+static rt_err_t rt_uart_open(rt_device_t dev, rt_uint16_t oflag)

+{

+	struct rt_uart_ls1b *uart = (struct rt_uart_ls1b *)dev;

+

+	RT_ASSERT(uart != RT_NULL);

+	if (dev->flag & RT_DEVICE_FLAG_INT_RX)

+	{

+		/* Enable the UART Interrupt */

+		UART_IER(uart->hw_base) |= UARTIER_IRXE;

+

+		/* install interrupt */

+		rt_hw_interrupt_install(uart->irq, rt_uart_irqhandler, RT_NULL);

+		rt_hw_interrupt_umask(uart->irq);

+	}

+	return RT_EOK;

+}

+

+static rt_err_t rt_uart_close(rt_device_t dev)

+{

+	struct rt_uart_ls1b *uart = (struct rt_uart_ls1b *)dev;

+

+	RT_ASSERT(uart != RT_NULL);

+	if (dev->flag & RT_DEVICE_FLAG_INT_RX)

+	{

+		/* Disable the UART Interrupt */

+		UART_IER(uart->hw_base) &= ~(UARTIER_IRXE);

+	}

+

+	return RT_EOK;

+}

+

+static rt_size_t rt_uart_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)

+{

+	rt_uint8_t *ptr;

+	struct rt_uart_ls1b *uart = (struct rt_uart_ls1b *)dev;

+

+	RT_ASSERT(uart != RT_NULL);

+

+	/* point to buffer */

+	ptr = (rt_uint8_t *)buffer;

+	if (dev->flag & RT_DEVICE_FLAG_INT_RX)

+	{

+		while (size)

+		{

+			/* interrupt receive */

+			rt_base_t level;

+

+			/* disable interrupt */

+			level = rt_hw_interrupt_disable();

+			if (uart->read_index != uart->save_index)

+			{

+				*ptr = uart->rx_buffer[uart->read_index];

+

+				uart->read_index ++;

+				if (uart->read_index >= RT_UART_RX_BUFFER_SIZE)

+					uart->read_index = 0;

+			}

+			else

+			{

+				/* no data in rx buffer */

+

+				/* enable interrupt */

+				rt_hw_interrupt_enable(level);

+				break;

+			}

+

+			/* enable interrupt */

+			rt_hw_interrupt_enable(level);

+

+			ptr ++;

+			size --;

+		}

+

+		return (rt_uint32_t)ptr - (rt_uint32_t)buffer;

+	}

+

+	return 0;

+}

+

+static rt_size_t rt_uart_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)

+{

+	char *ptr;

+	struct rt_uart_ls1b *uart = (struct rt_uart_ls1b *)dev;

+

+	RT_ASSERT(uart != RT_NULL);

+

+	ptr = (char *)buffer;

+

+	if (dev->flag & RT_DEVICE_FLAG_STREAM)

+	{

+		/* stream mode */

+		while (size)

+		{

+			if (*ptr == '\n')

+			{

+				/* FIFO status, contain valid data */

+				while (!(UART_LSR(uart->hw_base) & (UARTLSR_TE | UARTLSR_TFE)));

+				/* write data */

+				UART_DAT(uart->hw_base) = '\r';

+			}

+

+			/* FIFO status, contain valid data */

+			while (!(UART_LSR(uart->hw_base) & (UARTLSR_TE | UARTLSR_TFE)));

+			/* write data */

+			UART_DAT(uart->hw_base) = *ptr;

+

+			ptr ++;

+			size --;

+		}

+	}

+	else

+	{

+		while (size != 0)

+		{

+			/* FIFO status, contain valid data */

+			while (!(UART_LSR(uart->hw_base) & (UARTLSR_TE | UARTLSR_TFE)));

+

+			/* write data */

+			UART_DAT(uart->hw_base) = *ptr;

+

+			ptr++;

+			size--;

+		}

+	}

+

+	return (rt_size_t)ptr - (rt_size_t)buffer;

+}

+

+void rt_hw_uart_init(void)

+{

+	struct rt_uart_ls1b *uart;

+

+	/* get uart device */

+	uart = &uart_device;

+

+	/* device initialization */

+	uart->parent.type = RT_Device_Class_Char;

+	rt_memset(uart->rx_buffer, 0, sizeof(uart->rx_buffer));

+	uart->read_index = uart->save_index = 0;

+	

+#if defined(RT_USING_UART0)

+	uart->hw_base = UART0_BASE;

+	uart->irq = LS1B_UART0_IRQ;

+#elif defined(RT_USING_UART1)

+	uart->hw_base = UART1_BASE;

+	uart->irq = LS1B_UART1_IRQ;

+#endif

+

+	/* device interface */

+	uart->parent.init       = rt_uart_init;

+	uart->parent.open       = rt_uart_open;

+	uart->parent.close      = rt_uart_close;

+	uart->parent.read       = rt_uart_read;

+	uart->parent.write      = rt_uart_write;

+	uart->parent.control    = RT_NULL;

+	uart->parent.user_data  = RT_NULL;

+

+	rt_device_register(&uart->parent, "uart0", 

+						RT_DEVICE_FLAG_RDWR | 

+						RT_DEVICE_FLAG_STREAM | 

+						RT_DEVICE_FLAG_INT_RX);

+}

+#endif /* end of UART */

+

+/*@}*/

diff --git a/bsp/ls1bdev/drivers/uart.h b/bsp/ls1bdev/drivers/uart.h
new file mode 100644
index 0000000000..763ba514bd
--- /dev/null
+++ b/bsp/ls1bdev/drivers/uart.h
@@ -0,0 +1,97 @@
+/*

+ * File      : uart.h

+ * This file is part of RT-Thread RTOS

+ * COPYRIGHT (C) 2006-2011, RT-Thread Develop Team

+ *

+ * The license and distribution terms for this file may be

+ * found in the file LICENSE in this distribution or at

+ * http://www.rt-thread.org/license/LICENSE

+ *

+ * Change Logs:

+ * Date           Author       Notes

+ * 2011-08-08     lgnq         first version for LS1B

+ */

+#ifndef __UART_H__

+#define __UART_H__

+

+#include "ls1b.h"

+

+#define UART0_BASE			0xBFE40000

+#define UART0_1_BASE		0xBFE41000

+#define UART0_2_BASE		0xBFE42000

+#define UART0_3_BASE		0xBFE43000

+#define UART1_BASE			0xBFE44000

+#define UART1_1_BASE		0xBFE45000

+#define UART1_2_BASE		0xBFE46000

+#define UART1_3_BASE		0xBFE47000

+#define UART2_BASE			0xBFE48000

+#define UART3_BASE			0xBFE4C000

+#define UART4_BASE			0xBFE6C000

+#define UART5_BASE			0xBFE7C000

+

+/* UART registers */

+#define UART_DAT(base)		__REG8(base + 0x00)

+#define UART_IER(base)		__REG8(base + 0x01)

+#define UART_IIR(base)		__REG8(base + 0x02)

+#define UART_FCR(base)		__REG8(base + 0x02)

+#define UART_LCR(base)		__REG8(base + 0x03)

+#define UART_MCR(base)		__REG8(base + 0x04)

+#define UART_LSR(base)		__REG8(base + 0x05)

+#define UART_MSR(base)		__REG8(base + 0x06)

+

+#define UART_LSB(base)		__REG8(base + 0x00)

+#define UART_MSB(base)		__REG8(base + 0x01)

+

+/* UART0 registers */

+#define UART0_DAT			__REG8(UART0_BASE + 0x00)

+#define UART0_IER			__REG8(UART0_BASE + 0x01)

+#define UART0_IIR			__REG8(UART0_BASE + 0x02)

+#define UART0_FCR			__REG8(UART0_BASE + 0x02)

+#define UART0_LCR			__REG8(UART0_BASE + 0x03)

+#define UART0_MCR			__REG8(UART0_BASE + 0x04)

+#define UART0_LSR			__REG8(UART0_BASE + 0x05)

+#define UART0_MSR			__REG8(UART0_BASE + 0x06)

+

+#define UART0_LSB			__REG8(UART0_BASE + 0x00)

+#define UART0_MSB			__REG8(UART0_BASE + 0x01)

+

+/* UART1 registers */

+#define UART1_DAT			__REG8(UART1_BASE + 0x00)

+#define UART1_IER			__REG8(UART1_BASE + 0x01)

+#define UART1_IIR			__REG8(UART1_BASE + 0x02)

+#define UART1_FCR			__REG8(UART1_BASE + 0x02)

+#define UART1_LCR			__REG8(UART1_BASE + 0x03)

+#define UART1_MCR			__REG8(UART1_BASE + 0x04)

+#define UART1_LSR			__REG8(UART1_BASE + 0x05)

+#define UART1_MSR			__REG8(UART1_BASE + 0x06)

+

+#define UART1_LSB			__REG8(UART1_BASE + 0x00)

+#define UART1_MSB			__REG8(UART1_BASE + 0x01)

+

+/* UART interrupt enable register value */

+#define UARTIER_IME		(1 << 3)

+#define UARTIER_ILE		(1 << 2) 

+#define UARTIER_ITXE	(1 << 1)

+#define UARTIER_IRXE	(1 << 0)

+

+/* UART line control register value */

+#define UARTLCR_DLAB	(1 << 7)

+#define UARTLCR_BCB		(1 << 6)

+#define UARTLCR_SPB		(1 << 5)

+#define UARTLCR_EPS		(1 << 4)

+#define UARTLCR_PE		(1 << 3)

+#define UARTLCR_SB		(1 << 2)

+

+/* UART line status register value */

+#define UARTLSR_ERROR	(1 << 7)

+#define UARTLSR_TE		(1 << 6)

+#define UARTLSR_TFE		(1 << 5)

+#define UARTLSR_BI		(1 << 4)

+#define UARTLSR_FE		(1 << 3)

+#define UARTLSR_PE		(1 << 2)

+#define UARTLSR_OE		(1 << 1)

+#define UARTLSR_DR		(1 << 0)

+

+void rt_hw_uart_init(void);

+

+#endif

diff --git a/bsp/ls1bdev/rtconfig.h b/bsp/ls1bdev/rtconfig.h
index 337edd5402..8a2ad89a44 100644
--- a/bsp/ls1bdev/rtconfig.h
+++ b/bsp/ls1bdev/rtconfig.h
@@ -1,164 +1,223 @@
-/* RT-Thread config file */

 #ifndef __RTTHREAD_CFG_H__

 #define __RTTHREAD_CFG_H__

 

-/* RT_NAME_MAX*/

-#define RT_NAME_MAX	10

+// <RDTConfigurator URL="http://www.rt-thread.com/eclipse">

 

-/* RT_ALIGN_SIZE*/

+// <integer name="RT_NAME_MAX" description="Maximal size of kernel object name length" default="6" />

+#define RT_NAME_MAX	10

+// <integer name="RT_ALIGN_SIZE" description="Alignment size for CPU architecture data access" default="4" />

 #define RT_ALIGN_SIZE	4

-

-/* PRIORITY_MAX */

-#define RT_THREAD_PRIORITY_MAX	256

-

-/* Tick per Second */

+// <integer name="RT_THREAD_PRIORITY_MAX" description="Maximal level of thread priority" default="2">

+// <item description="8">8</item>

+// <item description="32">32</item>

+// <item description="256">256</item>

+// </integer>

+#define RT_THREAD_PRIORITY_MAX	32

+// <integer name="RT_TICK_PER_SECOND" description="OS tick per second" default="100" />

 #define RT_TICK_PER_SECOND	100

-

-/* SECTION: RT_DEBUG */

-/* Thread Debug */

+// <section name="RT_DEBUG" description="Kernel Debug Configuration" default="true" >

 #define RT_DEBUG

+// <bool name="RT_THREAD_DEBUG" description="Thread debug enable" default="false" />

+// #define RT_THREAD_DEBUG

+// <bool name="RT_USING_OVERFLOW_CHECK" description="Thread stack over flow detect" default="true" />

 #define RT_USING_OVERFLOW_CHECK

+// </section>

 

-/* Using Hook */

+// <bool name="RT_USING_HOOK" description="Using hook functions" default="true" />

 #define RT_USING_HOOK

-

-/* Using Software Timer */

-/* #define RT_USING_TIMER_SOFT */

-#define RT_TIMER_THREAD_PRIO		4

+// <section name="RT_USING_TIMER_SOFT" description="Using software timer which will start a thread to handle soft-timer" default="true" >

+// #define RT_USING_TIMER_SOFT

+// <integer name="RT_TIMER_THREAD_PRIO" description="The priority level of timer thread" default="4" />

+#define RT_TIMER_THREAD_PRIO	4

+// <integer name="RT_TIMER_THREAD_STACK_SIZE" description="The stack size of timer thread" default="512" />

 #define RT_TIMER_THREAD_STACK_SIZE	512

+// <integer name="RT_TIMER_TICK_PER_SECOND" description="The soft-timer tick per second" default="10" />

 #define RT_TIMER_TICK_PER_SECOND	10

+// </section>

 

-/* SECTION: IPC */

-/* Using Semaphore */

+// <section name="IPC" description="Inter-Thread communication" default="always" >

+// <bool name="RT_USING_SEMAPHORE" description="Using semaphore in the system" default="true" />

 #define RT_USING_SEMAPHORE

-

-/* Using Mutex */

+// <bool name="RT_USING_MUTEX" description="Using mutex in the system" default="true" />

 #define RT_USING_MUTEX

-

-/* Using Event */

+// <bool name="RT_USING_EVENT" description="Using event group in the system" default="true" />

 #define RT_USING_EVENT

-

-/* Using MailBox */

+// <bool name="RT_USING_MAILBOX" description="Using mailbox in the system" default="true" />

 #define RT_USING_MAILBOX

-

-/* Using Message Queue */

+// <bool name="RT_USING_MESSAGEQUEUE" description="Using message queue in the system" default="true" />

 #define RT_USING_MESSAGEQUEUE

+// </section>

 

-/* SECTION: Memory Management */

-/* Using Memory Pool Management*/

+// <section name="MM" description="Memory Management" default="always" >

+// <bool name="RT_USING_MEMPOOL" description="Using Memory Pool Management in the system" default="true" />

 #define RT_USING_MEMPOOL

-

-/* Using Dynamic Heap Management */

+// <bool name="RT_USING_MEMHEAP" description="Using Memory Heap Object in the system" default="true" />

+#define RT_USING_MEMHEAP

+// <bool name="RT_USING_HEAP" description="Using Dynamic Heap Management in the system" default="true" />

 #define RT_USING_HEAP

+// <bool name="RT_USING_SMALL_MEM" description="Optimizing for small memory" default="false" />

+#define RT_USING_SMALL_MEM

+// <bool name="RT_USING_SLAB" description="Using SLAB memory management for large memory" default="false" />

+// #define RT_USING_SLAB

+// </section>

 

-/* Using SLAB MM */

-#define RT_USING_SLAB

-/* #define RT_USING_SMALL_MEM */

-

-/* SECTION: Device System */

-/* Using Device System */

+// <section name="RT_USING_DEVICE" description="Using Device Driver Framework" default="true" >

 #define RT_USING_DEVICE

+// <bool name="RT_USING_UART" description="Using UART" default="true" />

 #define RT_USING_UART

+// <bool name="RT_USING_UART0" description="Using UART0" default="true" />

 #define RT_USING_UART0

+// <integer name="RT_UART_RX_BUFFER_SIZE" description="The buffer size for UART reception" default="64" />

 #define RT_UART_RX_BUFFER_SIZE	64

+// </section>

 

-/* SECTION: Console options */

-/* the buffer size of console */

+// <section name="RT_USING_CONSOLE" description="Using console" default="true" >

 #define RT_USING_CONSOLE

+// <integer name="RT_CONSOLEBUF_SIZE" description="The buffer size for console output" default="128" />

 #define RT_CONSOLEBUF_SIZE	128

+// <string name="RT_CONSOLE_DEVICE_NAME" description="The device name for console" default="uart" />

+#define RT_CONSOLE_DEVICE_NAME	"uart0"

+// </section>

 

-/* SECTION: the runtime libc library */

-/* the runtime libc library */

-/* #define RT_USING_NEWLIB */

-/* #define RT_USING_PTHREADS */

-

-/* SECTION: finsh, a C-Express shell */

-/* Using FinSH as Shell*/

+// <bool name="RT_USING_COMPONENTS_INIT" description="Using RT-Thread components initialization" default="true" />

+#define RT_USING_COMPONENTS_INIT

+// <section name="RT_USING_FINSH" description="Using finsh as shell, which is a C-Express shell" default="true" >

 #define RT_USING_FINSH

-/* Using symbol table */

+// <bool name="FINSH_USING_SYMTAB" description="Using symbol table in finsh shell" default="true" />

 #define FINSH_USING_SYMTAB

+// <bool name="FINSH_USING_DESCRIPTION" description="Keeping description in symbol table" default="true" />

 #define FINSH_USING_DESCRIPTION

-#define FINSH_DEVICE_NAME "uart0"

-

-/* SECTION: device filesystem support */

-/* #define RT_USING_DFS */

-/* #define RT_USING_DFS_ELMFAT */

-#define RT_USING_DFS_ROMFS

-/* #define RT_USING_DFS_DEVFS */

+// <integer name="FINSH_THREAD_STACK_SIZE" description="The stack size for finsh thread" default="4096" />

+#define FINSH_THREAD_STACK_SIZE	4096

+// </section>

 

-/* the max number of mounted filesystem */

-#define DFS_FILESYSTEMS_MAX			2

-/* the max number of opened files 		*/

-#define DFS_FD_MAX					4

-/* the max number of cached sector 		*/

-#define DFS_CACHE_MAX_NUM   		4

-/* Using working directory */

-#define DFS_USING_WORKDIR

+// <section name="LIBC" description="C Runtime library setting" default="always" >

+// <bool name="RT_USING_NEWLIB" description="Using newlib library, only available under GNU GCC" default="true" />

+// #define RT_USING_NEWLIB

+// <bool name="RT_USING_PTHREADS" description="Using POSIX threads library" default="true" />

+// #define RT_USING_PTHREADS

+// </section>

 

-/* SECTION: lwip, a lighwight TCP/IP protocol stack */

-/* #define RT_USING_LWIP */

-#define RT_LWIP_USING_RT_MEM

+// <section name="RT_USING_DFS" description="Device file system" default="true" >

+// #define RT_USING_DFS

+// <bool name="DFS_USING_WORKDIR" description="Using working directory" default="true" />

+// #define DFS_USING_WORKDIR

+// <integer name="DFS_FILESYSTEMS_MAX" description="The maximal number of mounted file system" default="4" />

+#define DFS_FILESYSTEMS_MAX	2

+// <integer name="DFS_FD_MAX" description="The maximal number of opened files" default="4" />

+#define DFS_FD_MAX	4

+// <bool name="RT_USING_DFS_ELMFAT" description="Using ELM FatFs" default="true" />

+#define RT_USING_DFS_ELMFAT

+// <integer name="RT_DFS_ELM_USE_LFN" description="Support long file name" default="0">

+// <item description="LFN1">1</item>

+// <item description="LFN1">2</item>

+// </integer>

+#define RT_DFS_ELM_USE_LFN	1

+// <integer name="RT_DFS_ELM_MAX_LFN" description="Maximal size of file name length" default="256" />

+#define RT_DFS_ELM_MAX_LFN	64

+// <bool name="RT_USING_DFS_YAFFS2" description="Using YAFFS2" default="false" />

+// #define RT_USING_DFS_YAFFS2

+// <bool name="RT_USING_DFS_UFFS" description="Using UFFS" default="false" />

+// #define RT_USING_DFS_UFFS

+// <bool name="RT_USING_DFS_DEVFS" description="Using devfs for device objects" default="true" />

+// #define RT_USING_DFS_DEVFS

+// <bool name="RT_USING_DFS_NFS" description="Using NFS v3 client file system" default="false" />

+// #define RT_USING_DFS_NFS

+// <string name="RT_NFS_HOST_EXPORT" description="NFSv3 host export" default="192.168.1.5:/" />

+#define RT_NFS_HOST_EXPORT	"192.168.1.5:/"

+// </section>

 

-/* Enable ICMP protocol*/

+// <section name="RT_USING_LWIP" description="lwip, a lightweight TCP/IP protocol stack" default="true" >

+// #define RT_USING_LWIP

+// <bool name="RT_LWIP_ICMP" description="Enable ICMP protocol" default="true" />

 #define RT_LWIP_ICMP

-/* Enable UDP protocol*/

+// <bool name="RT_LWIP_IGMP" description="Enable IGMP protocol" default="false" />

+// #define RT_LWIP_IGMP

+// <bool name="RT_LWIP_UDP" description="Enable UDP protocol" default="true" />

 #define RT_LWIP_UDP

-/* Enable TCP protocol*/

+// <bool name="RT_LWIP_TCP" description="Enable TCP protocol" default="true" />

 #define RT_LWIP_TCP

-/* Enable DNS */

+// <bool name="RT_LWIP_DNS" description="Enable DNS protocol" default="true" />

 #define RT_LWIP_DNS

+// <integer name="RT_LWIP_PBUF_NUM" description="Maximal number of buffers in the pbuf pool" default="4" />

+#define RT_LWIP_PBUF_NUM	4

+// <integer name="RT_LWIP_TCP_PCB_NUM" description="Maximal number of simultaneously active TCP connections" default="5" />

+#define RT_LWIP_TCP_PCB_NUM	3

+// <integer name="RT_LWIP_TCP_SND_BUF" description="TCP sender buffer size" default="8192" />

+#define RT_LWIP_TCP_SND_BUF	2048

+// <integer name="RT_LWIP_TCP_WND" description="TCP receive window" default="8192" />

+#define RT_LWIP_TCP_WND	2048

+// <bool name="RT_LWIP_SNMP" description="Enable SNMP protocol" default="false" />

+// #define RT_LWIP_SNMP

+// <bool name="RT_LWIP_DHCP" description="Enable DHCP client to get IP address" default="false" />

+// #define RT_LWIP_DHCP

+// <integer name="RT_LWIP_TCP_SEG_NUM" description="the number of simultaneously queued TCP" default="4" />

+#define RT_LWIP_TCP_SEG_NUM	4

+// <integer name="RT_LWIP_TCPTHREAD_PRIORITY" description="the thread priority of TCP thread" default="128" />

+#define RT_LWIP_TCPTHREAD_PRIORITY	12

+// <integer name="RT_LWIP_TCPTHREAD_MBOX_SIZE" description="the mail box size of TCP thread to wait for" default="32" />

+#define RT_LWIP_TCPTHREAD_MBOX_SIZE	8

+// <integer name="RT_LWIP_TCPTHREAD_STACKSIZE" description="the thread stack size of TCP thread" default="4096" />

+#define RT_LWIP_TCPTHREAD_STACKSIZE	4096

+// <integer name="RT_LWIP_ETHTHREAD_PRIORITY" description="the thread priority of ethnetif thread" default="144" />

+#define RT_LWIP_ETHTHREAD_PRIORITY	14

+// <integer name="RT_LWIP_ETHTHREAD_MBOX_SIZE" description="the mail box size of ethnetif thread to wait for" default="8" />

+#define RT_LWIP_ETHTHREAD_MBOX_SIZE	8

+// <integer name="RT_LWIP_ETHTHREAD_STACKSIZE" description="the stack size of ethnetif thread" default="512" />

+#define RT_LWIP_ETHTHREAD_STACKSIZE	512

+// <ipaddr name="RT_LWIP_IPADDR" description="IP address of device" default="192.168.1.30" />

+#define RT_LWIP_IPADDR0 192

+#define RT_LWIP_IPADDR1 168

+#define RT_LWIP_IPADDR2 1

+#define RT_LWIP_IPADDR3 30

+// <ipaddr name="RT_LWIP_GWADDR" description="Gateway address of device" default="192.168.1.1" />

+#define RT_LWIP_GWADDR0 192

+#define RT_LWIP_GWADDR1 168

+#define RT_LWIP_GWADDR2 1

+#define RT_LWIP_GWADDR3 1

+// <ipaddr name="RT_LWIP_MSKADDR" description="Mask address of device" default="255.255.255.0" />

+#define RT_LWIP_MSKADDR0 255

+#define RT_LWIP_MSKADDR1 255

+#define RT_LWIP_MSKADDR2 255

+#define RT_LWIP_MSKADDR3 0

+// </section>

 

-/* the number of simulatenously active TCP connections*/

-#define RT_LWIP_TCP_PCB_NUM	5

-

-/* ip address of target*/

-#define RT_LWIP_IPADDR0	192

-#define RT_LWIP_IPADDR1	168

-#define RT_LWIP_IPADDR2	1

-#define RT_LWIP_IPADDR3	30

-

-/* gateway address of target*/

-#define RT_LWIP_GWADDR0	192

-#define RT_LWIP_GWADDR1	168

-#define RT_LWIP_GWADDR2	1

-#define RT_LWIP_GWADDR3	1

+// <section name="RT_USING_MODULE" description="Application module" default="true" >

+// #define RT_USING_MODULE

+// <bool name="RT_USING_LIBDL" description="Using dynamic library" default="true" />

+// #define RT_USING_LIBDL

+// </section>

 

-/* mask address of target*/

-#define RT_LWIP_MSKADDR0	255

-#define RT_LWIP_MSKADDR1	255

-#define RT_LWIP_MSKADDR2	255

-#define RT_LWIP_MSKADDR3	0

-

-/* tcp thread options */

-#define RT_LWIP_TCPTHREAD_PRIORITY		12

-#define RT_LWIP_TCPTHREAD_MBOX_SIZE		4

-#define RT_LWIP_TCPTHREAD_STACKSIZE		1024

-

-/* ethernet if thread options */

-#define RT_LWIP_ETHTHREAD_PRIORITY		15

-#define RT_LWIP_ETHTHREAD_MBOX_SIZE		4

-#define RT_LWIP_ETHTHREAD_STACKSIZE		512

-

-/* SECTION: RT-Thread/GUI */

+// <section name="RT_USING_RTGUI" description="RTGUI, a graphic user interface" default="true" >

 #define RT_USING_RTGUI

-

-/* name length of RTGUI object */

-#define RTGUI_NAME_MAX		12

-/* support 16 weight font */

+// <integer name="RTGUI_NAME_MAX" description="Maximal size of RTGUI object name length" default="16" />

+#define RTGUI_NAME_MAX	16

+// <bool name="RTGUI_USING_FONT16" description="Support 16 weight font" default="true" />

 #define RTGUI_USING_FONT16

-/* support 12 weight font */

+// <bool name="RTGUI_USING_FONT12" description="Support 12 weight font" default="true" />

 #define RTGUI_USING_FONT12

-/* support Chinese font */

+// <bool name="RTGUI_USING_FONTHZ" description="Support Chinese font" default="true" />

 #define RTGUI_USING_FONTHZ

-/* use DFS as file interface */

+// <bool name="RTGUI_USING_DFS_FILERW" description="Using DFS as file interface " default="true" />

 #define RTGUI_USING_DFS_FILERW

-/* use bmp font as Chinese font */

+// <bool name="RTGUI_USING_HZ_FILE" description="Using font file as Chinese font" default="false" />

+// #define RTGUI_USING_HZ_FILE

+// <bool name="RTGUI_USING_HZ_BMP" description="Using Chinese bitmap font" default="true" />

 #define RTGUI_USING_HZ_BMP

-/* use small size in RTGUI */

+// <bool name="RTGUI_USING_SMALL_SIZE" description="Using small size in RTGUI" default="false" />

 #define RTGUI_USING_SMALL_SIZE

-/* use mouse cursor */

-/* #define RTGUI_USING_MOUSE_CURSOR */

-/* default font size in RTGUI */

-#define RTGUI_DEFAULT_FONT_SIZE	16

+// <bool name="RTGUI_USING_MOUSE_CURSOR" description="Using mouse cursor in RTGUI" default="false" />

+// #define RTGUI_USING_MOUSE_CURSOR

+// <bool name="RTGUI_IMAGE_XPM" description="Using xpm image in RTGUI" default="true" />

+#define RTGUI_IMAGE_XPM

+// <bool name="RTGUI_IMAGE_JPEG" description="Using jpeg image in RTGUI" default="true" />

+// #define RTGUI_IMAGE_JPEG

+// <bool name="RTGUI_IMAGE_PNG" description="Using png image in RTGUI" default="true" />

+// #define RTGUI_IMAGE_PNG

+// <bool name="RTGUI_IMAGE_BMP" description="Using bmp image in RTGUI" default="true" />

+#define RTGUI_IMAGE_BMP

+// </section>

+

+// </RDTConfigurator>

 

 #endif