Merge pull request #37 from RT-Thread/master

同步官方

5 files changed, 227 insertions, 247 deletions

diff --git a/bsp/ls1bdev/drivers/board.c b/bsp/ls1bdev/drivers/board.c
index 8a42f8e3a0..0933568526 100644
--- a/bsp/ls1bdev/drivers/board.c
+++ b/bsp/ls1bdev/drivers/board.c
@@ -1,11 +1,7 @@
 /*
- * File      : board.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006-2012, RT-Thread Develop Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
@@ -33,7 +29,7 @@ extern unsigned char __bss_end;
 /**
  * @addtogroup Loongson LS1B
  */
- 
+
 /*@{*/
 
 /**
@@ -43,10 +39,10 @@ void rt_hw_board_init(void)
 {
     /* init hardware interrupt */
     rt_hw_exception_init();
-    
+
     /* init hardware interrupt */
     rt_hw_interrupt_init();
-    
+
 #ifdef RT_USING_HEAP
     rt_system_heap_init((void*)&__bss_end, (void*)RT_HW_HEAP_END);
 #endif
diff --git a/bsp/ls1bdev/drivers/board.h b/bsp/ls1bdev/drivers/board.h
index fbe2ed8f9c..7d7002892c 100644
--- a/bsp/ls1bdev/drivers/board.h
+++ b/bsp/ls1bdev/drivers/board.h
@@ -1,11 +1,7 @@
 /*
- * File      : board.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006-2012, RT-Thread Develop Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
@@ -19,7 +15,7 @@
 void rt_hw_board_init(void);
 
 /* 64M SDRAM */
-#define RT_HW_HEAP_END	(0x80000000 + RT_MEM_SIZE * 1024 * 1024)
-#define CPU_HZ			(125 * 1000000)
+#define RT_HW_HEAP_END  (0x80000000 + RT_MEM_SIZE * 1024 * 1024)
+#define CPU_HZ          (125 * 1000000)
 
 #endif
diff --git a/bsp/ls1bdev/drivers/display_controller.c b/bsp/ls1bdev/drivers/display_controller.c
index 060bd0a041..5dba114b69 100644
--- a/bsp/ls1bdev/drivers/display_controller.c
+++ b/bsp/ls1bdev/drivers/display_controller.c
@@ -1,11 +1,7 @@
 /*
- * File      : display_controller.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006-2012, RT-Thread Develop Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
@@ -17,24 +13,24 @@
 
 struct vga_struct vga_mode[] =
 {
-	{/*"640x480_70.00"*/    28560,  640,    664,    728,    816,    480,    481,    484,    500,    },
-	{/*"640x640_60.00"*/	33100,	640,	672,	736,	832,	640,	641,	644,	663,	},
-	{/*"640x768_60.00"*/	39690,	640,	672,	736,	832,	768,	769,	772,	795,	},
-	{/*"640x800_60.00"*/	42130,	640,	680,	744,	848,	800,	801,	804,	828,	},
-	{/*"800x480_70.00"*/    35840,  800,    832,    912,    1024,   480,    481,    484,    500,    },
-	{/*"800x600_60.00"*/	38220,	800,	832,	912,	1024,	600,	601,	604,	622,	},
-	{/*"800x640_60.00"*/	40730,	800,	832,	912,	1024,	640,	641,	644,	663,	},
-	{/*"832x600_60.00"*/	40010,	832,	864,	952,	1072,	600,	601,	604,	622,	},
-	{/*"832x608_60.00"*/	40520,	832,	864,	952,	1072,	608,	609,	612,	630,	},
-	{/*"1024x480_60.00"*/	38170,	1024,	1048,	1152,	1280,	480,	481,	484,	497,	},
-	{/*"1024x600_60.00"*/	48960,	1024,	1064,	1168,	1312,	600,	601,	604,	622,	},
-	{/*"1024x640_60.00"*/	52830,	1024,	1072,	1176,	1328,	640,	641,	644,	663,	},
-	{/*"1024x768_60.00"*/	64110,	1024,	1080,	1184,	1344,	768,	769,	772,	795,	},
-	{/*"1152x764_60.00"*/   71380,  1152,   1208,   1328,   1504,   764,    765,    768,    791,    },
-	{/*"1280x800_60.00"*/   83460,  1280,   1344,   1480,   1680,   800,    801,    804,    828,    },
-	{/*"1280x1024_55.00"*/  98600,  1280,   1352,   1488,   1696,   1024,   1025,   1028,   1057,   },
-	{/*"1440x800_60.00"*/   93800,  1440,   1512,   1664,   1888,   800,    801,    804,    828,    },
-	{/*"1440x900_67.00"*/   120280, 1440,   1528,   1680,   1920,   900,    901,    904,    935,    },
+    {/*"640x480_70.00"*/    28560,  640,    664,    728,    816,    480,    481,    484,    500,    },
+    {/*"640x640_60.00"*/    33100,  640,    672,    736,    832,    640,    641,    644,    663,    },
+    {/*"640x768_60.00"*/    39690,  640,    672,    736,    832,    768,    769,    772,    795,    },
+    {/*"640x800_60.00"*/    42130,  640,    680,    744,    848,    800,    801,    804,    828,    },
+    {/*"800x480_70.00"*/    35840,  800,    832,    912,    1024,   480,    481,    484,    500,    },
+    {/*"800x600_60.00"*/    38220,  800,    832,    912,    1024,   600,    601,    604,    622,    },
+    {/*"800x640_60.00"*/    40730,  800,    832,    912,    1024,   640,    641,    644,    663,    },
+    {/*"832x600_60.00"*/    40010,  832,    864,    952,    1072,   600,    601,    604,    622,    },
+    {/*"832x608_60.00"*/    40520,  832,    864,    952,    1072,   608,    609,    612,    630,    },
+    {/*"1024x480_60.00"*/   38170,  1024,   1048,   1152,   1280,   480,    481,    484,    497,    },
+    {/*"1024x600_60.00"*/   48960,  1024,   1064,   1168,   1312,   600,    601,    604,    622,    },
+    {/*"1024x640_60.00"*/   52830,  1024,   1072,   1176,   1328,   640,    641,    644,    663,    },
+    {/*"1024x768_60.00"*/   64110,  1024,   1080,   1184,   1344,   768,    769,    772,    795,    },
+    {/*"1152x764_60.00"*/   71380,  1152,   1208,   1328,   1504,   764,    765,    768,    791,    },
+    {/*"1280x800_60.00"*/   83460,  1280,   1344,   1480,   1680,   800,    801,    804,    828,    },
+    {/*"1280x1024_55.00"*/  98600,  1280,   1352,   1488,   1696,   1024,   1025,   1028,   1057,   },
+    {/*"1440x800_60.00"*/   93800,  1440,   1512,   1664,   1888,   800,    801,    804,    828,    },
+    {/*"1440x900_67.00"*/   120280, 1440,   1528,   1680,   1920,   900,    901,    904,    935,    },
 };
 
 ALIGN(16)
@@ -46,189 +42,189 @@ static struct rt_device_graphic_info _dc_info;
 
 int caclulate_freq(long long XIN, long long PCLK)
 {
-	int i;
-	long long clk, clk1;
-	int start, end;
-	int mi;
-	int pll,ctrl,div,div1,frac;
+    int i;
+    long long clk, clk1;
+    int start, end;
+    int mi;
+    int pll,ctrl,div,div1,frac;
 
-	pll = PLL_FREQ;
-	ctrl = PLL_DIV_PARAM;
-	rt_kprintf("pll=0x%x, ctrl=0x%x\n", pll, ctrl);
-//	rt_kprintf("cpu freq is %d\n", tgt_pipefreq());
-	start = -1;
-	end = 1;
+    pll = PLL_FREQ;
+    ctrl = PLL_DIV_PARAM;
+    rt_kprintf("pll=0x%x, ctrl=0x%x\n", pll, ctrl);
+//  rt_kprintf("cpu freq is %d\n", tgt_pipefreq());
+    start = -1;
+    end = 1;
 
-	for (i=start; i<=end; i++)
-	{
-		clk = (12+i+(pll&0x3f))*33333333/2;
-		div = clk/(long)PCLK/1000;
-		clk1 = (12+i+1+(pll&0x3f))*33333333/2;
-		div1 = clk1/(long)PCLK/1000;
-		if (div!=div1)
-			break;
-	}
+    for (i=start; i<=end; i++)
+    {
+        clk = (12+i+(pll&0x3f))*33333333/2;
+        div = clk/(long)PCLK/1000;
+        clk1 = (12+i+1+(pll&0x3f))*33333333/2;
+        div1 = clk1/(long)PCLK/1000;
+        if (div!=div1)
+            break;
+    }
 
-	if (div!=div1)
-	{
-		frac = ((PCLK*1000*div1)*2*1024/33333333 - (12+i+(pll&0x3f))*1024)&0x3ff;
-		pll = (pll & ~0x3ff3f)|(frac<<8)|((pll&0x3f)+i);
-		ctrl = ctrl&~(0x1f<<26)|(div1<<26)|(1<<31);
-	}
-	else
-	{
-		clk = (12+start+(pll&0x3f))*33333333/2;
-		clk1 = (12+end+(pll&0x3f))*33333333/2;
-		if (abs((long)clk/div/1000-PCLK)<abs((long)clk1/(div+1)/1000-PCLK))
-		{
-			pll = (pll & ~0x3ff3f)|((pll&0x3f)+start);
-			ctrl = ctrl&~(0x1f<<26)|(div<<26)|(1<<31);
-		}
-		else
-		{
-			pll = (pll & ~0x3ff3f)|((pll&0x3f)+end);
-			ctrl = ctrl&~(0x1f<<26)|((div+1)<<26)|(1<<31);
-		}
-	}
+    if (div!=div1)
+    {
+        frac = ((PCLK*1000*div1)*2*1024/33333333 - (12+i+(pll&0x3f))*1024)&0x3ff;
+        pll = (pll & ~0x3ff3f)|(frac<<8)|((pll&0x3f)+i);
+        ctrl = ctrl&~(0x1f<<26)|(div1<<26)|(1<<31);
+    }
+    else
+    {
+        clk = (12+start+(pll&0x3f))*33333333/2;
+        clk1 = (12+end+(pll&0x3f))*33333333/2;
+        if (abs((long)clk/div/1000-PCLK)<abs((long)clk1/(div+1)/1000-PCLK))
+        {
+            pll = (pll & ~0x3ff3f)|((pll&0x3f)+start);
+            ctrl = ctrl&~(0x1f<<26)|(div<<26)|(1<<31);
+        }
+        else
+        {
+            pll = (pll & ~0x3ff3f)|((pll&0x3f)+end);
+            ctrl = ctrl&~(0x1f<<26)|((div+1)<<26)|(1<<31);
+        }
+    }
 
-	rt_kprintf("new pll=0x%x, ctrl=0x%x\n", pll, ctrl);
-	ctrl |= 0x2a00;
-	PLL_DIV_PARAM = ctrl; 
-	PLL_FREQ = pll;
-	rt_thread_delay(10);
-//	initserial(0);
-//	_probe_frequencies();
-//	rt_kprintf("cpu freq is %d\n",tgt_pipefreq());
-	return 0;
+    rt_kprintf("new pll=0x%x, ctrl=0x%x\n", pll, ctrl);
+    ctrl |= 0x2a00;
+    PLL_DIV_PARAM = ctrl;
+    PLL_FREQ = pll;
+    rt_thread_delay(10);
+//  initserial(0);
+//  _probe_frequencies();
+//  rt_kprintf("cpu freq is %d\n",tgt_pipefreq());
+    return 0;
 }
 
 static rt_err_t rt_dc_init(rt_device_t dev)
 {
-	int i, out, mode=-1;
-	int val;
+    int i, out, mode=-1;
+    int val;
 
-	for (i=0; i<sizeof(vga_mode)/sizeof(struct vga_struct); i++)
-	{
-		if (vga_mode[i].hr == FB_XSIZE && vga_mode[i].vr == FB_YSIZE)
-		{
-			mode=i;
+    for (i=0; i<sizeof(vga_mode)/sizeof(struct vga_struct); i++)
+    {
+        if (vga_mode[i].hr == FB_XSIZE && vga_mode[i].vr == FB_YSIZE)
+        {
+            mode=i;
 #ifdef LS1FSOC
-//			out = caclulatefreq(APB_CLK/1000,vga_mode[i].pclk);
-//			rt_kprintf("out=%x\n",out);
-			/*inner gpu dc logic fifo pll ctrl,must large then outclk*/
-//			*(volatile int *)0xbfd00414 = out+1;
-			/*output pix1 clock  pll ctrl*/
-//			*(volatile int *)0xbfd00410 = out;
-			/*output pix2 clock pll ctrl */
-//			*(volatile int *)0xbfd00424 = out;
+//          out = caclulatefreq(APB_CLK/1000,vga_mode[i].pclk);
+//          rt_kprintf("out=%x\n",out);
+            /*inner gpu dc logic fifo pll ctrl,must large then outclk*/
+//          *(volatile int *)0xbfd00414 = out+1;
+            /*output pix1 clock  pll ctrl*/
+//          *(volatile int *)0xbfd00410 = out;
+            /*output pix2 clock pll ctrl */
+//          *(volatile int *)0xbfd00424 = out;
 #else
-			caclulate_freq(APB_CLK/1000, vga_mode[i].pclk);
+            caclulate_freq(APB_CLK/1000, vga_mode[i].pclk);
 #endif
-			break;
-		}
-	}
+            break;
+        }
+    }
 
-	if (mode<0)
-	{
-		rt_kprintf("\n\n\nunsupported framebuffer resolution\n\n\n");
-		return;
-	}
+    if (mode<0)
+    {
+        rt_kprintf("\n\n\nunsupported framebuffer resolution\n\n\n");
+        return;
+    }
 
-	DC_FB_CONFIG = 0x0;
-	DC_FB_CONFIG = 0x3; //	// framebuffer configuration RGB565
- 	DC_FB_BUFFER_ADDR0 = (rt_uint32_t)_rt_framebuffer - 0x80000000;
-	DC_FB_BUFFER_ADDR1 = (rt_uint32_t)_rt_framebuffer - 0x80000000;
-	DC_DITHER_CONFIG = 0x0;
-	DC_DITHER_TABLE_LOW = 0x0;
-	DC_DITHER_TABLE_HIGH = 0x0;
-	DC_PANEL_CONFIG = 0x80001311;
-	DC_PANEL_TIMING = 0x0;
+    DC_FB_CONFIG = 0x0;
+    DC_FB_CONFIG = 0x3; //  // framebuffer configuration RGB565
+    DC_FB_BUFFER_ADDR0 = (rt_uint32_t)_rt_framebuffer - 0x80000000;
+    DC_FB_BUFFER_ADDR1 = (rt_uint32_t)_rt_framebuffer - 0x80000000;
+    DC_DITHER_CONFIG = 0x0;
+    DC_DITHER_TABLE_LOW = 0x0;
+    DC_DITHER_TABLE_HIGH = 0x0;
+    DC_PANEL_CONFIG = 0x80001311;
+    DC_PANEL_TIMING = 0x0;
 
-	DC_HDISPLAY = (vga_mode[mode].hfl<<16) | vga_mode[mode].hr;
-	DC_HSYNC = 0x40000000 | (vga_mode[mode].hse<<16) | vga_mode[mode].hss;
-	DC_VDISPLAY = (vga_mode[mode].vfl<<16) | vga_mode[mode].vr;
-	DC_VSYNC = 0x40000000 | (vga_mode[mode].vse<<16) | vga_mode[mode].vss;
+    DC_HDISPLAY = (vga_mode[mode].hfl<<16) | vga_mode[mode].hr;
+    DC_HSYNC = 0x40000000 | (vga_mode[mode].hse<<16) | vga_mode[mode].hss;
+    DC_VDISPLAY = (vga_mode[mode].vfl<<16) | vga_mode[mode].vr;
+    DC_VSYNC = 0x40000000 | (vga_mode[mode].vse<<16) | vga_mode[mode].vss;
 
 #if defined(CONFIG_VIDEO_32BPP)
-	DC_FB_CONFIG = 0x00100104;
-	DC_FB_BUFFER_STRIDE = FB_XSIZE*4;
+    DC_FB_CONFIG = 0x00100104;
+    DC_FB_BUFFER_STRIDE = FB_XSIZE*4;
 #elif defined(CONFIG_VIDEO_16BPP)
-	DC_FB_CONFIG = 0x00100103;
-	DC_FB_BUFFER_STRIDE = (FB_XSIZE*2+255)&(~255);
+    DC_FB_CONFIG = 0x00100103;
+    DC_FB_BUFFER_STRIDE = (FB_XSIZE*2+255)&(~255);
 #elif defined(CONFIG_VIDEO_15BPP)
-	DC_FB_CONFIG = 0x00100102;
-	DC_FB_BUFFER_STRIDE = FB_XSIZE*2;
+    DC_FB_CONFIG = 0x00100102;
+    DC_FB_BUFFER_STRIDE = FB_XSIZE*2;
 #elif defined(CONFIG_VIDEO_12BPP)
-	DC_FB_CONFIG = 0x00100101;
-	DC_FB_BUFFER_STRIDE = FB_XSIZE*2;
+    DC_FB_CONFIG = 0x00100101;
+    DC_FB_BUFFER_STRIDE = FB_XSIZE*2;
 #else  //640x480-32Bits
-	DC_FB_CONFIG = 0x00100104;
-	DC_FB_BUFFER_STRIDE = FB_XSIZE*4;
+    DC_FB_CONFIG = 0x00100104;
+    DC_FB_BUFFER_STRIDE = FB_XSIZE*4;
 #endif //32Bits
 
 #ifdef LS1GSOC
-	/*fix ls1g dc
-	 *first switch to tile mode
-	 *change origin register to 0
-	 *goback nomal mode
-	 */
-	{
-		val = DC_FB_CONFIG;
-		DC_FB_CONFIG = val | 0x10;
-		DC_FB_BUFFER_ORIGIN = 0;
-		DC_FB_BUFFER_ORIGIN;
-		rt_thread_delay(10);
-		DC_FB_CONFIG;
-		DC_FB_CONFIG = val;
-	}
+    /*fix ls1g dc
+     *first switch to tile mode
+     *change origin register to 0
+     *goback nomal mode
+     */
+    {
+        val = DC_FB_CONFIG;
+        DC_FB_CONFIG = val | 0x10;
+        DC_FB_BUFFER_ORIGIN = 0;
+        DC_FB_BUFFER_ORIGIN;
+        rt_thread_delay(10);
+        DC_FB_CONFIG;
+        DC_FB_CONFIG = val;
+    }
 #endif
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 static rt_err_t rt_dc_control(rt_device_t dev, int cmd, void *args)
 {
-	switch (cmd)
-	{
-	case RTGRAPHIC_CTRL_RECT_UPDATE:
-		break;
-	case RTGRAPHIC_CTRL_POWERON:
-		break;
-	case RTGRAPHIC_CTRL_POWEROFF:
-		break;
-	case RTGRAPHIC_CTRL_GET_INFO:		
-		rt_memcpy(args, &_dc_info, sizeof(_dc_info));
-		break;
-	case RTGRAPHIC_CTRL_SET_MODE:
-		break;
-	}
+    switch (cmd)
+    {
+    case RTGRAPHIC_CTRL_RECT_UPDATE:
+        break;
+    case RTGRAPHIC_CTRL_POWERON:
+        break;
+    case RTGRAPHIC_CTRL_POWEROFF:
+        break;
+    case RTGRAPHIC_CTRL_GET_INFO:
+        rt_memcpy(args, &_dc_info, sizeof(_dc_info));
+        break;
+    case RTGRAPHIC_CTRL_SET_MODE:
+        break;
+    }
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 void rt_hw_dc_init(void)
 {
-	rt_device_t dc = rt_malloc(sizeof(struct rt_device));
-	if (dc == RT_NULL) 
-	{
-		rt_kprintf("dc == RT_NULL\n");
-		return; /* no memory yet */
-	}
+    rt_device_t dc = rt_malloc(sizeof(struct rt_device));
+    if (dc == RT_NULL)
+    {
+        rt_kprintf("dc == RT_NULL\n");
+        return; /* no memory yet */
+    }
 
-	_dc_info.bits_per_pixel = 16;
-	_dc_info.pixel_format = RTGRAPHIC_PIXEL_FORMAT_RGB565P;
-	_dc_info.framebuffer = (rt_uint8_t*)HW_FB_ADDR;
-	_dc_info.width = FB_XSIZE;
-	_dc_info.height = FB_YSIZE;
+    _dc_info.bits_per_pixel = 16;
+    _dc_info.pixel_format = RTGRAPHIC_PIXEL_FORMAT_RGB565P;
+    _dc_info.framebuffer = (rt_uint8_t*)HW_FB_ADDR;
+    _dc_info.width = FB_XSIZE;
+    _dc_info.height = FB_YSIZE;
 
-	/* init device structure */
-	dc->type = RT_Device_Class_Graphic;
-	dc->init = rt_dc_init;
-	dc->open = RT_NULL;
-	dc->close = RT_NULL;
-	dc->control = rt_dc_control;
-	dc->user_data = (void*)&_dc_info;
-	
-	/* register Display Controller device to RT-Thread */
-	rt_device_register(dc, "dc", RT_DEVICE_FLAG_RDWR);
+    /* init device structure */
+    dc->type = RT_Device_Class_Graphic;
+    dc->init = rt_dc_init;
+    dc->open = RT_NULL;
+    dc->close = RT_NULL;
+    dc->control = rt_dc_control;
+    dc->user_data = (void*)&_dc_info;
+
+    /* register Display Controller device to RT-Thread */
+    rt_device_register(dc, "dc", RT_DEVICE_FLAG_RDWR);
 }
diff --git a/bsp/ls1bdev/drivers/display_controller.h b/bsp/ls1bdev/drivers/display_controller.h
index 5554eb1c2e..1fa6243a72 100644
--- a/bsp/ls1bdev/drivers/display_controller.h
+++ b/bsp/ls1bdev/drivers/display_controller.h
@@ -1,58 +1,54 @@
 /*
- * File      : display_controller.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006-2012, RT-Thread Develop Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
  * 2011-08-08     lgnq         first version for LS1B
  */
- 
+
 #ifndef __DISPLAY_CONTROLLER_H__
 #define __DISPLAY_CONTROLLER_H__
 
 #include <rtthread.h>
 #include "ls1b.h"
 
-#define DC_BASE					0xBC301240  //Display Controller
+#define DC_BASE                 0xBC301240  //Display Controller
 
 /* Frame Buffer registers */
-#define DC_FB_CONFIG			__REG32(DC_BASE + 0x000)
-#define DC_FB_BUFFER_ADDR0		__REG32(DC_BASE + 0x020)
-#define DC_FB_BUFFER_STRIDE		__REG32(DC_BASE + 0x040)
-#define DC_FB_BUFFER_ORIGIN		__REG32(DC_BASE + 0x060)
-#define DC_DITHER_CONFIG		__REG32(DC_BASE + 0x120)
-#define DC_DITHER_TABLE_LOW		__REG32(DC_BASE + 0x140)
-#define DC_DITHER_TABLE_HIGH	__REG32(DC_BASE + 0x160)
-#define DC_PANEL_CONFIG			__REG32(DC_BASE + 0x180)
-#define DC_PANEL_TIMING			__REG32(DC_BASE + 0x1A0)
-#define DC_HDISPLAY				__REG32(DC_BASE + 0x1C0)
-#define DC_HSYNC				__REG32(DC_BASE + 0x1E0)
-#define DC_VDISPLAY				__REG32(DC_BASE + 0x240)
-#define DC_VSYNC				__REG32(DC_BASE + 0x260)
-#define DC_FB_BUFFER_ADDR1		__REG32(DC_BASE + 0x340)
+#define DC_FB_CONFIG            __REG32(DC_BASE + 0x000)
+#define DC_FB_BUFFER_ADDR0      __REG32(DC_BASE + 0x020)
+#define DC_FB_BUFFER_STRIDE     __REG32(DC_BASE + 0x040)
+#define DC_FB_BUFFER_ORIGIN     __REG32(DC_BASE + 0x060)
+#define DC_DITHER_CONFIG        __REG32(DC_BASE + 0x120)
+#define DC_DITHER_TABLE_LOW     __REG32(DC_BASE + 0x140)
+#define DC_DITHER_TABLE_HIGH    __REG32(DC_BASE + 0x160)
+#define DC_PANEL_CONFIG         __REG32(DC_BASE + 0x180)
+#define DC_PANEL_TIMING         __REG32(DC_BASE + 0x1A0)
+#define DC_HDISPLAY             __REG32(DC_BASE + 0x1C0)
+#define DC_HSYNC                __REG32(DC_BASE + 0x1E0)
+#define DC_VDISPLAY             __REG32(DC_BASE + 0x240)
+#define DC_VSYNC                __REG32(DC_BASE + 0x260)
+#define DC_FB_BUFFER_ADDR1      __REG32(DC_BASE + 0x340)
 
 /* Display Controller driver for 1024x768 16bit */
-#define FB_XSIZE		1024
-#define FB_YSIZE		768
+#define FB_XSIZE        1024
+#define FB_YSIZE        768
 #define CONFIG_VIDEO_16BPP
 
 #define APB_CLK 33333333
 
-#define K1BASE				0xA0000000
-#define KSEG1(addr)			((void *)(K1BASE | (rt_uint32_t)(addr)))
-#define HW_FB_ADDR			KSEG1(_rt_framebuffer)
-#define HW_FB_PIXEL(x, y)	*(volatile rt_uint16_t*)((rt_uint8_t*)HW_FB_ADDR + (y * FB_XSIZE * 2) + x * 2)
+#define K1BASE              0xA0000000
+#define KSEG1(addr)         ((void *)(K1BASE | (rt_uint32_t)(addr)))
+#define HW_FB_ADDR          KSEG1(_rt_framebuffer)
+#define HW_FB_PIXEL(x, y)   *(volatile rt_uint16_t*)((rt_uint8_t*)HW_FB_ADDR + (y * FB_XSIZE * 2) + x * 2)
 
 struct vga_struct
 {
-	long pclk;
-	int hr,hss,hse,hfl;
-	int vr,vss,vse,vfl;
+    long pclk;
+    int hr,hss,hse,hfl;
+    int vr,vss,vse,vfl;
 };
 
 #endif
diff --git a/bsp/ls1bdev/ls1b_ram.lds b/bsp/ls1bdev/ls1b_ram.lds
index 872df8ad76..a3419501c0 100644
--- a/bsp/ls1bdev/ls1b_ram.lds
+++ b/bsp/ls1bdev/ls1b_ram.lds
@@ -1,11 +1,7 @@
 /*
- * File      : ls1b_ram.lds
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2011, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
@@ -21,25 +17,25 @@ ENTRY(_start)
 SECTIONS
 {
     . = 0x80200000;
-    .text : 
+    .text :
     {
-	start = ABSOLUTE(.);
-	 *(.selfboot);
-	 *(.selfboot_data);
-	. = ALIGN(4);
-	__selfboot_end = .;
-	. = ALIGN(0x1000);
-	__ebase_entry = .;
-     	KEEP(*(.exc_vectors))
-     	__ebase_end = .;
-	 *(.start);
+    start = ABSOLUTE(.);
+     *(.selfboot);
+     *(.selfboot_data);
+    . = ALIGN(4);
+    __selfboot_end = .;
+    . = ALIGN(0x1000);
+    __ebase_entry = .;
+        KEEP(*(.exc_vectors))
+        __ebase_end = .;
+     *(.start);
          *(.text)
          *(.text.*)
          *(.rodata)
          *(.rodata.*)
          *(.rodata1)
          *(.rodata1.*)
-         
+
          /* section information for finsh shell */
          . = ALIGN(4);
          __fsymtab_start = .;
@@ -57,26 +53,26 @@ SECTIONS
           __rt_init_end = .;
          . = ALIGN(4);
     }
-    
-    .eh_frame_hdr : 
-    { 
-         *(.eh_frame_hdr) 
+
+    .eh_frame_hdr :
+    {
+         *(.eh_frame_hdr)
          *(.eh_frame_entry)
     }
     .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) }
 
     . = ALIGN(4);
-    .data : 
+    .data :
     {
          *(.data)
          *(.data.*)
-        
+
          *(.data1)
          *(.data1.*)
-         
+
          . = ALIGN(8);
          _gp = ABSOLUTE(.);     /* Base of small data */
-         
+
          *(.sdata)
          *(.sdata.*)
     }
@@ -90,7 +86,7 @@ SECTIONS
         _system_stack = .;
     }
 
-    .sbss : 
+    .sbss :
     {
         __bss_start = .;
         *(.sbss)