summaryrefslogtreecommitdiff
path: root/bsp/ls1cdev/rtconfig.py
diff options
context:
space:
mode:
author勤为本 <[email protected]>2017-10-23 17:10:48 +0800
committer勤为本 <[email protected]>2017-10-23 17:10:48 +0800
commit51d02f98d6992a8a2db7c8aa20abfbff5cc3a8e3 (patch)
treefa9db046047f6dce43e174731d25e9b45b7649e3 /bsp/ls1cdev/rtconfig.py
parentb2fbe4df011edc3ae1679ede87ce06b5744ac771 (diff)
增加龙芯1c的硬件SPI相关接口
Diffstat (limited to 'bsp/ls1cdev/rtconfig.py')
-rw-r--r--bsp/ls1cdev/rtconfig.py1
1 files changed, 1 insertions, 0 deletions
diff --git a/bsp/ls1cdev/rtconfig.py b/bsp/ls1cdev/rtconfig.py
index df0f57d78d..c08dfc6852 100644
--- a/bsp/ls1cdev/rtconfig.py
+++ b/bsp/ls1cdev/rtconfig.py
@@ -12,6 +12,7 @@ if os.getenv('RTT_CC'):
if CROSS_TOOL == 'gcc':
PLATFORM = 'gcc'
+# EXEC_PATH = "/opt/mips-2015.05/bin"
EXEC_PATH = r'D:\mgc\embedded\codebench\bin'
else:
print '================ERROR==========================='