[bsp]update GPL license to Apache-2.0, and format files

11 files changed, 607 insertions, 651 deletions

diff --git a/bsp/mini4020/applications/application.c b/bsp/mini4020/applications/application.c
index 6281b8385d..f5a77d8c60 100644
--- a/bsp/mini4020/applications/application.c
+++ b/bsp/mini4020/applications/application.c
@@ -1,22 +1,18 @@
 /*
- * File      : application.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006 - 2012, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
- * Date           Author		Notes
- * 2007-11-20     Yi.Qiu		add rtgui application
- * 2008-6-28      Bernard		no rtgui init
+ * Date           Author        Notes
+ * 2007-11-20     Yi.Qiu        add rtgui application
+ * 2008-6-28      Bernard       no rtgui init
  */
 
 /**
  * @addtogroup mini4020
  */
- 
+
 /*@{*/
 
 #include <board.h>
@@ -38,54 +34,54 @@ extern void radio_rtgui_init(void);
 
 void rt_init_thread_entry(void *parameter)
 {
-	int fd;
-	rt_uint32_t sz;
-	char buffer[20];
+    int fd;
+    rt_uint32_t sz;
+    char buffer[20];
 #ifdef RT_USING_DFS
-	dfs_init();
+    dfs_init();
 #ifdef RT_USING_DFS_ELMFAT
-	elm_init();
-	/* mount sd card fat partition 1 as root directory */
-	if (dfs_mount("sd0", "/", "elm", 0, 0) == 0)
-	{
-		rt_kprintf("File System initialized!\n");
+    elm_init();
+    /* mount sd card fat partition 1 as root directory */
+    if (dfs_mount("sd0", "/", "elm", 0, 0) == 0)
+    {
+        rt_kprintf("File System initialized!\n");
+
+        /*Open a file*/
+        fd = open("/fattest.txt", O_RDWR|O_CREAT, 0);
+        if (fd < 0)
+        {
+            rt_kprintf("open file for write failed\n");
+            return;
+        }
 
-		/*Open a file*/
-		fd = open("/fattest.txt", O_RDWR|O_CREAT, 0);
-		if (fd < 0)
-		{
-			rt_kprintf("open file for write failed\n");
-			return;
-		}
+        sz = write(fd,"Hello RT-Thread!",sizeof("Hello RT-Thread!"));
 
-		sz = write(fd,"Hello RT-Thread!",sizeof("Hello RT-Thread!"));
+        if (sz != 0)
+        {
+            rt_kprintf("written %d\n",sz);
+        }
+        else
+            rt_kprintf("haven't written\n");
 
-		if (sz != 0)
-		{
-			rt_kprintf("written %d\n",sz);
-		}
-		else
-			rt_kprintf("haven't written\n");
+        lseek(fd, 0, SEEK_SET);
 
-		lseek(fd, 0, SEEK_SET);
-		
-		sz = read(fd, buffer, sizeof(buffer));
+        sz = read(fd, buffer, sizeof(buffer));
 
-		if (sz != 0)
-		{
-			rt_kprintf("READ %d:",sz);
-			while (sz--)
-				rt_kprintf("%c",buffer[sz]);//opposite
-			rt_kprintf("\n");
-		}
-		else
-			rt_kprintf("haven't read\n");
+        if (sz != 0)
+        {
+            rt_kprintf("READ %d:",sz);
+            while (sz--)
+                rt_kprintf("%c",buffer[sz]);//opposite
+            rt_kprintf("\n");
+        }
+        else
+            rt_kprintf("haven't read\n");
 
-		close(fd);
-	}
-	else
-		rt_kprintf("File System initialzation failed!\n");
-#endif	
+        close(fd);
+    }
+    else
+        rt_kprintf("File System initialzation failed!\n");
+#endif
 #endif
 }
 
@@ -108,23 +104,23 @@ void rt_led_thread_entry(void *parameter)
 
 int rt_application_init(void)
 {
-	rt_thread_t init_thread;
-	rt_thread_t led_thread;
+    rt_thread_t init_thread;
+    rt_thread_t led_thread;
+
+    init_thread = rt_thread_create("init",
+                                rt_init_thread_entry, RT_NULL,
+                                RT_INIT_THREAD_STACK_SIZE, 8, 20);
+    led_thread = rt_thread_create("led",
+                                rt_led_thread_entry, RT_NULL,
+                                512, 200, 20);
 
-	init_thread = rt_thread_create("init",
-								rt_init_thread_entry, RT_NULL,
-								RT_INIT_THREAD_STACK_SIZE, 8, 20);
-	led_thread = rt_thread_create("led",
-								rt_led_thread_entry, RT_NULL,
-								512, 200, 20);
+    if (init_thread != RT_NULL)
+        rt_thread_startup(init_thread);
 
-	if (init_thread != RT_NULL)
-		rt_thread_startup(init_thread);
+    if (led_thread != RT_NULL)
+        rt_thread_startup(led_thread);
 
-	if (led_thread != RT_NULL)
-		rt_thread_startup(led_thread);
-	
-	return 0;
+    return 0;
 }
 
 /*@}*/
diff --git a/bsp/mini4020/applications/startup.c b/bsp/mini4020/applications/startup.c
index ae84f8b461..4d07a8edd7 100644
--- a/bsp/mini4020/applications/startup.c
+++ b/bsp/mini4020/applications/startup.c
@@ -1,11 +1,7 @@
 /*
- * File      : application.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
@@ -26,12 +22,12 @@
 #include <netif/ethernetif.h>
 #endif
 
-#define SDRAM_BASE	0x30000000
+#define SDRAM_BASE  0x30000000
 
 #ifdef __CC_ARM
 extern int Image$$RW_RAM1$$ZI$$Limit;
 #elif (defined (__GNUC__))
-	extern unsigned char __bss_end;
+    extern unsigned char __bss_end;
 #endif
 
 extern void rt_application_init(void);
@@ -40,72 +36,72 @@ extern void sd_init(void);
 
 void rtthread_startup()
 {
-	/* init hardware interrupt */
-	rt_hw_interrupt_init();
+    /* init hardware interrupt */
+    rt_hw_interrupt_init();
 
-	/* init board */
-	rt_hw_board_init();
+    /* init board */
+    rt_hw_board_init();
 
-	/* show version */
-	rt_show_version();
-		
-	/* init timer system */
-	rt_system_timer_init();
+    /* show version */
+    rt_show_version();
 
-	/* init heap memory system */
+    /* init timer system */
+    rt_system_timer_init();
+
+    /* init heap memory system */
 #ifdef __CC_ARM
-	rt_system_heap_init((void*)&Image$$RW_RAM1$$ZI$$Limit, (void*)(SDRAM_BASE + 0x200000));
+    rt_system_heap_init((void*)&Image$$RW_RAM1$$ZI$$Limit, (void*)(SDRAM_BASE + 0x200000));
 #else
-	rt_system_heap_init(&__bss_end, (void*)0x34000000);
+    rt_system_heap_init(&__bss_end, (void*)0x34000000);
 #endif
 
 
-	/* init scheduler system */
-	rt_system_scheduler_init();
+    /* init scheduler system */
+    rt_system_scheduler_init();
 
 #ifdef RT_USING_DEVICE
 
 #ifdef RT_USING_DFS
-	rt_hw_sdcard_init();
+    rt_hw_sdcard_init();
 #endif
 
 #ifdef RT_USING_LWIP
-	eth_system_device_init();
-	rt_hw_dm9161_init();
+    eth_system_device_init();
+    rt_hw_dm9161_init();
 #endif
 #endif
 
-	/* init application */
-	rt_application_init();
+    /* init application */
+    rt_application_init();
 
 #ifdef RT_USING_FINSH
-	/* init finsh */
-	finsh_system_init();
+    /* init finsh */
+    finsh_system_init();
 #ifdef RT_USING_DEVICE
-	finsh_set_device("uart0");
+    finsh_set_device("uart0");
 #endif
 #endif
 
-	/* init idle thread */
-	rt_thread_idle_init();
+    /* init idle thread */
+    rt_thread_idle_init();
+
+    /* start scheduler */
+    rt_system_scheduler_start();
 
-	/* start scheduler */
-	rt_system_scheduler_start();
+    /* never reach here */
+    return ;
 
-	/* never reach here */
-	return ;
-	
 }
 
 int main()
 {
-	/* disable interrupt first */
-	rt_hw_interrupt_disable();
+    /* disable interrupt first */
+    rt_hw_interrupt_disable();
 
-	/* startup RT-Thread RTOS */
-	rtthread_startup();
+    /* startup RT-Thread RTOS */
+    rtthread_startup();
 
-	return 0;
+    return 0;
 }
 
 
diff --git a/bsp/mini4020/drivers/board.h b/bsp/mini4020/drivers/board.h
index fd794a8a7c..baabfae361 100644
--- a/bsp/mini4020/drivers/board.h
+++ b/bsp/mini4020/drivers/board.h
@@ -1,11 +1,7 @@
 /*
- * File      : board.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
diff --git a/bsp/mini4020/drivers/dm9161.c b/bsp/mini4020/drivers/dm9161.c
index cae98435e2..a5100f501b 100644
--- a/bsp/mini4020/drivers/dm9161.c
+++ b/bsp/mini4020/drivers/dm9161.c
@@ -1,11 +1,7 @@
 /*
- * File      : dm9161.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
@@ -22,8 +18,8 @@
 #define SPEED_100   100
 #define SPEED_1000  1000
 /* Duplex, half or full. */
-#define DUPLEX_HALF		0x00
-#define DUPLEX_FULL		0x01
+#define DUPLEX_HALF     0x00
+#define DUPLEX_FULL     0x01
 
 /*
  * Davicom dm9161EP driver
@@ -32,9 +28,9 @@
  * nLAN_CS connects to nGCS4
  */
 
-/* #define dm9161_DEBUG		1 */
+/* #define dm9161_DEBUG     1 */
 #if DM9161_DEBUG
-#define DM9161_TRACE	rt_kprintf
+#define DM9161_TRACE    rt_kprintf
 #else
 #define DM9161_TRACE(...)
 #endif
@@ -65,18 +61,18 @@ struct rt_dm9161_eth
     struct eth_device parent;
 
     enum DM9161_TYPE type;
-	enum DM9161_PHY_mode mode;
+    enum DM9161_PHY_mode mode;
 
     rt_uint8_t imr_all;
-	rt_uint8_t phy_addr;
+    rt_uint8_t phy_addr;
 
-	rt_uint32_t tx_index;
+    rt_uint32_t tx_index;
 
     rt_uint8_t packet_cnt;                  /* packet I or II */
     rt_uint16_t queue_packet_len;           /* queued packet (packet II) */
 
     /* interface address info. */
-    rt_uint8_t  dev_addr[MAX_ADDR_LEN];		/* hw address	*/
+    rt_uint8_t  dev_addr[MAX_ADDR_LEN];     /* hw address   */
 };
 static struct rt_dm9161_eth dm9161_device;
 static struct rt_semaphore sem_ack, sem_lock;
@@ -85,33 +81,33 @@ void rt_dm9161_isr(int irqno, void *param);
 
 static void udelay(unsigned long ns)
 {
-	unsigned long i;
+    unsigned long i;
 
-	while (ns--)
-	{
-		i = 100;
-		while (i--);
-	}
+    while (ns--)
+    {
+        i = 100;
+        while (i--);
+    }
 }
 
 static __inline unsigned long sep_emac_read(unsigned int reg)
 {
-	void __iomem *emac_base = (void __iomem *)reg;
+    void __iomem *emac_base = (void __iomem *)reg;
 
-	return read_reg(emac_base);
+    return read_reg(emac_base);
 }
- 
+
 /*
 * Write to a EMAC register.
 */
 static __inline void sep_emac_write(unsigned int reg, unsigned long value)
 {
-	void __iomem *emac_base = (void __iomem *)reg;
- 
-	write_reg(emac_base,value);
+    void __iomem *emac_base = (void __iomem *)reg;
+
+    write_reg(emac_base,value);
 }
 
-  
+
 /* ........................... PHY INTERFACE ........................... */
 /*         CAN DO MAC CONFIGRATION
 * Enable the MDIO bit in MAC control register
@@ -120,12 +116,12 @@ static __inline void sep_emac_write(unsigned int reg, unsigned long value)
 */
 static void enable_mdi(void)           //need think more
 {
-	unsigned long ctl;
+    unsigned long ctl;
 
-	ctl = sep_emac_read(MAC_CTRL);
-	sep_emac_write(MAC_CTRL, ctl&(~0x3));    /* enable management port */
+    ctl = sep_emac_read(MAC_CTRL);
+    sep_emac_write(MAC_CTRL, ctl&(~0x3));    /* enable management port */
 
-	return;
+    return;
 }
 
 /*          CANNOT DO MAC CONFIGRATION
@@ -133,216 +129,216 @@ static void enable_mdi(void)           //need think more
 */
 static void disable_mdi(void)
 {
-	unsigned long ctl;
-  
-	ctl = sep_emac_read(MAC_CTRL);
-	sep_emac_write(MAC_CTRL, ctl|(0x3));    /* disable management port */
+    unsigned long ctl;
+
+    ctl = sep_emac_read(MAC_CTRL);
+    sep_emac_write(MAC_CTRL, ctl|(0x3));    /* disable management port */
 
-	return;
+    return;
 }
 
 /*
 * Wait until the PHY operation is complete.
 */
-static __inline void sep_phy_wait(void) 
+static __inline void sep_phy_wait(void)
 {
-	unsigned long timeout = 2;
+    unsigned long timeout = 2;
 
-	while ((sep_emac_read(MAC_MII_STATUS) & 0x2)) 
-	{
-		timeout--;
-		if (!timeout) 
-		{
-			EOUT("sep_ether: MDIO timeout\n");
-			break;
-		}		
-	}
+    while ((sep_emac_read(MAC_MII_STATUS) & 0x2))
+    {
+        timeout--;
+        if (!timeout)
+        {
+            EOUT("sep_ether: MDIO timeout\n");
+            break;
+        }
+    }
 
-	return;
+    return;
 }
- 
+
 /*
 * Write value to the a PHY register
 * Note: MDI interface is assumed to already have been enabled.
 */
 static void write_phy(unsigned char phy_addr, unsigned char address, unsigned int value)
 {
-	unsigned short mii_txdata;
-	
-	mii_txdata = value;
-	sep_emac_write(MAC_MII_ADDRESS,(unsigned long)(address<<8) | phy_addr);
-	sep_emac_write(MAC_MII_TXDATA ,mii_txdata);
-	sep_emac_write(MAC_MII_CMD ,0x4);
-	udelay(40);
+    unsigned short mii_txdata;
+
+    mii_txdata = value;
+    sep_emac_write(MAC_MII_ADDRESS,(unsigned long)(address<<8) | phy_addr);
+    sep_emac_write(MAC_MII_TXDATA ,mii_txdata);
+    sep_emac_write(MAC_MII_CMD ,0x4);
+    udelay(40);
 
-	sep_phy_wait();
+    sep_phy_wait();
 
-	return;	
+    return;
 }
- 
+
 /*
 * Read value stored in a PHY register.
 * Note: MDI interface is assumed to already have been enabled.
 */
 static void read_phy(unsigned char phy_addr, unsigned char address, unsigned int *value)
 {
-	unsigned short mii_rxdata;
-//	unsigned long mii_status;
-	
-	sep_emac_write(MAC_MII_ADDRESS,(unsigned long)(address<<8) | phy_addr);
-	sep_emac_write(MAC_MII_CMD ,0x2);
-	udelay(40);
-	sep_phy_wait();
-		
-	mii_rxdata = sep_emac_read(MAC_MII_RXDATA);
-	*value =  mii_rxdata;
+    unsigned short mii_rxdata;
+//  unsigned long mii_status;
+
+    sep_emac_write(MAC_MII_ADDRESS,(unsigned long)(address<<8) | phy_addr);
+    sep_emac_write(MAC_MII_CMD ,0x2);
+    udelay(40);
+    sep_phy_wait();
 
-	return;
+    mii_rxdata = sep_emac_read(MAC_MII_RXDATA);
+    *value =  mii_rxdata;
+
+    return;
 }
 
 /* interrupt service routine */
 void rt_dm9161_isr(int irqno, void *param)
 {
-	unsigned long intstatus;
-	rt_uint32_t address;
+    unsigned long intstatus;
+    rt_uint32_t address;
+
+    mask_irq(INTSRC_MAC);
+    intstatus = sep_emac_read(MAC_INTSRC);
 
- 	mask_irq(INTSRC_MAC);
-	intstatus = sep_emac_read(MAC_INTSRC);
+    sep_emac_write(MAC_INTSRC,intstatus);
 
-	sep_emac_write(MAC_INTSRC,intstatus);
-	
-	/*Receive complete*/
-	if(intstatus & 0x04)
-	{
-		eth_device_ready(&(dm9161_device.parent));
-	}
-	/*Receive error*/
-	else if(intstatus & 0x08)
-	{
-		rt_kprintf("Receive error\n");
-	}
-	/*Transmit complete*/
-	else if(intstatus & 0x03)
-	{
-			if(dm9161_device.tx_index == 0)
-				address = (MAC_TX_BD +(MAX_TX_DESCR-2)*8);
-			else if(dm9161_device.tx_index == 1) 
-				address = (MAC_TX_BD +(MAX_TX_DESCR-1)*8);
-			else 
-				address = (MAC_TX_BD + dm9161_device.tx_index*8-16);
-			//printk("free tx skb 0x%x in inter!!\n",lp->txBuffIndex);	
-			sep_emac_write(address,0x0);
-	}
-	else if (intstatus & 0x10)
-	{
-		rt_kprintf("ROVER ERROR\n");
-	}
+    /*Receive complete*/
+    if(intstatus & 0x04)
+    {
+        eth_device_ready(&(dm9161_device.parent));
+    }
+    /*Receive error*/
+    else if(intstatus & 0x08)
+    {
+        rt_kprintf("Receive error\n");
+    }
+    /*Transmit complete*/
+    else if(intstatus & 0x03)
+    {
+            if(dm9161_device.tx_index == 0)
+                address = (MAC_TX_BD +(MAX_TX_DESCR-2)*8);
+            else if(dm9161_device.tx_index == 1)
+                address = (MAC_TX_BD +(MAX_TX_DESCR-1)*8);
+            else
+                address = (MAC_TX_BD + dm9161_device.tx_index*8-16);
+            //printk("free tx skb 0x%x in inter!!\n",lp->txBuffIndex);
+            sep_emac_write(address,0x0);
+    }
+    else if (intstatus & 0x10)
+    {
+        rt_kprintf("ROVER ERROR\n");
+    }
 
-	while(intstatus)
-	{
-		sep_emac_write(MAC_INTSRC,intstatus);
-		intstatus = sep_emac_read(MAC_INTSRC);
-	}
+    while(intstatus)
+    {
+        sep_emac_write(MAC_INTSRC,intstatus);
+        intstatus = sep_emac_read(MAC_INTSRC);
+    }
 
-	unmask_irq(INTSRC_MAC);
+    unmask_irq(INTSRC_MAC);
 }
 
 static rt_err_t update_mac_address()
 {
-	rt_uint32_t lo,hi;
-	hi = sep_emac_read(MAC_ADDR1);
-	lo = sep_emac_read(MAC_ADDR0);
-	DBOUT("Before MAC: hi=%x lo=%x\n",hi,lo);
+    rt_uint32_t lo,hi;
+    hi = sep_emac_read(MAC_ADDR1);
+    lo = sep_emac_read(MAC_ADDR0);
+    DBOUT("Before MAC: hi=%x lo=%x\n",hi,lo);
 
-	sep_emac_write(MAC_ADDR0,(dm9161_device.dev_addr[2] << 24) | (dm9161_device.dev_addr[3] << 16) | (dm9161_device.dev_addr[4] << 8) | (dm9161_device.dev_addr[5]));
-	sep_emac_write(MAC_ADDR1,dm9161_device.dev_addr[1]|(dm9161_device.dev_addr[0]<<8));
+    sep_emac_write(MAC_ADDR0,(dm9161_device.dev_addr[2] << 24) | (dm9161_device.dev_addr[3] << 16) | (dm9161_device.dev_addr[4] << 8) | (dm9161_device.dev_addr[5]));
+    sep_emac_write(MAC_ADDR1,dm9161_device.dev_addr[1]|(dm9161_device.dev_addr[0]<<8));
 
-	hi = sep_emac_read(MAC_ADDR1);
-	lo = sep_emac_read(MAC_ADDR0);
-	DBOUT("After MAC: hi=%x lo=%x\n",hi,lo);
+    hi = sep_emac_read(MAC_ADDR1);
+    lo = sep_emac_read(MAC_ADDR0);
+    DBOUT("After MAC: hi=%x lo=%x\n",hi,lo);
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 static int mii_link_ok(unsigned long phy_id)
 {
-	/* first, a dummy read, needed to latch some MII phys */
-	unsigned int value;
+    /* first, a dummy read, needed to latch some MII phys */
+    unsigned int value;
 
-	read_phy(phy_id, MII_BMSR,&value);
-	if (value & BMSR_LSTATUS)
-		return 1;
+    read_phy(phy_id, MII_BMSR,&value);
+    if (value & BMSR_LSTATUS)
+        return 1;
 
-	return 0;
+    return 0;
 }
 
 static void update_link_speed(unsigned short phy_addr)
 {
-	unsigned int bmsr, bmcr, lpa, mac_cfg;
-	unsigned int speed, duplex;
+    unsigned int bmsr, bmcr, lpa, mac_cfg;
+    unsigned int speed, duplex;
+
+    if (!mii_link_ok(phy_addr))
+    {
+        EOUT("Link Down\n");
+        //goto result;
+    }
+
+    read_phy(phy_addr,MII_BMSR,&bmsr);
+    read_phy(phy_addr,MII_BMCR,&bmcr);
+
+    if (bmcr & BMCR_ANENABLE)                /* AutoNegotiation is enabled */
+    {
+        if (!(bmsr & BMSR_ANEGCOMPLETE))              /* Do nothing - another interrupt generated when negotiation complete */
+            goto result;
+
+        read_phy(phy_addr, MII_LPA, &lpa);
+
+        if ((lpa & LPA_100FULL) || (lpa & LPA_100HALF))
+            speed = SPEED_100;
+        else
+            speed = SPEED_10;
+
+        if ((lpa & LPA_100FULL) || (lpa & LPA_10FULL))
+            duplex = DUPLEX_FULL;
+        else
+            duplex = DUPLEX_HALF;
+    }
+    else
+    {
+        speed = (bmcr & BMCR_SPEED100) ? SPEED_100 : SPEED_10;
+        duplex = (bmcr & BMCR_FULLDPLX) ? DUPLEX_FULL : DUPLEX_HALF;
+    }
 
-	if (!mii_link_ok(phy_addr))
-	{
-		EOUT("Link Down\n");
-		//goto result;
-	}
+    /* Update the MAC */
+    mac_cfg = sep_emac_read(MAC_CTRL);
+    if (speed == SPEED_100)
+    {
+        mac_cfg |= 0x800;           /* set speed 100 M */
+        //bmcr &=(~0x2000);
+        //write_phy(lp->phy_address, MII_BMCR, bmcr); //将dm9161的速度设为10M
+        if (duplex == DUPLEX_FULL)              /* 100 Full Duplex */
+            mac_cfg |= 0x400;
+        else                                    /* 100 Half Duplex */
+            mac_cfg &= (~0x400);
+    }
+    else
+    {
+        mac_cfg &= (~0x800);             /* set speed 10 M */
 
-	read_phy(phy_addr,MII_BMSR,&bmsr);
-	read_phy(phy_addr,MII_BMCR,&bmcr);
+        if (duplex == DUPLEX_FULL)              /* 10 Full Duplex */
+            mac_cfg |= 0x400;
+        else                                /* 10 Half Duplex */
+            mac_cfg &= (~0x400);
+    }
 
-	if (bmcr & BMCR_ANENABLE)                /* AutoNegotiation is enabled */
-	{                         
-		if (!(bmsr & BMSR_ANEGCOMPLETE))              /* Do nothing - another interrupt generated when negotiation complete */
-			goto result;              
+    sep_emac_write(MAC_CTRL, mac_cfg);
+    rt_kprintf("Link now %i M-%s\n",  speed, (duplex == DUPLEX_FULL) ? "FullDuplex" : "HalfDuplex");
 
-		read_phy(phy_addr, MII_LPA, &lpa);
-		
-		if ((lpa & LPA_100FULL) || (lpa & LPA_100HALF)) 
-			speed = SPEED_100;
-		else 
-			speed = SPEED_10;
-			
-		if ((lpa & LPA_100FULL) || (lpa & LPA_10FULL)) 
-			duplex = DUPLEX_FULL;
-		else 
-			duplex = DUPLEX_HALF;
-	} 
-	else 
-	{
-		speed = (bmcr & BMCR_SPEED100) ? SPEED_100 : SPEED_10;
-		duplex = (bmcr & BMCR_FULLDPLX) ? DUPLEX_FULL : DUPLEX_HALF;
-	}
- 
-	/* Update the MAC */
-	mac_cfg = sep_emac_read(MAC_CTRL);
-	if (speed == SPEED_100) 
-	{
-		mac_cfg |= 0x800;			/* set speed 100 M */
-		//bmcr &=(~0x2000);
-		//write_phy(lp->phy_address, MII_BMCR, bmcr); //��dm9161���ٶ���Ϊ10M
-		if (duplex == DUPLEX_FULL)              /* 100 Full Duplex */
-			mac_cfg |= 0x400;
-		else                                    /* 100 Half Duplex */
-			mac_cfg &= (~0x400);
-	} 
-	else 
-	{
-		mac_cfg &= (~0x800);             /* set speed 10 M */
-		
-		if (duplex == DUPLEX_FULL)              /* 10 Full Duplex */
-			mac_cfg |= 0x400;
-		else                                /* 10 Half Duplex */
-			mac_cfg &= (~0x400);
-	}
-	
-	sep_emac_write(MAC_CTRL, mac_cfg);
-	rt_kprintf("Link now %i M-%s\n",  speed, (duplex == DUPLEX_FULL) ? "FullDuplex" : "HalfDuplex");
-			
 result:
-	mac_cfg = sep_emac_read(MAC_CTRL);
-	DBOUT("After mac_cfg=%d\n",mac_cfg);
-	
-	return;
+    mac_cfg = sep_emac_read(MAC_CTRL);
+    DBOUT("After mac_cfg=%d\n",mac_cfg);
+
+    return;
 }
 
 static rt_err_t rt_dm9161_open(rt_device_t dev, rt_uint16_t oflag);
@@ -350,53 +346,53 @@ static rt_err_t rt_dm9161_open(rt_device_t dev, rt_uint16_t oflag);
 /* initialize the interface */
 static rt_err_t rt_dm9161_init(rt_device_t dev)
 {
-	unsigned int phyid1, phyid2;
-	int detected = -1;
-	unsigned long phy_id;
-	unsigned short phy_address = 0;
+    unsigned int phyid1, phyid2;
+    int detected = -1;
+    unsigned long phy_id;
+    unsigned short phy_address = 0;
+
+    while ((detected != 0) && (phy_address < 32))
+    {
+        /* Read the PHY ID registers */
+        enable_mdi();
+        read_phy(phy_address, MII_PHYSID1, &phyid1);
+        read_phy(phy_address, MII_PHYSID2, &phyid2);
+
+        disable_mdi();
+
+        phy_id = (phyid1 << 16) | (phyid2 & 0xfff0);
+        switch (phy_id)
+        {
+            case MII_DM9161_ID:     /* Davicom 9161: PHY_ID1 = 0x181, PHY_ID2 = B881 */
+            case MII_DM9161A_ID:        /* Davicom 9161A: PHY_ID1 = 0x181, PHY_ID2 = B8A0 */
+            case MII_RTL8201_ID:        /* Realtek RTL8201: PHY_ID1 = 0, PHY_ID2 = 0x8201 */
+            case MII_BCM5221_ID:        /* Broadcom BCM5221: PHY_ID1 = 0x40, PHY_ID2 = 0x61e0 */
+            case MII_DP83847_ID:        /* National Semiconductor DP83847:  */
+            case MII_AC101L_ID:     /* Altima AC101L: PHY_ID1 = 0x22, PHY_ID2 = 0x5520 */
+            case MII_KS8721_ID:     /* Micrel KS8721: PHY_ID1 = 0x22, PHY_ID2 = 0x1610 */
+            {
+                enable_mdi();
+                #warning SHOULD SET MAC ADDR
+                //get_mac_address(dev);     /* Get ethernet address and store it in dev->dev_addr */
+                update_mac_address();   /* Program ethernet address into MAC */
 
-	while ((detected != 0) && (phy_address < 32)) 
-	{
-		/* Read the PHY ID registers */
-		enable_mdi();
-		read_phy(phy_address, MII_PHYSID1, &phyid1);
-		read_phy(phy_address, MII_PHYSID2, &phyid2);
-	
-		disable_mdi();
+                //用哈希寄存器比较当前群播地址，全双工，添加CRC校验，短数据帧进行填充
+                sep_emac_write(MAC_CTRL, 0xa413);
+                #warning SHOULD DETERMIN LINK SPEED
+                update_link_speed(phy_address);
+                dm9161_device.phy_addr = phy_address;
+                disable_mdi();
+                break;
+            }
 
-		phy_id = (phyid1 << 16) | (phyid2 & 0xfff0);
-		switch (phy_id) 
-		{
-			case MII_DM9161_ID:		/* Davicom 9161: PHY_ID1 = 0x181, PHY_ID2 = B881 */
-			case MII_DM9161A_ID:		/* Davicom 9161A: PHY_ID1 = 0x181, PHY_ID2 = B8A0 */
-			case MII_RTL8201_ID:		/* Realtek RTL8201: PHY_ID1 = 0, PHY_ID2 = 0x8201 */
-			case MII_BCM5221_ID:		/* Broadcom BCM5221: PHY_ID1 = 0x40, PHY_ID2 = 0x61e0 */
-			case MII_DP83847_ID:		/* National Semiconductor DP83847:  */
-			case MII_AC101L_ID:		/* Altima AC101L: PHY_ID1 = 0x22, PHY_ID2 = 0x5520 */
-			case MII_KS8721_ID:		/* Micrel KS8721: PHY_ID1 = 0x22, PHY_ID2 = 0x1610 */
-			{
-				enable_mdi();
-				#warning SHOULD SET MAC ADDR
-				//get_mac_address(dev);		/* Get ethernet address and store it in dev->dev_addr */
-				update_mac_address();	/* Program ethernet address into MAC */
-			
-				//�ù�ϣ�Ĵ����Ƚϵ�ǰȺ����ַ��ȫ˫��������CRCУ�飬������֡�������
-				sep_emac_write(MAC_CTRL, 0xa413);
-				#warning SHOULD DETERMIN LINK SPEED
-				update_link_speed(phy_address);
-				dm9161_device.phy_addr = phy_address;
-				disable_mdi();
-				break;
-			}
-				
-		}
+        }
 
-		phy_address++;
-	}
+        phy_address++;
+    }
 
-	rt_dm9161_open(dev,0);
+    rt_dm9161_open(dev,0);
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 /* ................................ MAC ................................ */
@@ -406,300 +402,300 @@ static rt_err_t rt_dm9161_init(rt_device_t dev)
  */
 static void sepether_start(void)
 {
-	int i;
-	unsigned int tempaddr;
- 
-	sep_emac_write(MAC_TXBD_NUM,MAX_TX_DESCR);
+    int i;
+    unsigned int tempaddr;
 
-	//��ʼ�����ͺͽ���������
-	for (i = 0; i < MAX_TX_DESCR; i++)
-	{
-		tempaddr=(MAC_TX_BD+i*8);
-		sep_emac_write(tempaddr,0);
-		tempaddr=(MAC_TX_BD+i*8+4);
-		sep_emac_write(tempaddr,0);
-	}
-	for (i = 0; i < MAX_RX_DESCR; i++)
-	{
-		tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8);
-		sep_emac_write(tempaddr,0);
-		tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8+4);
-		sep_emac_write(tempaddr,0);
-	}
+    sep_emac_write(MAC_TXBD_NUM,MAX_TX_DESCR);
 
-	for (i = 0; i < MAX_RX_DESCR; i++) 
-	{
-		tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8);
-		sep_emac_write(tempaddr,0xc000);
-		tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8+4);
-		sep_emac_write(tempaddr,ESRAM_BASE+ MAX_TX_DESCR*0x600+i*0x600);
-	}
+    //初始化发送和接收描述符
+    for (i = 0; i < MAX_TX_DESCR; i++)
+    {
+        tempaddr=(MAC_TX_BD+i*8);
+        sep_emac_write(tempaddr,0);
+        tempaddr=(MAC_TX_BD+i*8+4);
+        sep_emac_write(tempaddr,0);
+    }
+    for (i = 0; i < MAX_RX_DESCR; i++)
+    {
+        tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8);
+        sep_emac_write(tempaddr,0);
+        tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8+4);
+        sep_emac_write(tempaddr,0);
+    }
 
-	/* Set the Wrap bit on the last descriptor */
-	tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8-8);
-	sep_emac_write(tempaddr,0xe000);
+    for (i = 0; i < MAX_RX_DESCR; i++)
+    {
+        tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8);
+        sep_emac_write(tempaddr,0xc000);
+        tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8+4);
+        sep_emac_write(tempaddr,ESRAM_BASE+ MAX_TX_DESCR*0x600+i*0x600);
+    }
 
-	for (i = 0; i < MAX_TX_DESCR; i++) 
-	{
-		tempaddr=(MAC_TX_BD+i*8);
-		sep_emac_write(tempaddr,0x0);
-		tempaddr=(MAC_TX_BD+i*8+4);
-		sep_emac_write(tempaddr,ESRAM_BASE+i*0x600);
-	}
-	
-	return;
+    /* Set the Wrap bit on the last descriptor */
+    tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8-8);
+    sep_emac_write(tempaddr,0xe000);
+
+    for (i = 0; i < MAX_TX_DESCR; i++)
+    {
+        tempaddr=(MAC_TX_BD+i*8);
+        sep_emac_write(tempaddr,0x0);
+        tempaddr=(MAC_TX_BD+i*8+4);
+        sep_emac_write(tempaddr,ESRAM_BASE+i*0x600);
+    }
+
+    return;
 }
 
 static rt_err_t rt_dm9161_open(rt_device_t dev, rt_uint16_t oflag)
 {
-	unsigned int dsintr;
+    unsigned int dsintr;
+
+    enable_mdi();
+    mask_irq(28);
+
+    sep_emac_write(MAC_INTMASK,0x0);  //首先屏蔽中断
 
-	enable_mdi();
-	mask_irq(28);
+    sepether_start();
 
-	sep_emac_write(MAC_INTMASK,0x0);  //���������ж�
+    /* Enable PHY interrupt */
+    *(volatile unsigned long*)GPIO_PORTA_DIR |= 0x0080 ;          //1 stands for in
+    *(volatile unsigned long*)GPIO_PORTA_SEL |= 0x0080 ;       //for common use
+    *(volatile unsigned long*)GPIO_PORTA_INCTL |= 0x0080;      //中断输入方式
+    *(volatile unsigned long*)GPIO_PORTA_INTRCTL |= (0x3UL<<14);    //中断类型为低电平解发
+    *(volatile unsigned long*)GPIO_PORTA_INTRCLR |= 0x0080;    //清除中断
+    *(volatile unsigned long*)GPIO_PORTA_INTRCLR = 0x0000;          //清除中断
 
-	sepether_start();
+    rt_hw_interrupt_install(INTSRC_MAC, rt_dm9161_isr, RT_NULL, "EMAC");
+    enable_irq(INTSRC_EXINT7);
 
-	/* Enable PHY interrupt */
-	*(volatile unsigned long*)GPIO_PORTA_DIR |= 0x0080 ;          //1 stands for in
-	*(volatile unsigned long*)GPIO_PORTA_SEL |= 0x0080 ;       //for common use
-	*(volatile unsigned long*)GPIO_PORTA_INCTL |= 0x0080;      //�ж����뷽ʽ
-	*(volatile unsigned long*)GPIO_PORTA_INTRCTL |= (0x3UL<<14);    //�ж�����Ϊ�͵�ƽ�ⷢ
-	*(volatile unsigned long*)GPIO_PORTA_INTRCLR |= 0x0080;    //����ж�
-	*(volatile unsigned long*)GPIO_PORTA_INTRCLR = 0x0000;          //����ж�
 
-	rt_hw_interrupt_install(INTSRC_MAC, rt_dm9161_isr, RT_NULL, "EMAC");
-	enable_irq(INTSRC_EXINT7);
+    read_phy(dm9161_device.phy_addr, MII_DSINTR_REG, &dsintr);
+    dsintr = dsintr & ~0xf00;       /* clear bits 8..11 */
+    write_phy(dm9161_device.phy_addr, MII_DSINTR_REG, dsintr);
 
+    update_link_speed(dm9161_device.phy_addr);
 
-	read_phy(dm9161_device.phy_addr, MII_DSINTR_REG, &dsintr);
-	dsintr = dsintr & ~0xf00;		/* clear bits 8..11 */
-	write_phy(dm9161_device.phy_addr, MII_DSINTR_REG, dsintr);
 
-	update_link_speed(dm9161_device.phy_addr);
-	
-	
-	/************************************************************************************/
-	/* Enable MAC interrupts */
-	sep_emac_write(MAC_INTMASK,0xff);  //open�ж�
-	sep_emac_write(MAC_INTSRC,0xff);   //clear all mac irq
-	unmask_irq(28);
-	disable_mdi();
-	
-	rt_kprintf("SEP4020 ethernet interface open!\n\r");
+    /************************************************************************************/
+    /* Enable MAC interrupts */
+    sep_emac_write(MAC_INTMASK,0xff);  //open中断
+    sep_emac_write(MAC_INTSRC,0xff);   //clear all mac irq
+    unmask_irq(28);
+    disable_mdi();
 
-	return RT_EOK;
+    rt_kprintf("SEP4020 ethernet interface open!\n\r");
+
+    return RT_EOK;
 }
 
 static rt_err_t rt_dm9161_close(rt_device_t dev)
 {
-	rt_kprintf("SEP4020 ethernet interface close!\n\r");
-	
-	/* Disable Receiver and Transmitter */
-	disable_mdi();
-	#warning disable ether;
-	
-//	INT_ENABLE(28);
-	/* Disable PHY interrupt */
-//	disable_phyirq(dev);
-	
-	/* Disable MAC interrupts */
-	sep_emac_write(MAC_INTMASK,0);  //�����ж�
+    rt_kprintf("SEP4020 ethernet interface close!\n\r");
+
+    /* Disable Receiver and Transmitter */
+    disable_mdi();
+    #warning disable ether;
+
+//  INT_ENABLE(28);
+    /* Disable PHY interrupt */
+//  disable_phyirq(dev);
+
+    /* Disable MAC interrupts */
+    sep_emac_write(MAC_INTMASK,0);  //屏蔽中断
 
-//	INT_DISABLE(28);
-	
-	return RT_EOK;
+//  INT_DISABLE(28);
+
+    return RT_EOK;
 }
 
 static rt_size_t rt_dm9161_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
 {
-	rt_set_errno(-RT_ENOSYS);
+    rt_set_errno(-RT_ENOSYS);
 
-	return 0;
+    return 0;
 }
 
 static rt_size_t rt_dm9161_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
 {
-	rt_set_errno(-RT_ENOSYS);
+    rt_set_errno(-RT_ENOSYS);
 
-	return 0;
+    return 0;
 }
 
 static rt_err_t rt_dm9161_control(rt_device_t dev, int cmd, void *args)
 {
-	return RT_EOK;
+    return RT_EOK;
 }
 
 /* ethernet device interface */
 /* transmit packet. */
 rt_err_t rt_dm9161_tx( rt_device_t dev, struct pbuf* p)
 {
-	rt_uint8_t i;
-	rt_uint32_t length = 0;
-	struct pbuf *q;
-	unsigned long  address;
-	unsigned long tmp_tx_bd;
+    rt_uint8_t i;
+    rt_uint32_t length = 0;
+    struct pbuf *q;
+    unsigned long  address;
+    unsigned long tmp_tx_bd;
+
+    /* lock DM9000 device */
+//  rt_sem_take(&sem_lock, RT_WAITING_FOREVER);
 
-	/* lock DM9000 device */
-//	rt_sem_take(&sem_lock, RT_WAITING_FOREVER);
+    /* disable dm9000a interrupt */
+    #warning SHOULD DISABLE INTEERUPT?
 
-	/* disable dm9000a interrupt */
-	#warning SHOULD DISABLE INTEERUPT?
+    /*Search for available BD*/
+    for (i = 0;i<MAX_TX_DESCR;)
+    {
+        address = MAC_TX_BD + i*8;
+        tmp_tx_bd = sep_emac_read(address);
+        if (!(tmp_tx_bd & 0x8000))
+        {
+            if (i == (MAX_TX_DESCR-1))
+                i = 0;
+            else
+                i = i+1;
+            break;
+        }
+        if (i == MAX_TX_DESCR-1)
+            i = 0;
+        else
+            i++;
+    }
 
-	/*Search for available BD*/
-	for (i = 0;i<MAX_TX_DESCR;)
-	{
-		address	= MAC_TX_BD + i*8;
-		tmp_tx_bd = sep_emac_read(address);
-		if (!(tmp_tx_bd & 0x8000))
-		{
-			if (i == (MAX_TX_DESCR-1)) 
-				i = 0;
-			else 
-				i = i+1;
-			break;
-		}
-		if (i == MAX_TX_DESCR-1) 
-			i = 0;
-		else 
-			i++;
-	}
-	
-	q = p;
-	while (q)
-	{
-		rt_memcpy((u8_t*)(ESRAM_BASE + i*0x600 + length),(u8_t*)q->payload,q->len);
-		length += q->len;
-		q = q->next;
-	}
+    q = p;
+    while (q)
+    {
+        rt_memcpy((u8_t*)(ESRAM_BASE + i*0x600 + length),(u8_t*)q->payload,q->len);
+        length += q->len;
+        q = q->next;
+    }
 
-	#warning SHOULD NOTICE IT'S LENGTH
+    #warning SHOULD NOTICE IT'S LENGTH
 
-	length = length << 16;
+    length = length << 16;
 
-	if (i == MAX_TX_DESCR - 1)
-		length |= 0xb800;
-	else 
-		length |= 0x9800;
+    if (i == MAX_TX_DESCR - 1)
+        length |= 0xb800;
+    else
+        length |= 0x9800;
 
-	address = (MAC_TX_BD + i*8);
-	dm9161_device.tx_index = i;
-	sep_emac_write(address,length);
+    address = (MAC_TX_BD + i*8);
+    dm9161_device.tx_index = i;
+    sep_emac_write(address,length);
 
-	//wait for tranfer complete
-	while(!(sep_emac_read(address)&0x8000));
+    //wait for tranfer complete
+    while(!(sep_emac_read(address)&0x8000));
 
-	/* unlock DM9000 device */
+    /* unlock DM9000 device */
 //    rt_sem_release(&sem_lock);
 
-	/* wait ack */
+    /* wait ack */
 //    rt_sem_take(&sem_ack, RT_WAITING_FOREVER);
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 /* reception packet. */
 struct pbuf *rt_dm9161_rx(rt_device_t dev)
 {
-	unsigned int temp_rx_bd,address;
-	rt_uint32_t i = 0;
-	rt_uint32_t length;
-	unsigned char *p_recv;
-	struct pbuf* p = RT_NULL;
+    unsigned int temp_rx_bd,address;
+    rt_uint32_t i = 0;
+    rt_uint32_t length;
+    unsigned char *p_recv;
+    struct pbuf* p = RT_NULL;
+
+    /* lock DM9000 device */
+    rt_sem_take(&sem_lock, RT_WAITING_FOREVER);
+
+    while (1)
+    {
 
-	/* lock DM9000 device */
-	rt_sem_take(&sem_lock, RT_WAITING_FOREVER);
+        address = MAC_TX_BD +  (MAX_TX_DESCR + i) * 8;
+        temp_rx_bd = sep_emac_read(address);
 
-	while (1)
-	{
-	
-		address = MAC_TX_BD +  (MAX_TX_DESCR + i) * 8;
-		temp_rx_bd = sep_emac_read(address);
-	
-		if (!(temp_rx_bd & 0x8000))
-		{
-			length = temp_rx_bd;
-			length = length >> 16;
+        if (!(temp_rx_bd & 0x8000))
+        {
+            length = temp_rx_bd;
+            length = length >> 16;
 
-			p_recv = (unsigned char *)(ESRAM_BASE + (MAX_TX_DESCR + i) * 0x600);
-			p = pbuf_alloc(PBUF_LINK,length,PBUF_RAM);
-			if (p != RT_NULL)
-			{
-				struct pbuf *q;
-				rt_int32_t len;
+            p_recv = (unsigned char *)(ESRAM_BASE + (MAX_TX_DESCR + i) * 0x600);
+            p = pbuf_alloc(PBUF_LINK,length,PBUF_RAM);
+            if (p != RT_NULL)
+            {
+                struct pbuf *q;
+                rt_int32_t len;
 
-				for (q = p; q != RT_NULL; q = q->next)
-				{
-					rt_memcpy((rt_uint8_t *)(q->payload),p_recv,q->len);
-				}
-			}
-			else
-			{
-				 rt_kprintf("Droping %d packet \n",length);
-			}
+                for (q = p; q != RT_NULL; q = q->next)
+                {
+                    rt_memcpy((rt_uint8_t *)(q->payload),p_recv,q->len);
+                }
+            }
+            else
+            {
+                 rt_kprintf("Droping %d packet \n",length);
+            }
 
-			if(i == (MAX_RX_DESCR-1))
-			{
-				sep_emac_write(address,0xe000);
-				i = 0;
-			}
-			else
-			{
-				sep_emac_write(address,0xc000);
-				i++;
-			}
-		}
-		else
-			break;
-	}
+            if(i == (MAX_RX_DESCR-1))
+            {
+                sep_emac_write(address,0xe000);
+                i = 0;
+            }
+            else
+            {
+                sep_emac_write(address,0xc000);
+                i++;
+            }
+        }
+        else
+            break;
+    }
 
-	rt_sem_release(&sem_lock);
+    rt_sem_release(&sem_lock);
 
-	return p;
+    return p;
 }
 
 void rt_hw_dm9161_init()
 {
-	rt_sem_init(&sem_ack, "tx_ack", 1, RT_IPC_FLAG_FIFO);
-	rt_sem_init(&sem_lock, "eth_lock", 1, RT_IPC_FLAG_FIFO);
+    rt_sem_init(&sem_ack, "tx_ack", 1, RT_IPC_FLAG_FIFO);
+    rt_sem_init(&sem_lock, "eth_lock", 1, RT_IPC_FLAG_FIFO);
 
-	dm9161_device.type  = TYPE_DM9161;
-	dm9161_device.mode	= DM9161_AUTO;
-	dm9161_device.packet_cnt = 0;
-	dm9161_device.queue_packet_len = 0;
+    dm9161_device.type  = TYPE_DM9161;
+    dm9161_device.mode  = DM9161_AUTO;
+    dm9161_device.packet_cnt = 0;
+    dm9161_device.queue_packet_len = 0;
 
-	/*
-	 * SRAM Tx/Rx pointer automatically return to start address,
-	 * Packet Transmitted, Packet Received
-	 */
-	#warning NOTICE:
-	//dm9161_device.imr_all = IMR_PAR | IMR_PTM | IMR_PRM;
+    /*
+     * SRAM Tx/Rx pointer automatically return to start address,
+     * Packet Transmitted, Packet Received
+     */
+    #warning NOTICE:
+    //dm9161_device.imr_all = IMR_PAR | IMR_PTM | IMR_PRM;
 
-	dm9161_device.dev_addr[0] = 0x01;
-	dm9161_device.dev_addr[1] = 0x60;
-	dm9161_device.dev_addr[2] = 0x6E;
-	dm9161_device.dev_addr[3] = 0x11;
-	dm9161_device.dev_addr[4] = 0x02;
-	dm9161_device.dev_addr[5] = 0x0F;
+    dm9161_device.dev_addr[0] = 0x01;
+    dm9161_device.dev_addr[1] = 0x60;
+    dm9161_device.dev_addr[2] = 0x6E;
+    dm9161_device.dev_addr[3] = 0x11;
+    dm9161_device.dev_addr[4] = 0x02;
+    dm9161_device.dev_addr[5] = 0x0F;
 
-	dm9161_device.parent.parent.init       = rt_dm9161_init;
-	dm9161_device.parent.parent.open       = rt_dm9161_open;
-	dm9161_device.parent.parent.close      = rt_dm9161_close;
-	dm9161_device.parent.parent.read       = rt_dm9161_read;
-	dm9161_device.parent.parent.write      = rt_dm9161_write;
-	dm9161_device.parent.parent.control    = rt_dm9161_control;
-	dm9161_device.parent.parent.user_data  = RT_NULL;
+    dm9161_device.parent.parent.init       = rt_dm9161_init;
+    dm9161_device.parent.parent.open       = rt_dm9161_open;
+    dm9161_device.parent.parent.close      = rt_dm9161_close;
+    dm9161_device.parent.parent.read       = rt_dm9161_read;
+    dm9161_device.parent.parent.write      = rt_dm9161_write;
+    dm9161_device.parent.parent.control    = rt_dm9161_control;
+    dm9161_device.parent.parent.user_data  = RT_NULL;
 
-	dm9161_device.parent.eth_rx     = rt_dm9161_rx;
-	dm9161_device.parent.eth_tx     = rt_dm9161_tx;
+    dm9161_device.parent.eth_rx     = rt_dm9161_rx;
+    dm9161_device.parent.eth_tx     = rt_dm9161_tx;
 
-	eth_device_init(&(dm9161_device.parent), "e0");
+    eth_device_init(&(dm9161_device.parent), "e0");
 
-	/* instal interrupt */
-	#warning TODO
-	//rt_hw_interrupt_install(INTEINT4_7, rt_dm9161_isr, RT_NULL);
-	//rt_hw_interrupt_umask(INTEINT4_7);
+    /* instal interrupt */
+    #warning TODO
+    //rt_hw_interrupt_install(INTEINT4_7, rt_dm9161_isr, RT_NULL);
+    //rt_hw_interrupt_umask(INTEINT4_7);
 }
 
 void dm9161a(void)
diff --git a/bsp/mini4020/drivers/dm9161.h b/bsp/mini4020/drivers/dm9161.h
index 620f8653bc..5b63508aaa 100644
--- a/bsp/mini4020/drivers/dm9161.h
+++ b/bsp/mini4020/drivers/dm9161.h
@@ -1,11 +1,7 @@
 /*
- * File      : dm9161.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
@@ -21,15 +17,15 @@
  /* Davicom 9161 PHY */
  #define MII_DM9161_ID   0x0181b880
  #define MII_DM9161A_ID  0x0181b8a0
-  
+
  /* Davicom specific registers */
  #define MII_DSCR_REG    16
  #define MII_DSCSR_REG   17
  #define MII_DSINTR_REG  21
-  
+
   /* Intel LXT971A PHY */
  #define MII_LXT971A_ID  0x001378E0
-  
+
   /* Intel specific registers */
  #define MII_ISINTE_REG  18
  #define MII_ISINTS_REG  19
@@ -37,41 +33,41 @@
 
  /* Realtek RTL8201 PHY */
  #define MII_RTL8201_ID  0x00008200
-  
+
  /* Broadcom BCM5221 PHY */
  #define MII_BCM5221_ID  0x004061e0
-  
+
  /* Broadcom specific registers */
  #define MII_BCMINTR_REG 26
-  
+
   /* National Semiconductor DP83847 */
  #define MII_DP83847_ID  0x20005c30
- 
+
   /* Altima AC101L PHY */
  #define MII_AC101L_ID   0x00225520
-  
+
  /* Micrel KS8721 PHY */
  #define MII_KS8721_ID   0x00221610
- 
+
  /* ........................................................................ */
-  
+
  #define MAX_RBUFF_SZ    0x600           /* 1518 rounded up */
  #define MAX_RX_DESCR    20           /* max number of receive buffers */
-  
+
  #define MAX_TBUFF_SZ    0x600           /* 1518 rounded up */
  #define MAX_TX_DESCR    20               /* max number of receive buffers */
-  
+
  #define EMAC_DESC_DONE  0x00000001      /* bit for if DMA is done */
  #define EMAC_DESC_WRAP  0x00000002      /* bit for wrap */
-  
+
  #define EMAC_BROADCAST  0x80000000      /* broadcast address */
  #define EMAC_MULTICAST  0x40000000      /* multicast address */
  #define EMAC_UNICAST    0x20000000      /* unicast address */
- 
-#define DM9161_inb(r) 		(*(volatile rt_uint8_t  *)r)
-#define DM9161_outb(r, d) 	(*(volatile rt_uint8_t  *)r = d)
-#define DM9161_inw(r) 		(*(volatile rt_uint16_t *)r)
-#define DM9161_outw(r, d) 	(*(volatile rt_uint16_t *)r = d)
+
+#define DM9161_inb(r)       (*(volatile rt_uint8_t  *)r)
+#define DM9161_outb(r, d)   (*(volatile rt_uint8_t  *)r = d)
+#define DM9161_inw(r)       (*(volatile rt_uint16_t *)r)
+#define DM9161_outw(r, d)   (*(volatile rt_uint16_t *)r = d)
 
 void rt_hw_dm9616_init(void);
 
diff --git a/bsp/mini4020/drivers/lcd.c b/bsp/mini4020/drivers/lcd.c
index f9799d9ef7..c325764953 100644
--- a/bsp/mini4020/drivers/lcd.c
+++ b/bsp/mini4020/drivers/lcd.c
@@ -1,11 +1,7 @@
 /*
- * File      : lcd.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
@@ -56,7 +52,7 @@ void radio_rtgui_init(void)
     _rtgui_lcd_driver.bits_per_pixel  = 16;
     _rtgui_lcd_driver.width           = 320;
     _rtgui_lcd_driver.height          = 240;
-        
+
     _rtgui_lcd_driver.ops = &_rtgui_graphic_driver_ops;
 
     //_rtgui_lcd_driver.screen_update   = lcd_update;
@@ -67,7 +63,7 @@ void radio_rtgui_init(void)
     rt_memset((char*)pVideoBuffer,0xff,320*240*2);
     //rt_memcpy((char*)pVideoBuffer,pic,320*240*2);  //TESTING IMAGE
 
-    //�˴�������
+    //此处待修正
     /* add lcd driver into graphic driver */
     // rtgui_graphic_driver_add(&_rtgui_lcd_driver);
 }
diff --git a/bsp/mini4020/drivers/lcdc.c b/bsp/mini4020/drivers/lcdc.c
index d468eebd91..4be34518ba 100644
--- a/bsp/mini4020/drivers/lcdc.c
+++ b/bsp/mini4020/drivers/lcdc.c
@@ -1,11 +1,7 @@
 /*
- * File      : lcdc.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
@@ -23,20 +19,20 @@ rt_err_t sep4020_lcd_init(void)
 {
     pVideoBuffer =(unsigned long)rt_malloc(LCDWIDTH * LCDHEIGHT * 2);
 
-    *(RP)GPIO_PORTC_SEL  |= 0X0008;      //Portc8����Ϊͨ�ÿ�
-    *(RP)GPIO_PORTC_DIR  &= (~0X0008);   //Portc8�������
-    *(RP)GPIO_PORTC_DATA |= 0X0008;      //Portc8����ߵ�ƽ
+    *(RP)GPIO_PORTC_SEL  |= 0X0008;      //Portc8设置为通用口
+    *(RP)GPIO_PORTC_DIR  &= (~0X0008);   //Portc8设置为输出
+    *(RP)GPIO_PORTC_DATA |= 0X0008;      //Portc8输出高电平
 
-    writel(0x00000000,LCDC_LECR);     //����LCDC
-    writel(pVideoBuffer,LCDC_SSA);    //lcd����֡����ʼ��ַ
+    writel(0x00000000,LCDC_LECR);     //禁用LCDC
+    writel(pVideoBuffer,LCDC_SSA);    //lcd数据帧的起始地址
     writel(YMAX | XMAX,LCDC_SIZE);
     writel(TFT|COLOR|PBSIZE|BPIX|PIXPOL|FLMPOL|LPPOL|CLKPOL|OEPOL|END_SEL|ACD_SEL|ACD|PCD,LCDC_PCR);
     writel(H_WIDTH|H_WAIT_1|H_WAIT_2,LCDC_HCR);
     writel(V_WIDTH|PASS_FRAME_WAIT|V_WAIT_1|V_WAIT_2,LCDC_VCR);
     writel(SCR|CC_EN|PW,LCDC_PWMR);
     writel(BL|HM|TM,LCDC_DMACR);
-    writel(0x00000001,LCDC_LECR);         //ʹ��LCDC
-    writel(0x00000000,LCDC_LCDISREN);     //�ж��ڼ���֡�����һ�����һ������ʱ���ã���LCD֮�����һ����ʱ
+    writel(0x00000001,LCDC_LECR);         //使能LCDC
+    writel(0x00000000,LCDC_LCDISREN);     //中断在加载帧的最后一个或第一个数据时设置，到LCD之间会有一个延时
 
     return RT_EOK;
 }
diff --git a/bsp/mini4020/drivers/lcdc.h b/bsp/mini4020/drivers/lcdc.h
index 4b361e502c..39a88e82e0 100644
--- a/bsp/mini4020/drivers/lcdc.h
+++ b/bsp/mini4020/drivers/lcdc.h
@@ -1,11 +1,7 @@
 /*
- * File      : lcdc.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
@@ -29,40 +25,40 @@
 
 //Macro for PCR register setting
 #define TFT   ((U32)1 << 31)
-#define COLOR   (1 << 30)   //1Ϊɫ��.
+#define COLOR   (1 << 30)   //1为色彩.
 #define PBSIZE   (0 << 28)
-#define BPIX     (4 << 25)   //�洢����һ�����ض�Ӧ16bit
-#define PIXPOL   (0 << 24)   //���ؼ��ԡ��������صļ���,����Ч	   //0<<24
-#define FLMPOL   (1 << 23)   //���б�־���ԡ��������б�־�ļ���,����Ч.
-#define LPPOL   (1 << 22)   //�����弫�ԡ������������źŵļ���,����Ч.
-#define CLKPOL   (0 << 21)   //LCD ��λʱ�Ӽ��ԡ�����LCD ��λʱ�ӵ���Ч�صļ���,�½�����Ч.
-#define OEPOL   (1 << 20)   //���ʹ�ܼ��ԡ��������ʹ���źŵļ���,����Ч.
-#define END_SEL (0 << 18)   //ӡ�ڰ���ʽѡ��,Сӡ�ڰ�.
-#define ACD_SEL (0 << 15)   //ACDʱ��Դѡ��ѡ����任��������ʱ��,ʹ��FLM ��ΪACD ����ʱ��
-#define ACD   (0 << 8 )   //����ģʽ.
+#define BPIX     (4 << 25)   //存储器中一个像素对应16bit
+#define PIXPOL   (0 << 24)   //像素极性—设置像素的极性,高有效    //0<<24
+#define FLMPOL   (1 << 23)   //首行标志极性—设置首行标志的极性,低有效.
+#define LPPOL   (1 << 22)   //行脉冲极性—设置行脉冲信号的极性,低有效.
+#define CLKPOL   (0 << 21)   //LCD 移位时钟极性—设置LCD 移位时钟的有效沿的极性,下降延有效.
+#define OEPOL   (1 << 20)   //输出使能极性—设置输出使能信号的极性,高有效.
+#define END_SEL (0 << 18)   //印第安格式选择,小印第安.
+#define ACD_SEL (0 << 15)   //ACD时钟源选择—选择晶向变换计数器的时钟,使用FLM 作为ACD 计数时钟
+#define ACD   (0 << 8 )   //被动模式.
 #define PCD   (10)
 
-//Macro for HCR regiter setting //ˮƽ���üĴ���.
+//Macro for HCR regiter setting //水平配置寄存器.
 #define H_WIDTH ((U32)46 << 26)
 #define H_WAIT_1 (20 << 8)
 #define H_WAIT_2 (20)
 
-//Macro for VCR register setting //��ֱ���üĴ���.
+//Macro for VCR register setting //垂直配置寄存器.
 #define V_WIDTH ((U32)10 << 26)
 #define PASS_FRAME_WAIT (0 <<16)
 #define V_WAIT_1 (3 << 8)
 #define V_WAIT_2 (3)
 
 //Macro for LGPR register setting
-#define GRAY   (4)    //�Ҷȵȼ�.
+#define GRAY   (4)    //灰度等级.
 
 //Macro for PWMR register setting
-#define SCR   (0 << 9)   //ʱ��Դѡ��.������.
-#define CC_EN (0 << 8)   //�Աȶȿ���ʹ��,��.
-#define PW   (64)    //���������Ŀ,
+#define SCR   (0 << 9)   //时钟源选择.行脉冲.
+#define CC_EN (0 << 8)   //对比度控制使能,关.
+#define PW   (64)    //输出脉冲数目,
 
 //Macro for DMACR register setting
-#define BL   ((U32)1 << 31)   //�̶�����.
+#define BL   ((U32)1 << 31)   //固定长度.
 #define HM   (7 << 16)
 #define TM   (3)
 
diff --git a/bsp/mini4020/drivers/mii.h b/bsp/mini4020/drivers/mii.h
index 617550bfd9..b58d8bf56f 100644
--- a/bsp/mini4020/drivers/mii.h
+++ b/bsp/mini4020/drivers/mii.h
@@ -1,11 +1,7 @@
 /*
- * File      : mii.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
@@ -25,7 +21,7 @@
 #define MII_EXPANSION       0x06        /* Expansion register          */
 #define MII_CTRL1000        0x09        /* 1000BASE-T control          */
 #define MII_STAT1000        0x0a        /* 1000BASE-T status           */
-#define MII_ESTATUS	    0x0f	/* Extended Status */
+#define MII_ESTATUS     0x0f    /* Extended Status */
 #define MII_DCOUNTER        0x12        /* Disconnect counter          */
 #define MII_FCSCOUNTER      0x13        /* False carrier counter       */
 #define MII_NWAYTEST        0x14        /* N-way auto-neg test reg     */
@@ -40,7 +36,7 @@
 
 /* Basic mode control register. */
 #define BMCR_RESV               0x003f  /* Unused...                   */
-#define BMCR_SPEED1000		0x0040  /* MSB of Speed (1000)         */
+#define BMCR_SPEED1000      0x0040  /* MSB of Speed (1000)         */
 #define BMCR_CTST               0x0080  /* Collision test              */
 #define BMCR_FULLDPLX           0x0100  /* Full duplex                 */
 #define BMCR_ANRESTART          0x0200  /* Auto negotiation restart    */
@@ -59,9 +55,9 @@
 #define BMSR_RFAULT             0x0010  /* Remote fault detected       */
 #define BMSR_ANEGCOMPLETE       0x0020  /* Auto-negotiation complete   */
 #define BMSR_RESV               0x00c0  /* Unused...                   */
-#define BMSR_ESTATEN		0x0100	/* Extended Status in R15 */
-#define BMSR_100FULL2		0x0200	/* Can do 100BASE-T2 HDX */
-#define BMSR_100HALF2		0x0400	/* Can do 100BASE-T2 FDX */
+#define BMSR_ESTATEN        0x0100  /* Extended Status in R15 */
+#define BMSR_100FULL2       0x0200  /* Can do 100BASE-T2 HDX */
+#define BMSR_100HALF2       0x0400  /* Can do 100BASE-T2 FDX */
 #define BMSR_10HALF             0x0800  /* Can do 10mbps, half-duplex  */
 #define BMSR_10FULL             0x1000  /* Can do 10mbps, full-duplex  */
 #define BMSR_100HALF            0x2000  /* Can do 100mbps, half-duplex */
@@ -88,7 +84,7 @@
 #define ADVERTISE_NPAGE         0x8000  /* Next page bit               */
 
 #define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \
-			ADVERTISE_CSMA)
+            ADVERTISE_CSMA)
 #define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \
                        ADVERTISE_100HALF | ADVERTISE_100FULL)
 
@@ -110,8 +106,8 @@
 #define LPA_LPACK               0x4000  /* Link partner acked us       */
 #define LPA_NPAGE               0x8000  /* Next page bit               */
 
-#define LPA_DUPLEX		(LPA_10FULL | LPA_100FULL)
-#define LPA_100			(LPA_100FULL | LPA_100HALF | LPA_100BASE4)
+#define LPA_DUPLEX      (LPA_10FULL | LPA_100FULL)
+#define LPA_100         (LPA_100FULL | LPA_100HALF | LPA_100BASE4)
 
 /* Expansion register for auto-negotiation. */
 #define EXPANSION_NWAY          0x0001  /* Can do N-way auto-nego      */
@@ -121,8 +117,8 @@
 #define EXPANSION_MFAULTS       0x0010  /* Multiple faults detected    */
 #define EXPANSION_RESV          0xffe0  /* Unused...                   */
 
-#define ESTATUS_1000_TFULL	0x2000	/* Can do 1000BT Full */
-#define ESTATUS_1000_THALF	0x1000	/* Can do 1000BT Half */
+#define ESTATUS_1000_TFULL  0x2000  /* Can do 1000BT Full */
+#define ESTATUS_1000_THALF  0x1000  /* Can do 1000BT Half */
 
 /* N-way test register. */
 #define NWAYTEST_RESV1          0x00ff  /* Unused...                   */
diff --git a/bsp/mini4020/drivers/sdcard.c b/bsp/mini4020/drivers/sdcard.c
index 78c1306a0d..52c3b5cd82 100644
--- a/bsp/mini4020/drivers/sdcard.c
+++ b/bsp/mini4020/drivers/sdcard.c
@@ -1,11 +1,7 @@
 /*
- * File      : sdcard.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2007 - 2012, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author      Notes
@@ -62,7 +58,7 @@ static void delay(U32 j)
 
     for (i = 0; i < j; i++)
     {
-    	/* nothing */
+        /* nothing */
     }
 }
 
diff --git a/bsp/mini4020/drivers/sdcard.h b/bsp/mini4020/drivers/sdcard.h
index c8a4acf1a1..6f2db415d0 100644
--- a/bsp/mini4020/drivers/sdcard.h
+++ b/bsp/mini4020/drivers/sdcard.h
@@ -1,11 +1,7 @@
 /*
- * File      : sdcard.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes