diff options
| author | Ming, Bai <[email protected]> | 2013-01-08 22:40:58 +0800 |
|---|---|---|
| committer | Ming, Bai <[email protected]> | 2013-01-08 22:40:58 +0800 |
| commit | b4de7cce57305033e86c3b187271683b609ddb26 (patch) | |
| tree | 5380a19a3f6bced1d04439a94bf1f76fffb3a179 /bsp/mini4020 | |
| parent | f3192c229349119dfd8361a09a52fbab6f99f97e (diff) | |
Re-normalizing the repo
Diffstat (limited to 'bsp/mini4020')
| -rw-r--r-- | bsp/mini4020/SConscript | 24 | ||||
| -rw-r--r-- | bsp/mini4020/SConstruct | 64 | ||||
| -rw-r--r-- | bsp/mini4020/applications/SConscript | 18 | ||||
| -rw-r--r-- | bsp/mini4020/applications/application.c | 260 | ||||
| -rw-r--r-- | bsp/mini4020/applications/startup.c | 246 | ||||
| -rw-r--r-- | bsp/mini4020/drivers/SConscript | 38 | ||||
| -rw-r--r-- | bsp/mini4020/drivers/board.c | 306 | ||||
| -rw-r--r-- | bsp/mini4020/drivers/board.h | 48 | ||||
| -rw-r--r-- | bsp/mini4020/drivers/dm9161.c | 1424 | ||||
| -rw-r--r-- | bsp/mini4020/drivers/dm9161.h | 156 | ||||
| -rw-r--r-- | bsp/mini4020/drivers/lcd.c | 148 | ||||
| -rw-r--r-- | bsp/mini4020/drivers/lcdc.c | 216 | ||||
| -rw-r--r-- | bsp/mini4020/drivers/lcdc.h | 162 | ||||
| -rw-r--r-- | bsp/mini4020/drivers/mii.h | 284 | ||||
| -rw-r--r-- | bsp/mini4020/drivers/sdcard.c | 1568 | ||||
| -rw-r--r-- | bsp/mini4020/drivers/sdcard.h | 122 | ||||
| -rw-r--r-- | bsp/mini4020/rtconfig.h | 396 | ||||
| -rw-r--r-- | bsp/mini4020/rtconfig.py | 168 |
18 files changed, 2824 insertions, 2824 deletions
diff --git a/bsp/mini4020/SConscript b/bsp/mini4020/SConscript index d9c64eb9f9..0992612410 100644 --- a/bsp/mini4020/SConscript +++ b/bsp/mini4020/SConscript @@ -1,12 +1,12 @@ -from building import *
-
-cwd = GetCurrentDir()
-objs = []
-list = os.listdir(cwd)
-
-for d in list:
- path = os.path.join(cwd, d)
- if os.path.isfile(os.path.join(path, 'SConscript')):
- objs = objs + SConscript(os.path.join(d, 'SConscript'))
-
-Return('objs')
+from building import * + +cwd = GetCurrentDir() +objs = [] +list = os.listdir(cwd) + +for d in list: + path = os.path.join(cwd, d) + if os.path.isfile(os.path.join(path, 'SConscript')): + objs = objs + SConscript(os.path.join(d, 'SConscript')) + +Return('objs') diff --git a/bsp/mini4020/SConstruct b/bsp/mini4020/SConstruct index 4d4aa12908..ab4953a152 100644 --- a/bsp/mini4020/SConstruct +++ b/bsp/mini4020/SConstruct @@ -1,32 +1,32 @@ -import os
-import sys
-import rtconfig
-
-if os.getenv('RTT_ROOT'):
- RTT_ROOT = os.getenv('RTT_ROOT')
-else:
- RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
-
-sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
-from building import *
-
-TARGET = 'rtthread-mini4020.' + rtconfig.TARGET_EXT
-
-env = Environment(tools = ['mingw'],
- AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
- CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
- AR = rtconfig.AR, ARFLAGS = '-rc',
- LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
-env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
-
-Export('RTT_ROOT')
-Export('rtconfig')
-
-# prepare building environment
-objs = PrepareBuilding(env, RTT_ROOT)
-
-# build program
-env.Program(TARGET, objs)
-
-# end building
-EndBuilding(TARGET)
+import os +import sys +import rtconfig + +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') +else: + RTT_ROOT = os.path.normpath(os.getcwd() + '/../..') + +sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')] +from building import * + +TARGET = 'rtthread-mini4020.' + rtconfig.TARGET_EXT + +env = Environment(tools = ['mingw'], + AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, + CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS, + AR = rtconfig.AR, ARFLAGS = '-rc', + LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) +env.PrependENVPath('PATH', rtconfig.EXEC_PATH) + +Export('RTT_ROOT') +Export('rtconfig') + +# prepare building environment +objs = PrepareBuilding(env, RTT_ROOT) + +# build program +env.Program(TARGET, objs) + +# end building +EndBuilding(TARGET) diff --git a/bsp/mini4020/applications/SConscript b/bsp/mini4020/applications/SConscript index 4fe38ed0cf..4ccb177207 100644 --- a/bsp/mini4020/applications/SConscript +++ b/bsp/mini4020/applications/SConscript @@ -1,9 +1,9 @@ -from building import *
-
-cwd = GetCurrentDir()
-src = Glob('*.c')
-CPPPATH = [cwd, str(Dir('#'))]
-
-group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
-
-Return('group')
+from building import * + +cwd = GetCurrentDir() +src = Glob('*.c') +CPPPATH = [cwd, str(Dir('#'))] + +group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/mini4020/applications/application.c b/bsp/mini4020/applications/application.c index 84566fddbe..65295e4c47 100644 --- a/bsp/mini4020/applications/application.c +++ b/bsp/mini4020/applications/application.c @@ -1,130 +1,130 @@ -/*
- * File : application.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006 - 2012, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date Author Notes
- * 2007-11-20 Yi.Qiu add rtgui application
- * 2008-6-28 Bernard no rtgui init
- */
-
-/**
- * @addtogroup mini4020
- */
-
-/*@{*/
-
-#include <board.h>
-#include <rtthread.h>
-
-#ifdef RT_USING_DFS
-#include <dfs_init.h>
-#include <dfs_elm.h>
-#include <dfs_fs.h>
-#include <dfs_posix.h>
-#endif
-
-#ifdef RT_USING_RTGUI
-#include <rtgui/rtgui.h>
-extern void radio_rtgui_init(void);
-#endif
-
-#define RT_INIT_THREAD_STACK_SIZE (2*1024)
-
-void rt_init_thread_entry(void *parameter)
-{
- int fd;
- rt_uint32_t sz;
- char buffer[20];
-#ifdef RT_USING_DFS
- dfs_init();
-#ifdef RT_USING_DFS_ELMFAT
- elm_init();
- /* mount sd card fat partition 1 as root directory */
- if (dfs_mount("sd0", "/", "elm", 0, 0) == 0)
- {
- rt_kprintf("File System initialized!\n");
-
- /*Open a file*/
- fd = open("/fattest.txt", O_RDWR|O_CREAT, 0);
- if (fd < 0)
- {
- rt_kprintf("open file for write failed\n");
- return;
- }
-
- sz = write(fd,"Hello RT-Thread!",sizeof("Hello RT-Thread!"));
-
- if (sz != 0)
- {
- rt_kprintf("written %d\n",sz);
- }
- else
- rt_kprintf("haven't written\n");
-
- lseek(fd, 0, SEEK_SET);
-
- sz = read(fd, buffer, sizeof(buffer));
-
- if (sz != 0)
- {
- rt_kprintf("READ %d:",sz);
- while (sz--)
- rt_kprintf("%c",buffer[sz]);//opposite
- rt_kprintf("\n");
- }
- else
- rt_kprintf("haven't read\n");
-
- close(fd);
- }
- else
- rt_kprintf("File System initialzation failed!\n");
-#endif
-#endif
-}
-
-void rt_led_thread_entry(void *parameter)
-{
-/*
- while (1)
- {
- count++;
- *(RP)GPIO_PORTE_DATA |= 0x1<<4;
- rt_thread_delay(RT_TICK_PER_SECOND*2);
-
- *(RP)GPIO_PORTE_DATA &= ~(0x1<<4);
- rt_thread_delay(RT_TICK_PER_SECOND*2);
-
- }
-*/
-}
-
-
-int rt_application_init(void)
-{
- rt_thread_t init_thread;
- rt_thread_t led_thread;
-
- init_thread = rt_thread_create("init",
- rt_init_thread_entry, RT_NULL,
- RT_INIT_THREAD_STACK_SIZE, 8, 20);
- led_thread = rt_thread_create("led",
- rt_led_thread_entry, RT_NULL,
- 512, 200, 20);
-
- if (init_thread != RT_NULL)
- rt_thread_startup(init_thread);
-
- if (led_thread != RT_NULL)
- rt_thread_startup(led_thread);
-
- return 0;
-}
-
-/*@}*/
+/* + * File : application.c + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2006 - 2012, RT-Thread Development Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rt-thread.org/license/LICENSE + * + * Change Logs: + * Date Author Notes + * 2007-11-20 Yi.Qiu add rtgui application + * 2008-6-28 Bernard no rtgui init + */ + +/** + * @addtogroup mini4020 + */ + +/*@{*/ + +#include <board.h> +#include <rtthread.h> + +#ifdef RT_USING_DFS +#include <dfs_init.h> +#include <dfs_elm.h> +#include <dfs_fs.h> +#include <dfs_posix.h> +#endif + +#ifdef RT_USING_RTGUI +#include <rtgui/rtgui.h> +extern void radio_rtgui_init(void); +#endif + +#define RT_INIT_THREAD_STACK_SIZE (2*1024) + +void rt_init_thread_entry(void *parameter) +{ + int fd; + rt_uint32_t sz; + char buffer[20]; +#ifdef RT_USING_DFS + dfs_init(); +#ifdef RT_USING_DFS_ELMFAT + elm_init(); + /* mount sd card fat partition 1 as root directory */ + if (dfs_mount("sd0", "/", "elm", 0, 0) == 0) + { + rt_kprintf("File System initialized!\n"); + + /*Open a file*/ + fd = open("/fattest.txt", O_RDWR|O_CREAT, 0); + if (fd < 0) + { + rt_kprintf("open file for write failed\n"); + return; + } + + sz = write(fd,"Hello RT-Thread!",sizeof("Hello RT-Thread!")); + + if (sz != 0) + { + rt_kprintf("written %d\n",sz); + } + else + rt_kprintf("haven't written\n"); + + lseek(fd, 0, SEEK_SET); + + sz = read(fd, buffer, sizeof(buffer)); + + if (sz != 0) + { + rt_kprintf("READ %d:",sz); + while (sz--) + rt_kprintf("%c",buffer[sz]);//opposite + rt_kprintf("\n"); + } + else + rt_kprintf("haven't read\n"); + + close(fd); + } + else + rt_kprintf("File System initialzation failed!\n"); +#endif +#endif +} + +void rt_led_thread_entry(void *parameter) +{ +/* + while (1) + { + count++; + *(RP)GPIO_PORTE_DATA |= 0x1<<4; + rt_thread_delay(RT_TICK_PER_SECOND*2); + + *(RP)GPIO_PORTE_DATA &= ~(0x1<<4); + rt_thread_delay(RT_TICK_PER_SECOND*2); + + } +*/ +} + + +int rt_application_init(void) +{ + rt_thread_t init_thread; + rt_thread_t led_thread; + + init_thread = rt_thread_create("init", + rt_init_thread_entry, RT_NULL, + RT_INIT_THREAD_STACK_SIZE, 8, 20); + led_thread = rt_thread_create("led", + rt_led_thread_entry, RT_NULL, + 512, 200, 20); + + if (init_thread != RT_NULL) + rt_thread_startup(init_thread); + + if (led_thread != RT_NULL) + rt_thread_startup(led_thread); + + return 0; +} + +/*@}*/ diff --git a/bsp/mini4020/applications/startup.c b/bsp/mini4020/applications/startup.c index 78847e5ac7..852b9dc897 100644 --- a/bsp/mini4020/applications/startup.c +++ b/bsp/mini4020/applications/startup.c @@ -1,123 +1,123 @@ -/*
- * File : application.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date Author Notes
- */
-
-#include <rthw.h>
-#include <rtthread.h>
-
-#include <sep4020.h>
-#include <board.h>
-#include <serial.h>
-#ifdef RT_USING_FINSH
-#include <finsh.h>
-#endif
-
-#ifdef RT_USING_LWIP
-#include <lwip/sys.h>
-#include <netif/ethernetif.h>
-#endif
-
-#define SDRAM_BASE 0x30000000
-
-#ifdef __CC_ARM
-extern int Image$$RW_RAM1$$ZI$$Limit;
-#elif (defined (__GNUC__))
- extern unsigned char __bss_end;
-#endif
-
-extern void rt_application_init(void);
-extern void finsh_system_init(void);
-extern void sd_init(void);
-
-void rtthread_startup()
-{
- /* init hardware interrupt */
- rt_hw_interrupt_init();
-
- /* init board */
- rt_hw_board_init();
-
- /* show version */
- rt_show_version();
-
- /* init tick */
- rt_system_tick_init();
-
- /* init kernel object */
- rt_system_object_init();
-
- /* init timer system */
- rt_system_timer_init();
-
- /* init heap memory system */
-#ifdef __CC_ARM
- rt_system_heap_init((void*)&Image$$RW_RAM1$$ZI$$Limit, (void*)(SDRAM_BASE + 0x200000));
-#else
- rt_system_heap_init(&__bss_end, (void*)0x34000000);
-#endif
-
-
- /* init scheduler system */
- rt_system_scheduler_init();
-
-#ifdef RT_USING_DEVICE
-
-#ifdef RT_USING_DFS
- rt_hw_sdcard_init();
-#endif
-
-#ifdef RT_USING_LWIP
- eth_system_device_init();
- rt_hw_dm9161_init();
-#endif
-
- /*init all registed devices */
- rt_device_init_all();
-#endif
-
- /* init application */
- rt_application_init();
-
-#ifdef RT_USING_FINSH
- /* init finsh */
- finsh_system_init();
-#ifdef RT_USING_DEVICE
- finsh_set_device("uart0");
-#endif
-#endif
-
- /* init idle thread */
- rt_thread_idle_init();
-
- /* start scheduler */
- rt_system_scheduler_start();
-
- /* never reach here */
- return ;
-
-}
-
-int main()
-{
- rt_uint32_t UNUSED level;
-
- /* disable interrupt first */
- level = rt_hw_interrupt_disable();
-
- /* startup RT-Thread RTOS */
- rtthread_startup();
-
- return 0;
-}
-
-
-
+/* + * File : application.c + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rt-thread.org/license/LICENSE + * + * Change Logs: + * Date Author Notes + */ + +#include <rthw.h> +#include <rtthread.h> + +#include <sep4020.h> +#include <board.h> +#include <serial.h> +#ifdef RT_USING_FINSH +#include <finsh.h> +#endif + +#ifdef RT_USING_LWIP +#include <lwip/sys.h> +#include <netif/ethernetif.h> +#endif + +#define SDRAM_BASE 0x30000000 + +#ifdef __CC_ARM +extern int Image$$RW_RAM1$$ZI$$Limit; +#elif (defined (__GNUC__)) + extern unsigned char __bss_end; +#endif + +extern void rt_application_init(void); +extern void finsh_system_init(void); +extern void sd_init(void); + +void rtthread_startup() +{ + /* init hardware interrupt */ + rt_hw_interrupt_init(); + + /* init board */ + rt_hw_board_init(); + + /* show version */ + rt_show_version(); + + /* init tick */ + rt_system_tick_init(); + + /* init kernel object */ + rt_system_object_init(); + + /* init timer system */ + rt_system_timer_init(); + + /* init heap memory system */ +#ifdef __CC_ARM + rt_system_heap_init((void*)&Image$$RW_RAM1$$ZI$$Limit, (void*)(SDRAM_BASE + 0x200000)); +#else + rt_system_heap_init(&__bss_end, (void*)0x34000000); +#endif + + + /* init scheduler system */ + rt_system_scheduler_init(); + +#ifdef RT_USING_DEVICE + +#ifdef RT_USING_DFS + rt_hw_sdcard_init(); +#endif + +#ifdef RT_USING_LWIP + eth_system_device_init(); + rt_hw_dm9161_init(); +#endif + + /*init all registed devices */ + rt_device_init_all(); +#endif + + /* init application */ + rt_application_init(); + +#ifdef RT_USING_FINSH + /* init finsh */ + finsh_system_init(); +#ifdef RT_USING_DEVICE + finsh_set_device("uart0"); +#endif +#endif + + /* init idle thread */ + rt_thread_idle_init(); + + /* start scheduler */ + rt_system_scheduler_start(); + + /* never reach here */ + return ; + +} + +int main() +{ + rt_uint32_t UNUSED level; + + /* disable interrupt first */ + level = rt_hw_interrupt_disable(); + + /* startup RT-Thread RTOS */ + rtthread_startup(); + + return 0; +} + + + diff --git a/bsp/mini4020/drivers/SConscript b/bsp/mini4020/drivers/SConscript index d1d37750bc..b9eed3f700 100644 --- a/bsp/mini4020/drivers/SConscript +++ b/bsp/mini4020/drivers/SConscript @@ -1,19 +1,19 @@ -from building import *
-
-cwd = GetCurrentDir()
-src = Glob('*.c')
-
-# remove no need file.
-if GetDepend('RT_USING_LWIP') == False:
- SrcRemove(src, 'dm9161.c')
-if GetDepend('RT_USING_DFS') == False:
- SrcRemove(src, 'sdcard.c')
-if GetDepend('RT_USING_RTGUI') == False:
- SrcRemove(src, 'lcd.c')
- SrcRemove(src, 'lcdc.c')
-
-CPPPATH = [cwd]
-
-group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
-
-Return('group')
+from building import * + +cwd = GetCurrentDir() +src = Glob('*.c') + +# remove no need file. +if GetDepend('RT_USING_LWIP') == False: + SrcRemove(src, 'dm9161.c') +if GetDepend('RT_USING_DFS') == False: + SrcRemove(src, 'sdcard.c') +if GetDepend('RT_USING_RTGUI') == False: + SrcRemove(src, 'lcd.c') + SrcRemove(src, 'lcdc.c') + +CPPPATH = [cwd] + +group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/mini4020/drivers/board.c b/bsp/mini4020/drivers/board.c index 1e379378be..b8341b8054 100644 --- a/bsp/mini4020/drivers/board.c +++ b/bsp/mini4020/drivers/board.c @@ -1,71 +1,71 @@ -/*
- * File : board.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006 - 2012 RT-Thread Develop Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://openlab.rt-thread.com/license/LICENSE
- *
- * Change Logs:
- * Date Author Notes
- * 2009-05-16 Bernard first implementation
- * 2010-10-5 Wangmeng sep4020 implementation
- */
-
-#include <rthw.h>
-#include <rtthread.h>
-
-#include <sep4020.h>
-#include <serial.h>
-
-void rt_hw_serial_putc(const char c);
-
-#define UART0 ((struct uartport *)UART0_BASE)
-struct rt_device uart0_device;
-struct serial_int_rx uart0_int_rx;
-struct serial_device uart0 =
-{
- UART0,
- &uart0_int_rx,
- RT_NULL
-};
-
-/**
- * This function will handle rtos timer
- */
-void rt_timer_handler(int vector)
-{
- rt_uint32_t clear_int;
- rt_tick_increase();
-
- /*Clear timer interrupt*/
- clear_int = *(RP)TIMER_T1ISCR;
- *(RP)TIMER_T1ISCR=clear_int;
-}
-
-/**
- * This function will handle serial
- */
-void rt_serial_handler(int vector)
-{
- //rt_kprintf("in rt_serial_handler\n");
- rt_int32_t stat = *(RP)UART0_IIR ;
- UNUSED char c;
-
- /*Received data*/
- if (((stat & 0x0E) >> 1) == 0x02)
- {
- rt_hw_serial_isr(&uart0_device);
- }
- else
- {
- /*clear the timeout interrupt*/
- while (uart0.uart_device->lsr & USTAT_RCV_READY)
- c = uart0.uart_device->dlbl_fifo.rxfifo;
- }
-}
-
+/* + * File : board.c + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2006 - 2012 RT-Thread Develop Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://openlab.rt-thread.com/license/LICENSE + * + * Change Logs: + * Date Author Notes + * 2009-05-16 Bernard first implementation + * 2010-10-5 Wangmeng sep4020 implementation + */ + +#include <rthw.h> +#include <rtthread.h> + +#include <sep4020.h> +#include <serial.h> + +void rt_hw_serial_putc(const char c); + +#define UART0 ((struct uartport *)UART0_BASE) +struct rt_device uart0_device; +struct serial_int_rx uart0_int_rx; +struct serial_device uart0 = +{ + UART0, + &uart0_int_rx, + RT_NULL +}; + +/** + * This function will handle rtos timer + */ +void rt_timer_handler(int vector) +{ + rt_uint32_t clear_int; + rt_tick_increase(); + + /*Clear timer interrupt*/ + clear_int = *(RP)TIMER_T1ISCR; + *(RP)TIMER_T1ISCR=clear_int; +} + +/** + * This function will handle serial + */ +void rt_serial_handler(int vector) +{ + //rt_kprintf("in rt_serial_handler\n"); + rt_int32_t stat = *(RP)UART0_IIR ; + UNUSED char c; + + /*Received data*/ + if (((stat & 0x0E) >> 1) == 0x02) + { + rt_hw_serial_isr(&uart0_device); + } + else + { + /*clear the timeout interrupt*/ + while (uart0.uart_device->lsr & USTAT_RCV_READY) + c = uart0.uart_device->dlbl_fifo.rxfifo; + } +} + /** * This function will init led on the board */ @@ -77,88 +77,88 @@ static void rt_hw_board_led_init(void) *(RP)GPIO_PORTE_DIR &= ~0x38; /* output*/ *(RP)GPIO_PORTE_DATA &= ~0x38; /* low */ -}
-/**
- * This function will init timer4 for system ticks
- */
- void rt_hw_timer_init(void)
-{
- /*Set timer1*/
- *(RP)TIMER_T1LCR = 880000;
- *(RP)TIMER_T1CR = 0x06;
-
- rt_hw_interrupt_install(INTSRC_TIMER1, rt_timer_handler, RT_NULL);
- rt_hw_interrupt_umask(INTSRC_TIMER1);
-
- /*Enable timer1*/
- *(RP)TIMER_T1CR |= 0x01;
-}
-
-/**
- * This function will handle init uart
- */
-void rt_hw_uart_init(void)
-{
- const rt_int32_t sysclk = 72000000;
-
- /*Set data bit:8*/
- *(RP)(UART0_LCR) = 0x83;
- /*Set baud rate high*/
- *(RP)(UART0_DLBH) = (sysclk/16/115200) >> 8;
- /*Set baud rate low*/
- *(RP)(UART0_DLBL) = (sysclk/16/115200) & 0xff;
-
- *(RP)(UART0_LCR) = 0x83&(~(0x1 << 7));
-
- /*Set trigger level*/
- *(RP)(UART0_FCR) = 0x0;
- *(RP)(UART0_IER) = 0x0;
-
- /*Enable rx interrupt*/
- *(RP)(UART0_IER) |= 0x01;
- /*Disable tx interrupt*/
- *(RP)(UART0_IER) &= ~(0x1<<1);
-
- rt_hw_interrupt_install(INTSRC_UART0, rt_serial_handler, RT_NULL);
- rt_hw_interrupt_umask(INTSRC_UART0);
- /* register uart0 */
- rt_hw_serial_register(&uart0_device, "uart0",
- RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
- &uart0);
-}
-
-void rt_hw_board_init(void)
-{
- /* initialize uart */
- rt_hw_uart_init();
-// rt_hw_board_led_init();
- rt_hw_timer_init();
-}
-
-/* write one character to serial, must not trigger interrupt */
-void rt_hw_serial_putc(const char c)
-{
- /*
- to be polite with serial console add a line feed
- to the carriage return character
- */
- if (c=='\n')
- rt_hw_serial_putc('\r');
-
- while (!((*(RP)UART0_LSR) & 0x40));
-
- *(RP)(UART0_BASE) = c;
-}
-
-/**
- * This function is used by rt_kprintf to display a string on console.
- *
- * @param str the displayed string
- */
-void rt_hw_console_output(const char *str)
-{
- while (*str)
- {
- rt_hw_serial_putc(*str++);
- }
-}
+} +/** + * This function will init timer4 for system ticks + */ + void rt_hw_timer_init(void) +{ + /*Set timer1*/ + *(RP)TIMER_T1LCR = 880000; + *(RP)TIMER_T1CR = 0x06; + + rt_hw_interrupt_install(INTSRC_TIMER1, rt_timer_handler, RT_NULL); + rt_hw_interrupt_umask(INTSRC_TIMER1); + + /*Enable timer1*/ + *(RP)TIMER_T1CR |= 0x01; +} + +/** + * This function will handle init uart + */ +void rt_hw_uart_init(void) +{ + const rt_int32_t sysclk = 72000000; + + /*Set data bit:8*/ + *(RP)(UART0_LCR) = 0x83; + /*Set baud rate high*/ + *(RP)(UART0_DLBH) = (sysclk/16/115200) >> 8; + /*Set baud rate low*/ + *(RP)(UART0_DLBL) = (sysclk/16/115200) & 0xff; + + *(RP)(UART0_LCR) = 0x83&(~(0x1 << 7)); + + /*Set trigger level*/ + *(RP)(UART0_FCR) = 0x0; + *(RP)(UART0_IER) = 0x0; + + /*Enable rx interrupt*/ + *(RP)(UART0_IER) |= 0x01; + /*Disable tx interrupt*/ + *(RP)(UART0_IER) &= ~(0x1<<1); + + rt_hw_interrupt_install(INTSRC_UART0, rt_serial_handler, RT_NULL); + rt_hw_interrupt_umask(INTSRC_UART0); + /* register uart0 */ + rt_hw_serial_register(&uart0_device, "uart0", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, + &uart0); +} + +void rt_hw_board_init(void) +{ + /* initialize uart */ + rt_hw_uart_init(); +// rt_hw_board_led_init(); + rt_hw_timer_init(); +} + +/* write one character to serial, must not trigger interrupt */ +void rt_hw_serial_putc(const char c) +{ + /* + to be polite with serial console add a line feed + to the carriage return character + */ + if (c=='\n') + rt_hw_serial_putc('\r'); + + while (!((*(RP)UART0_LSR) & 0x40)); + + *(RP)(UART0_BASE) = c; +} + +/** + * This function is used by rt_kprintf to display a string on console. + * + * @param str the displayed string + */ +void rt_hw_console_output(const char *str) +{ + while (*str) + { + rt_hw_serial_putc(*str++); + } +} diff --git a/bsp/mini4020/drivers/board.h b/bsp/mini4020/drivers/board.h index 062de56669..fd794a8a7c 100644 --- a/bsp/mini4020/drivers/board.h +++ b/bsp/mini4020/drivers/board.h @@ -1,24 +1,24 @@ -/*
- * File : board.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date Author Notes
- * 2006-10-08 Bernard add board.h to this bsp
- * 2010-10-5 Wangmeng sep4020 implemention
- */
-
-#ifndef __BOARD_H__
-#define __BOARD_H__
-
-#include <sep4020.h>
-
-void rt_hw_board_init(void);
-void rt_hw_sdcard_init(void);
-
-#endif
+/* + * File : board.h + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rt-thread.org/license/LICENSE + * + * Change Logs: + * Date Author Notes + * 2006-10-08 Bernard add board.h to this bsp + * 2010-10-5 Wangmeng sep4020 implemention + */ + +#ifndef __BOARD_H__ +#define __BOARD_H__ + +#include <sep4020.h> + +void rt_hw_board_init(void); +void rt_hw_sdcard_init(void); + +#endif diff --git a/bsp/mini4020/drivers/dm9161.c b/bsp/mini4020/drivers/dm9161.c index 2eeb40ebc2..ea8294575d 100644 --- a/bsp/mini4020/drivers/dm9161.c +++ b/bsp/mini4020/drivers/dm9161.c @@ -1,712 +1,712 @@ -/*
- * File : dm9161.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date Author Notes
- */
-
-#include <rtthread.h>
-#include <netif/ethernetif.h>
-
-#include "dm9161.h"
-#include <sep4020.h>
-#include "mii.h"
-
-#define SPEED_10 10
-#define SPEED_100 100
-#define SPEED_1000 1000
-/* Duplex, half or full. */
-#define DUPLEX_HALF 0x00
-#define DUPLEX_FULL 0x01
-
-/*
- * Davicom dm9161EP driver
- *
- * IRQ_LAN connects to EINT7(GPF7)
- * nLAN_CS connects to nGCS4
- */
-
-/* #define dm9161_DEBUG 1 */
-#if DM9161_DEBUG
-#define DM9161_TRACE rt_kprintf
-#else
-#define DM9161_TRACE(...)
-#endif
-
-/*
- * dm9161 interrupt line is connected to PF7
- */
-//--------------------------------------------------------
-
-#define DM9161_PHY 0x40 /* PHY address 0x01 */
-
-#define MAX_ADDR_LEN 6
-enum DM9161_PHY_mode
-{
- DM9161_10MHD = 0, DM9161_100MHD = 1,
- DM9161_10MFD = 4, DM9161_100MFD = 5,
- DM9161_AUTO = 8, DM9161_1M_HPNA = 0x10
-};
-
-enum DM9161_TYPE
-{
- TYPE_DM9161,
-};
-
-struct rt_dm9161_eth
-{
- /* inherit from ethernet device */
- struct eth_device parent;
-
- enum DM9161_TYPE type;
- enum DM9161_PHY_mode mode;
-
- rt_uint8_t imr_all;
- rt_uint8_t phy_addr;
-
- rt_uint32_t tx_index;
-
- rt_uint8_t packet_cnt; /* packet I or II */
- rt_uint16_t queue_packet_len; /* queued packet (packet II) */
-
- /* interface address info. */
- rt_uint8_t dev_addr[MAX_ADDR_LEN]; /* hw address */
-};
-static struct rt_dm9161_eth dm9161_device;
-static struct rt_semaphore sem_ack, sem_lock;
-
-void rt_dm9161_isr(int irqno);
-
-static void udelay(unsigned long ns)
-{
- unsigned long i;
-
- while (ns--)
- {
- i = 100;
- while (i--);
- }
-}
-
-static __inline unsigned long sep_emac_read(unsigned int reg)
-{
- void __iomem *emac_base = (void __iomem *)reg;
-
- return read_reg(emac_base);
-}
-
-/*
-* Write to a EMAC register.
-*/
-static __inline void sep_emac_write(unsigned int reg, unsigned long value)
-{
- void __iomem *emac_base = (void __iomem *)reg;
-
- write_reg(emac_base,value);
-}
-
-
-/* ........................... PHY INTERFACE ........................... */
-/* CAN DO MAC CONFIGRATION
-* Enable the MDIO bit in MAC control register
-* When not called from an interrupt-handler, access to the PHY must be
-* protected by a spinlock.
-*/
-static void enable_mdi(void) //need think more
-{
- unsigned long ctl;
-
- ctl = sep_emac_read(MAC_CTRL);
- sep_emac_write(MAC_CTRL, ctl&(~0x3)); /* enable management port */
-
- return;
-}
-
-/* CANNOT DO MAC CONFIGRATION
-* Disable the MDIO bit in the MAC control register
-*/
-static void disable_mdi(void)
-{
- unsigned long ctl;
-
- ctl = sep_emac_read(MAC_CTRL);
- sep_emac_write(MAC_CTRL, ctl|(0x3)); /* disable management port */
-
- return;
-}
-
-/*
-* Wait until the PHY operation is complete.
-*/
-static __inline void sep_phy_wait(void)
-{
- unsigned long timeout = 2;
-
- while ((sep_emac_read(MAC_MII_STATUS) & 0x2))
- {
- timeout--;
- if (!timeout)
- {
- EOUT("sep_ether: MDIO timeout\n");
- break;
- }
- }
-
- return;
-}
-
-/*
-* Write value to the a PHY register
-* Note: MDI interface is assumed to already have been enabled.
-*/
-static void write_phy(unsigned char phy_addr, unsigned char address, unsigned int value)
-{
- unsigned short mii_txdata;
-
- mii_txdata = value;
- sep_emac_write(MAC_MII_ADDRESS,(unsigned long)(address<<8) | phy_addr);
- sep_emac_write(MAC_MII_TXDATA ,mii_txdata);
- sep_emac_write(MAC_MII_CMD ,0x4);
- udelay(40);
-
- sep_phy_wait();
-
- return;
-}
-
-/*
-* Read value stored in a PHY register.
-* Note: MDI interface is assumed to already have been enabled.
-*/
-static void read_phy(unsigned char phy_addr, unsigned char address, unsigned int *value)
-{
- unsigned short mii_rxdata;
-// unsigned long mii_status;
-
- sep_emac_write(MAC_MII_ADDRESS,(unsigned long)(address<<8) | phy_addr);
- sep_emac_write(MAC_MII_CMD ,0x2);
- udelay(40);
- sep_phy_wait();
-
- mii_rxdata = sep_emac_read(MAC_MII_RXDATA);
- *value = mii_rxdata;
-
- return;
-}
-
-/* interrupt service routine */
-void rt_dm9161_isr(int irqno)
-{
- unsigned long intstatus;
- rt_uint32_t address;
-
- mask_irq(INTSRC_MAC);
- intstatus = sep_emac_read(MAC_INTSRC);
-
- sep_emac_write(MAC_INTSRC,intstatus);
-
- /*Receive complete*/
- if(intstatus & 0x04)
- {
- eth_device_ready(&(dm9161_device.parent));
- }
- /*Receive error*/
- else if(intstatus & 0x08)
- {
- rt_kprintf("Receive error\n");
- }
- /*Transmit complete*/
- else if(intstatus & 0x03)
- {
- if(dm9161_device.tx_index == 0)
- address = (MAC_TX_BD +(MAX_TX_DESCR-2)*8);
- else if(dm9161_device.tx_index == 1)
- address = (MAC_TX_BD +(MAX_TX_DESCR-1)*8);
- else
- address = (MAC_TX_BD + dm9161_device.tx_index*8-16);
- //printk("free tx skb 0x%x in inter!!\n",lp->txBuffIndex);
- sep_emac_write(address,0x0);
- }
- else if (intstatus & 0x10)
- {
- rt_kprintf("ROVER ERROR\n");
- }
-
- while(intstatus)
- {
- sep_emac_write(MAC_INTSRC,intstatus);
- intstatus = sep_emac_read(MAC_INTSRC);
- }
-
- unmask_irq(INTSRC_MAC);
-}
-
-static rt_err_t update_mac_address()
-{
- rt_uint32_t lo,hi;
- hi = sep_emac_read(MAC_ADDR1);
- lo = sep_emac_read(MAC_ADDR0);
- DBOUT("Before MAC: hi=%x lo=%x\n",hi,lo);
-
- sep_emac_write(MAC_ADDR0,(dm9161_device.dev_addr[2] << 24) | (dm9161_device.dev_addr[3] << 16) | (dm9161_device.dev_addr[4] << 8) | (dm9161_device.dev_addr[5]));
- sep_emac_write(MAC_ADDR1,dm9161_device.dev_addr[1]|(dm9161_device.dev_addr[0]<<8));
-
- hi = sep_emac_read(MAC_ADDR1);
- lo = sep_emac_read(MAC_ADDR0);
- DBOUT("After MAC: hi=%x lo=%x\n",hi,lo);
-
- return RT_EOK;
-}
-
-static int mii_link_ok(unsigned long phy_id)
-{
- /* first, a dummy read, needed to latch some MII phys */
- unsigned int value;
-
- read_phy(phy_id, MII_BMSR,&value);
- if (value & BMSR_LSTATUS)
- return 1;
-
- return 0;
-}
-
-static void update_link_speed(unsigned short phy_addr)
-{
- unsigned int bmsr, bmcr, lpa, mac_cfg;
- unsigned int speed, duplex;
-
- if (!mii_link_ok(phy_addr))
- {
- EOUT("Link Down\n");
- //goto result;
- }
-
- read_phy(phy_addr,MII_BMSR,&bmsr);
- read_phy(phy_addr,MII_BMCR,&bmcr);
-
- if (bmcr & BMCR_ANENABLE) /* AutoNegotiation is enabled */
- {
- if (!(bmsr & BMSR_ANEGCOMPLETE)) /* Do nothing - another interrupt generated when negotiation complete */
- goto result;
-
- read_phy(phy_addr, MII_LPA, &lpa);
-
- if ((lpa & LPA_100FULL) || (lpa & LPA_100HALF))
- speed = SPEED_100;
- else
- speed = SPEED_10;
-
- if ((lpa & LPA_100FULL) || (lpa & LPA_10FULL))
- duplex = DUPLEX_FULL;
- else
- duplex = DUPLEX_HALF;
- }
- else
- {
- speed = (bmcr & BMCR_SPEED100) ? SPEED_100 : SPEED_10;
- duplex = (bmcr & BMCR_FULLDPLX) ? DUPLEX_FULL : DUPLEX_HALF;
- }
-
- /* Update the MAC */
- mac_cfg = sep_emac_read(MAC_CTRL);
- if (speed == SPEED_100)
- {
- mac_cfg |= 0x800; /* set speed 100 M */
- //bmcr &=(~0x2000);
- //write_phy(lp->phy_address, MII_BMCR, bmcr); //��dm9161���ٶ���Ϊ10M
- if (duplex == DUPLEX_FULL) /* 100 Full Duplex */
- mac_cfg |= 0x400;
- else /* 100 Half Duplex */
- mac_cfg &= (~0x400);
- }
- else
- {
- mac_cfg &= (~0x800); /* set speed 10 M */
-
- if (duplex == DUPLEX_FULL) /* 10 Full Duplex */
- mac_cfg |= 0x400;
- else /* 10 Half Duplex */
- mac_cfg &= (~0x400);
- }
-
- sep_emac_write(MAC_CTRL, mac_cfg);
- rt_kprintf("Link now %i M-%s\n", speed, (duplex == DUPLEX_FULL) ? "FullDuplex" : "HalfDuplex");
-
-result:
- mac_cfg = sep_emac_read(MAC_CTRL);
- DBOUT("After mac_cfg=%d\n",mac_cfg);
-
- return;
-}
-
-static rt_err_t rt_dm9161_open(rt_device_t dev, rt_uint16_t oflag);
-/* RT-Thread Device Interface */
-/* initialize the interface */
-static rt_err_t rt_dm9161_init(rt_device_t dev)
-{
- unsigned int phyid1, phyid2;
- int detected = -1;
- unsigned long phy_id;
- unsigned short phy_address = 0;
-
- while ((detected != 0) && (phy_address < 32))
- {
- /* Read the PHY ID registers */
- enable_mdi();
- read_phy(phy_address, MII_PHYSID1, &phyid1);
- read_phy(phy_address, MII_PHYSID2, &phyid2);
-
- disable_mdi();
-
- phy_id = (phyid1 << 16) | (phyid2 & 0xfff0);
- switch (phy_id)
- {
- case MII_DM9161_ID: /* Davicom 9161: PHY_ID1 = 0x181, PHY_ID2 = B881 */
- case MII_DM9161A_ID: /* Davicom 9161A: PHY_ID1 = 0x181, PHY_ID2 = B8A0 */
- case MII_RTL8201_ID: /* Realtek RTL8201: PHY_ID1 = 0, PHY_ID2 = 0x8201 */
- case MII_BCM5221_ID: /* Broadcom BCM5221: PHY_ID1 = 0x40, PHY_ID2 = 0x61e0 */
- case MII_DP83847_ID: /* National Semiconductor DP83847: */
- case MII_AC101L_ID: /* Altima AC101L: PHY_ID1 = 0x22, PHY_ID2 = 0x5520 */
- case MII_KS8721_ID: /* Micrel KS8721: PHY_ID1 = 0x22, PHY_ID2 = 0x1610 */
- {
- enable_mdi();
- #warning SHOULD SET MAC ADDR
- //get_mac_address(dev); /* Get ethernet address and store it in dev->dev_addr */
- update_mac_address(); /* Program ethernet address into MAC */
-
- //�ù�ϣ�Ĵ����Ƚϵ�ǰȺ����ַ��ȫ˫��������CRCУ�飬������֡�������
- sep_emac_write(MAC_CTRL, 0xa413);
- #warning SHOULD DETERMIN LINK SPEED
- update_link_speed(phy_address);
- dm9161_device.phy_addr = phy_address;
- disable_mdi();
- break;
- }
-
- }
-
- phy_address++;
- }
-
- rt_dm9161_open(dev,0);
-
- return RT_EOK;
-}
-
-/* ................................ MAC ................................ */
-
-/*
- * Initialize and start the Receiver and Transmit subsystems
- */
-static void sepether_start(void)
-{
- int i;
- unsigned int tempaddr;
-
- sep_emac_write(MAC_TXBD_NUM,MAX_TX_DESCR);
-
- //��ʼ�����ͺͽ���������
- for (i = 0; i < MAX_TX_DESCR; i++)
- {
- tempaddr=(MAC_TX_BD+i*8);
- sep_emac_write(tempaddr,0);
- tempaddr=(MAC_TX_BD+i*8+4);
- sep_emac_write(tempaddr,0);
- }
- for (i = 0; i < MAX_RX_DESCR; i++)
- {
- tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8);
- sep_emac_write(tempaddr,0);
- tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8+4);
- sep_emac_write(tempaddr,0);
- }
-
- for (i = 0; i < MAX_RX_DESCR; i++)
- {
- tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8);
- sep_emac_write(tempaddr,0xc000);
- tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8+4);
- sep_emac_write(tempaddr,ESRAM_BASE+ MAX_TX_DESCR*0x600+i*0x600);
- }
-
- /* Set the Wrap bit on the last descriptor */
- tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8-8);
- sep_emac_write(tempaddr,0xe000);
-
- for (i = 0; i < MAX_TX_DESCR; i++)
- {
- tempaddr=(MAC_TX_BD+i*8);
- sep_emac_write(tempaddr,0x0);
- tempaddr=(MAC_TX_BD+i*8+4);
- sep_emac_write(tempaddr,ESRAM_BASE+i*0x600);
- }
-
- return;
-}
-
-static rt_err_t rt_dm9161_open(rt_device_t dev, rt_uint16_t oflag)
-{
- unsigned int dsintr;
-
- enable_mdi();
- mask_irq(28);
-
- sep_emac_write(MAC_INTMASK,0x0); //���������ж�
-
- sepether_start();
-
- /* Enable PHY interrupt */
- *(volatile unsigned long*)GPIO_PORTA_DIR |= 0x0080 ; //1 stands for in
- *(volatile unsigned long*)GPIO_PORTA_SEL |= 0x0080 ; //for common use
- *(volatile unsigned long*)GPIO_PORTA_INCTL |= 0x0080; //�ж����뷽ʽ
- *(volatile unsigned long*)GPIO_PORTA_INTRCTL |= (0x3UL<<14); //�ж�����Ϊ�͵�ƽ�ⷢ
- *(volatile unsigned long*)GPIO_PORTA_INTRCLR |= 0x0080; //����ж�
- *(volatile unsigned long*)GPIO_PORTA_INTRCLR = 0x0000; //����ж�
-
- rt_hw_interrupt_install(INTSRC_MAC, rt_dm9161_isr, RT_NULL);
- enable_irq(INTSRC_EXINT7);
-
-
- read_phy(dm9161_device.phy_addr, MII_DSINTR_REG, &dsintr);
- dsintr = dsintr & ~0xf00; /* clear bits 8..11 */
- write_phy(dm9161_device.phy_addr, MII_DSINTR_REG, dsintr);
-
- update_link_speed(dm9161_device.phy_addr);
-
-
- /************************************************************************************/
- /* Enable MAC interrupts */
- sep_emac_write(MAC_INTMASK,0xff); //open�ж�
- sep_emac_write(MAC_INTSRC,0xff); //clear all mac irq
- unmask_irq(28);
- disable_mdi();
-
- rt_kprintf("SEP4020 ethernet interface open!\n\r");
-
- return RT_EOK;
-}
-
-static rt_err_t rt_dm9161_close(rt_device_t dev)
-{
- rt_kprintf("SEP4020 ethernet interface close!\n\r");
-
- /* Disable Receiver and Transmitter */
- disable_mdi();
- #warning disable ether;
-
-// INT_ENABLE(28);
- /* Disable PHY interrupt */
-// disable_phyirq(dev);
-
- /* Disable MAC interrupts */
- sep_emac_write(MAC_INTMASK,0); //�����ж�
-
-// INT_DISABLE(28);
-
- return RT_EOK;
-}
-
-static rt_size_t rt_dm9161_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
-{
- rt_set_errno(-RT_ENOSYS);
-
- return 0;
-}
-
-static rt_size_t rt_dm9161_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
-{
- rt_set_errno(-RT_ENOSYS);
-
- return 0;
-}
-
-static rt_err_t rt_dm9161_control(rt_device_t dev, rt_uint8_t cmd, void *args)
-{
- return RT_EOK;
-}
-
-/* ethernet device interface */
-/* transmit packet. */
-rt_err_t rt_dm9161_tx( rt_device_t dev, struct pbuf* p)
-{
- rt_uint8_t i;
- rt_uint32_t length = 0;
- struct pbuf *q;
- unsigned long address;
- unsigned long tmp_tx_bd;
-
- /* lock DM9000 device */
-// rt_sem_take(&sem_lock, RT_WAITING_FOREVER);
-
- /* disable dm9000a interrupt */
- #warning SHOULD DISABLE INTEERUPT?
-
- /*Search for available BD*/
- for (i = 0;i<MAX_TX_DESCR;)
- {
- address = MAC_TX_BD + i*8;
- tmp_tx_bd = sep_emac_read(address);
- if (!(tmp_tx_bd & 0x8000))
- {
- if (i == (MAX_TX_DESCR-1))
- i = 0;
- else
- i = i+1;
- break;
- }
- if (i == MAX_TX_DESCR-1)
- i = 0;
- else
- i++;
- }
-
- q = p;
- while (q)
- {
- rt_memcpy((u8_t*)(ESRAM_BASE + i*0x600 + length),(u8_t*)q->payload,q->len);
- length += q->len;
- q = q->next;
- }
-
- #warning SHOULD NOTICE IT'S LENGTH
-
- length = length << 16;
-
- if (i == MAX_TX_DESCR - 1)
- length |= 0xb800;
- else
- length |= 0x9800;
-
- address = (MAC_TX_BD + i*8);
- dm9161_device.tx_index = i;
- sep_emac_write(address,length);
-
- //wait for tranfer complete
- while(!(sep_emac_read(address)&0x8000));
-
- /* unlock DM9000 device */
-// rt_sem_release(&sem_lock);
-
- /* wait ack */
-// rt_sem_take(&sem_ack, RT_WAITING_FOREVER);
-
- return RT_EOK;
-}
-
-/* reception packet. */
-struct pbuf *rt_dm9161_rx(rt_device_t dev)
-{
- unsigned int temp_rx_bd,address;
- rt_uint32_t i = 0;
- rt_uint32_t length;
- unsigned char *p_recv;
- struct pbuf* p = RT_NULL;
-
- /* lock DM9000 device */
- rt_sem_take(&sem_lock, RT_WAITING_FOREVER);
-
- while (1)
- {
-
- address = MAC_TX_BD + (MAX_TX_DESCR + i) * 8;
- temp_rx_bd = sep_emac_read(address);
-
- if (!(temp_rx_bd & 0x8000))
- {
- length = temp_rx_bd;
- length = length >> 16;
-
- p_recv = (unsigned char *)(ESRAM_BASE + (MAX_TX_DESCR + i) * 0x600);
- p = pbuf_alloc(PBUF_LINK,length,PBUF_RAM);
- if (p != RT_NULL)
- {
- struct pbuf *q;
- rt_int32_t len;
-
- for (q = p; q != RT_NULL; q = q->next)
- {
- rt_memcpy((rt_uint8_t *)(q->payload),p_recv,q->len);
- }
- }
- else
- {
- rt_kprintf("Droping %d packet \n",length);
- }
-
- if(i == (MAX_RX_DESCR-1))
- {
- sep_emac_write(address,0xe000);
- i = 0;
- }
- else
- {
- sep_emac_write(address,0xc000);
- i++;
- }
- }
- else
- break;
- }
-
- rt_sem_release(&sem_lock);
-
- return p;
-}
-
-void rt_hw_dm9161_init()
-{
- rt_sem_init(&sem_ack, "tx_ack", 1, RT_IPC_FLAG_FIFO);
- rt_sem_init(&sem_lock, "eth_lock", 1, RT_IPC_FLAG_FIFO);
-
- dm9161_device.type = TYPE_DM9161;
- dm9161_device.mode = DM9161_AUTO;
- dm9161_device.packet_cnt = 0;
- dm9161_device.queue_packet_len = 0;
-
- /*
- * SRAM Tx/Rx pointer automatically return to start address,
- * Packet Transmitted, Packet Received
- */
- #warning NOTICE:
- //dm9161_device.imr_all = IMR_PAR | IMR_PTM | IMR_PRM;
-
- dm9161_device.dev_addr[0] = 0x01;
- dm9161_device.dev_addr[1] = 0x60;
- dm9161_device.dev_addr[2] = 0x6E;
- dm9161_device.dev_addr[3] = 0x11;
- dm9161_device.dev_addr[4] = 0x02;
- dm9161_device.dev_addr[5] = 0x0F;
-
- dm9161_device.parent.parent.init = rt_dm9161_init;
- dm9161_device.parent.parent.open = rt_dm9161_open;
- dm9161_device.parent.parent.close = rt_dm9161_close;
- dm9161_device.parent.parent.read = rt_dm9161_read;
- dm9161_device.parent.parent.write = rt_dm9161_write;
- dm9161_device.parent.parent.control = rt_dm9161_control;
- dm9161_device.parent.parent.user_data = RT_NULL;
-
- dm9161_device.parent.eth_rx = rt_dm9161_rx;
- dm9161_device.parent.eth_tx = rt_dm9161_tx;
-
- eth_device_init(&(dm9161_device.parent), "e0");
-
- /* instal interrupt */
- #warning TODO
- //rt_hw_interrupt_install(INTEINT4_7, rt_dm9161_isr, RT_NULL);
- //rt_hw_interrupt_umask(INTEINT4_7);
-}
-
-void dm9161a(void)
-{
-}
-
-#ifdef RT_USING_FINSH
-#include <finsh.h>
-FINSH_FUNCTION_EXPORT(dm9161a, dm9161a register dump);
-#endif
+/* + * File : dm9161.c + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rt-thread.org/license/LICENSE + * + * Change Logs: + * Date Author Notes + */ + +#include <rtthread.h> +#include <netif/ethernetif.h> + +#include "dm9161.h" +#include <sep4020.h> +#include "mii.h" + +#define SPEED_10 10 +#define SPEED_100 100 +#define SPEED_1000 1000 +/* Duplex, half or full. */ +#define DUPLEX_HALF 0x00 +#define DUPLEX_FULL 0x01 + +/* + * Davicom dm9161EP driver + * + * IRQ_LAN connects to EINT7(GPF7) + * nLAN_CS connects to nGCS4 + */ + +/* #define dm9161_DEBUG 1 */ +#if DM9161_DEBUG +#define DM9161_TRACE rt_kprintf +#else +#define DM9161_TRACE(...) +#endif + +/* + * dm9161 interrupt line is connected to PF7 + */ +//-------------------------------------------------------- + +#define DM9161_PHY 0x40 /* PHY address 0x01 */ + +#define MAX_ADDR_LEN 6 +enum DM9161_PHY_mode +{ + DM9161_10MHD = 0, DM9161_100MHD = 1, + DM9161_10MFD = 4, DM9161_100MFD = 5, + DM9161_AUTO = 8, DM9161_1M_HPNA = 0x10 +}; + +enum DM9161_TYPE +{ + TYPE_DM9161, +}; + +struct rt_dm9161_eth +{ + /* inherit from ethernet device */ + struct eth_device parent; + + enum DM9161_TYPE type; + enum DM9161_PHY_mode mode; + + rt_uint8_t imr_all; + rt_uint8_t phy_addr; + + rt_uint32_t tx_index; + + rt_uint8_t packet_cnt; /* packet I or II */ + rt_uint16_t queue_packet_len; /* queued packet (packet II) */ + + /* interface address info. */ + rt_uint8_t dev_addr[MAX_ADDR_LEN]; /* hw address */ +}; +static struct rt_dm9161_eth dm9161_device; +static struct rt_semaphore sem_ack, sem_lock; + +void rt_dm9161_isr(int irqno); + +static void udelay(unsigned long ns) +{ + unsigned long i; + + while (ns--) + { + i = 100; + while (i--); + } +} + +static __inline unsigned long sep_emac_read(unsigned int reg) +{ + void __iomem *emac_base = (void __iomem *)reg; + + return read_reg(emac_base); +} + +/* +* Write to a EMAC register. +*/ +static __inline void sep_emac_write(unsigned int reg, unsigned long value) +{ + void __iomem *emac_base = (void __iomem *)reg; + + write_reg(emac_base,value); +} + + +/* ........................... PHY INTERFACE ........................... */ +/* CAN DO MAC CONFIGRATION +* Enable the MDIO bit in MAC control register +* When not called from an interrupt-handler, access to the PHY must be +* protected by a spinlock. +*/ +static void enable_mdi(void) //need think more +{ + unsigned long ctl; + + ctl = sep_emac_read(MAC_CTRL); + sep_emac_write(MAC_CTRL, ctl&(~0x3)); /* enable management port */ + + return; +} + +/* CANNOT DO MAC CONFIGRATION +* Disable the MDIO bit in the MAC control register +*/ +static void disable_mdi(void) +{ + unsigned long ctl; + + ctl = sep_emac_read(MAC_CTRL); + sep_emac_write(MAC_CTRL, ctl|(0x3)); /* disable management port */ + + return; +} + +/* +* Wait until the PHY operation is complete. +*/ +static __inline void sep_phy_wait(void) +{ + unsigned long timeout = 2; + + while ((sep_emac_read(MAC_MII_STATUS) & 0x2)) + { + timeout--; + if (!timeout) + { + EOUT("sep_ether: MDIO timeout\n"); + break; + } + } + + return; +} + +/* +* Write value to the a PHY register +* Note: MDI interface is assumed to already have been enabled. +*/ +static void write_phy(unsigned char phy_addr, unsigned char address, unsigned int value) +{ + unsigned short mii_txdata; + + mii_txdata = value; + sep_emac_write(MAC_MII_ADDRESS,(unsigned long)(address<<8) | phy_addr); + sep_emac_write(MAC_MII_TXDATA ,mii_txdata); + sep_emac_write(MAC_MII_CMD ,0x4); + udelay(40); + + sep_phy_wait(); + + return; +} + +/* +* Read value stored in a PHY register. +* Note: MDI interface is assumed to already have been enabled. +*/ +static void read_phy(unsigned char phy_addr, unsigned char address, unsigned int *value) +{ + unsigned short mii_rxdata; +// unsigned long mii_status; + + sep_emac_write(MAC_MII_ADDRESS,(unsigned long)(address<<8) | phy_addr); + sep_emac_write(MAC_MII_CMD ,0x2); + udelay(40); + sep_phy_wait(); + + mii_rxdata = sep_emac_read(MAC_MII_RXDATA); + *value = mii_rxdata; + + return; +} + +/* interrupt service routine */ +void rt_dm9161_isr(int irqno) +{ + unsigned long intstatus; + rt_uint32_t address; + + mask_irq(INTSRC_MAC); + intstatus = sep_emac_read(MAC_INTSRC); + + sep_emac_write(MAC_INTSRC,intstatus); + + /*Receive complete*/ + if(intstatus & 0x04) + { + eth_device_ready(&(dm9161_device.parent)); + } + /*Receive error*/ + else if(intstatus & 0x08) + { + rt_kprintf("Receive error\n"); + } + /*Transmit complete*/ + else if(intstatus & 0x03) + { + if(dm9161_device.tx_index == 0) + address = (MAC_TX_BD +(MAX_TX_DESCR-2)*8); + else if(dm9161_device.tx_index == 1) + address = (MAC_TX_BD +(MAX_TX_DESCR-1)*8); + else + address = (MAC_TX_BD + dm9161_device.tx_index*8-16); + //printk("free tx skb 0x%x in inter!!\n",lp->txBuffIndex); + sep_emac_write(address,0x0); + } + else if (intstatus & 0x10) + { + rt_kprintf("ROVER ERROR\n"); + } + + while(intstatus) + { + sep_emac_write(MAC_INTSRC,intstatus); + intstatus = sep_emac_read(MAC_INTSRC); + } + + unmask_irq(INTSRC_MAC); +} + +static rt_err_t update_mac_address() +{ + rt_uint32_t lo,hi; + hi = sep_emac_read(MAC_ADDR1); + lo = sep_emac_read(MAC_ADDR0); + DBOUT("Before MAC: hi=%x lo=%x\n",hi,lo); + + sep_emac_write(MAC_ADDR0,(dm9161_device.dev_addr[2] << 24) | (dm9161_device.dev_addr[3] << 16) | (dm9161_device.dev_addr[4] << 8) | (dm9161_device.dev_addr[5])); + sep_emac_write(MAC_ADDR1,dm9161_device.dev_addr[1]|(dm9161_device.dev_addr[0]<<8)); + + hi = sep_emac_read(MAC_ADDR1); + lo = sep_emac_read(MAC_ADDR0); + DBOUT("After MAC: hi=%x lo=%x\n",hi,lo); + + return RT_EOK; +} + +static int mii_link_ok(unsigned long phy_id) +{ + /* first, a dummy read, needed to latch some MII phys */ + unsigned int value; + + read_phy(phy_id, MII_BMSR,&value); + if (value & BMSR_LSTATUS) + return 1; + + return 0; +} + +static void update_link_speed(unsigned short phy_addr) +{ + unsigned int bmsr, bmcr, lpa, mac_cfg; + unsigned int speed, duplex; + + if (!mii_link_ok(phy_addr)) + { + EOUT("Link Down\n"); + //goto result; + } + + read_phy(phy_addr,MII_BMSR,&bmsr); + read_phy(phy_addr,MII_BMCR,&bmcr); + + if (bmcr & BMCR_ANENABLE) /* AutoNegotiation is enabled */ + { + if (!(bmsr & BMSR_ANEGCOMPLETE)) /* Do nothing - another interrupt generated when negotiation complete */ + goto result; + + read_phy(phy_addr, MII_LPA, &lpa); + + if ((lpa & LPA_100FULL) || (lpa & LPA_100HALF)) + speed = SPEED_100; + else + speed = SPEED_10; + + if ((lpa & LPA_100FULL) || (lpa & LPA_10FULL)) + duplex = DUPLEX_FULL; + else + duplex = DUPLEX_HALF; + } + else + { + speed = (bmcr & BMCR_SPEED100) ? SPEED_100 : SPEED_10; + duplex = (bmcr & BMCR_FULLDPLX) ? DUPLEX_FULL : DUPLEX_HALF; + } + + /* Update the MAC */ + mac_cfg = sep_emac_read(MAC_CTRL); + if (speed == SPEED_100) + { + mac_cfg |= 0x800; /* set speed 100 M */ + //bmcr &=(~0x2000); + //write_phy(lp->phy_address, MII_BMCR, bmcr); //��dm9161���ٶ���Ϊ10M + if (duplex == DUPLEX_FULL) /* 100 Full Duplex */ + mac_cfg |= 0x400; + else /* 100 Half Duplex */ + mac_cfg &= (~0x400); + } + else + { + mac_cfg &= (~0x800); /* set speed 10 M */ + + if (duplex == DUPLEX_FULL) /* 10 Full Duplex */ + mac_cfg |= 0x400; + else /* 10 Half Duplex */ + mac_cfg &= (~0x400); + } + + sep_emac_write(MAC_CTRL, mac_cfg); + rt_kprintf("Link now %i M-%s\n", speed, (duplex == DUPLEX_FULL) ? "FullDuplex" : "HalfDuplex"); + +result: + mac_cfg = sep_emac_read(MAC_CTRL); + DBOUT("After mac_cfg=%d\n",mac_cfg); + + return; +} + +static rt_err_t rt_dm9161_open(rt_device_t dev, rt_uint16_t oflag); +/* RT-Thread Device Interface */ +/* initialize the interface */ +static rt_err_t rt_dm9161_init(rt_device_t dev) +{ + unsigned int phyid1, phyid2; + int detected = -1; + unsigned long phy_id; + unsigned short phy_address = 0; + + while ((detected != 0) && (phy_address < 32)) + { + /* Read the PHY ID registers */ + enable_mdi(); + read_phy(phy_address, MII_PHYSID1, &phyid1); + read_phy(phy_address, MII_PHYSID2, &phyid2); + + disable_mdi(); + + phy_id = (phyid1 << 16) | (phyid2 & 0xfff0); + switch (phy_id) + { + case MII_DM9161_ID: /* Davicom 9161: PHY_ID1 = 0x181, PHY_ID2 = B881 */ + case MII_DM9161A_ID: /* Davicom 9161A: PHY_ID1 = 0x181, PHY_ID2 = B8A0 */ + case MII_RTL8201_ID: /* Realtek RTL8201: PHY_ID1 = 0, PHY_ID2 = 0x8201 */ + case MII_BCM5221_ID: /* Broadcom BCM5221: PHY_ID1 = 0x40, PHY_ID2 = 0x61e0 */ + case MII_DP83847_ID: /* National Semiconductor DP83847: */ + case MII_AC101L_ID: /* Altima AC101L: PHY_ID1 = 0x22, PHY_ID2 = 0x5520 */ + case MII_KS8721_ID: /* Micrel KS8721: PHY_ID1 = 0x22, PHY_ID2 = 0x1610 */ + { + enable_mdi(); + #warning SHOULD SET MAC ADDR + //get_mac_address(dev); /* Get ethernet address and store it in dev->dev_addr */ + update_mac_address(); /* Program ethernet address into MAC */ + + //�ù�ϣ�Ĵ����Ƚϵ�ǰȺ����ַ��ȫ˫��������CRCУ�飬������֡������� + sep_emac_write(MAC_CTRL, 0xa413); + #warning SHOULD DETERMIN LINK SPEED + update_link_speed(phy_address); + dm9161_device.phy_addr = phy_address; + disable_mdi(); + break; + } + + } + + phy_address++; + } + + rt_dm9161_open(dev,0); + + return RT_EOK; +} + +/* ................................ MAC ................................ */ + +/* + * Initialize and start the Receiver and Transmit subsystems + */ +static void sepether_start(void) +{ + int i; + unsigned int tempaddr; + + sep_emac_write(MAC_TXBD_NUM,MAX_TX_DESCR); + + //��ʼ�����ͺͽ��������� + for (i = 0; i < MAX_TX_DESCR; i++) + { + tempaddr=(MAC_TX_BD+i*8); + sep_emac_write(tempaddr,0); + tempaddr=(MAC_TX_BD+i*8+4); + sep_emac_write(tempaddr,0); + } + for (i = 0; i < MAX_RX_DESCR; i++) + { + tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8); + sep_emac_write(tempaddr,0); + tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8+4); + sep_emac_write(tempaddr,0); + } + + for (i = 0; i < MAX_RX_DESCR; i++) + { + tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8); + sep_emac_write(tempaddr,0xc000); + tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8+4); + sep_emac_write(tempaddr,ESRAM_BASE+ MAX_TX_DESCR*0x600+i*0x600); + } + + /* Set the Wrap bit on the last descriptor */ + tempaddr=(MAC_TX_BD + MAX_TX_DESCR*8+i*8-8); + sep_emac_write(tempaddr,0xe000); + + for (i = 0; i < MAX_TX_DESCR; i++) + { + tempaddr=(MAC_TX_BD+i*8); + sep_emac_write(tempaddr,0x0); + tempaddr=(MAC_TX_BD+i*8+4); + sep_emac_write(tempaddr,ESRAM_BASE+i*0x600); + } + + return; +} + +static rt_err_t rt_dm9161_open(rt_device_t dev, rt_uint16_t oflag) +{ + unsigned int dsintr; + + enable_mdi(); + mask_irq(28); + + sep_emac_write(MAC_INTMASK,0x0); //���������ж� + + sepether_start(); + + /* Enable PHY interrupt */ + *(volatile unsigned long*)GPIO_PORTA_DIR |= 0x0080 ; //1 stands for in + *(volatile unsigned long*)GPIO_PORTA_SEL |= 0x0080 ; //for common use + *(volatile unsigned long*)GPIO_PORTA_INCTL |= 0x0080; //�ж����뷽ʽ + *(volatile unsigned long*)GPIO_PORTA_INTRCTL |= (0x3UL<<14); //�ж�����Ϊ�͵�ƽ�ⷢ + *(volatile unsigned long*)GPIO_PORTA_INTRCLR |= 0x0080; //����ж� + *(volatile unsigned long*)GPIO_PORTA_INTRCLR = 0x0000; //����ж� + + rt_hw_interrupt_install(INTSRC_MAC, rt_dm9161_isr, RT_NULL); + enable_irq(INTSRC_EXINT7); + + + read_phy(dm9161_device.phy_addr, MII_DSINTR_REG, &dsintr); + dsintr = dsintr & ~0xf00; /* clear bits 8..11 */ + write_phy(dm9161_device.phy_addr, MII_DSINTR_REG, dsintr); + + update_link_speed(dm9161_device.phy_addr); + + + /************************************************************************************/ + /* Enable MAC interrupts */ + sep_emac_write(MAC_INTMASK,0xff); //open�ж� + sep_emac_write(MAC_INTSRC,0xff); //clear all mac irq + unmask_irq(28); + disable_mdi(); + + rt_kprintf("SEP4020 ethernet interface open!\n\r"); + + return RT_EOK; +} + +static rt_err_t rt_dm9161_close(rt_device_t dev) +{ + rt_kprintf("SEP4020 ethernet interface close!\n\r"); + + /* Disable Receiver and Transmitter */ + disable_mdi(); + #warning disable ether; + +// INT_ENABLE(28); + /* Disable PHY interrupt */ +// disable_phyirq(dev); + + /* Disable MAC interrupts */ + sep_emac_write(MAC_INTMASK,0); //�����ж� + +// INT_DISABLE(28); + + return RT_EOK; +} + +static rt_size_t rt_dm9161_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size) +{ + rt_set_errno(-RT_ENOSYS); + + return 0; +} + +static rt_size_t rt_dm9161_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size) +{ + rt_set_errno(-RT_ENOSYS); + + return 0; +} + +static rt_err_t rt_dm9161_control(rt_device_t dev, rt_uint8_t cmd, void *args) +{ + return RT_EOK; +} + +/* ethernet device interface */ +/* transmit packet. */ +rt_err_t rt_dm9161_tx( rt_device_t dev, struct pbuf* p) +{ + rt_uint8_t i; + rt_uint32_t length = 0; + struct pbuf *q; + unsigned long address; + unsigned long tmp_tx_bd; + + /* lock DM9000 device */ +// rt_sem_take(&sem_lock, RT_WAITING_FOREVER); + + /* disable dm9000a interrupt */ + #warning SHOULD DISABLE INTEERUPT? + + /*Search for available BD*/ + for (i = 0;i<MAX_TX_DESCR;) + { + address = MAC_TX_BD + i*8; + tmp_tx_bd = sep_emac_read(address); + if (!(tmp_tx_bd & 0x8000)) + { + if (i == (MAX_TX_DESCR-1)) + i = 0; + else + i = i+1; + break; + } + if (i == MAX_TX_DESCR-1) + i = 0; + else + i++; + } + + q = p; + while (q) + { + rt_memcpy((u8_t*)(ESRAM_BASE + i*0x600 + length),(u8_t*)q->payload,q->len); + length += q->len; + q = q->next; + } + + #warning SHOULD NOTICE IT'S LENGTH + + length = length << 16; + + if (i == MAX_TX_DESCR - 1) + length |= 0xb800; + else + length |= 0x9800; + + address = (MAC_TX_BD + i*8); + dm9161_device.tx_index = i; + sep_emac_write(address,length); + + //wait for tranfer complete + while(!(sep_emac_read(address)&0x8000)); + + /* unlock DM9000 device */ +// rt_sem_release(&sem_lock); + + /* wait ack */ +// rt_sem_take(&sem_ack, RT_WAITING_FOREVER); + + return RT_EOK; +} + +/* reception packet. */ +struct pbuf *rt_dm9161_rx(rt_device_t dev) +{ + unsigned int temp_rx_bd,address; + rt_uint32_t i = 0; + rt_uint32_t length; + unsigned char *p_recv; + struct pbuf* p = RT_NULL; + + /* lock DM9000 device */ + rt_sem_take(&sem_lock, RT_WAITING_FOREVER); + + while (1) + { + + address = MAC_TX_BD + (MAX_TX_DESCR + i) * 8; + temp_rx_bd = sep_emac_read(address); + + if (!(temp_rx_bd & 0x8000)) + { + length = temp_rx_bd; + length = length >> 16; + + p_recv = (unsigned char *)(ESRAM_BASE + (MAX_TX_DESCR + i) * 0x600); + p = pbuf_alloc(PBUF_LINK,length,PBUF_RAM); + if (p != RT_NULL) + { + struct pbuf *q; + rt_int32_t len; + + for (q = p; q != RT_NULL; q = q->next) + { + rt_memcpy((rt_uint8_t *)(q->payload),p_recv,q->len); + } + } + else + { + rt_kprintf("Droping %d packet \n",length); + } + + if(i == (MAX_RX_DESCR-1)) + { + sep_emac_write(address,0xe000); + i = 0; + } + else + { + sep_emac_write(address,0xc000); + i++; + } + } + else + break; + } + + rt_sem_release(&sem_lock); + + return p; +} + +void rt_hw_dm9161_init() +{ + rt_sem_init(&sem_ack, "tx_ack", 1, RT_IPC_FLAG_FIFO); + rt_sem_init(&sem_lock, "eth_lock", 1, RT_IPC_FLAG_FIFO); + + dm9161_device.type = TYPE_DM9161; + dm9161_device.mode = DM9161_AUTO; + dm9161_device.packet_cnt = 0; + dm9161_device.queue_packet_len = 0; + + /* + * SRAM Tx/Rx pointer automatically return to start address, + * Packet Transmitted, Packet Received + */ + #warning NOTICE: + //dm9161_device.imr_all = IMR_PAR | IMR_PTM | IMR_PRM; + + dm9161_device.dev_addr[0] = 0x01; + dm9161_device.dev_addr[1] = 0x60; + dm9161_device.dev_addr[2] = 0x6E; + dm9161_device.dev_addr[3] = 0x11; + dm9161_device.dev_addr[4] = 0x02; + dm9161_device.dev_addr[5] = 0x0F; + + dm9161_device.parent.parent.init = rt_dm9161_init; + dm9161_device.parent.parent.open = rt_dm9161_open; + dm9161_device.parent.parent.close = rt_dm9161_close; + dm9161_device.parent.parent.read = rt_dm9161_read; + dm9161_device.parent.parent.write = rt_dm9161_write; + dm9161_device.parent.parent.control = rt_dm9161_control; + dm9161_device.parent.parent.user_data = RT_NULL; + + dm9161_device.parent.eth_rx = rt_dm9161_rx; + dm9161_device.parent.eth_tx = rt_dm9161_tx; + + eth_device_init(&(dm9161_device.parent), "e0"); + + /* instal interrupt */ + #warning TODO + //rt_hw_interrupt_install(INTEINT4_7, rt_dm9161_isr, RT_NULL); + //rt_hw_interrupt_umask(INTEINT4_7); +} + +void dm9161a(void) +{ +} + +#ifdef RT_USING_FINSH +#include <finsh.h> +FINSH_FUNCTION_EXPORT(dm9161a, dm9161a register dump); +#endif diff --git a/bsp/mini4020/drivers/dm9161.h b/bsp/mini4020/drivers/dm9161.h index a0b8276762..620f8653bc 100644 --- a/bsp/mini4020/drivers/dm9161.h +++ b/bsp/mini4020/drivers/dm9161.h @@ -1,78 +1,78 @@ -/*
- * File : dm9161.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date Author Notes
- */
-
-#ifndef __DM9000_H__
-#define __DM9000_H__
-
-/*MACRO DEFINATIONS*/
-
-
- #define SEP4020_ID_EMAC ((unsigned int) 28) // Ethernet Mac
- /* Davicom 9161 PHY */
- #define MII_DM9161_ID 0x0181b880
- #define MII_DM9161A_ID 0x0181b8a0
-
- /* Davicom specific registers */
- #define MII_DSCR_REG 16
- #define MII_DSCSR_REG 17
- #define MII_DSINTR_REG 21
-
- /* Intel LXT971A PHY */
- #define MII_LXT971A_ID 0x001378E0
-
- /* Intel specific registers */
- #define MII_ISINTE_REG 18
- #define MII_ISINTS_REG 19
- #define MII_LEDCTRL_REG 20
-
- /* Realtek RTL8201 PHY */
- #define MII_RTL8201_ID 0x00008200
-
- /* Broadcom BCM5221 PHY */
- #define MII_BCM5221_ID 0x004061e0
-
- /* Broadcom specific registers */
- #define MII_BCMINTR_REG 26
-
- /* National Semiconductor DP83847 */
- #define MII_DP83847_ID 0x20005c30
-
- /* Altima AC101L PHY */
- #define MII_AC101L_ID 0x00225520
-
- /* Micrel KS8721 PHY */
- #define MII_KS8721_ID 0x00221610
-
- /* ........................................................................ */
-
- #define MAX_RBUFF_SZ 0x600 /* 1518 rounded up */
- #define MAX_RX_DESCR 20 /* max number of receive buffers */
-
- #define MAX_TBUFF_SZ 0x600 /* 1518 rounded up */
- #define MAX_TX_DESCR 20 /* max number of receive buffers */
-
- #define EMAC_DESC_DONE 0x00000001 /* bit for if DMA is done */
- #define EMAC_DESC_WRAP 0x00000002 /* bit for wrap */
-
- #define EMAC_BROADCAST 0x80000000 /* broadcast address */
- #define EMAC_MULTICAST 0x40000000 /* multicast address */
- #define EMAC_UNICAST 0x20000000 /* unicast address */
-
-#define DM9161_inb(r) (*(volatile rt_uint8_t *)r)
-#define DM9161_outb(r, d) (*(volatile rt_uint8_t *)r = d)
-#define DM9161_inw(r) (*(volatile rt_uint16_t *)r)
-#define DM9161_outw(r, d) (*(volatile rt_uint16_t *)r = d)
-
-void rt_hw_dm9616_init(void);
-
-#endif
+/* + * File : dm9161.h + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rt-thread.org/license/LICENSE + * + * Change Logs: + * Date Author Notes + */ + +#ifndef __DM9000_H__ +#define __DM9000_H__ + +/*MACRO DEFINATIONS*/ + + + #define SEP4020_ID_EMAC ((unsigned int) 28) // Ethernet Mac + /* Davicom 9161 PHY */ + #define MII_DM9161_ID 0x0181b880 + #define MII_DM9161A_ID 0x0181b8a0 + + /* Davicom specific registers */ + #define MII_DSCR_REG 16 + #define MII_DSCSR_REG 17 + #define MII_DSINTR_REG 21 + + /* Intel LXT971A PHY */ + #define MII_LXT971A_ID 0x001378E0 + + /* Intel specific registers */ + #define MII_ISINTE_REG 18 + #define MII_ISINTS_REG 19 + #define MII_LEDCTRL_REG 20 + + /* Realtek RTL8201 PHY */ + #define MII_RTL8201_ID 0x00008200 + + /* Broadcom BCM5221 PHY */ + #define MII_BCM5221_ID 0x004061e0 + + /* Broadcom specific registers */ + #define MII_BCMINTR_REG 26 + + /* National Semiconductor DP83847 */ + #define MII_DP83847_ID 0x20005c30 + + /* Altima AC101L PHY */ + #define MII_AC101L_ID 0x00225520 + + /* Micrel KS8721 PHY */ + #define MII_KS8721_ID 0x00221610 + + /* ........................................................................ */ + + #define MAX_RBUFF_SZ 0x600 /* 1518 rounded up */ + #define MAX_RX_DESCR 20 /* max number of receive buffers */ + + #define MAX_TBUFF_SZ 0x600 /* 1518 rounded up */ + #define MAX_TX_DESCR 20 /* max number of receive buffers */ + + #define EMAC_DESC_DONE 0x00000001 /* bit for if DMA is done */ + #define EMAC_DESC_WRAP 0x00000002 /* bit for wrap */ + + #define EMAC_BROADCAST 0x80000000 /* broadcast address */ + #define EMAC_MULTICAST 0x40000000 /* multicast address */ + #define EMAC_UNICAST 0x20000000 /* unicast address */ + +#define DM9161_inb(r) (*(volatile rt_uint8_t *)r) +#define DM9161_outb(r, d) (*(volatile rt_uint8_t *)r = d) +#define DM9161_inw(r) (*(volatile rt_uint16_t *)r) +#define DM9161_outw(r, d) (*(volatile rt_uint16_t *)r = d) + +void rt_hw_dm9616_init(void); + +#endif diff --git a/bsp/mini4020/drivers/lcd.c b/bsp/mini4020/drivers/lcd.c index dec95781c3..f9799d9ef7 100644 --- a/bsp/mini4020/drivers/lcd.c +++ b/bsp/mini4020/drivers/lcd.c @@ -1,74 +1,74 @@ -/*
- * File : lcd.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date Author Notes
- */
-
-#include "lcdc.h"
-#include "rtthread.h"
-#include "board.h"
-
-#include <rtgui/rtgui.h>
-#include <rtgui/driver.h>
-#include <rtgui/rtgui_server.h>
-#include <rtgui/rtgui_system.h>
-
-extern rt_err_t sep4020_lcd_init(void);
-extern unsigned long pVideoBuffer;
-
-struct rtgui_graphic_driver _rtgui_lcd_driver;
-struct rtgui_graphic_driver_ops _rtgui_graphic_driver_ops;
-
-void radio_rtgui_init(void)
-{
- rtgui_rect_t rect;
- rtgui_system_server_init();
-
- /* register dock panel */
- rect.x1 = 0;
- rect.y1 = 0;
- rect.x2 = 320;
- rect.y2 = 25;
- rtgui_panel_register("info", &rect);
- rtgui_panel_set_nofocused("info");
-
- /* register main panel */
- rect.x1 = 0;
- rect.y1 = 25;
- rect.x2 = 320;
- rect.y2 = 240;
- rtgui_panel_register("main", &rect);
- rtgui_panel_set_default_focused("main");
-
- _rtgui_graphic_driver_ops.set_pixel=lcd_set_pixel;
- _rtgui_graphic_driver_ops.get_pixel=lcd_get_pixel;
- _rtgui_graphic_driver_ops.draw_hline=lcd_draw_hline;
- _rtgui_graphic_driver_ops.draw_vline=lcd_draw_vline;
- _rtgui_graphic_driver_ops.draw_raw_hline=lcd_draw_raw_hline;
-
- _rtgui_lcd_driver.bits_per_pixel = 16;
- _rtgui_lcd_driver.width = 320;
- _rtgui_lcd_driver.height = 240;
-
- _rtgui_lcd_driver.ops = &_rtgui_graphic_driver_ops;
-
- //_rtgui_lcd_driver.screen_update = lcd_update;
- //_rtgui_lcd_driver.get_framebuffer = lcd_get_framebuffer;
-
- sep4020_lcd_init();
-
- rt_memset((char*)pVideoBuffer,0xff,320*240*2);
- //rt_memcpy((char*)pVideoBuffer,pic,320*240*2); //TESTING IMAGE
-
- //�˴�������
- /* add lcd driver into graphic driver */
- // rtgui_graphic_driver_add(&_rtgui_lcd_driver);
-}
-
+/* + * File : lcd.c + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rt-thread.org/license/LICENSE + * + * Change Logs: + * Date Author Notes + */ + +#include "lcdc.h" +#include "rtthread.h" +#include "board.h" + +#include <rtgui/rtgui.h> +#include <rtgui/driver.h> +#include <rtgui/rtgui_server.h> +#include <rtgui/rtgui_system.h> + +extern rt_err_t sep4020_lcd_init(void); +extern unsigned long pVideoBuffer; + +struct rtgui_graphic_driver _rtgui_lcd_driver; +struct rtgui_graphic_driver_ops _rtgui_graphic_driver_ops; + +void radio_rtgui_init(void) +{ + rtgui_rect_t rect; + rtgui_system_server_init(); + + /* register dock panel */ + rect.x1 = 0; + rect.y1 = 0; + rect.x2 = 320; + rect.y2 = 25; + rtgui_panel_register("info", &rect); + rtgui_panel_set_nofocused("info"); + + /* register main panel */ + rect.x1 = 0; + rect.y1 = 25; + rect.x2 = 320; + rect.y2 = 240; + rtgui_panel_register("main", &rect); + rtgui_panel_set_default_focused("main"); + + _rtgui_graphic_driver_ops.set_pixel=lcd_set_pixel; + _rtgui_graphic_driver_ops.get_pixel=lcd_get_pixel; + _rtgui_graphic_driver_ops.draw_hline=lcd_draw_hline; + _rtgui_graphic_driver_ops.draw_vline=lcd_draw_vline; + _rtgui_graphic_driver_ops.draw_raw_hline=lcd_draw_raw_hline; + + _rtgui_lcd_driver.bits_per_pixel = 16; + _rtgui_lcd_driver.width = 320; + _rtgui_lcd_driver.height = 240; + + _rtgui_lcd_driver.ops = &_rtgui_graphic_driver_ops; + + //_rtgui_lcd_driver.screen_update = lcd_update; + //_rtgui_lcd_driver.get_framebuffer = lcd_get_framebuffer; + + sep4020_lcd_init(); + + rt_memset((char*)pVideoBuffer,0xff,320*240*2); + //rt_memcpy((char*)pVideoBuffer,pic,320*240*2); //TESTING IMAGE + + //�˴������� + /* add lcd driver into graphic driver */ + // rtgui_graphic_driver_add(&_rtgui_lcd_driver); +} + diff --git a/bsp/mini4020/drivers/lcdc.c b/bsp/mini4020/drivers/lcdc.c index 0eedb91421..d468eebd91 100644 --- a/bsp/mini4020/drivers/lcdc.c +++ b/bsp/mini4020/drivers/lcdc.c @@ -1,110 +1,110 @@ -/*
- * File : lcdc.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date Author Notes
- */
-
-#include "lcdc.h"
-#include <sep4020.h>
-
-#define writel(DATA,ADDRESS) *((volatile rt_off_t *) ADDRESS)= DATA;
-
+/* + * File : lcdc.c + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rt-thread.org/license/LICENSE + * + * Change Logs: + * Date Author Notes + */ + +#include "lcdc.h" +#include <sep4020.h> + +#define writel(DATA,ADDRESS) *((volatile rt_off_t *) ADDRESS)= DATA; + unsigned long pVideoBuffer; -
-rt_err_t sep4020_lcd_init(void)
-{
- pVideoBuffer =(unsigned long)rt_malloc(LCDWIDTH * LCDHEIGHT * 2);
-
- *(RP)GPIO_PORTC_SEL |= 0X0008; //Portc8����Ϊͨ�ÿ�
- *(RP)GPIO_PORTC_DIR &= (~0X0008); //Portc8�������
- *(RP)GPIO_PORTC_DATA |= 0X0008; //Portc8����ߵ�ƽ
-
- writel(0x00000000,LCDC_LECR); //����LCDC
- writel(pVideoBuffer,LCDC_SSA); //lcd����֡����ʼ��ַ
- writel(YMAX | XMAX,LCDC_SIZE);
- writel(TFT|COLOR|PBSIZE|BPIX|PIXPOL|FLMPOL|LPPOL|CLKPOL|OEPOL|END_SEL|ACD_SEL|ACD|PCD,LCDC_PCR);
- writel(H_WIDTH|H_WAIT_1|H_WAIT_2,LCDC_HCR);
- writel(V_WIDTH|PASS_FRAME_WAIT|V_WAIT_1|V_WAIT_2,LCDC_VCR);
- writel(SCR|CC_EN|PW,LCDC_PWMR);
- writel(BL|HM|TM,LCDC_DMACR);
- writel(0x00000001,LCDC_LECR); //ʹ��LCDC
- writel(0x00000000,LCDC_LCDISREN); //�ж��ڼ���֡�����һ�����һ������ʱ���ã���LCD֮�����һ����ʱ
-
- return RT_EOK;
-}
-
-void lcd_set_pixel(rtgui_color_t *c, int x, int y)
-{
- unsigned short p;
-
- /* get color pixel */
- p = rtgui_color_to_565p(*c);
-
- *(unsigned short *)(pVideoBuffer + 2*y*LCDWIDTH + 2*x) = p;
-}
-
-void lcd_get_pixel(rtgui_color_t *c, int x, int y)
-{
- *c = rtgui_color_from_565p( *(unsigned short *)(pVideoBuffer+2*y*LCDWIDTH+2*x));
-}
-
-void lcd_draw_hline(rtgui_color_t *c, int x1, int x2, int y)
-{
- unsigned short p;
-
- /* get color pixel */
- p = rtgui_color_to_565p(*c);
-
- while (x1 < x2)
- {
- *(unsigned short *)(pVideoBuffer+2*y*LCDWIDTH+2*x1)=p;
- x1 ++;
- }
-}
-
-void lcd_draw_vline(rtgui_color_t *c, int x, int y1, int y2)
-{
- unsigned short p;
-
- /* get color pixel */
- p = rtgui_color_to_565p(*c);
-
- while (y1 < y2)
- {
- *(unsigned short *)(pVideoBuffer+2*y1*LCDWIDTH+2*x)=p;
- y1 ++;
- }
-}
-
-void lcd_draw_raw_hline(rt_uint8_t *pixels, int x1, int x2, int y)
-{
- rt_uint16_t *ptr;
-
- /* get pixel */
- ptr = (rt_uint16_t*) pixels;
-
- while (x1 < x2)
- {
- *(unsigned short *)(pVideoBuffer+2*y*LCDWIDTH+2*x1)=*ptr;
- x1 ++;
- ptr ++;
- }
-}
-
-void lcd_update(rtgui_rect_t *rect)
-{
- /* nothing for none-DMA mode driver */
-}
-
-rt_uint8_t *lcd_get_framebuffer(void)
-{
- return RT_NULL; /* no framebuffer driver */
-}
+ +rt_err_t sep4020_lcd_init(void) +{ + pVideoBuffer =(unsigned long)rt_malloc(LCDWIDTH * LCDHEIGHT * 2); + + *(RP)GPIO_PORTC_SEL |= 0X0008; //Portc8����Ϊͨ�ÿ� + *(RP)GPIO_PORTC_DIR &= (~0X0008); //Portc8����Ϊ��� + *(RP)GPIO_PORTC_DATA |= 0X0008; //Portc8����ߵ�ƽ + + writel(0x00000000,LCDC_LECR); //����LCDC + writel(pVideoBuffer,LCDC_SSA); //lcd����֡����ʼ��ַ + writel(YMAX | XMAX,LCDC_SIZE); + writel(TFT|COLOR|PBSIZE|BPIX|PIXPOL|FLMPOL|LPPOL|CLKPOL|OEPOL|END_SEL|ACD_SEL|ACD|PCD,LCDC_PCR); + writel(H_WIDTH|H_WAIT_1|H_WAIT_2,LCDC_HCR); + writel(V_WIDTH|PASS_FRAME_WAIT|V_WAIT_1|V_WAIT_2,LCDC_VCR); + writel(SCR|CC_EN|PW,LCDC_PWMR); + writel(BL|HM|TM,LCDC_DMACR); + writel(0x00000001,LCDC_LECR); //ʹ��LCDC + writel(0x00000000,LCDC_LCDISREN); //�ж��ڼ���֡�����һ�����һ������ʱ���ã���LCD֮�����һ����ʱ + + return RT_EOK; +} + +void lcd_set_pixel(rtgui_color_t *c, int x, int y) +{ + unsigned short p; + + /* get color pixel */ + p = rtgui_color_to_565p(*c); + + *(unsigned short *)(pVideoBuffer + 2*y*LCDWIDTH + 2*x) = p; +} + +void lcd_get_pixel(rtgui_color_t *c, int x, int y) +{ + *c = rtgui_color_from_565p( *(unsigned short *)(pVideoBuffer+2*y*LCDWIDTH+2*x)); +} + +void lcd_draw_hline(rtgui_color_t *c, int x1, int x2, int y) +{ + unsigned short p; + + /* get color pixel */ + p = rtgui_color_to_565p(*c); + + while (x1 < x2) + { + *(unsigned short *)(pVideoBuffer+2*y*LCDWIDTH+2*x1)=p; + x1 ++; + } +} + +void lcd_draw_vline(rtgui_color_t *c, int x, int y1, int y2) +{ + unsigned short p; + + /* get color pixel */ + p = rtgui_color_to_565p(*c); + + while (y1 < y2) + { + *(unsigned short *)(pVideoBuffer+2*y1*LCDWIDTH+2*x)=p; + y1 ++; + } +} + +void lcd_draw_raw_hline(rt_uint8_t *pixels, int x1, int x2, int y) +{ + rt_uint16_t *ptr; + + /* get pixel */ + ptr = (rt_uint16_t*) pixels; + + while (x1 < x2) + { + *(unsigned short *)(pVideoBuffer+2*y*LCDWIDTH+2*x1)=*ptr; + x1 ++; + ptr ++; + } +} + +void lcd_update(rtgui_rect_t *rect) +{ + /* nothing for none-DMA mode driver */ +} + +rt_uint8_t *lcd_get_framebuffer(void) +{ + return RT_NULL; /* no framebuffer driver */ +} diff --git a/bsp/mini4020/drivers/lcdc.h b/bsp/mini4020/drivers/lcdc.h index cb3535b20c..4b361e502c 100644 --- a/bsp/mini4020/drivers/lcdc.h +++ b/bsp/mini4020/drivers/lcdc.h @@ -1,81 +1,81 @@ -/*
- * File : lcdc.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date Author Notes
- */
-
-#ifndef LCD_GENERAL_H_INCLUDED
-#define LCD_GENERAL_H_INCLUDED
-
-#include <rtgui/rtgui.h>
-#include <rtgui/driver.h>
-#include <rtgui/rtgui_server.h>
-#include <rtgui/rtgui_system.h>
-
-
-#define LCDWIDTH 320
-#define LCDHEIGHT 240
-
-//Macro for SIZE register setting
-#define XMAX ((LCDWIDTH/16) << 20)
-#define YMAX (LCDHEIGHT)
-
-//Macro for PCR register setting
-#define TFT ((U32)1 << 31)
-#define COLOR (1 << 30) //1Ϊɫ��.
-#define PBSIZE (0 << 28)
-#define BPIX (4 << 25) //�洢����һ�����ض�Ӧ16bit
-#define PIXPOL (0 << 24) //���ؼ��ԡ��������صļ���,����Ч //0<<24
-#define FLMPOL (1 << 23) //���б�־���ԡ��������б�־�ļ���,����Ч.
-#define LPPOL (1 << 22) //�����弫�ԡ������������źŵļ���,����Ч.
-#define CLKPOL (0 << 21) //LCD ��λʱ�Ӽ��ԡ�����LCD ��λʱ�ӵ���Ч�صļ���,�½�����Ч.
-#define OEPOL (1 << 20) //���ʹ�ܼ��ԡ��������ʹ���źŵļ���,����Ч.
-#define END_SEL (0 << 18) //ӡ�ڰ���ʽѡ��,Сӡ�ڰ�.
-#define ACD_SEL (0 << 15) //ACDʱ��Դѡ��ѡ����任��������ʱ��,ʹ��FLM ��ΪACD ����ʱ��
-#define ACD (0 << 8 ) //����ģʽ.
-#define PCD (10)
-
-//Macro for HCR regiter setting //ˮƽ���üĴ���.
-#define H_WIDTH ((U32)46 << 26)
-#define H_WAIT_1 (20 << 8)
-#define H_WAIT_2 (20)
-
-//Macro for VCR register setting //��ֱ���üĴ���.
-#define V_WIDTH ((U32)10 << 26)
-#define PASS_FRAME_WAIT (0 <<16)
-#define V_WAIT_1 (3 << 8)
-#define V_WAIT_2 (3)
-
-//Macro for LGPR register setting
-#define GRAY (4) //�Ҷȵȼ�.
-
-//Macro for PWMR register setting
-#define SCR (0 << 9) //ʱ��Դѡ��.������.
-#define CC_EN (0 << 8) //�Աȶȿ���ʹ��,��.
-#define PW (64) //���������Ŀ,
-
-//Macro for DMACR register setting
-#define BL ((U32)1 << 31) //�̶�����.
-#define HM (7 << 16)
-#define TM (3)
-
-void lcd_set_pixel(rtgui_color_t *c, int x, int y);
-void lcd_get_pixel(rtgui_color_t *c, int x, int y);
-void lcd_draw_hline(rtgui_color_t *c, int x1, int x2, int y) ;
-void lcd_draw_vline(rtgui_color_t *c, int x, int y1, int y2) ;
-void lcd_draw_raw_hline(rt_uint8_t *pixels, int x1, int x2, int y) ;
-void lcd_update(rtgui_rect_t *rect);
-rt_uint8_t * lcd_get_framebuffer(void);
-rt_err_t sep4020_lcd_init(void);
-
-
-#endif
-
-
+/* + * File : lcdc.h + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rt-thread.org/license/LICENSE + * + * Change Logs: + * Date Author Notes + */ + +#ifndef LCD_GENERAL_H_INCLUDED +#define LCD_GENERAL_H_INCLUDED + +#include <rtgui/rtgui.h> +#include <rtgui/driver.h> +#include <rtgui/rtgui_server.h> +#include <rtgui/rtgui_system.h> + + +#define LCDWIDTH 320 +#define LCDHEIGHT 240 + +//Macro for SIZE register setting +#define XMAX ((LCDWIDTH/16) << 20) +#define YMAX (LCDHEIGHT) + +//Macro for PCR register setting +#define TFT ((U32)1 << 31) +#define COLOR (1 << 30) //1Ϊɫ��. +#define PBSIZE (0 << 28) +#define BPIX (4 << 25) //�洢����һ�����ض�Ӧ16bit +#define PIXPOL (0 << 24) //���ؼ��ԡ��������صļ���,����Ч //0<<24 +#define FLMPOL (1 << 23) //���б�־���ԡ��������б�־�ļ���,����Ч. +#define LPPOL (1 << 22) //�����弫�ԡ������������źŵļ���,����Ч. +#define CLKPOL (0 << 21) //LCD ��λʱ�Ӽ��ԡ�����LCD ��λʱ�ӵ���Ч�صļ���,�½�����Ч. +#define OEPOL (1 << 20) //���ʹ�ܼ��ԡ��������ʹ���źŵļ���,����Ч. +#define END_SEL (0 << 18) //ӡ�ڰ���ʽѡ��,Сӡ�ڰ�. +#define ACD_SEL (0 << 15) //ACDʱ��Դѡ��ѡ����任��������ʱ��,ʹ��FLM ��ΪACD ����ʱ�� +#define ACD (0 << 8 ) //����ģʽ. +#define PCD (10) + +//Macro for HCR regiter setting //ˮƽ���üĴ���. +#define H_WIDTH ((U32)46 << 26) +#define H_WAIT_1 (20 << 8) +#define H_WAIT_2 (20) + +//Macro for VCR register setting //��ֱ���üĴ���. +#define V_WIDTH ((U32)10 << 26) +#define PASS_FRAME_WAIT (0 <<16) +#define V_WAIT_1 (3 << 8) +#define V_WAIT_2 (3) + +//Macro for LGPR register setting +#define GRAY (4) //�Ҷȵȼ�. + +//Macro for PWMR register setting +#define SCR (0 << 9) //ʱ��Դѡ��.������. +#define CC_EN (0 << 8) //�Աȶȿ���ʹ��,��. +#define PW (64) //���������Ŀ, + +//Macro for DMACR register setting +#define BL ((U32)1 << 31) //�̶�����. +#define HM (7 << 16) +#define TM (3) + +void lcd_set_pixel(rtgui_color_t *c, int x, int y); +void lcd_get_pixel(rtgui_color_t *c, int x, int y); +void lcd_draw_hline(rtgui_color_t *c, int x1, int x2, int y) ; +void lcd_draw_vline(rtgui_color_t *c, int x, int y1, int y2) ; +void lcd_draw_raw_hline(rt_uint8_t *pixels, int x1, int x2, int y) ; +void lcd_update(rtgui_rect_t *rect); +rt_uint8_t * lcd_get_framebuffer(void); +rt_err_t sep4020_lcd_init(void); + + +#endif + + diff --git a/bsp/mini4020/drivers/mii.h b/bsp/mini4020/drivers/mii.h index 281921934c..617550bfd9 100644 --- a/bsp/mini4020/drivers/mii.h +++ b/bsp/mini4020/drivers/mii.h @@ -1,142 +1,142 @@ -/*
- * File : mii.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date Author Notes
- */
-
-#ifndef __MII_H__
-#define __MII_H__
-
-/* Generic MII registers. */
-
-#define MII_BMCR 0x00 /* Basic mode control register */
-#define MII_BMSR 0x01 /* Basic mode status register */
-#define MII_PHYSID1 0x02 /* PHYS ID 1 */
-#define MII_PHYSID2 0x03 /* PHYS ID 2 */
-#define MII_ADVERTISE 0x04 /* Advertisement control reg */
-#define MII_LPA 0x05 /* Link partner ability reg */
-#define MII_EXPANSION 0x06 /* Expansion register */
-#define MII_CTRL1000 0x09 /* 1000BASE-T control */
-#define MII_STAT1000 0x0a /* 1000BASE-T status */
-#define MII_ESTATUS 0x0f /* Extended Status */
-#define MII_DCOUNTER 0x12 /* Disconnect counter */
-#define MII_FCSCOUNTER 0x13 /* False carrier counter */
-#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
-#define MII_RERRCOUNTER 0x15 /* Receive error counter */
-#define MII_SREVISION 0x16 /* Silicon revision */
-#define MII_RESV1 0x17 /* Reserved... */
-#define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */
-#define MII_PHYADDR 0x19 /* PHY address */
-#define MII_RESV2 0x1a /* Reserved... */
-#define MII_TPISTATUS 0x1b /* TPI status for 10mbps */
-#define MII_NCONFIG 0x1c /* Network interface config */
-
-/* Basic mode control register. */
-#define BMCR_RESV 0x003f /* Unused... */
-#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */
-#define BMCR_CTST 0x0080 /* Collision test */
-#define BMCR_FULLDPLX 0x0100 /* Full duplex */
-#define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */
-#define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */
-#define BMCR_PDOWN 0x0800 /* Powerdown the DP83840 */
-#define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */
-#define BMCR_SPEED100 0x2000 /* Select 100Mbps */
-#define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */
-#define BMCR_RESET 0x8000 /* Reset the DP83840 */
-
-/* Basic mode status register. */
-#define BMSR_ERCAP 0x0001 /* Ext-reg capability */
-#define BMSR_JCD 0x0002 /* Jabber detected */
-#define BMSR_LSTATUS 0x0004 /* Link status */
-#define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */
-#define BMSR_RFAULT 0x0010 /* Remote fault detected */
-#define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
-#define BMSR_RESV 0x00c0 /* Unused... */
-#define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */
-#define BMSR_100FULL2 0x0200 /* Can do 100BASE-T2 HDX */
-#define BMSR_100HALF2 0x0400 /* Can do 100BASE-T2 FDX */
-#define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */
-#define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */
-#define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */
-#define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */
-#define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */
-
-/* Advertisement control register. */
-#define ADVERTISE_SLCT 0x001f /* Selector bits */
-#define ADVERTISE_CSMA 0x0001 /* Only selector supported */
-#define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */
-#define ADVERTISE_1000XFULL 0x0020 /* Try for 1000BASE-X full-duplex */
-#define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */
-#define ADVERTISE_1000XHALF 0x0040 /* Try for 1000BASE-X half-duplex */
-#define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */
-#define ADVERTISE_1000XPAUSE 0x0080 /* Try for 1000BASE-X pause */
-#define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */
-#define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */
-#define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */
-#define ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */
-#define ADVERTISE_PAUSE_ASYM 0x0800 /* Try for asymetric pause */
-#define ADVERTISE_RESV 0x1000 /* Unused... */
-#define ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */
-#define ADVERTISE_LPACK 0x4000 /* Ack link partners response */
-#define ADVERTISE_NPAGE 0x8000 /* Next page bit */
-
-#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \
- ADVERTISE_CSMA)
-#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \
- ADVERTISE_100HALF | ADVERTISE_100FULL)
-
-/* Link partner ability register. */
-#define LPA_SLCT 0x001f /* Same as advertise selector */
-#define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */
-#define LPA_1000XFULL 0x0020 /* Can do 1000BASE-X full-duplex */
-#define LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */
-#define LPA_1000XHALF 0x0040 /* Can do 1000BASE-X half-duplex */
-#define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */
-#define LPA_1000XPAUSE 0x0080 /* Can do 1000BASE-X pause */
-#define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */
-#define LPA_1000XPAUSE_ASYM 0x0100 /* Can do 1000BASE-X pause asym*/
-#define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */
-#define LPA_PAUSE_CAP 0x0400 /* Can pause */
-#define LPA_PAUSE_ASYM 0x0800 /* Can pause asymetrically */
-#define LPA_RESV 0x1000 /* Unused... */
-#define LPA_RFAULT 0x2000 /* Link partner faulted */
-#define LPA_LPACK 0x4000 /* Link partner acked us */
-#define LPA_NPAGE 0x8000 /* Next page bit */
-
-#define LPA_DUPLEX (LPA_10FULL | LPA_100FULL)
-#define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4)
-
-/* Expansion register for auto-negotiation. */
-#define EXPANSION_NWAY 0x0001 /* Can do N-way auto-nego */
-#define EXPANSION_LCWP 0x0002 /* Got new RX page code word */
-#define EXPANSION_ENABLENPAGE 0x0004 /* This enables npage words */
-#define EXPANSION_NPCAPABLE 0x0008 /* Link partner supports npage */
-#define EXPANSION_MFAULTS 0x0010 /* Multiple faults detected */
-#define EXPANSION_RESV 0xffe0 /* Unused... */
-
-#define ESTATUS_1000_TFULL 0x2000 /* Can do 1000BT Full */
-#define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */
-
-/* N-way test register. */
-#define NWAYTEST_RESV1 0x00ff /* Unused... */
-#define NWAYTEST_LOOPBACK 0x0100 /* Enable loopback for N-way */
-#define NWAYTEST_RESV2 0xfe00 /* Unused... */
-
-/* 1000BASE-T Control register */
-#define ADVERTISE_1000FULL 0x0200 /* Advertise 1000BASE-T full duplex */
-#define ADVERTISE_1000HALF 0x0100 /* Advertise 1000BASE-T half duplex */
-
-/* 1000BASE-T Status register */
-#define LPA_1000LOCALRXOK 0x2000 /* Link partner local receiver status */
-#define LPA_1000REMRXOK 0x1000 /* Link partner remote receiver status */
-#define LPA_1000FULL 0x0800 /* Link partner 1000BASE-T full duplex */
-#define LPA_1000HALF 0x0400 /* Link partner 1000BASE-T half duplex */
-
-#endif
+/* + * File : mii.h + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rt-thread.org/license/LICENSE + * + * Change Logs: + * Date Author Notes + */ + +#ifndef __MII_H__ +#define __MII_H__ + +/* Generic MII registers. */ + +#define MII_BMCR 0x00 /* Basic mode control register */ +#define MII_BMSR 0x01 /* Basic mode status register */ +#define MII_PHYSID1 0x02 /* PHYS ID 1 */ +#define MII_PHYSID2 0x03 /* PHYS ID 2 */ +#define MII_ADVERTISE 0x04 /* Advertisement control reg */ +#define MII_LPA 0x05 /* Link partner ability reg */ +#define MII_EXPANSION 0x06 /* Expansion register */ +#define MII_CTRL1000 0x09 /* 1000BASE-T control */ +#define MII_STAT1000 0x0a /* 1000BASE-T status */ +#define MII_ESTATUS 0x0f /* Extended Status */ +#define MII_DCOUNTER 0x12 /* Disconnect counter */ +#define MII_FCSCOUNTER 0x13 /* False carrier counter */ +#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */ +#define MII_RERRCOUNTER 0x15 /* Receive error counter */ +#define MII_SREVISION 0x16 /* Silicon revision */ +#define MII_RESV1 0x17 /* Reserved... */ +#define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */ +#define MII_PHYADDR 0x19 /* PHY address */ +#define MII_RESV2 0x1a /* Reserved... */ +#define MII_TPISTATUS 0x1b /* TPI status for 10mbps */ +#define MII_NCONFIG 0x1c /* Network interface config */ + +/* Basic mode control register. */ +#define BMCR_RESV 0x003f /* Unused... */ +#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */ +#define BMCR_CTST 0x0080 /* Collision test */ +#define BMCR_FULLDPLX 0x0100 /* Full duplex */ +#define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */ +#define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */ +#define BMCR_PDOWN 0x0800 /* Powerdown the DP83840 */ +#define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */ +#define BMCR_SPEED100 0x2000 /* Select 100Mbps */ +#define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */ +#define BMCR_RESET 0x8000 /* Reset the DP83840 */ + +/* Basic mode status register. */ +#define BMSR_ERCAP 0x0001 /* Ext-reg capability */ +#define BMSR_JCD 0x0002 /* Jabber detected */ +#define BMSR_LSTATUS 0x0004 /* Link status */ +#define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */ +#define BMSR_RFAULT 0x0010 /* Remote fault detected */ +#define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */ +#define BMSR_RESV 0x00c0 /* Unused... */ +#define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */ +#define BMSR_100FULL2 0x0200 /* Can do 100BASE-T2 HDX */ +#define BMSR_100HALF2 0x0400 /* Can do 100BASE-T2 FDX */ +#define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */ +#define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */ +#define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */ +#define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */ +#define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */ + +/* Advertisement control register. */ +#define ADVERTISE_SLCT 0x001f /* Selector bits */ +#define ADVERTISE_CSMA 0x0001 /* Only selector supported */ +#define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */ +#define ADVERTISE_1000XFULL 0x0020 /* Try for 1000BASE-X full-duplex */ +#define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */ +#define ADVERTISE_1000XHALF 0x0040 /* Try for 1000BASE-X half-duplex */ +#define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */ +#define ADVERTISE_1000XPAUSE 0x0080 /* Try for 1000BASE-X pause */ +#define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */ +#define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */ +#define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */ +#define ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */ +#define ADVERTISE_PAUSE_ASYM 0x0800 /* Try for asymetric pause */ +#define ADVERTISE_RESV 0x1000 /* Unused... */ +#define ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */ +#define ADVERTISE_LPACK 0x4000 /* Ack link partners response */ +#define ADVERTISE_NPAGE 0x8000 /* Next page bit */ + +#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \ + ADVERTISE_CSMA) +#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \ + ADVERTISE_100HALF | ADVERTISE_100FULL) + +/* Link partner ability register. */ +#define LPA_SLCT 0x001f /* Same as advertise selector */ +#define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */ +#define LPA_1000XFULL 0x0020 /* Can do 1000BASE-X full-duplex */ +#define LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */ +#define LPA_1000XHALF 0x0040 /* Can do 1000BASE-X half-duplex */ +#define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */ +#define LPA_1000XPAUSE 0x0080 /* Can do 1000BASE-X pause */ +#define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */ +#define LPA_1000XPAUSE_ASYM 0x0100 /* Can do 1000BASE-X pause asym*/ +#define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */ +#define LPA_PAUSE_CAP 0x0400 /* Can pause */ +#define LPA_PAUSE_ASYM 0x0800 /* Can pause asymetrically */ +#define LPA_RESV 0x1000 /* Unused... */ +#define LPA_RFAULT 0x2000 /* Link partner faulted */ +#define LPA_LPACK 0x4000 /* Link partner acked us */ +#define LPA_NPAGE 0x8000 /* Next page bit */ + +#define LPA_DUPLEX (LPA_10FULL | LPA_100FULL) +#define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4) + +/* Expansion register for auto-negotiation. */ +#define EXPANSION_NWAY 0x0001 /* Can do N-way auto-nego */ +#define EXPANSION_LCWP 0x0002 /* Got new RX page code word */ +#define EXPANSION_ENABLENPAGE 0x0004 /* This enables npage words */ +#define EXPANSION_NPCAPABLE 0x0008 /* Link partner supports npage */ +#define EXPANSION_MFAULTS 0x0010 /* Multiple faults detected */ +#define EXPANSION_RESV 0xffe0 /* Unused... */ + +#define ESTATUS_1000_TFULL 0x2000 /* Can do 1000BT Full */ +#define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */ + +/* N-way test register. */ +#define NWAYTEST_RESV1 0x00ff /* Unused... */ +#define NWAYTEST_LOOPBACK 0x0100 /* Enable loopback for N-way */ +#define NWAYTEST_RESV2 0xfe00 /* Unused... */ + +/* 1000BASE-T Control register */ +#define ADVERTISE_1000FULL 0x0200 /* Advertise 1000BASE-T full duplex */ +#define ADVERTISE_1000HALF 0x0100 /* Advertise 1000BASE-T half duplex */ + +/* 1000BASE-T Status register */ +#define LPA_1000LOCALRXOK 0x2000 /* Link partner local receiver status */ +#define LPA_1000REMRXOK 0x1000 /* Link partner remote receiver status */ +#define LPA_1000FULL 0x0800 /* Link partner 1000BASE-T full duplex */ +#define LPA_1000HALF 0x0400 /* Link partner 1000BASE-T half duplex */ + +#endif diff --git a/bsp/mini4020/drivers/sdcard.c b/bsp/mini4020/drivers/sdcard.c index 4e4ed961e2..9b802d2ecf 100644 --- a/bsp/mini4020/drivers/sdcard.c +++ b/bsp/mini4020/drivers/sdcard.c @@ -1,790 +1,790 @@ -/*
- * File : sdcard.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2007 - 2012, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date Author Notes
- * 2007-12-02 Yi.Qiu the first version
- * 2010-01-01 Bernard Modify for mini2440
- * 2010-10-13 Wangmeng Added sep4020 support
- */
-
-#include "sdcard.h"
-//#include <dfs_config.h>
-
-volatile rt_int32_t RCA;
-
-#ifdef RT_USING_DFS
-
-/* RT-Thread Device Driver Interface */
-#include <rtthread.h>
-#include <dfs_fs.h>
-
-/*GLOBAL SD DEVICE PONITER*/
-static struct sd_device *ptr_sddev;
-static rt_uint8_t gsec_buf[SECTOR_SIZE];
-
-#define USE_TIMEOUT
-
-/*This file is to power on/off the SEP4020 SDC*/
+/* + * File : sdcard.c + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2007 - 2012, RT-Thread Development Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rt-thread.org/license/LICENSE + * + * Change Logs: + * Date Author Notes + * 2007-12-02 Yi.Qiu the first version + * 2010-01-01 Bernard Modify for mini2440 + * 2010-10-13 Wangmeng Added sep4020 support + */ + +#include "sdcard.h" +//#include <dfs_config.h> + +volatile rt_int32_t RCA; + +#ifdef RT_USING_DFS + +/* RT-Thread Device Driver Interface */ +#include <rtthread.h> +#include <dfs_fs.h> + +/*GLOBAL SD DEVICE PONITER*/ +static struct sd_device *ptr_sddev; +static rt_uint8_t gsec_buf[SECTOR_SIZE]; + +#define USE_TIMEOUT + +/*This file is to power on/off the SEP4020 SDC*/ /** * This function will power on/off the SEP4020 SDC * * @param sd_ctl: 0/power on; 1/power off * @return none * - */
-static void sd_pwr(int sd_ctl)
-{
- if (sd_ctl)
- {
- *(RP)GPIO_PORTA_SEL |= 0x0200;
- *(RP)GPIO_PORTA_DIR &= (~0x0200);
- *(RP)GPIO_PORTA_DATA |= 0x0200;
- }
- else
- {
-
- *(RP)GPIO_PORTA_SEL |= 0x0200;
- *(RP)GPIO_PORTA_DIR &= (~0x0200);
- *(RP)GPIO_PORTA_DATA &= (~0x0200);
- }
-}
-
-/*a nop operation to delay*/
-static void delay (U32 j)
-{
- U32 i;
-
- for (i=0;i<j;i++)
- {};
-
-}
-/*
-* Send the command to set the data transfer mode
-* @param cmd:the command to sent
-* @param arg:the argument of the command
-* @param mode:SDC transfer mode
-* @param blk_len:the block size of each data
-* @param num:number of blocks
-* @param mask:sdc interrupt mask
-*/
-static rt_err_t cmd_data(U16 cmd,U32 arg,U16 mode,U16 blk_len,U16 num,U16 mask)
-{
- U32 i;
- #ifdef USE_TIMEOUT
- U32 to = 10000;
- #endif
-
- *(RP)SDC_CLOCK_CONTROL = 0Xff00; //����SDʱ�ӣ�512��Ƶ,�ر�SD ʱ��
- *(RP)SDC_CLOCK_CONTROL = 0Xff04; //��SDʱ�ӣ�512��Ƶ,����SD ʱ��
- *(RP)SDC_INTERRUPT_STATUS_MASK = mask; //�ж�״̬���μĴ�����ֵ
-
- *(RP)SDC_TRANSFER_MODE = mode; //����ģʽѡ��Ĵ�����ֵ
-
- *(RP)SDC_BLOCK_SIZE = blk_len; //���ݿ鳤�ȼĴ�����ֵ
- *(RP)SDC_BLOCK_COUNT = num; //���ݿ���Ŀ�Ĵ�����ֵ
- *(RP)SDC_ARGUMENT = arg; //��������Ĵ�����ֵ
- *(RP)SDC_COMMAND = cmd; //������ƼĴ�����ֵ
-
- delay(10);
-
- i = *(RP)SDC_INTERRUPT_STATUS & 0x1000;
-
- while(i != 0x1000) //�жϣ��Ƿ��������ϣ������յ���Ӧ
- {
- i = *(RP)SDC_INTERRUPT_STATUS & 0x1000;
- #ifdef USE_TIMEOUT
- to --;
- if(!to)
- {
- EOUT("%s TIMEOUT\n",__FUNCTION__);
- return RT_ETIMEOUT;
- }
- #endif
- }
- delay(160);
-
- #ifdef USE_TIMEOUT
- //DBOUT("cmd_data TO is %d\n",to);
- #endif
-
- return *(RP)SDC_RESPONSE0; //�����������Ϣ
-}
-
-static rt_err_t cmd_response(U16 Cmd,U32 Arg,U16 TransMode,U16 BlkLen,U16 Nob,U16 IntMask)
-{
- U32 i;
- #ifdef USE_TIMEOUT
- U32 to = 50000;
- #endif
-
- *(RP)SDC_CLOCK_CONTROL=0Xff00; //����SDʱ��
-
- *(RP)SDC_CLOCK_CONTROL=0Xff04; //��SDʱ��
-
-
- *(RP)SDC_INTERRUPT_STATUS_MASK=IntMask; //�ж�״̬���μĴ�����ֵ
- *(RP)SDC_TRANSFER_MODE=TransMode; //����ģʽѡ��Ĵ�����ֵ
- *(RP)SDC_BLOCK_SIZE=BlkLen; //���ݿ鳤�ȼĴ�����ֵ
- *(RP)SDC_BLOCK_COUNT=Nob; //���ݿ���Ŀ�Ĵ�����ֵ
- *(RP)SDC_ARGUMENT=Arg; //��������Ĵ�����ֵ
- *(RP)SDC_COMMAND=Cmd; //������ƼĴ�����ֵ
-
- delay(10);
-
- i = *(RP)SDC_INTERRUPT_STATUS & 0x1040;
-
- while(i != 0x1040) //�жϣ��������ϣ������յ���Ӧ�����ݴ�����ϡ��������Ƿ��Ѿ�����ɡ�
- {
- i = *(RP)SDC_INTERRUPT_STATUS & 0x1040;
- #ifdef USE_TIMEOUT
- to--;
- if(!to)
- {
- EOUT("%s Timeout\n",__FUNCTION__);
- return RT_ETIMEOUT;
- }
- #endif
- }
-
- //DBOUT("cmd_response TO is %d\n",to);
- delay(100);
-
- return RT_EOK; //�����������Ϣ
-}
-static rt_err_t cmd_wait(U16 Cmd,U32 Arg,U16 IntMask )
-{
- int i;
- #ifdef USE_TIMEOUT
- U32 to=200000;
- #endif
-
- *(RP)SDC_CLOCK_CONTROL=0Xff00; //����SDʱ��
-
- *(RP)SDC_CLOCK_CONTROL=0Xff04; //��SDʱ��
-
- *(RP)SDC_COMMAND=Cmd; //������ƼĴ�����ֵ
-
- *(RP)SDC_INTERRUPT_STATUS_MASK=IntMask; //�ж�״̬���μĴ�����ֵ
-
- *(RP)SDC_ARGUMENT=Arg; //��������Ĵ�����ֵ
-
- i = *(RP)SDC_INTERRUPT_STATUS & 0x1000;
-
- while(i != 0x1000) //�жϣ��Ƿ��������ϣ������յ���Ӧ
- {
- i = *(RP)SDC_INTERRUPT_STATUS & 0x1000;
- #ifdef USE_TIMEOUT
- to--;
- if(!to)
- {
- EOUT("%s Timeout\n",__FUNCTION__);
- return RT_ETIMEOUT;
- }
- #endif
-
- }
-
- //DBOUT("cmd_wait TO is %d\n",to);
-
- delay(10);
-
- return RT_EOK; //�����������Ϣ�Լ���ֵ1
-}
-/**
- * This function will set a hook function, which will be invoked when a memory
- * block is allocated from heap memory.
- *
- * @param hook the hook function
- */
-static rt_err_t sd_init(void)
-{
- rt_err_t err;
- #ifdef USE_TIMEOUT
- rt_uint32_t to=1000;
- #endif
- sd_pwr(1);
-
- *(RP)SDC_SOFTWARE_RESET=0x0; //��������λ,����д0�ǽ���reset
- delay(200);
- *(RP)SDC_SOFTWARE_RESET=0x1; //����������λ
- delay(200);
-
- cmd_wait(0x08,0x0,0xfff); //CMD0�������ʹ��
-
- do
- {
- err = cmd_wait(0x6ea,0x0,0xfff); //CMD55,�����ACMD����
-
- #ifdef USE_TIMEOUT
- if(err != RT_EOK)
- {
- EOUT("cmd_wait err in %s\n",__FUNCTION__);
- return RT_ETIMEOUT;
- }
- #endif
-
- delay(3);
- err = cmd_wait(0x52a,0x80ff8000,0xfff); //ACMD41����SD��������������ȴ�SD������ȷ���յ�����
- if(err != RT_EOK)
- {
- EOUT("cmd_wait err in %s\n",__FUNCTION__);
- return RT_ETIMEOUT;
- }
- #ifdef USE_TIMEOUT
- to--;
- if(!to)
- {
- EOUT("%s timeout\n",__FUNCTION__);
- return RT_ETIMEOUT;
- }
- #endif
-
- }while(*(RP)SDC_RESPONSE0<0X80008000);
-
- #ifdef USE_TIMEOUT
- //DBOUT("%s TO is %d\n",__FUNCTION__,to);
- #endif
-
- cmd_data(0x49,0X0,0X0,0x0,0x0,0Xfff);//CMD2������CID
- cmd_data(0x6a,0X0,0X0,0x0,0x0,0Xfff);//CMD3��ѯ�ʿ�Ƭ�����µ���ص�ַ
- RCA = *(RP)SDC_RESPONSE0;
- cmd_data(0xea,RCA,0X0,0x0,0x0,0Xfff);//CMD7������ѡ���Ե���ز���
-
- return RT_EOK;
-}
-
-/**
- * This function will set a hook function, which will be invoked when a memory
- * block is allocated from heap memory.
- *
- * @param hook the hook function
- */
-static rt_err_t sd_readblock(rt_uint32_t address, rt_uint8_t* buf)
-{
- U32 complete,i;
- rt_uint8_t temp;
- rt_err_t err;
- UNUSED rt_uint32_t discard;
- #ifdef USE_TIMEOUT
- rt_uint32_t to = 10;
- #endif
-
-
- //rt_kprintf("in readblock:%x\n",address);
- //Clear all the errors & interrups
- *(RP)DMAC_INTINTERRCLR |= 0x1;
- *(RP)DMAC_INTINTERRCLR &= ~0x1;
- *(RP)DMAC_INTTCCLEAR |= 0x1;
- *(RP)DMAC_INTTCCLEAR &= ~0x1;
-
- /*Clear read fifo*/
- *(RP)(SDC_INTERRUPT_STATUS_MASK) = ~(0x1<<9); //don't mask fifo empty
- while((*(RP)SDC_INTERRUPT_STATUS)&0x200 != 0x200)
- discard = *(RP)SDC_READ_BUFER_ACCESS;
-
- /*DMAC2,word,size=0x80*/
- *(RP)DMAC_C2SRCADDR = SDC_READ_BUFER_ACCESS;
- *(RP)DMAC_C2DESTADDR = (rt_uint32_t)buf;
- *(RP)DMAC_C2CONTROL =0x20249b;
- *(RP)DMAC_C2CONFIGURATION = 0x38d;
-
- err = cmd_wait(0x6ea,RCA,0xfff);
- if(err != RT_EOK)
- {
- rt_set_errno(err);
- return err;
- }
-
- err = cmd_wait(0xca,0x2,0xfff);
- if(err != RT_EOK)
- {
- rt_set_errno(err);
- return err;
- }
-
- err = cmd_response(0x22e,address,0X1,0x0200,0x1,0Xfff); //CMD17 4bit mode
- if(err != RT_EOK)
- {
- rt_set_errno(err);
- return err;
- }
-
- complete = *(RP)SDC_INTERRUPT_STATUS;
-
- /*CRC*/
- if((complete |0xfffffffd) !=0xfffffffd)
- {
- rt_kprintf("CRC ERROR!!!\n");
- complete = *(RP)SDC_INTERRUPT_STATUS;
- }
- while(((*(RP)( DMAC_INTTCSTATUS)) & 0x4) != 0x4 )
- {
- delay(10);
- #ifdef USE_TIMEOUT
- to--;
- if(!to)
- {
- EOUT("%s TIMEOUT\n",__FUNCTION__);
- return RT_ETIMEOUT;
- }
- #endif
- }
- #ifdef USE_TIMEOUT
- //DBOUT("%s timeout is %d\n",__FUNCTION__,to);
- #endif
- /*for the buf is big-endian we must reverse it*/
- for(i = 0;i<0x80;i++)
- {
- temp = buf[0];
- buf[0] = buf[3];
- buf[3] = temp;
-
- temp = buf[1];
- buf[1] = buf[2];
- buf[2] = temp;
-
- buf += 4;
- }
-
- return RT_EOK;
-}
-
-static rt_uint8_t sd_readmultiblock(rt_uint32_t address, rt_uint8_t* buf,rt_uint32_t size)
-{
- rt_int32_t index;
- rt_uint8_t status=RT_EOK;
-
- for(index = 0;index < size;index++)
- {
- status = sd_readblock(address+index*SECTOR_SIZE,buf+index*SECTOR_SIZE);
- if(status!=RT_EOK)
- break;
- }
- return status;
-}
-
-/**
- * This function will set a hook function, which will be invoked when a memory
- * block is allocated from heap memory.
- *
- * @param hook the hook function
- */
-static rt_uint8_t sd_writeblock(rt_uint32_t address, rt_uint8_t* buf)
-{
- U32 complete;
- rt_uint8_t temp;
- rt_uint8_t *ptr = buf;
- rt_err_t err;
- #ifdef USE_TIMEOUT
- rt_uint32_t to = 10;
- #endif
-
- int i;
-
- rt_kprintf("in writeblock:%x\n",address);
-
- /*for the buf is big-endian we must reverse it*/
- for(i = 0;i<0x80;i++)
- {
- temp = ptr[0];
- ptr[0] = ptr[3];
- ptr[3] = temp;
-
- temp = ptr[1];
- ptr[1] = ptr[2];
- ptr[2] = temp;
-
- ptr += 4;
- }
- //Clear all the errors & interrups
- *(RP)DMAC_INTINTERRCLR |= 0x1;
- *(RP)DMAC_INTINTERRCLR &= ~0x1;
- *(RP)DMAC_INTTCCLEAR |= 0x1;
- *(RP)DMAC_INTTCCLEAR &= ~0x1;
-
- //***********************����DMA2������λд*************************
- *(RP)DMAC_C2SRCADDR = (U32)buf; //DMAC��2Դ��ַ��Ϊ0x30200000
- *(RP)DMAC_C2DESTADDR = SDC_WRITE_BUFER_ACCESS; //DMAC��2Ŀ�ĵ�ַ��Ϊ����FIFO�ĵ�ַ
- *(RP)DMAC_C2CONTROL = 0x20149b; //����ߴ�0x080,Դ��ַ����Ŀ�ĵ�ַ�����ӣ��������32bit���������Ŀ4
- *(RP)DMAC_C2CONFIGURATION = 0x380b; //�����δ����жϣ����δ����жϣ�ͨ��ʹ�ܣ��������ͣ��洢��������
-
-
- err = cmd_wait(0x6ea,RCA,0xfff); //CMD55�������ACMD����
- if(err != RT_EOK)
- {
- rt_set_errno(err);
- return err;
- }
-
- err = cmd_wait(0xca,0x2,0xfff); //ACMD6�����������߿��ȣ�48 λ�̷����������ݴ���
- if(err != RT_EOK)
- {
- rt_set_errno(err);
- return err;
- }
-
- err = cmd_response(0x30e,address,0X3,0x0200,0x1,0Xfff); //CMD24 1bit mode
- if(err != RT_EOK)
- {
- rt_set_errno(err);
- return err;
- }
-
- complete = *(RP)SDC_INTERRUPT_STATUS;
-
- if((complete |0xfffffffe) !=0xfffffffe) //��Ӧ��ʱ����
- {
- //printf("CRC ERROR");
- complete = *(RP)SDC_INTERRUPT_STATUS;
- }
-
- while(((*(RP)( DMAC_INTTCSTATUS)) & 0x4) != 0x4 )
- {
- delay(10);
- #ifdef USE_TIMEOUT
- to--;
- if(!to)
- {
- EOUT("%s TIMEOUT\n",__FUNCTION__);
- }
- #endif
- }
- #ifdef USE_TIMEOUT
- //DBOUT("%s timeout is %d\n",__FUNCTION__,to);
- #endif
-
- return RT_EOK;
-}
-
-
-/**
- * This function will set a hook function, which will be invoked when a memory
- * block is allocated from heap memory.
- *
- * @param hook the hook function
- */
-static rt_err_t rt_sdcard_init(rt_device_t dev)
-{
- return 0;
-}
-
-/**
- * This function will set a hook function, which will be invoked when a memory
- * block is allocated from heap memory.
- *
- * @param hook the hook function
- */
-static rt_err_t rt_sdcard_open(rt_device_t dev, rt_uint16_t oflag)
-{
- return 0;
-}
-
-/**
- * This function will set a hook function, which will be invoked when a memory
- * block is allocated from heap memory.
- *
- * @param hook the hook function
- */
-static rt_err_t rt_sdcard_close(rt_device_t dev)
-{
- return 0;
-}
-
-/**
- * This function will set a hook function, which will be invoked when a memory
- * block is allocated from heap memory.
- *
- * @param hook the hook function
- */
-static rt_err_t rt_sdcard_control(rt_device_t dev, rt_uint8_t cmd, void *args)
-{
- rt_kprintf("cmd = %d\n",cmd);
- RT_ASSERT(dev != RT_NULL);
-
- if (cmd == RT_DEVICE_CTRL_BLK_GETGEOME)
- {
- struct rt_device_blk_geometry *geometry;
-
- geometry = (struct rt_device_blk_geometry *)args;
- if (geometry == RT_NULL) return -RT_ERROR;
-
- geometry->bytes_per_sector = 512;
- geometry->block_size = 0x200000;
- //if (CardType == SDIO_HIGH_CAPACITY_SD_CARD)
- // geometry->sector_count = (SDCardInfo.SD_csd.DeviceSize + 1) * 1024;
- //else
- geometry->sector_count = 0x200000;//SDCardInfo.CardCapacity/SDCardInfo.CardBlockSize;
- }
-
- return RT_EOK;
-}
-
-/**
- * This function will set a hook function, which will be invoked when a memory
- * block is allocated from heap memory.
- *
- * @param hook the hook function
- */
-static rt_size_t rt_sdcard_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
-{
- rt_uint32_t retry = 3;
- rt_uint8_t status;
- rt_uint32_t index;
-
- ///*take the semaphore
- struct dfs_partition *part = (struct dfs_partition *)dev->user_data;
- rt_sem_take(part->lock, RT_WAITING_FOREVER);
- while(retry--)
- {
- if (((rt_uint32_t)buffer % 4 != 0) ||
- ((rt_uint32_t)buffer > 0x20080000))
- {
- for(index = 0;index < size;index++)
- {
- status = sd_readblock((part->offset + pos) * SECTOR_SIZE,ptr_sddev->sec_buf);
- if(status != RT_EOK)
- break;
-
- rt_memcpy((rt_uint8_t *)buffer + (index * SECTOR_SIZE),ptr_sddev->sec_buf,SECTOR_SIZE);
- }
- }
- else
- {
- for(index = 0;index<size;index++)
- {
- status = sd_readblock((pos) * SECTOR_SIZE,(rt_uint8_t*)buffer + index * SECTOR_SIZE);
- if(status != RT_EOK)
- break;
- }
- }
-
- }
- rt_sem_release(part->lock);
-
- if (status == RT_EOK)
- return size;
-
- rt_kprintf("read failed: %d, buffer 0x%08x\n", status, buffer);
- return 0;
-
-}
-
-/**
- * This function will set a hook function, which will be invoked when a memory
- * block is allocated from heap memory.
- *
- * @param hook the hook function
- */
-static rt_size_t rt_sdcard_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
-{
- int i;
- rt_uint8_t status;
-
- struct dfs_partition *part = (struct dfs_partition *)dev->user_data;
-
- if ( dev == RT_NULL )
- {
- rt_set_errno(-DFS_STATUS_EINVAL);
- return 0;
- }
-
- rt_sem_take(part->lock, RT_WAITING_FOREVER);
-
- if (((rt_uint32_t)buffer % 4 != 0) ||
- ((rt_uint32_t)buffer > 0x20080000))
- {
- rt_uint32_t index;
-
- for(index=0;index<size;index++)
- {
- rt_memcpy(ptr_sddev->sec_buf, ((rt_uint8_t*)buffer + index * SECTOR_SIZE), SECTOR_SIZE);
- status = sd_writeblock((part->offset + index + pos)*SECTOR_SIZE,ptr_sddev->sec_buf);
- }
- }
- else
- {
-
- for(i=0;i<size;i++)
- {
- status = sd_writeblock((part->offset + i + pos)*SECTOR_SIZE,
- (rt_uint8_t*)((rt_uint8_t*)buffer + i * SECTOR_SIZE));
- if (status != RT_EOK) break;
- }
- }
-
- rt_sem_release(part->lock);
-
- if (status == RT_EOK)
- return size;
-
- rt_kprintf("read failed: %d, buffer 0x%08x\n", status, buffer);
- return 0;
-}
-
-
-rt_err_t rt_hw_sdcard_exit()
-{
- if(ptr_sddev->device != RT_NULL)
- rt_free(ptr_sddev->device);
- if(ptr_sddev->part != RT_NULL)
- rt_free(ptr_sddev->part);
- if(ptr_sddev != RT_NULL)
- rt_free(ptr_sddev);
-
- return RT_EOK;
-}
-
-/**
- * This function will init sd card
- *
- * @param void
- */
-rt_err_t rt_hw_sdcard_init()
-{
- /*For test*/
- rt_err_t err;
- rt_int32_t i;
-
- char dname[4];
- char sname[8];
-
- /*Initialize structure*/
-
- ptr_sddev = (struct sd_device*)rt_malloc(sizeof(struct sd_device));
- if(ptr_sddev == RT_NULL)
- {
- EOUT("Failed to allocate sdcard device structure\n");
- return RT_ENOMEM;
- }
-
- /*sdcard intialize*/
- err = sd_init();
- if(err != RT_EOK)
- goto FAIL2;
-
- /*set sector buffer*/
- ptr_sddev->sec_buf = gsec_buf;
- ptr_sddev->buf_size = SECTOR_SIZE;
- ptr_sddev->sdc = (struct sd_c*)SD_BASE;
-
- //DBOUT("allocate partition sector buffer OK!");
-
- err = sd_readblock(0,ptr_sddev->sec_buf);
- if(err != RT_EOK)
- {
- EOUT("read first block error\n");
- goto FAIL2;
- }
-
- /*sdcard driver initialize*/
- ptr_sddev->part = (struct dfs_partition*)rt_malloc(4 * sizeof(struct dfs_partition));
- if(ptr_sddev->part == RT_NULL)
- {
- EOUT("allocate partition failed\n");
- err = RT_ENOMEM;
- goto FAIL2;
- }
-
- /*alloc device buffer*/
- ptr_sddev->device = (struct rt_device*)rt_malloc(4 * sizeof(struct rt_device));
- if(ptr_sddev->device == RT_NULL)
- {
- EOUT("allocate device failed\n");
- err = RT_ENOMEM;
- goto FAIL1;
- }
-
- ptr_sddev->part_num = 0;
-
- err = sd_readblock(0,ptr_sddev->sec_buf);
-
- if(err != RT_EOK)
- {
- EOUT("Read block 0 to initialize ERROR\n");
- goto FAIL1;
- }
-
- for(i=0; i<4; i++)
- {
- /* get the first partition */
- err = dfs_filesystem_get_partition(&(ptr_sddev->part[i]), ptr_sddev->sec_buf, i);
- if (err == RT_EOK)
- {
- rt_snprintf(dname, 4, "sd%d", i);
- rt_snprintf(sname, 8, "sem_sd%d", i);
- ptr_sddev->part[i].lock = rt_sem_create(sname, 1, RT_IPC_FLAG_FIFO);
-
- /* register sdcard device */
- ptr_sddev->device[i].init = rt_sdcard_init;
- ptr_sddev->device[i].open = rt_sdcard_open;
- ptr_sddev->device[i].close = rt_sdcard_close;
- ptr_sddev->device[i].read = rt_sdcard_read;
- ptr_sddev->device[i].write = rt_sdcard_write;
- ptr_sddev->device[i].control = rt_sdcard_control;
- ptr_sddev->device[i].user_data= &ptr_sddev->part[i];
-
- err = rt_device_register(&ptr_sddev->device[i], dname,
- RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE);
-
- if(err == RT_EOK)
- ptr_sddev->part_num++;
- }
- else
- {
- if(i == 0)
- {
- /* there is no partition table */
- ptr_sddev->part[0].offset = 0;
- ptr_sddev->part[0].size = 0;
- ptr_sddev->part[0].lock = rt_sem_create("sem_sd0", 1, RT_IPC_FLAG_FIFO);
-
- /* register sdcard device */
- ptr_sddev->device[0].init = rt_sdcard_init;
- ptr_sddev->device[0].open = rt_sdcard_open;
- ptr_sddev->device[0].close = rt_sdcard_close;
- ptr_sddev->device[0].read = rt_sdcard_read;
- ptr_sddev->device[0].write = rt_sdcard_write;
- ptr_sddev->device[0].control = rt_sdcard_control;
- ptr_sddev->device[0].user_data= &ptr_sddev->part[0];
-
- err = rt_device_register(&ptr_sddev->device[0], "sd0",
- RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE);
-
- if(err == RT_EOK)
- ptr_sddev->part_num++;
-
- break;
- }
- }
- }
-
- if(ptr_sddev->part_num == 0)
- goto FAIL0;
-
- return err;
-
- FAIL0:
- rt_free(ptr_sddev->device);
- ptr_sddev->device = RT_NULL;
-
- FAIL1:
- rt_free(ptr_sddev->part);
- ptr_sddev->part = RT_NULL;
-
- FAIL2:
- rt_free(ptr_sddev);
- ptr_sddev = RT_NULL;
-
- return err;
-
-
-}
-
-#endif
+ */ +static void sd_pwr(int sd_ctl) +{ + if (sd_ctl) + { + *(RP)GPIO_PORTA_SEL |= 0x0200; + *(RP)GPIO_PORTA_DIR &= (~0x0200); + *(RP)GPIO_PORTA_DATA |= 0x0200; + } + else + { + + *(RP)GPIO_PORTA_SEL |= 0x0200; + *(RP)GPIO_PORTA_DIR &= (~0x0200); + *(RP)GPIO_PORTA_DATA &= (~0x0200); + } +} + +/*a nop operation to delay*/ +static void delay (U32 j) +{ + U32 i; + + for (i=0;i<j;i++) + {}; + +} +/* +* Send the command to set the data transfer mode +* @param cmd:the command to sent +* @param arg:the argument of the command +* @param mode:SDC transfer mode +* @param blk_len:the block size of each data +* @param num:number of blocks +* @param mask:sdc interrupt mask +*/ +static rt_err_t cmd_data(U16 cmd,U32 arg,U16 mode,U16 blk_len,U16 num,U16 mask) +{ + U32 i; + #ifdef USE_TIMEOUT + U32 to = 10000; + #endif + + *(RP)SDC_CLOCK_CONTROL = 0Xff00; //����SDʱ�ӣ�512��Ƶ,�ر�SD ʱ�� + *(RP)SDC_CLOCK_CONTROL = 0Xff04; //��SDʱ�ӣ�512��Ƶ,����SD ʱ�� + *(RP)SDC_INTERRUPT_STATUS_MASK = mask; //�ж�״̬���μĴ�����ֵ + + *(RP)SDC_TRANSFER_MODE = mode; //����ģʽѡ��Ĵ�����ֵ + + *(RP)SDC_BLOCK_SIZE = blk_len; //���ݿ鳤�ȼĴ�����ֵ + *(RP)SDC_BLOCK_COUNT = num; //���ݿ���Ŀ�Ĵ�����ֵ + *(RP)SDC_ARGUMENT = arg; //��������Ĵ�����ֵ + *(RP)SDC_COMMAND = cmd; //������ƼĴ�����ֵ + + delay(10); + + i = *(RP)SDC_INTERRUPT_STATUS & 0x1000; + + while(i != 0x1000) //�жϣ��Ƿ��������ϣ������յ���Ӧ + { + i = *(RP)SDC_INTERRUPT_STATUS & 0x1000; + #ifdef USE_TIMEOUT + to --; + if(!to) + { + EOUT("%s TIMEOUT\n",__FUNCTION__); + return RT_ETIMEOUT; + } + #endif + } + delay(160); + + #ifdef USE_TIMEOUT + //DBOUT("cmd_data TO is %d\n",to); + #endif + + return *(RP)SDC_RESPONSE0; //�����������Ϣ +} + +static rt_err_t cmd_response(U16 Cmd,U32 Arg,U16 TransMode,U16 BlkLen,U16 Nob,U16 IntMask) +{ + U32 i; + #ifdef USE_TIMEOUT + U32 to = 50000; + #endif + + *(RP)SDC_CLOCK_CONTROL=0Xff00; //����SDʱ�� + + *(RP)SDC_CLOCK_CONTROL=0Xff04; //��SDʱ�� + + + *(RP)SDC_INTERRUPT_STATUS_MASK=IntMask; //�ж�״̬���μĴ�����ֵ + *(RP)SDC_TRANSFER_MODE=TransMode; //����ģʽѡ��Ĵ�����ֵ + *(RP)SDC_BLOCK_SIZE=BlkLen; //���ݿ鳤�ȼĴ�����ֵ + *(RP)SDC_BLOCK_COUNT=Nob; //���ݿ���Ŀ�Ĵ�����ֵ + *(RP)SDC_ARGUMENT=Arg; //��������Ĵ�����ֵ + *(RP)SDC_COMMAND=Cmd; //������ƼĴ�����ֵ + + delay(10); + + i = *(RP)SDC_INTERRUPT_STATUS & 0x1040; + + while(i != 0x1040) //�жϣ��������ϣ������յ���Ӧ�����ݴ�����ϡ��������Ƿ��Ѿ�����ɡ� + { + i = *(RP)SDC_INTERRUPT_STATUS & 0x1040; + #ifdef USE_TIMEOUT + to--; + if(!to) + { + EOUT("%s Timeout\n",__FUNCTION__); + return RT_ETIMEOUT; + } + #endif + } + + //DBOUT("cmd_response TO is %d\n",to); + delay(100); + + return RT_EOK; //�����������Ϣ +} +static rt_err_t cmd_wait(U16 Cmd,U32 Arg,U16 IntMask ) +{ + int i; + #ifdef USE_TIMEOUT + U32 to=200000; + #endif + + *(RP)SDC_CLOCK_CONTROL=0Xff00; //����SDʱ�� + + *(RP)SDC_CLOCK_CONTROL=0Xff04; //��SDʱ�� + + *(RP)SDC_COMMAND=Cmd; //������ƼĴ�����ֵ + + *(RP)SDC_INTERRUPT_STATUS_MASK=IntMask; //�ж�״̬���μĴ�����ֵ + + *(RP)SDC_ARGUMENT=Arg; //��������Ĵ�����ֵ + + i = *(RP)SDC_INTERRUPT_STATUS & 0x1000; + + while(i != 0x1000) //�жϣ��Ƿ��������ϣ������յ���Ӧ + { + i = *(RP)SDC_INTERRUPT_STATUS & 0x1000; + #ifdef USE_TIMEOUT + to--; + if(!to) + { + EOUT("%s Timeout\n",__FUNCTION__); + return RT_ETIMEOUT; + } + #endif + + } + + //DBOUT("cmd_wait TO is %d\n",to); + + delay(10); + + return RT_EOK; //�����������Ϣ�Լ���ֵ1 +} +/** + * This function will set a hook function, which will be invoked when a memory + * block is allocated from heap memory. + * + * @param hook the hook function + */ +static rt_err_t sd_init(void) +{ + rt_err_t err; + #ifdef USE_TIMEOUT + rt_uint32_t to=1000; + #endif + sd_pwr(1); + + *(RP)SDC_SOFTWARE_RESET=0x0; //��������λ,����д0�ǽ���reset + delay(200); + *(RP)SDC_SOFTWARE_RESET=0x1; //����������λ + delay(200); + + cmd_wait(0x08,0x0,0xfff); //CMD0�������ʹ�� + + do + { + err = cmd_wait(0x6ea,0x0,0xfff); //CMD55,���л���ACMD���� + + #ifdef USE_TIMEOUT + if(err != RT_EOK) + { + EOUT("cmd_wait err in %s\n",__FUNCTION__); + return RT_ETIMEOUT; + } + #endif + + delay(3); + err = cmd_wait(0x52a,0x80ff8000,0xfff); //ACMD41����SD��������������ȴ�SD������ȷ���յ����� + if(err != RT_EOK) + { + EOUT("cmd_wait err in %s\n",__FUNCTION__); + return RT_ETIMEOUT; + } + #ifdef USE_TIMEOUT + to--; + if(!to) + { + EOUT("%s timeout\n",__FUNCTION__); + return RT_ETIMEOUT; + } + #endif + + }while(*(RP)SDC_RESPONSE0<0X80008000); + + #ifdef USE_TIMEOUT + //DBOUT("%s TO is %d\n",__FUNCTION__,to); + #endif + + cmd_data(0x49,0X0,0X0,0x0,0x0,0Xfff);//CMD2������CID + cmd_data(0x6a,0X0,0X0,0x0,0x0,0Xfff);//CMD3��ѯ�ʿ�Ƭ�����µ���ص�ַ + RCA = *(RP)SDC_RESPONSE0; + cmd_data(0xea,RCA,0X0,0x0,0x0,0Xfff);//CMD7������ѡ���Ե���ز��� + + return RT_EOK; +} + +/** + * This function will set a hook function, which will be invoked when a memory + * block is allocated from heap memory. + * + * @param hook the hook function + */ +static rt_err_t sd_readblock(rt_uint32_t address, rt_uint8_t* buf) +{ + U32 complete,i; + rt_uint8_t temp; + rt_err_t err; + UNUSED rt_uint32_t discard; + #ifdef USE_TIMEOUT + rt_uint32_t to = 10; + #endif + + + //rt_kprintf("in readblock:%x\n",address); + //Clear all the errors & interrups + *(RP)DMAC_INTINTERRCLR |= 0x1; + *(RP)DMAC_INTINTERRCLR &= ~0x1; + *(RP)DMAC_INTTCCLEAR |= 0x1; + *(RP)DMAC_INTTCCLEAR &= ~0x1; + + /*Clear read fifo*/ + *(RP)(SDC_INTERRUPT_STATUS_MASK) = ~(0x1<<9); //don't mask fifo empty + while((*(RP)SDC_INTERRUPT_STATUS)&0x200 != 0x200) + discard = *(RP)SDC_READ_BUFER_ACCESS; + + /*DMAC2,word,size=0x80*/ + *(RP)DMAC_C2SRCADDR = SDC_READ_BUFER_ACCESS; + *(RP)DMAC_C2DESTADDR = (rt_uint32_t)buf; + *(RP)DMAC_C2CONTROL =0x20249b; + *(RP)DMAC_C2CONFIGURATION = 0x38d; + + err = cmd_wait(0x6ea,RCA,0xfff); + if(err != RT_EOK) + { + rt_set_errno(err); + return err; + } + + err = cmd_wait(0xca,0x2,0xfff); + if(err != RT_EOK) + { + rt_set_errno(err); + return err; + } + + err = cmd_response(0x22e,address,0X1,0x0200,0x1,0Xfff); //CMD17 4bit mode + if(err != RT_EOK) + { + rt_set_errno(err); + return err; + } + + complete = *(RP)SDC_INTERRUPT_STATUS; + + /*CRC*/ + if((complete |0xfffffffd) !=0xfffffffd) + { + rt_kprintf("CRC ERROR!!!\n"); + complete = *(RP)SDC_INTERRUPT_STATUS; + } + while(((*(RP)( DMAC_INTTCSTATUS)) & 0x4) != 0x4 ) + { + delay(10); + #ifdef USE_TIMEOUT + to--; + if(!to) + { + EOUT("%s TIMEOUT\n",__FUNCTION__); + return RT_ETIMEOUT; + } + #endif + } + #ifdef USE_TIMEOUT + //DBOUT("%s timeout is %d\n",__FUNCTION__,to); + #endif + /*for the buf is big-endian we must reverse it*/ + for(i = 0;i<0x80;i++) + { + temp = buf[0]; + buf[0] = buf[3]; + buf[3] = temp; + + temp = buf[1]; + buf[1] = buf[2]; + buf[2] = temp; + + buf += 4; + } + + return RT_EOK; +} + +static rt_uint8_t sd_readmultiblock(rt_uint32_t address, rt_uint8_t* buf,rt_uint32_t size) +{ + rt_int32_t index; + rt_uint8_t status=RT_EOK; + + for(index = 0;index < size;index++) + { + status = sd_readblock(address+index*SECTOR_SIZE,buf+index*SECTOR_SIZE); + if(status!=RT_EOK) + break; + } + return status; +} + +/** + * This function will set a hook function, which will be invoked when a memory + * block is allocated from heap memory. + * + * @param hook the hook function + */ +static rt_uint8_t sd_writeblock(rt_uint32_t address, rt_uint8_t* buf) +{ + U32 complete; + rt_uint8_t temp; + rt_uint8_t *ptr = buf; + rt_err_t err; + #ifdef USE_TIMEOUT + rt_uint32_t to = 10; + #endif + + int i; + + rt_kprintf("in writeblock:%x\n",address); + + /*for the buf is big-endian we must reverse it*/ + for(i = 0;i<0x80;i++) + { + temp = ptr[0]; + ptr[0] = ptr[3]; + ptr[3] = temp; + + temp = ptr[1]; + ptr[1] = ptr[2]; + ptr[2] = temp; + + ptr += 4; + } + //Clear all the errors & interrups + *(RP)DMAC_INTINTERRCLR |= 0x1; + *(RP)DMAC_INTINTERRCLR &= ~0x1; + *(RP)DMAC_INTTCCLEAR |= 0x1; + *(RP)DMAC_INTTCCLEAR &= ~0x1; + + //***********************����DMA2������λд************************* + *(RP)DMAC_C2SRCADDR = (U32)buf; //DMAC��2Դ��ַ��Ϊ0x30200000 + *(RP)DMAC_C2DESTADDR = SDC_WRITE_BUFER_ACCESS; //DMAC��2Ŀ�ĵ�ַ��Ϊ����FIFO�ĵ�ַ + *(RP)DMAC_C2CONTROL = 0x20149b; //����ߴ�0x080,Դ��ַ����Ŀ�ĵ�ַ�����ӣ��������32bit���������Ŀ4 + *(RP)DMAC_C2CONFIGURATION = 0x380b; //�����δ����жϣ����δ����жϣ�ͨ��ʹ�ܣ��������ͣ��洢�������� + + + err = cmd_wait(0x6ea,RCA,0xfff); //CMD55�����л���ACMD���� + if(err != RT_EOK) + { + rt_set_errno(err); + return err; + } + + err = cmd_wait(0xca,0x2,0xfff); //ACMD6�����������߿��ȣ�48 λ�̷����������ݴ��� + if(err != RT_EOK) + { + rt_set_errno(err); + return err; + } + + err = cmd_response(0x30e,address,0X3,0x0200,0x1,0Xfff); //CMD24 1bit mode + if(err != RT_EOK) + { + rt_set_errno(err); + return err; + } + + complete = *(RP)SDC_INTERRUPT_STATUS; + + if((complete |0xfffffffe) !=0xfffffffe) //��Ӧ��ʱ���� + { + //printf("CRC ERROR"); + complete = *(RP)SDC_INTERRUPT_STATUS; + } + + while(((*(RP)( DMAC_INTTCSTATUS)) & 0x4) != 0x4 ) + { + delay(10); + #ifdef USE_TIMEOUT + to--; + if(!to) + { + EOUT("%s TIMEOUT\n",__FUNCTION__); + } + #endif + } + #ifdef USE_TIMEOUT + //DBOUT("%s timeout is %d\n",__FUNCTION__,to); + #endif + + return RT_EOK; +} + + +/** + * This function will set a hook function, which will be invoked when a memory + * block is allocated from heap memory. + * + * @param hook the hook function + */ +static rt_err_t rt_sdcard_init(rt_device_t dev) +{ + return 0; +} + +/** + * This function will set a hook function, which will be invoked when a memory + * block is allocated from heap memory. + * + * @param hook the hook function + */ +static rt_err_t rt_sdcard_open(rt_device_t dev, rt_uint16_t oflag) +{ + return 0; +} + +/** + * This function will set a hook function, which will be invoked when a memory + * block is allocated from heap memory. + * + * @param hook the hook function + */ +static rt_err_t rt_sdcard_close(rt_device_t dev) +{ + return 0; +} + +/** + * This function will set a hook function, which will be invoked when a memory + * block is allocated from heap memory. + * + * @param hook the hook function + */ +static rt_err_t rt_sdcard_control(rt_device_t dev, rt_uint8_t cmd, void *args) +{ + rt_kprintf("cmd = %d\n",cmd); + RT_ASSERT(dev != RT_NULL); + + if (cmd == RT_DEVICE_CTRL_BLK_GETGEOME) + { + struct rt_device_blk_geometry *geometry; + + geometry = (struct rt_device_blk_geometry *)args; + if (geometry == RT_NULL) return -RT_ERROR; + + geometry->bytes_per_sector = 512; + geometry->block_size = 0x200000; + //if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) + // geometry->sector_count = (SDCardInfo.SD_csd.DeviceSize + 1) * 1024; + //else + geometry->sector_count = 0x200000;//SDCardInfo.CardCapacity/SDCardInfo.CardBlockSize; + } + + return RT_EOK; +} + +/** + * This function will set a hook function, which will be invoked when a memory + * block is allocated from heap memory. + * + * @param hook the hook function + */ +static rt_size_t rt_sdcard_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size) +{ + rt_uint32_t retry = 3; + rt_uint8_t status; + rt_uint32_t index; + + ///*take the semaphore + struct dfs_partition *part = (struct dfs_partition *)dev->user_data; + rt_sem_take(part->lock, RT_WAITING_FOREVER); + while(retry--) + { + if (((rt_uint32_t)buffer % 4 != 0) || + ((rt_uint32_t)buffer > 0x20080000)) + { + for(index = 0;index < size;index++) + { + status = sd_readblock((part->offset + pos) * SECTOR_SIZE,ptr_sddev->sec_buf); + if(status != RT_EOK) + break; + + rt_memcpy((rt_uint8_t *)buffer + (index * SECTOR_SIZE),ptr_sddev->sec_buf,SECTOR_SIZE); + } + } + else + { + for(index = 0;index<size;index++) + { + status = sd_readblock((pos) * SECTOR_SIZE,(rt_uint8_t*)buffer + index * SECTOR_SIZE); + if(status != RT_EOK) + break; + } + } + + } + rt_sem_release(part->lock); + + if (status == RT_EOK) + return size; + + rt_kprintf("read failed: %d, buffer 0x%08x\n", status, buffer); + return 0; + +} + +/** + * This function will set a hook function, which will be invoked when a memory + * block is allocated from heap memory. + * + * @param hook the hook function + */ +static rt_size_t rt_sdcard_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size) +{ + int i; + rt_uint8_t status; + + struct dfs_partition *part = (struct dfs_partition *)dev->user_data; + + if ( dev == RT_NULL ) + { + rt_set_errno(-DFS_STATUS_EINVAL); + return 0; + } + + rt_sem_take(part->lock, RT_WAITING_FOREVER); + + if (((rt_uint32_t)buffer % 4 != 0) || + ((rt_uint32_t)buffer > 0x20080000)) + { + rt_uint32_t index; + + for(index=0;index<size;index++) + { + rt_memcpy(ptr_sddev->sec_buf, ((rt_uint8_t*)buffer + index * SECTOR_SIZE), SECTOR_SIZE); + status = sd_writeblock((part->offset + index + pos)*SECTOR_SIZE,ptr_sddev->sec_buf); + } + } + else + { + + for(i=0;i<size;i++) + { + status = sd_writeblock((part->offset + i + pos)*SECTOR_SIZE, + (rt_uint8_t*)((rt_uint8_t*)buffer + i * SECTOR_SIZE)); + if (status != RT_EOK) break; + } + } + + rt_sem_release(part->lock); + + if (status == RT_EOK) + return size; + + rt_kprintf("read failed: %d, buffer 0x%08x\n", status, buffer); + return 0; +} + + +rt_err_t rt_hw_sdcard_exit() +{ + if(ptr_sddev->device != RT_NULL) + rt_free(ptr_sddev->device); + if(ptr_sddev->part != RT_NULL) + rt_free(ptr_sddev->part); + if(ptr_sddev != RT_NULL) + rt_free(ptr_sddev); + + return RT_EOK; +} + +/** + * This function will init sd card + * + * @param void + */ +rt_err_t rt_hw_sdcard_init() +{ + /*For test*/ + rt_err_t err; + rt_int32_t i; + + char dname[4]; + char sname[8]; + + /*Initialize structure*/ + + ptr_sddev = (struct sd_device*)rt_malloc(sizeof(struct sd_device)); + if(ptr_sddev == RT_NULL) + { + EOUT("Failed to allocate sdcard device structure\n"); + return RT_ENOMEM; + } + + /*sdcard intialize*/ + err = sd_init(); + if(err != RT_EOK) + goto FAIL2; + + /*set sector buffer*/ + ptr_sddev->sec_buf = gsec_buf; + ptr_sddev->buf_size = SECTOR_SIZE; + ptr_sddev->sdc = (struct sd_c*)SD_BASE; + + //DBOUT("allocate partition sector buffer OK!"); + + err = sd_readblock(0,ptr_sddev->sec_buf); + if(err != RT_EOK) + { + EOUT("read first block error\n"); + goto FAIL2; + } + + /*sdcard driver initialize*/ + ptr_sddev->part = (struct dfs_partition*)rt_malloc(4 * sizeof(struct dfs_partition)); + if(ptr_sddev->part == RT_NULL) + { + EOUT("allocate partition failed\n"); + err = RT_ENOMEM; + goto FAIL2; + } + + /*alloc device buffer*/ + ptr_sddev->device = (struct rt_device*)rt_malloc(4 * sizeof(struct rt_device)); + if(ptr_sddev->device == RT_NULL) + { + EOUT("allocate device failed\n"); + err = RT_ENOMEM; + goto FAIL1; + } + + ptr_sddev->part_num = 0; + + err = sd_readblock(0,ptr_sddev->sec_buf); + + if(err != RT_EOK) + { + EOUT("Read block 0 to initialize ERROR\n"); + goto FAIL1; + } + + for(i=0; i<4; i++) + { + /* get the first partition */ + err = dfs_filesystem_get_partition(&(ptr_sddev->part[i]), ptr_sddev->sec_buf, i); + if (err == RT_EOK) + { + rt_snprintf(dname, 4, "sd%d", i); + rt_snprintf(sname, 8, "sem_sd%d", i); + ptr_sddev->part[i].lock = rt_sem_create(sname, 1, RT_IPC_FLAG_FIFO); + + /* register sdcard device */ + ptr_sddev->device[i].init = rt_sdcard_init; + ptr_sddev->device[i].open = rt_sdcard_open; + ptr_sddev->device[i].close = rt_sdcard_close; + ptr_sddev->device[i].read = rt_sdcard_read; + ptr_sddev->device[i].write = rt_sdcard_write; + ptr_sddev->device[i].control = rt_sdcard_control; + ptr_sddev->device[i].user_data= &ptr_sddev->part[i]; + + err = rt_device_register(&ptr_sddev->device[i], dname, + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE); + + if(err == RT_EOK) + ptr_sddev->part_num++; + } + else + { + if(i == 0) + { + /* there is no partition table */ + ptr_sddev->part[0].offset = 0; + ptr_sddev->part[0].size = 0; + ptr_sddev->part[0].lock = rt_sem_create("sem_sd0", 1, RT_IPC_FLAG_FIFO); + + /* register sdcard device */ + ptr_sddev->device[0].init = rt_sdcard_init; + ptr_sddev->device[0].open = rt_sdcard_open; + ptr_sddev->device[0].close = rt_sdcard_close; + ptr_sddev->device[0].read = rt_sdcard_read; + ptr_sddev->device[0].write = rt_sdcard_write; + ptr_sddev->device[0].control = rt_sdcard_control; + ptr_sddev->device[0].user_data= &ptr_sddev->part[0]; + + err = rt_device_register(&ptr_sddev->device[0], "sd0", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE); + + if(err == RT_EOK) + ptr_sddev->part_num++; + + break; + } + } + } + + if(ptr_sddev->part_num == 0) + goto FAIL0; + + return err; + + FAIL0: + rt_free(ptr_sddev->device); + ptr_sddev->device = RT_NULL; + + FAIL1: + rt_free(ptr_sddev->part); + ptr_sddev->part = RT_NULL; + + FAIL2: + rt_free(ptr_sddev); + ptr_sddev = RT_NULL; + + return err; + + +} + +#endif diff --git a/bsp/mini4020/drivers/sdcard.h b/bsp/mini4020/drivers/sdcard.h index 4a499846f8..ce19f8f48c 100644 --- a/bsp/mini4020/drivers/sdcard.h +++ b/bsp/mini4020/drivers/sdcard.h @@ -1,61 +1,61 @@ -/*
- * File : sdcard.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date Author Notes
- */
-
-#ifndef __SDCARD_H
-#define __SDCARD_H
-
-#include <rtthread.h>
-
-#ifdef RT_USING_DFS
-
-#include <sep4020.h>
-
-#define INICLK 300000
-#define SDCLK 24000000 //PCLK=49.392MHz
-#define MMCCLK 15000000 //PCLK=49.392MHz
-
-/*struct of the SDC*/
-struct sd_c
-{
- __IO rt_uint32_t clk_ctl;
- __IO rt_uint32_t soft_rst;
- __IO rt_uint32_t arg;
- __IO rt_uint32_t cmd;
- __IO rt_uint32_t blk_sz;
- __IO rt_uint32_t blk_cnt;
- __IO rt_uint32_t trans_mode;
- __O rt_uint32_t response0;
- __O rt_uint32_t response1;
- __O rt_uint32_t response2;
- __O rt_uint32_t response3;
- __IO rt_uint32_t rd_to_ctl;
- __IO rt_uint32_t int_stat;
- __IO rt_uint32_t int_stat_mask;
- __O rt_uint32_t rx_fifo;
- __I rt_uint32_t tx_fifo;
-};
-
-/*sdcard driver structure*/
-struct sd_device
-{
- struct rt_device *device; /*rt_device*/
- struct sd_c *sdc; /*SDCARD register*/
- struct dfs_partition *part; /*dfs partitions*/
- rt_uint8_t *sec_buf; /*sdcard buffer*/
- rt_uint32_t part_num; /*partiont numbers*/
- rt_uint32_t buf_size; /*buffer size*/
-};
-
-#endif
-#endif
-
+/* + * File : sdcard.h + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rt-thread.org/license/LICENSE + * + * Change Logs: + * Date Author Notes + */ + +#ifndef __SDCARD_H +#define __SDCARD_H + +#include <rtthread.h> + +#ifdef RT_USING_DFS + +#include <sep4020.h> + +#define INICLK 300000 +#define SDCLK 24000000 //PCLK=49.392MHz +#define MMCCLK 15000000 //PCLK=49.392MHz + +/*struct of the SDC*/ +struct sd_c +{ + __IO rt_uint32_t clk_ctl; + __IO rt_uint32_t soft_rst; + __IO rt_uint32_t arg; + __IO rt_uint32_t cmd; + __IO rt_uint32_t blk_sz; + __IO rt_uint32_t blk_cnt; + __IO rt_uint32_t trans_mode; + __O rt_uint32_t response0; + __O rt_uint32_t response1; + __O rt_uint32_t response2; + __O rt_uint32_t response3; + __IO rt_uint32_t rd_to_ctl; + __IO rt_uint32_t int_stat; + __IO rt_uint32_t int_stat_mask; + __O rt_uint32_t rx_fifo; + __I rt_uint32_t tx_fifo; +}; + +/*sdcard driver structure*/ +struct sd_device +{ + struct rt_device *device; /*rt_device*/ + struct sd_c *sdc; /*SDCARD register*/ + struct dfs_partition *part; /*dfs partitions*/ + rt_uint8_t *sec_buf; /*sdcard buffer*/ + rt_uint32_t part_num; /*partiont numbers*/ + rt_uint32_t buf_size; /*buffer size*/ +}; + +#endif +#endif + diff --git a/bsp/mini4020/rtconfig.h b/bsp/mini4020/rtconfig.h index 2361f70a4b..2f0060b6aa 100644 --- a/bsp/mini4020/rtconfig.h +++ b/bsp/mini4020/rtconfig.h @@ -1,198 +1,198 @@ -/* RT-Thread config file */
-#ifndef __RTTHREAD_CFG_H__
-#define __RTTHREAD_CFG_H__
-
-/* RT_NAME_MAX*/
-#define RT_NAME_MAX 8
-
-/* RT_ALIGN_SIZE*/
-#define RT_ALIGN_SIZE 4
-
-/* PRIORITY_MAX */
-#define RT_THREAD_PRIORITY_MAX 256
-
-/* Tick per Second */
-#define RT_TICK_PER_SECOND 100
-
-/* SECTION: RT_DEBUG */
-/* Thread Debug */
-#define RT_DEBUG
-/* #define RT_THREAD_DEBUG */
-
-#define RT_USING_OVERFLOW_CHECK
-
-/* Using Hook */
-#define RT_USING_HOOK
-
-/* Using Software Timer */
-#define RT_USING_TIMER_SOFT
-#define RT_TIMER_THREAD_PRIO 8
-#define RT_TIMER_THREAD_STACK_SIZE 512
-#define RT_TIMER_TICK_PER_SECOND 10
-
-/* SECTION: IPC */
-/* Using Semaphore */
-#define RT_USING_SEMAPHORE
-
-/* Using Mutex */
-#define RT_USING_MUTEX
-
-/* Using Event */
-#define RT_USING_EVENT
-
-/* Using MailBox */
-#define RT_USING_MAILBOX
-
-/* Using Message Queue */
-#define RT_USING_MESSAGEQUEUE
-
-/* SECTION: Memory Management */
-/* Using Memory Pool Management*/
-#define RT_USING_MEMPOOL
-
-/* Using Dynamic Heap Management */
-#define RT_USING_HEAP
-
-/* Using Small MM */
-/* #define RT_USING_SMALL_MEM */
-
-/* Using SLAB Allocator */
-#define RT_USING_SLAB
-
-/* SECTION: Device System */
-/* Using Device System */
-#define RT_USING_DEVICE
-
-/* SECTION: Console options */
-/* the buffer size of console */
-#define RT_CONSOLEBUF_SIZE 128
-
-/* SECTION: finsh, a C-Express shell */
-/* Using FinSH as Shell*/
-#define RT_USING_FINSH
-#define FINSH_USING_SYMTAB
-#define FINSH USING DESCRIPTION
-
-/* SECTION: a runtime libc library */
-/* a runtime libc library */
-/* #define RT_USING_NEWLIB */
-
-/* SECTION: a mini libc */
-
-/* SECTION: C++ support */
-/* Using C++ support */
-/* #define RT_USING_CPLUSPLUS */
-
-/* SECTION: Device filesystem support */
-/* using DFS support */
-#define RT_USING_DFS
-#define RT_USING_DFS_ELMFAT
-/* #define RT_USING_DFS_YAFFS2 */
-
-/* #define DFS_USING_WORKDIR */
-
-/* the max number of mounted filesystem */
-#define DFS_FILESYSTEMS_MAX 2
-/* the max number of opened files */
-#define DFS_FD_MAX 16
-/* the max number of cached sector */
-#define DFS_CACHE_MAX_NUM 4
-
-/* SECTION: lwip, a lighwight TCP/IP protocol stack */
-/* Using lighweight TCP/IP protocol stack */
-#define RT_USING_LWIP
-#define RT_LWIP_DNS
-
-/* Trace LwIP protocol */
-/* #define RT_LWIP_DEBUG */
-
-/* Enable ICMP protocol */
-#define RT_LWIP_ICMP
-
-/* Enable IGMP protocol */
-#define RT_LWIP_IGMP
-
-/* Enable UDP protocol */
-#define RT_LWIP_UDP
-
-/* Enable TCP protocol */
-#define RT_LWIP_TCP
-
-/* the number of simulatenously active TCP connections*/
-#define RT_LWIP_TCP_PCB_NUM 5
-
-/* TCP sender buffer space */
-#define RT_LWIP_TCP_SND_BUF 1024*10
-
-/* TCP receive window. */
-#define RT_LWIP_TCP_WND 1024
-
-/* Enable SNMP protocol */
-/* #define RT_LWIP_SNMP */
-
-/* Using DHCP */
-/* #define RT_LWIP_DHCP */
-
-/* ip address of target */
-#define RT_LWIP_IPADDR0 192
-#define RT_LWIP_IPADDR1 168
-#define RT_LWIP_IPADDR2 1
-#define RT_LWIP_IPADDR3 30
-
-/* gateway address of target */
-#define RT_LWIP_GWADDR0 192
-#define RT_LWIP_GWADDR1 168
-#define RT_LWIP_GWADDR2 1
-#define RT_LWIP_GWADDR3 1
-
-/* mask address of target */
-#define RT_LWIP_MSKADDR0 255
-#define RT_LWIP_MSKADDR1 255
-#define RT_LWIP_MSKADDR2 255
-#define RT_LWIP_MSKADDR3 0
-
-/* the number of blocks for pbuf */
-#define RT_LWIP_PBUF_NUM 16
-
-/* thread priority of tcpip thread */
-#define RT_LWIP_TCPTHREAD_PRIORITY 128
-
-/* mail box size of tcpip thread to wait for */
-#define RT_LWIP_TCPTHREAD_MBOX_SIZE 8
-
-/* thread stack size of tcpip thread */
-#define RT_LWIP_TCPTHREAD_STACKSIZE 4096
-
-/* thread priority of ethnetif thread */
-#define RT_LWIP_ETHTHREAD_PRIORITY 144
-
-/* mail box size of ethnetif thread to wait for */
-#define RT_LWIP_ETHTHREAD_MBOX_SIZE 32
-
-/* thread stack size of ethnetif thread */
-#define RT_LWIP_ETHTHREAD_STACKSIZE 1024
-
-/* SECTION: RTGUI support */
-/* using RTGUI support */
-/* #define RT_USING_RTGUI */
-
-/* name length of RTGUI object */
-#define RTGUI_NAME_MAX 16
-/* support 16 weight font */
-#define RTGUI_USING_FONT16
-/* support 16 weight font */
-#define RTGUI_USING_FONT12
-/* support Chinese font */
-#define RTGUI_USING_FONTHZ
-/* use DFS as file interface */
-#define RTGUI_USING_DFS_FILERW
-/* use font file as Chinese font */
-/* #define RTGUI_USING_HZ_FILE */
-/* use Chinese bitmap font */
-#define RTGUI_USING_HZ_BMP
-/* use small size in RTGUI */
-/* #define RTGUI_USING_SMALL_SIZE */
-/* use mouse cursor */
-/* #define RTGUI_USING_MOUSE_CURSOR */
-
-#endif
+/* RT-Thread config file */ +#ifndef __RTTHREAD_CFG_H__ +#define __RTTHREAD_CFG_H__ + +/* RT_NAME_MAX*/ +#define RT_NAME_MAX 8 + +/* RT_ALIGN_SIZE*/ +#define RT_ALIGN_SIZE 4 + +/* PRIORITY_MAX */ +#define RT_THREAD_PRIORITY_MAX 256 + +/* Tick per Second */ +#define RT_TICK_PER_SECOND 100 + +/* SECTION: RT_DEBUG */ +/* Thread Debug */ +#define RT_DEBUG +/* #define RT_THREAD_DEBUG */ + +#define RT_USING_OVERFLOW_CHECK + +/* Using Hook */ +#define RT_USING_HOOK + +/* Using Software Timer */ +#define RT_USING_TIMER_SOFT +#define RT_TIMER_THREAD_PRIO 8 +#define RT_TIMER_THREAD_STACK_SIZE 512 +#define RT_TIMER_TICK_PER_SECOND 10 + +/* SECTION: IPC */ +/* Using Semaphore */ +#define RT_USING_SEMAPHORE + +/* Using Mutex */ +#define RT_USING_MUTEX + +/* Using Event */ +#define RT_USING_EVENT + +/* Using MailBox */ +#define RT_USING_MAILBOX + +/* Using Message Queue */ +#define RT_USING_MESSAGEQUEUE + +/* SECTION: Memory Management */ +/* Using Memory Pool Management*/ +#define RT_USING_MEMPOOL + +/* Using Dynamic Heap Management */ +#define RT_USING_HEAP + +/* Using Small MM */ +/* #define RT_USING_SMALL_MEM */ + +/* Using SLAB Allocator */ +#define RT_USING_SLAB + +/* SECTION: Device System */ +/* Using Device System */ +#define RT_USING_DEVICE + +/* SECTION: Console options */ +/* the buffer size of console */ +#define RT_CONSOLEBUF_SIZE 128 + +/* SECTION: finsh, a C-Express shell */ +/* Using FinSH as Shell*/ +#define RT_USING_FINSH +#define FINSH_USING_SYMTAB +#define FINSH USING DESCRIPTION + +/* SECTION: a runtime libc library */ +/* a runtime libc library */ +/* #define RT_USING_NEWLIB */ + +/* SECTION: a mini libc */ + +/* SECTION: C++ support */ +/* Using C++ support */ +/* #define RT_USING_CPLUSPLUS */ + +/* SECTION: Device filesystem support */ +/* using DFS support */ +#define RT_USING_DFS +#define RT_USING_DFS_ELMFAT +/* #define RT_USING_DFS_YAFFS2 */ + +/* #define DFS_USING_WORKDIR */ + +/* the max number of mounted filesystem */ +#define DFS_FILESYSTEMS_MAX 2 +/* the max number of opened files */ +#define DFS_FD_MAX 16 +/* the max number of cached sector */ +#define DFS_CACHE_MAX_NUM 4 + +/* SECTION: lwip, a lighwight TCP/IP protocol stack */ +/* Using lighweight TCP/IP protocol stack */ +#define RT_USING_LWIP +#define RT_LWIP_DNS + +/* Trace LwIP protocol */ +/* #define RT_LWIP_DEBUG */ + +/* Enable ICMP protocol */ +#define RT_LWIP_ICMP + +/* Enable IGMP protocol */ +#define RT_LWIP_IGMP + +/* Enable UDP protocol */ +#define RT_LWIP_UDP + +/* Enable TCP protocol */ +#define RT_LWIP_TCP + +/* the number of simulatenously active TCP connections*/ +#define RT_LWIP_TCP_PCB_NUM 5 + +/* TCP sender buffer space */ +#define RT_LWIP_TCP_SND_BUF 1024*10 + +/* TCP receive window. */ +#define RT_LWIP_TCP_WND 1024 + +/* Enable SNMP protocol */ +/* #define RT_LWIP_SNMP */ + +/* Using DHCP */ +/* #define RT_LWIP_DHCP */ + +/* ip address of target */ +#define RT_LWIP_IPADDR0 192 +#define RT_LWIP_IPADDR1 168 +#define RT_LWIP_IPADDR2 1 +#define RT_LWIP_IPADDR3 30 + +/* gateway address of target */ +#define RT_LWIP_GWADDR0 192 +#define RT_LWIP_GWADDR1 168 +#define RT_LWIP_GWADDR2 1 +#define RT_LWIP_GWADDR3 1 + +/* mask address of target */ +#define RT_LWIP_MSKADDR0 255 +#define RT_LWIP_MSKADDR1 255 +#define RT_LWIP_MSKADDR2 255 +#define RT_LWIP_MSKADDR3 0 + +/* the number of blocks for pbuf */ +#define RT_LWIP_PBUF_NUM 16 + +/* thread priority of tcpip thread */ +#define RT_LWIP_TCPTHREAD_PRIORITY 128 + +/* mail box size of tcpip thread to wait for */ +#define RT_LWIP_TCPTHREAD_MBOX_SIZE 8 + +/* thread stack size of tcpip thread */ +#define RT_LWIP_TCPTHREAD_STACKSIZE 4096 + +/* thread priority of ethnetif thread */ +#define RT_LWIP_ETHTHREAD_PRIORITY 144 + +/* mail box size of ethnetif thread to wait for */ +#define RT_LWIP_ETHTHREAD_MBOX_SIZE 32 + +/* thread stack size of ethnetif thread */ +#define RT_LWIP_ETHTHREAD_STACKSIZE 1024 + +/* SECTION: RTGUI support */ +/* using RTGUI support */ +/* #define RT_USING_RTGUI */ + +/* name length of RTGUI object */ +#define RTGUI_NAME_MAX 16 +/* support 16 weight font */ +#define RTGUI_USING_FONT16 +/* support 16 weight font */ +#define RTGUI_USING_FONT12 +/* support Chinese font */ +#define RTGUI_USING_FONTHZ +/* use DFS as file interface */ +#define RTGUI_USING_DFS_FILERW +/* use font file as Chinese font */ +/* #define RTGUI_USING_HZ_FILE */ +/* use Chinese bitmap font */ +#define RTGUI_USING_HZ_BMP +/* use small size in RTGUI */ +/* #define RTGUI_USING_SMALL_SIZE */ +/* use mouse cursor */ +/* #define RTGUI_USING_MOUSE_CURSOR */ + +#endif diff --git a/bsp/mini4020/rtconfig.py b/bsp/mini4020/rtconfig.py index 85c1a16a7b..f3aac45cdb 100644 --- a/bsp/mini4020/rtconfig.py +++ b/bsp/mini4020/rtconfig.py @@ -1,84 +1,84 @@ -import os
-
-# toolchains options
-ARCH = 'arm'
-CPU = 'sep4020'
-TextBase = '0x30100000'
-
-CROSS_TOOL = 'keil'
-
-if os.getenv('RTT_CC'):
- CROSS_TOOL = os.getenv('RTT_CC')
-
-if CROSS_TOOL == 'gcc':
- print '================ERROR============================'
- print 'Not support gcc yet!'
- print '================================================='
- exit(0)
-elif CROSS_TOOL == 'keil':
- PLATFORM = 'armcc'
- EXEC_PATH = 'c:/Keil'
-elif CROSS_TOOL == 'iar':
- print '================ERROR============================'
- print 'Not support iar yet!'
- print '================================================='
- exit(0)
-
-if os.getenv('RTT_EXEC_PATH'):
- EXEC_PATH = os.getenv('RTT_EXEC_PATH')
-
-BUILD = 'debug'
-
-if PLATFORM == 'gcc':
- # toolchains
- PREFIX = 'arm-none-eabi-'
- CC = PREFIX + 'gcc'
- AS = PREFIX + 'gcc'
- AR = PREFIX + 'ar'
- LINK = PREFIX + 'gcc'
- TARGET_EXT = 'axf'
- SIZE = PREFIX + 'size'
- OBJDUMP = PREFIX + 'objdump'
- OBJCPY = PREFIX + 'objcopy'
-
- DEVICE = ' -mcpu=arm720t'
- CFLAGS = DEVICE
- AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp' + ' -DTEXT_BASE=' + TextBase
- LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread_mini4020.map,-cref,-u,_start -T mini4020_rom.ld' + ' -Ttext ' + TextBase
-
- CPATH = ''
- LPATH = ''
-
- if BUILD == 'debug':
- CFLAGS += ' -O0 -gdwarf-2'
- AFLAGS += ' -gdwarf-2'
- else:
- CFLAGS += ' -O2'
-
- POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
-
-elif PLATFORM == 'armcc':
- # toolchains
- CC = 'armcc'
- AS = 'armasm'
- AR = 'armar'
- LINK = 'armlink'
- TARGET_EXT = 'axf'
-
- DEVICE = ' --device DARMP'
- CFLAGS = DEVICE + ' --apcs=interwork --diag_suppress=870'
- AFLAGS = DEVICE
- LFLAGS = DEVICE + ' --strict --info sizes --info totals --info unused --info veneers --list rtthread-mini4020.map -scatter rtthread-mini4020.sct'
-
- CFLAGS += ' -I"' + EXEC_PATH + '/ARM/RV31/INC"'
- LFLAGS += ' --libpath "' + EXEC_PATH + '/ARM/RV31/LIB"'
-
- EXEC_PATH += '/arm/bin40/'
-
- if BUILD == 'debug':
- CFLAGS += ' -g -O0'
- AFLAGS += ' -g'
- else:
- CFLAGS += ' -O2'
-
- POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
+import os + +# toolchains options +ARCH = 'arm' +CPU = 'sep4020' +TextBase = '0x30100000' + +CROSS_TOOL = 'keil' + +if os.getenv('RTT_CC'): + CROSS_TOOL = os.getenv('RTT_CC') + +if CROSS_TOOL == 'gcc': + print '================ERROR============================' + print 'Not support gcc yet!' + print '=================================================' + exit(0) +elif CROSS_TOOL == 'keil': + PLATFORM = 'armcc' + EXEC_PATH = 'c:/Keil' +elif CROSS_TOOL == 'iar': + print '================ERROR============================' + print 'Not support iar yet!' + print '=================================================' + exit(0) + +if os.getenv('RTT_EXEC_PATH'): + EXEC_PATH = os.getenv('RTT_EXEC_PATH') + +BUILD = 'debug' + +if PLATFORM == 'gcc': + # toolchains + PREFIX = 'arm-none-eabi-' + CC = PREFIX + 'gcc' + AS = PREFIX + 'gcc' + AR = PREFIX + 'ar' + LINK = PREFIX + 'gcc' + TARGET_EXT = 'axf' + SIZE = PREFIX + 'size' + OBJDUMP = PREFIX + 'objdump' + OBJCPY = PREFIX + 'objcopy' + + DEVICE = ' -mcpu=arm720t' + CFLAGS = DEVICE + AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp' + ' -DTEXT_BASE=' + TextBase + LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread_mini4020.map,-cref,-u,_start -T mini4020_rom.ld' + ' -Ttext ' + TextBase + + CPATH = '' + LPATH = '' + + if BUILD == 'debug': + CFLAGS += ' -O0 -gdwarf-2' + AFLAGS += ' -gdwarf-2' + else: + CFLAGS += ' -O2' + + POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' + +elif PLATFORM == 'armcc': + # toolchains + CC = 'armcc' + AS = 'armasm' + AR = 'armar' + LINK = 'armlink' + TARGET_EXT = 'axf' + + DEVICE = ' --device DARMP' + CFLAGS = DEVICE + ' --apcs=interwork --diag_suppress=870' + AFLAGS = DEVICE + LFLAGS = DEVICE + ' --strict --info sizes --info totals --info unused --info veneers --list rtthread-mini4020.map -scatter rtthread-mini4020.sct' + + CFLAGS += ' -I"' + EXEC_PATH + '/ARM/RV31/INC"' + LFLAGS += ' --libpath "' + EXEC_PATH + '/ARM/RV31/LIB"' + + EXEC_PATH += '/arm/bin40/' + + if BUILD == 'debug': + CFLAGS += ' -g -O0' + AFLAGS += ' -g' + else: + CFLAGS += ' -O2' + + POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET' |
