summaryrefslogtreecommitdiff
path: root/bsp/mipssim
diff options
context:
space:
mode:
authorJiaxun Yang <[email protected]>2019-12-07 00:55:46 +0800
committerJiaxun Yang <[email protected]>2019-12-11 15:24:42 +0800
commit9ef986929cb2c39485da89ec39ad80316a5a9965 (patch)
tree120b1834931f58f568df8ab0bed5d9036893f909 /bsp/mipssim
parent7c6650186100add61ef16c13fb120ad1161f6f1d (diff)
[libcpu] mips: Merge loongson_1 into gs232
Previously Loongson 1B and Loongson 1C have their own libcpu implemention, but they're almost identical. So we merge them into gs232 and adapt to new common code. Signed-off-by: Jiaxun Yang <[email protected]>
Diffstat (limited to 'bsp/mipssim')
0 files changed, 0 insertions, 0 deletions