Add Infineon Doc and modify file structure

6 files changed, 146 insertions, 13 deletions

diff --git a/bsp/renesas/ra6m3-ek/.settings/standalone.prefs b/bsp/renesas/ra6m3-ek/.settings/standalone.prefs
index c3d6bc3dc2..6d8f324b22 100644
--- a/bsp/renesas/ra6m3-ek/.settings/standalone.prefs
+++ b/bsp/renesas/ra6m3-ek/.settings/standalone.prefs
@@ -1,19 +1,21 @@
-#Fri Nov 18 18:05:07 CST 2022
+#Wed Jan 11 18:29:06 CST 2023
 com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#3.5.0/libraries=
 com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m3\#\#fsp\#\#\#\#3.5.0/libraries=
 com.renesas.cdt.ddsc.content/com.renesas.cdt.ddsc.content.defaultlinkerscript=script/fsp.scat
-com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m3\#\#fsp\#\#\#\#3.5.0/all=3427620923,ra/fsp/src/bsp/mcu/ra6m3/bsp_mcu_info.h|143358381,ra/fsp/src/bsp/mcu/ra6m3/bsp_elc.h|2743353138,ra/fsp/src/bsp/mcu/ra6m3/bsp_feature.h
-com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#3.5.0/all=568600546,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c|1630997354,ra/fsp/src/bsp/mcu/all/bsp_irq.c|4222527282,ra/fsp/src/bsp/mcu/all/bsp_module_stop.h|731782070,ra/fsp/src/bsp/mcu/all/bsp_irq.h|2386285210,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/renesas.h|3255765648,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c|546480625,ra/fsp/inc/fsp_common_api.h|2977689308,ra/fsp/src/bsp/mcu/all/bsp_mcu_api.h|3549961311,ra/fsp/src/bsp/mcu/all/bsp_tfu.h|1939984091,ra/fsp/inc/api/r_ioport_api.h|1904866635,ra/fsp/src/bsp/mcu/all/bsp_clocks.h|2308894280,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h|1236602439,ra/fsp/src/bsp/mcu/all/bsp_io.c|3492513568,ra/fsp/src/bsp/mcu/all/bsp_register_protection.c|460577388,ra/fsp/src/bsp/mcu/all/bsp_io.h|1728953905,ra/fsp/inc/fsp_features.h|2906400,ra/fsp/src/bsp/mcu/all/bsp_common.c|2425160085,ra/fsp/inc/api/bsp_api.h|1992062042,ra/fsp/src/bsp/mcu/all/bsp_compiler_support.h|4051445857,ra/fsp/src/bsp/mcu/all/bsp_common.h|3984836408,ra/fsp/src/bsp/mcu/all/bsp_group_irq.h|2208590403,ra/fsp/inc/instances/r_ioport.h|400573940,ra/fsp/src/bsp/mcu/all/bsp_register_protection.h|1499520276,ra/fsp/src/bsp/mcu/all/bsp_group_irq.c|1615019982,ra/fsp/src/bsp/mcu/all/bsp_sbrk.c|1353647784,ra/fsp/src/bsp/mcu/all/bsp_delay.c|3998046333,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/base_addresses.h|1552630912,ra/fsp/src/bsp/mcu/all/bsp_guard.h|470601830,ra/fsp/src/bsp/mcu/all/bsp_clocks.c|3983299396,ra/fsp/src/bsp/mcu/all/bsp_delay.h|3297195641,ra/fsp/inc/fsp_version.h|521902797,ra/fsp/src/bsp/mcu/all/bsp_security.h|2920829723,ra/fsp/src/bsp/mcu/all/bsp_guard.c|3753300083,ra/fsp/src/bsp/mcu/all/bsp_arm_exceptions.h|2847966430,ra/fsp/src/bsp/mcu/all/bsp_security.c|3606266210,ra/fsp/src/bsp/mcu/all/bsp_rom_registers.c
+com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ether_phy\#\#\#\#3.5.0/all=180607401,ra/fsp/src/r_ether_phy/targets/DP83620/r_ether_phy_target_dp83620.c|809828733,ra/fsp/src/r_ether_phy/targets/KSZ8091RNB/r_ether_phy_target_ksz8091rnb.c|1059783364,ra/fsp/inc/instances/r_ether_phy.h|2050444946,ra/fsp/inc/api/r_ether_phy_api.h|451576276,ra/fsp/src/r_ether_phy/r_ether_phy.c|4014538643,ra/fsp/src/r_ether_phy/targets/KSZ8041/r_ether_phy_target_ksz8041.c
+com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m3\#\#fsp\#\#\#\#3.5.0/all=143358381,ra/fsp/src/bsp/mcu/ra6m3/bsp_elc.h|2743353138,ra/fsp/src/bsp/mcu/ra6m3/bsp_feature.h|3427620923,ra/fsp/src/bsp/mcu/ra6m3/bsp_mcu_info.h
+com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ether_phy\#\#\#\#3.5.0/libraries=
+com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#3.5.0/all=568600546,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c|2308894280,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h|3753300083,ra/fsp/src/bsp/mcu/all/bsp_arm_exceptions.h|2425160085,ra/fsp/inc/api/bsp_api.h|1499520276,ra/fsp/src/bsp/mcu/all/bsp_group_irq.c|2847966430,ra/fsp/src/bsp/mcu/all/bsp_security.c|3984836408,ra/fsp/src/bsp/mcu/all/bsp_group_irq.h|3998046333,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/base_addresses.h|521902797,ra/fsp/src/bsp/mcu/all/bsp_security.h|1939984091,ra/fsp/inc/api/r_ioport_api.h|2906400,ra/fsp/src/bsp/mcu/all/bsp_common.c|2386285210,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/renesas.h|4051445857,ra/fsp/src/bsp/mcu/all/bsp_common.h|1236602439,ra/fsp/src/bsp/mcu/all/bsp_io.c|1904866635,ra/fsp/src/bsp/mcu/all/bsp_clocks.h|3983299396,ra/fsp/src/bsp/mcu/all/bsp_delay.h|3492513568,ra/fsp/src/bsp/mcu/all/bsp_register_protection.c|1728953905,ra/fsp/inc/fsp_features.h|1630997354,ra/fsp/src/bsp/mcu/all/bsp_irq.c|4222527282,ra/fsp/src/bsp/mcu/all/bsp_module_stop.h|1615019982,ra/fsp/src/bsp/mcu/all/bsp_sbrk.c|546480625,ra/fsp/inc/fsp_common_api.h|400573940,ra/fsp/src/bsp/mcu/all/bsp_register_protection.h|2977689308,ra/fsp/src/bsp/mcu/all/bsp_mcu_api.h|3255765648,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c|3549961311,ra/fsp/src/bsp/mcu/all/bsp_tfu.h|1353647784,ra/fsp/src/bsp/mcu/all/bsp_delay.c|2208590403,ra/fsp/inc/instances/r_ioport.h|1992062042,ra/fsp/src/bsp/mcu/all/bsp_compiler_support.h|3606266210,ra/fsp/src/bsp/mcu/all/bsp_rom_registers.c|3297195641,ra/fsp/inc/fsp_version.h|1552630912,ra/fsp/src/bsp/mcu/all/bsp_guard.h|470601830,ra/fsp/src/bsp/mcu/all/bsp_clocks.c|2920829723,ra/fsp/src/bsp/mcu/all/bsp_guard.c|731782070,ra/fsp/src/bsp/mcu/all/bsp_irq.h|460577388,ra/fsp/src/bsp/mcu/all/bsp_io.h
 com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_sci_uart\#\#\#\#3.5.0/libraries=
-com.renesas.cdt.ddsc.settingseditor/com.renesas.cdt.ddsc.settingseditor.active_page=PinConfiguration
-com.renesas.cdt.ddsc.packs.componentfiles/Arm\#\#CMSIS\#\#CMSIS5\#\#CoreM\#\#\#\#5.8.0+renesas.0.fsp.3.5.0/all=4290386133,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0plus.h|1577199483,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_iccarm.h|2333906976,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_version.h|364344841,ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc300.h|3898569239,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang.h|2381390623,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mml.h|3552689244,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv81mml.h|1168186370,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm55.h|2718020009,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm33.h|3127123217,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm35p.h|3911746910,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang_ltm.h|2851112248,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm1.h|965562395,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_gcc.h|1745843273,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0.h|2327633156,ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc000.h|3007265674,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mbl.h|1564341101,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm7.h|2701379970,ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv8.h|1494441116,ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv7.h|304461792,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm3.h|3358993753,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm4.h|3163610011,ra/arm/CMSIS_5/CMSIS/Core/Include/pmu_armv8.h|1017116116,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_compiler.h|1372010515,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm23.h|302860276,ra/arm/CMSIS_5/CMSIS/Core/Include/cachel1_armv7.h|1441545198,ra/arm/CMSIS_5/LICENSE.txt|1044777225,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armcc.h|2635219934,ra/arm/CMSIS_5/CMSIS/Core/Include/tz_context.h
+com.renesas.cdt.ddsc.settingseditor/com.renesas.cdt.ddsc.settingseditor.active_page=SWPConfigurator
+com.renesas.cdt.ddsc.packs.componentfiles/Arm\#\#CMSIS\#\#CMSIS5\#\#CoreM\#\#\#\#5.8.0+renesas.0.fsp.3.5.0/all=1044777225,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armcc.h|4290386133,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0plus.h|2635219934,ra/arm/CMSIS_5/CMSIS/Core/Include/tz_context.h|302860276,ra/arm/CMSIS_5/CMSIS/Core/Include/cachel1_armv7.h|3007265674,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mbl.h|2333906976,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_version.h|3898569239,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang.h|3127123217,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm35p.h|2381390623,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mml.h|1372010515,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm23.h|3163610011,ra/arm/CMSIS_5/CMSIS/Core/Include/pmu_armv8.h|364344841,ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc300.h|1494441116,ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv7.h|2701379970,ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv8.h|965562395,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_gcc.h|304461792,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm3.h|3358993753,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm4.h|1441545198,ra/arm/CMSIS_5/LICENSE.txt|2851112248,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm1.h|1017116116,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_compiler.h|1745843273,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0.h|3552689244,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv81mml.h|1564341101,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm7.h|1168186370,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm55.h|2718020009,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm33.h|2327633156,ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc000.h|3911746910,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang_ltm.h|1577199483,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_iccarm.h
 com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m3\#\#device\#\#\#\#3.5.0/all=2308894280,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h
 com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#Board\#\#custom\#\#\#\#3.5.0/all=
 com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m3\#\#device\#\#R7FA6M3AH3CFC\#\#3.5.0/libraries=
 com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ioport\#\#\#\#3.5.0/all=3254285722,ra/fsp/src/r_ioport/r_ioport.c|2208590403,ra/fsp/inc/instances/r_ioport.h|1939984091,ra/fsp/inc/api/r_ioport_api.h
 com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m3\#\#device\#\#\#\#3.5.0/libraries=
-com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_sci_uart\#\#\#\#3.5.0/all=1889256766,ra/fsp/inc/instances/r_sci_uart.h|1610456547,ra/fsp/inc/api/r_transfer_api.h|3916852077,ra/fsp/inc/api/r_uart_api.h|3094200246,ra/fsp/src/r_sci_uart/r_sci_uart.c
+com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_sci_uart\#\#\#\#3.5.0/all=1889256766,ra/fsp/inc/instances/r_sci_uart.h|3094200246,ra/fsp/src/r_sci_uart/r_sci_uart.c|3916852077,ra/fsp/inc/api/r_uart_api.h|1610456547,ra/fsp/inc/api/r_transfer_api.h
 com.renesas.cdt.ddsc.threads.configurator/collapse/module.driver.uart_on_sci_uart.136564520=false
 com.renesas.cdt.ddsc.packs.componentfiles/Arm\#\#CMSIS\#\#CMSIS5\#\#CoreM\#\#\#\#5.8.0+renesas.0.fsp.3.5.0/libraries=
-com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ioport\#\#\#\#3.5.0/libraries=
 com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#Board\#\#custom\#\#\#\#3.5.0/libraries=
+com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ioport\#\#\#\#3.5.0/libraries=
diff --git a/bsp/renesas/ra6m3-ek/configuration.xml b/bsp/renesas/ra6m3-ek/configuration.xml
index 02c41c61b6..2e272e626c 100644
--- a/bsp/renesas/ra6m3-ek/configuration.xml
+++ b/bsp/renesas/ra6m3-ek/configuration.xml
@@ -165,6 +165,10 @@
       <description>SCI UART</description>
       <originalPack>Renesas.RA.3.5.0.pack</originalPack>
     </component>
+    <component apiversion="" class="HAL Drivers" condition="" group="all" subgroup="r_ether_phy" variant="" vendor="Renesas" version="3.5.0">
+      <description>Ethernet PHY</description>
+      <originalPack>Renesas.RA.3.5.0.pack</originalPack>
+    </component>
   </raComponentSelection>
   <raElcConfiguration/>
   <raIcuConfiguration/>
@@ -203,13 +207,28 @@
       <property id="module.driver.uart.tei_ipl" value="board.icu.common.irq.priority12"/>
       <property id="module.driver.uart.eri_ipl" value="board.icu.common.irq.priority12"/>
     </module>
+    <module id="module.driver.ether_phy_on_ether_phy.1137705372">
+      <property id="module.driver.ether_phy.name" value="g_ether_phy0"/>
+      <property id="module.driver.ether_phy.channel" value="module.driver.ether_phy.channel.0"/>
+      <property id="module.driver.ether_phy.phy_lsi_address" value="0"/>
+      <property id="module.driver.ether_phy.phy_reset_wait_time" value="0x00020000"/>
+      <property id="module.driver.ether_phy.mii_type" value="module.driver.mii_type.rmii"/>
+      <property id="module.driver.ether_phy.mii_bit_access_wait_time" value="8"/>
+      <property id="module.driver.ether_phy.flow_control" value="module.driver.ether_phy.flow_control.0"/>
+    </module>
     <context id="_hal.0">
       <stack module="module.driver.ioport_on_ioport.0"/>
       <stack module="module.driver.uart_on_sci_uart.136564520"/>
+      <stack module="module.driver.ether_phy_on_ether_phy.1137705372"/>
     </context>
     <config id="config.driver.ioport">
       <property id="config.driver.ioport.checking" value="config.driver.ioport.checking.system"/>
     </config>
+    <config id="config.driver.ether_phy">
+      <property id="config.driver.ether_phy.param_checking_enable" value="config.driver.ether_phy.param_checking_enable.bsp"/>
+      <property id="config.driver.ether_phy.use_phy" value="config.driver.ether_phy.use_phy.default"/>
+      <property id="config.driver.ether_phy.use_reference_clock" value="config.driver.ether_phy.use_reference_clock.default"/>
+    </config>
     <config id="config.driver.sci_uart">
       <property id="config.driver.sci_uart.param_checking_enable" value="config.driver.sci_uart.param_checking_enable.bsp"/>
       <property id="config.driver.sci_uart.fifo_support" value="config.driver.sci_uart.fifo_support.disabled"/>
@@ -224,6 +243,18 @@
       <configSetting altId="debug0.tdi.p110" configurationId="debug0.tdi"/>
       <configSetting altId="debug0.tdo.p109" configurationId="debug0.tdo"/>
       <configSetting altId="debug0.tms.p108" configurationId="debug0.tms"/>
+      <configSetting altId="etherc0.rmii.crs_dv.p705" configurationId="etherc0.rmii.crs_dv"/>
+      <configSetting altId="etherc0.rmii.mdc.p401" configurationId="etherc0.rmii.mdc"/>
+      <configSetting altId="etherc0.rmii.mdio.p402" configurationId="etherc0.rmii.mdio"/>
+      <configSetting altId="etherc0.rmii.mode.rmii.free" configurationId="etherc0.rmii.mode"/>
+      <configSetting altId="etherc0.rmii.pairing.free" configurationId="etherc0.rmii.pairing"/>
+      <configSetting altId="etherc0.rmii.ref50ck.p701" configurationId="etherc0.rmii.ref50ck"/>
+      <configSetting altId="etherc0.rmii.rx_er.p704" configurationId="etherc0.rmii.rx_er"/>
+      <configSetting altId="etherc0.rmii.rxd0.p702" configurationId="etherc0.rmii.rxd0"/>
+      <configSetting altId="etherc0.rmii.rxd1.p703" configurationId="etherc0.rmii.rxd1"/>
+      <configSetting altId="etherc0.rmii.txd0.p700" configurationId="etherc0.rmii.txd0"/>
+      <configSetting altId="etherc0.rmii.txd1.p406" configurationId="etherc0.rmii.txd1"/>
+      <configSetting altId="etherc0.rmii.txd_en.p405" configurationId="etherc0.rmii.txd_en"/>
       <configSetting altId="p108.debug0.tms" configurationId="p108"/>
       <configSetting altId="p108.gpio_mode.gpio_mode_peripheral" configurationId="p108.gpio_mode"/>
       <configSetting altId="p109.debug0.tdo" configurationId="p109"/>
@@ -232,13 +263,43 @@
       <configSetting altId="p110.gpio_mode.gpio_mode_peripheral" configurationId="p110.gpio_mode"/>
       <configSetting altId="p300.debug0.tck" configurationId="p300"/>
       <configSetting altId="p300.gpio_mode.gpio_mode_peripheral" configurationId="p300.gpio_mode"/>
-      <configSetting altId="p401.sci7.txd" configurationId="p401"/>
+      <configSetting altId="p401.etherc0.rmii.mdc" configurationId="p401"/>
+      <configSetting altId="p401.gpio_speed.gpio_speed_high" configurationId="p401.gpio_drivecapacity"/>
       <configSetting altId="p401.gpio_mode.gpio_mode_peripheral" configurationId="p401.gpio_mode"/>
-      <configSetting altId="p402.sci7.rxd" configurationId="p402"/>
+      <configSetting altId="p402.etherc0.rmii.mdio" configurationId="p402"/>
+      <configSetting altId="p402.gpio_speed.gpio_speed_high" configurationId="p402.gpio_drivecapacity"/>
       <configSetting altId="p402.gpio_mode.gpio_mode_peripheral" configurationId="p402.gpio_mode"/>
+      <configSetting altId="p405.etherc0.rmii.txd_en" configurationId="p405"/>
+      <configSetting altId="p405.gpio_speed.gpio_speed_high" configurationId="p405.gpio_drivecapacity"/>
+      <configSetting altId="p405.gpio_mode.gpio_mode_peripheral" configurationId="p405.gpio_mode"/>
+      <configSetting altId="p406.etherc0.rmii.txd1" configurationId="p406"/>
+      <configSetting altId="p406.gpio_speed.gpio_speed_high" configurationId="p406.gpio_drivecapacity"/>
+      <configSetting altId="p406.gpio_mode.gpio_mode_peripheral" configurationId="p406.gpio_mode"/>
+      <configSetting altId="p613.sci7.txd" configurationId="p613"/>
+      <configSetting altId="p613.gpio_mode.gpio_mode_peripheral" configurationId="p613.gpio_mode"/>
+      <configSetting altId="p614.sci7.rxd" configurationId="p614"/>
+      <configSetting altId="p614.gpio_mode.gpio_mode_peripheral" configurationId="p614.gpio_mode"/>
+      <configSetting altId="p700.etherc0.rmii.txd0" configurationId="p700"/>
+      <configSetting altId="p700.gpio_speed.gpio_speed_high" configurationId="p700.gpio_drivecapacity"/>
+      <configSetting altId="p700.gpio_mode.gpio_mode_peripheral" configurationId="p700.gpio_mode"/>
+      <configSetting altId="p701.etherc0.rmii.ref50ck" configurationId="p701"/>
+      <configSetting altId="p701.gpio_speed.gpio_speed_high" configurationId="p701.gpio_drivecapacity"/>
+      <configSetting altId="p701.gpio_mode.gpio_mode_peripheral" configurationId="p701.gpio_mode"/>
+      <configSetting altId="p702.etherc0.rmii.rxd0" configurationId="p702"/>
+      <configSetting altId="p702.gpio_speed.gpio_speed_high" configurationId="p702.gpio_drivecapacity"/>
+      <configSetting altId="p702.gpio_mode.gpio_mode_peripheral" configurationId="p702.gpio_mode"/>
+      <configSetting altId="p703.etherc0.rmii.rxd1" configurationId="p703"/>
+      <configSetting altId="p703.gpio_speed.gpio_speed_high" configurationId="p703.gpio_drivecapacity"/>
+      <configSetting altId="p703.gpio_mode.gpio_mode_peripheral" configurationId="p703.gpio_mode"/>
+      <configSetting altId="p704.etherc0.rmii.rx_er" configurationId="p704"/>
+      <configSetting altId="p704.gpio_speed.gpio_speed_high" configurationId="p704.gpio_drivecapacity"/>
+      <configSetting altId="p704.gpio_mode.gpio_mode_peripheral" configurationId="p704.gpio_mode"/>
+      <configSetting altId="p705.etherc0.rmii.crs_dv" configurationId="p705"/>
+      <configSetting altId="p705.gpio_speed.gpio_speed_high" configurationId="p705.gpio_drivecapacity"/>
+      <configSetting altId="p705.gpio_mode.gpio_mode_peripheral" configurationId="p705.gpio_mode"/>
       <configSetting altId="sci7.mode.asynchronous.free" configurationId="sci7.mode"/>
-      <configSetting altId="sci7.rxd.p402" configurationId="sci7.rxd"/>
-      <configSetting altId="sci7.txd.p401" configurationId="sci7.txd"/>
+      <configSetting altId="sci7.rxd.p614" configurationId="sci7.rxd"/>
+      <configSetting altId="sci7.txd.p613" configurationId="sci7.txd"/>
     </pincfg>
   </raPinConfiguration>
 </raConfiguration>
diff --git a/bsp/renesas/ra6m3-ek/ra_cfg/fsp_cfg/bsp/bsp_cfg.h b/bsp/renesas/ra6m3-ek/ra_cfg/fsp_cfg/bsp/bsp_cfg.h
index c098985d51..48c4b5099e 100644
--- a/bsp/renesas/ra6m3-ek/ra_cfg/fsp_cfg/bsp/bsp_cfg.h
+++ b/bsp/renesas/ra6m3-ek/ra_cfg/fsp_cfg/bsp/bsp_cfg.h
@@ -20,7 +20,7 @@
             #endif
             #define BSP_CFG_MCU_VCC_MV (3300)
             #define BSP_CFG_STACK_MAIN_BYTES (0x400)
-            #define BSP_CFG_HEAP_BYTES (0x2000)
+            #define BSP_CFG_HEAP_BYTES (0)
             #define BSP_CFG_PARAM_CHECKING_ENABLE (0)
             #define BSP_CFG_ASSERT (0)
             #define BSP_CFG_ERROR_LOG (0)
diff --git a/bsp/renesas/ra6m3-ek/ra_gen/hal_data.c b/bsp/renesas/ra6m3-ek/ra_gen/hal_data.c
index 80213f8e49..566df6f202 100644
--- a/bsp/renesas/ra6m3-ek/ra_gen/hal_data.c
+++ b/bsp/renesas/ra6m3-ek/ra_gen/hal_data.c
@@ -1,5 +1,27 @@
 /* generated HAL source file - do not edit */
 #include "hal_data.h"
+ether_phy_instance_ctrl_t g_ether_phy0_ctrl;
+
+const ether_phy_cfg_t g_ether_phy0_cfg =
+{
+
+    .channel                   = 0,
+    .phy_lsi_address           = 0,
+    .phy_reset_wait_time       = 0x00020000,
+    .mii_bit_access_wait_time  = 8,
+    .flow_control              = ETHER_PHY_FLOW_CONTROL_DISABLE,
+    .mii_type                  = ETHER_PHY_MII_TYPE_RMII,
+    .p_context                 = NULL,
+    .p_extend                  = NULL,
+
+};
+/* Instance structure to use this module. */
+const ether_phy_instance_t g_ether_phy0 =
+{
+    .p_ctrl        = &g_ether_phy0_ctrl,
+    .p_cfg         = &g_ether_phy0_cfg,
+    .p_api         = &g_ether_phy_on_ether_phy
+};
 sci_uart_instance_ctrl_t     g_uart7_ctrl;
 
             baud_setting_t               g_uart7_baud_setting =
diff --git a/bsp/renesas/ra6m3-ek/ra_gen/hal_data.h b/bsp/renesas/ra6m3-ek/ra_gen/hal_data.h
index 317acda1c4..e1e94ea2ce 100644
--- a/bsp/renesas/ra6m3-ek/ra_gen/hal_data.h
+++ b/bsp/renesas/ra6m3-ek/ra_gen/hal_data.h
@@ -4,9 +4,17 @@
 #include <stdint.h>
 #include "bsp_api.h"
 #include "common_data.h"
+#include "r_ether_phy.h"
+#include "r_ether_phy_api.h"
 #include "r_sci_uart.h"
             #include "r_uart_api.h"
 FSP_HEADER
+/** ether_phy on ether_phy Instance. */
+extern const ether_phy_instance_t g_ether_phy0;
+
+/** Access the Ethernet PHY instance using these structures when calling API functions directly (::p_api is not used). */
+extern ether_phy_instance_ctrl_t g_ether_phy0_ctrl;
+extern const ether_phy_cfg_t g_ether_phy0_cfg;
 /** UART on SCI Instance. */
             extern const uart_instance_t      g_uart7;
 
diff --git a/bsp/renesas/ra6m3-ek/ra_gen/pin_data.c b/bsp/renesas/ra6m3-ek/ra_gen/pin_data.c
index 9986dea419..2233b756ff 100644
--- a/bsp/renesas/ra6m3-ek/ra_gen/pin_data.c
+++ b/bsp/renesas/ra6m3-ek/ra_gen/pin_data.c
@@ -22,12 +22,52 @@ const ioport_pin_cfg_t g_bsp_pin_cfg_data[] = {
     },
     {
         .pin = BSP_IO_PORT_04_PIN_01,
-        .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_SCI1_3_5_7_9)
+        .pin_cfg = ((uint32_t) IOPORT_CFG_DRIVE_HIGH | (uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_ETHER_RMII)
     },
     {
         .pin = BSP_IO_PORT_04_PIN_02,
+        .pin_cfg = ((uint32_t) IOPORT_CFG_DRIVE_HIGH | (uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_ETHER_RMII)
+    },
+    {
+        .pin = BSP_IO_PORT_04_PIN_05,
+        .pin_cfg = ((uint32_t) IOPORT_CFG_DRIVE_HIGH | (uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_ETHER_RMII)
+    },
+    {
+        .pin = BSP_IO_PORT_04_PIN_06,
+        .pin_cfg = ((uint32_t) IOPORT_CFG_DRIVE_HIGH | (uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_ETHER_RMII)
+    },
+    {
+        .pin = BSP_IO_PORT_06_PIN_13,
         .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_SCI1_3_5_7_9)
     },
+    {
+        .pin = BSP_IO_PORT_06_PIN_14,
+        .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_SCI1_3_5_7_9)
+    },
+    {
+        .pin = BSP_IO_PORT_07_PIN_00,
+        .pin_cfg = ((uint32_t) IOPORT_CFG_DRIVE_HIGH | (uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_ETHER_RMII)
+    },
+    {
+        .pin = BSP_IO_PORT_07_PIN_01,
+        .pin_cfg = ((uint32_t) IOPORT_CFG_DRIVE_HIGH | (uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_ETHER_RMII)
+    },
+    {
+        .pin = BSP_IO_PORT_07_PIN_02,
+        .pin_cfg = ((uint32_t) IOPORT_CFG_DRIVE_HIGH | (uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_ETHER_RMII)
+    },
+    {
+        .pin = BSP_IO_PORT_07_PIN_03,
+        .pin_cfg = ((uint32_t) IOPORT_CFG_DRIVE_HIGH | (uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_ETHER_RMII)
+    },
+    {
+        .pin = BSP_IO_PORT_07_PIN_04,
+        .pin_cfg = ((uint32_t) IOPORT_CFG_DRIVE_HIGH | (uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_ETHER_RMII)
+    },
+    {
+        .pin = BSP_IO_PORT_07_PIN_05,
+        .pin_cfg = ((uint32_t) IOPORT_CFG_DRIVE_HIGH | (uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_ETHER_RMII)
+    },
 };
 
 const ioport_cfg_t g_bsp_pin_cfg = {