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authorMan, Jianting (Meco) <[email protected]>2022-01-08 10:29:41 -0500
committerBernard Xiong <[email protected]>2022-01-09 00:20:32 +0800
commitbb1084556ff9395e6e5d908edfef9cab6f6fa4dc (patch)
tree97e0844decee5d889c1b10d88d16db36bba44245 /bsp/stm32/libraries
parent353f717037b57f663ddce9447fd05700f3087a66 (diff)
[console] 解决在没有定义RT_USING_DEVICE的情况下使用device报错的问题
* [console] 解决在没有定义RT_USING_DEVICE的情况下使用device报错的问题 * format codes * [libc] 整理格式 * refresh projects
Diffstat (limited to 'bsp/stm32/libraries')
-rw-r--r--bsp/stm32/libraries/HAL_Drivers/.config5
-rw-r--r--bsp/stm32/libraries/HAL_Drivers/rtconfig.h8
-rw-r--r--bsp/stm32/libraries/templates/stm32f3xx/rtconfig.h2
-rw-r--r--bsp/stm32/libraries/templates/stm32mp1xx/board/board.c42
4 files changed, 36 insertions, 21 deletions
diff --git a/bsp/stm32/libraries/HAL_Drivers/.config b/bsp/stm32/libraries/HAL_Drivers/.config
new file mode 100644
index 0000000000..482c56d89e
--- /dev/null
+++ b/bsp/stm32/libraries/HAL_Drivers/.config
@@ -0,0 +1,5 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# RootMenu
+#
+# CONFIG_BSP_USING_UDID is not set
diff --git a/bsp/stm32/libraries/HAL_Drivers/rtconfig.h b/bsp/stm32/libraries/HAL_Drivers/rtconfig.h
new file mode 100644
index 0000000000..61ff1aa508
--- /dev/null
+++ b/bsp/stm32/libraries/HAL_Drivers/rtconfig.h
@@ -0,0 +1,8 @@
+#ifndef RT_CONFIG_H__
+#define RT_CONFIG_H__
+
+/* Automatically generated file; DO NOT EDIT. */
+/* RootMenu */
+
+
+#endif
diff --git a/bsp/stm32/libraries/templates/stm32f3xx/rtconfig.h b/bsp/stm32/libraries/templates/stm32f3xx/rtconfig.h
index f8e1717e6c..6a95f80272 100644
--- a/bsp/stm32/libraries/templates/stm32f3xx/rtconfig.h
+++ b/bsp/stm32/libraries/templates/stm32f3xx/rtconfig.h
@@ -87,6 +87,8 @@
#define RT_SERIAL_RB_BUFSZ 64
#define RT_USING_HWTIMER
#define RT_USING_PIN
+#define RT_USING_PWM
+#define RT_USING_SPI
/* Using USB */
diff --git a/bsp/stm32/libraries/templates/stm32mp1xx/board/board.c b/bsp/stm32/libraries/templates/stm32mp1xx/board/board.c
index 0a7bda208a..72606a39f4 100644
--- a/bsp/stm32/libraries/templates/stm32mp1xx/board/board.c
+++ b/bsp/stm32/libraries/templates/stm32mp1xx/board/board.c
@@ -1,5 +1,5 @@
/*
-* Copyright (c) 2006-2018, RT-Thread Development Team
+* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -20,13 +20,13 @@ void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
-
+
/**Configure LSE Drive Capability
*/
HAL_PWR_EnableBkUpAccess();
__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_MEDIUMHIGH);
-
- /**Initializes the CPU, AHB and APB busses clocks
+
+ /**Initializes the CPU, AHB and APB busses clocks
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSE
|RCC_OSCILLATORTYPE_LSE;
@@ -35,7 +35,7 @@ void SystemClock_Config(void)
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = 16;
RCC_OscInitStruct.HSIDivValue = RCC_HSI_DIV1;
-
+
/**PLL1 Config
*/
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
@@ -49,7 +49,7 @@ void SystemClock_Config(void)
RCC_OscInitStruct.PLL.PLLMODE = RCC_PLL_FRACTIONAL;
RCC_OscInitStruct.PLL.RPDFN_DIS = RCC_RPDFN_DIS_DISABLED;
RCC_OscInitStruct.PLL.TPDFN_DIS = RCC_TPDFN_DIS_DISABLED;
-
+
/**PLL2 Config
*/
RCC_OscInitStruct.PLL2.PLLState = RCC_PLL_ON;
@@ -63,7 +63,7 @@ void SystemClock_Config(void)
RCC_OscInitStruct.PLL2.PLLMODE = RCC_PLL_FRACTIONAL;
RCC_OscInitStruct.PLL2.RPDFN_DIS = RCC_RPDFN_DIS_DISABLED;
RCC_OscInitStruct.PLL2.TPDFN_DIS = RCC_TPDFN_DIS_DISABLED;
-
+
/**PLL3 Config
*/
RCC_OscInitStruct.PLL3.PLLState = RCC_PLL_ON;
@@ -78,7 +78,7 @@ void SystemClock_Config(void)
RCC_OscInitStruct.PLL3.PLLMODE = RCC_PLL_FRACTIONAL;
RCC_OscInitStruct.PLL3.RPDFN_DIS = RCC_RPDFN_DIS_DISABLED;
RCC_OscInitStruct.PLL3.TPDFN_DIS = RCC_TPDFN_DIS_DISABLED;
-
+
/**PLL4 Config
*/
RCC_OscInitStruct.PLL4.PLLState = RCC_PLL_ON;
@@ -93,7 +93,7 @@ void SystemClock_Config(void)
RCC_OscInitStruct.PLL4.PLLMODE = RCC_PLL_INTEGER;
RCC_OscInitStruct.PLL4.RPDFN_DIS = RCC_RPDFN_DIS_DISABLED;
RCC_OscInitStruct.PLL4.TPDFN_DIS = RCC_TPDFN_DIS_DISABLED;
-
+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
@@ -115,12 +115,12 @@ void SystemClock_Config(void)
RCC_ClkInitStruct.APB1_Div = RCC_APB1_DIV2;
RCC_ClkInitStruct.APB2_Div = RCC_APB2_DIV2;
RCC_ClkInitStruct.APB3_Div = RCC_APB3_DIV2;
-
+
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct) != HAL_OK)
{
Error_Handler();
}
-
+
/**Set the HSE division factor for RTC clock
*/
__HAL_RCC_RTC_HSEDIV(24);
@@ -133,7 +133,7 @@ void SystemClock_Config(void)
*/
void PeriphCommonClock_Config(void) {
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
-
+
/** Initializes the common periph clock
*/
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_CKPER;
@@ -145,11 +145,11 @@ void PeriphCommonClock_Config(void) {
extern void rt_hw_systick_init(void);
extern int rt_hw_usart_init(void);
-void rt_hw_board_init()
+void rt_hw_board_init()
{
/* HAL_Init() function is called at the beginning of the program */
HAL_Init();
-
+
/* enable interrupt */
__set_PRIMASK(0);
/* Configure the system clock */
@@ -159,29 +159,29 @@ void rt_hw_board_init()
}
/* disable interrupt */
__set_PRIMASK(1);
-
+
rt_hw_systick_init();
-
+
/* Heap initialization */
#if defined(RT_USING_HEAP)
rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
#endif
-
+
/* Pin driver initialization is open by default */
#ifdef RT_USING_PIN
rt_hw_pin_init();
#endif
-
+
/* USART driver initialization is open by default */
#ifdef RT_USING_SERIAL
rt_hw_usart_init();
#endif
-
+
/* Set the shell console output device */
-#ifdef RT_USING_CONSOLE
+#if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE)
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
-
+
/* Board underlying hardware initialization */
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();