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authorRaman Gopalan <[email protected]>2023-10-16 13:30:11 +0530
committerMeco Man <[email protected]>2023-10-17 11:22:07 -0400
commit265a55303e3ef73ca4da5ed211a35deca755fa8d (patch)
treeaab91e2fa02111e20fe7baf779d38fd052d710dc /bsp
parentecd29fda6005ef19c625f194f9311259ba907a78 (diff)
Implement UART driver files for AT32UC3B: Working commit
Diffstat (limited to 'bsp')
-rw-r--r--bsp/avr32uc3b0/.config26
-rw-r--r--bsp/avr32uc3b0/Kconfig93
-rw-r--r--bsp/avr32uc3b0/SConscript2
-rw-r--r--bsp/avr32uc3b0/SConstruct2
-rw-r--r--bsp/avr32uc3b0/application.c8
-rw-r--r--bsp/avr32uc3b0/board.c51
-rw-r--r--bsp/avr32uc3b0/drv_uart.c313
-rw-r--r--bsp/avr32uc3b0/drv_uart.h35
-rw-r--r--bsp/avr32uc3b0/rtconfig.h16
-rw-r--r--bsp/avr32uc3b0/rtconfig.py5
-rw-r--r--bsp/avr32uc3b0/startup.c2
11 files changed, 503 insertions, 50 deletions
diff --git a/bsp/avr32uc3b0/.config b/bsp/avr32uc3b0/.config
index 069ec67681..5db709bd13 100644
--- a/bsp/avr32uc3b0/.config
+++ b/bsp/avr32uc3b0/.config
@@ -74,8 +74,8 @@ CONFIG_RT_USING_DEVICE=y
# CONFIG_RT_USING_INTERRUPT_INFO is not set
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
-CONFIG_RT_CONSOLE_DEVICE_NAME="uart"
-CONFIG_RT_VER_NUM=0x50002
+CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
+CONFIG_RT_VER_NUM=0x50100
# CONFIG_RT_USING_STDC_ATOMIC is not set
# CONFIG_RT_USING_CACHE is not set
# CONFIG_RT_USING_HW_ATOMIC is not set
@@ -121,7 +121,7 @@ CONFIG_RT_UNAMED_PIPE_NUMBER=64
CONFIG_RT_USING_SERIAL=y
CONFIG_RT_USING_SERIAL_V1=y
# CONFIG_RT_USING_SERIAL_V2 is not set
-CONFIG_RT_SERIAL_USING_DMA=y
+# CONFIG_RT_SERIAL_USING_DMA is not set
CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_RT_USING_CAN is not set
# CONFIG_RT_USING_HWTIMER is not set
@@ -984,3 +984,23 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
#
# Uncategorized
#
+
+#
+# On-chip Peripheral Drivers
+#
+CONFIG_BSP_USING_PIN=y
+CONFIG_BSP_USING_UART=y
+# CONFIG_BSP_USING_UART0 is not set
+# CONFIG_BSP_UART0_TX_PIN_19 is not set
+# CONFIG_BSP_UART0_TX_PIN_43 is not set
+# CONFIG_BSP_UART0_RX_PIN_18 is not set
+# CONFIG_BSP_UART0_RX_PIN_42 is not set
+CONFIG_BSP_USING_UART1=y
+CONFIG_BSP_UART1_TX_PIN_34=y
+# CONFIG_BSP_UART1_TX_PIN_23 is not set
+CONFIG_BSP_UART1_TX_PIN=34
+CONFIG_BSP_UART1_TX_PIN_FUNCTION=2
+CONFIG_BSP_UART1_RX_PIN_35=y
+# CONFIG_BSP_UART1_RX_PIN_24 is not set
+CONFIG_BSP_UART1_RX_PIN=35
+CONFIG_BSP_UART1_RX_PIN_FUNCTION=2
diff --git a/bsp/avr32uc3b0/Kconfig b/bsp/avr32uc3b0/Kconfig
index c89e428345..c133c65424 100644
--- a/bsp/avr32uc3b0/Kconfig
+++ b/bsp/avr32uc3b0/Kconfig
@@ -26,3 +26,96 @@ config ENV_DIR
source "$RTT_DIR/Kconfig"
source "$PKGS_DIR/Kconfig"
+menu "On-chip Peripheral Drivers"
+
+ config BSP_USING_PIN
+ bool "Enable GPIO"
+ select RT_USING_PIN
+ default y
+
+ menuconfig BSP_USING_UART
+ bool "Enable UART"
+ select RT_USING_SERIAL
+ default y
+ if BSP_USING_UART
+ config BSP_USING_UART0
+ bool "Enable UART0"
+ default n
+ if BSP_USING_UART0
+ choice
+ prompt "uart0 tx pin number (GP)"
+ depends on BSP_USING_UART0
+ default BSP_UART0_TX_PIN_43
+ config BSP_UART0_TX_PIN_19
+ bool "19"
+ config BSP_UART0_TX_PIN_43
+ bool "43"
+ endchoice
+ config BSP_UART0_TX_PIN
+ int
+ default 19 if BSP_UART0_TX_PIN_19
+ default 43 if BSP_UART0_TX_PIN_43
+ config BSP_UART0_TX_PIN_FUNCTION
+ int
+ default 0 if BSP_UART0_TX_PIN_19
+ default 2 if BSP_UART0_TX_PIN_43
+ choice
+ prompt "uart0 rx pin number (GP)"
+ depends on BSP_USING_UART0
+ default BSP_UART0_RX_PIN_42
+ config BSP_UART0_RX_PIN_18
+ bool "18"
+ config BSP_UART0_RX_PIN_42
+ bool "42"
+ endchoice
+ config BSP_UART0_RX_PIN
+ int
+ default 18 if BSP_UART0_RX_PIN_18
+ default 42 if BSP_UART0_RX_PIN_42
+ config BSP_UART0_RX_PIN_FUNCTION
+ int
+ default 0 if BSP_UART0_RX_PIN_18
+ default 2 if BSP_UART0_RX_PIN_42
+ endif
+
+ config BSP_USING_UART1
+ bool "Enable UART1"
+ default y
+ if BSP_USING_UART1
+ choice
+ prompt "uart1 tx pin number (GP)"
+ depends on BSP_USING_UART1
+ default BSP_UART1_TX_PIN_34
+ config BSP_UART1_TX_PIN_34
+ bool "34"
+ config BSP_UART1_TX_PIN_23
+ bool "23"
+ endchoice
+ config BSP_UART1_TX_PIN
+ int
+ default 34 if BSP_UART1_TX_PIN_34
+ default 23 if BSP_UART1_TX_PIN_23
+ config BSP_UART1_TX_PIN_FUNCTION
+ int
+ default 2 if BSP_UART1_TX_PIN_34
+ default 0 if BSP_UART1_TX_PIN_23
+ choice
+ prompt "uart1 rx pin number (GP)"
+ depends on BSP_USING_UART1
+ default BSP_UART1_RX_PIN_35
+ config BSP_UART1_RX_PIN_35
+ bool "35"
+ config BSP_UART1_RX_PIN_24
+ bool "24"
+ endchoice
+ config BSP_UART1_RX_PIN
+ int
+ default 35 if BSP_UART1_RX_PIN_35
+ default 24 if BSP_UART1_RX_PIN_24
+ config BSP_UART1_RX_PIN_FUNCTION
+ int
+ default 2 if BSP_UART1_RX_PIN_35
+ default 0 if BSP_UART1_RX_PIN_24
+ endif
+ endif
+endmenu
diff --git a/bsp/avr32uc3b0/SConscript b/bsp/avr32uc3b0/SConscript
index 412aaa5dbd..2d83596332 100644
--- a/bsp/avr32uc3b0/SConscript
+++ b/bsp/avr32uc3b0/SConscript
@@ -2,7 +2,7 @@ import rtconfig
Import('RTT_ROOT')
from building import *
-src_bsp = ['application.c', 'startup.c', 'board.c']
+src_bsp = ['application.c', 'startup.c', 'board.c', 'drv_uart.c']
src = File(src_bsp)
CPPPATH = [RTT_ROOT + '/bsp/avr32uc3b0']
diff --git a/bsp/avr32uc3b0/SConstruct b/bsp/avr32uc3b0/SConstruct
index 5791ea73cf..d79bac53b5 100644
--- a/bsp/avr32uc3b0/SConstruct
+++ b/bsp/avr32uc3b0/SConstruct
@@ -10,7 +10,7 @@ else:
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
from building import *
-TARGET = 'rtthread-' + rtconfig.ARCH + '.' + rtconfig.TARGET_EXT
+TARGET = 'rtthread-' + rtconfig.PART + '.' + rtconfig.TARGET_EXT
DefaultEnvironment(tools=[])
env = Environment(tools = ['mingw'],
diff --git a/bsp/avr32uc3b0/application.c b/bsp/avr32uc3b0/application.c
index 6b87b226f4..35c7c8a588 100644
--- a/bsp/avr32uc3b0/application.c
+++ b/bsp/avr32uc3b0/application.c
@@ -19,12 +19,12 @@ static void rt_thread_entry_led1(void* parameter)
while (1)
{
/* led on */
- rt_kprintf("LED1 on\r\n");
+ //rt_kprintf("LED1 on\r\n");
gpio_tgl_gpio_pin(AVR32_PIN_PA08);
rt_thread_delay(RT_TICK_PER_SECOND / 2); /* sleep 0.5 second and switch to other thread */
/* led off */
- rt_kprintf("LED1 off\r\n");
+ //rt_kprintf("LED1 off\r\n");
gpio_tgl_gpio_pin(AVR32_PIN_PA08);
rt_thread_delay(RT_TICK_PER_SECOND / 2);
}
@@ -37,12 +37,12 @@ void rt_thread_entry_led2(void* parameter)
while (1)
{
/* led on */
- rt_kprintf("LED2 on");
+ //rt_kprintf("LED2 on");
gpio_tgl_gpio_pin(AVR32_PIN_PA07);
rt_thread_delay(RT_TICK_PER_SECOND);
/* led off */
- rt_kprintf("LED2 off\r\n");
+ //rt_kprintf("LED2 off\r\n");
gpio_tgl_gpio_pin(AVR32_PIN_PA07);
rt_thread_delay(RT_TICK_PER_SECOND);
}
diff --git a/bsp/avr32uc3b0/board.c b/bsp/avr32uc3b0/board.c
index 226e59e551..412ee00641 100644
--- a/bsp/avr32uc3b0/board.c
+++ b/bsp/avr32uc3b0/board.c
@@ -1,11 +1,12 @@
/*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
- * Date Author Notes
- * 2010-03-30 Kyle First version
+ * Date Author Notes
+ * 2010-03-30 Kyle First version
+ * 2023-10-13 Raman Gopalan Move UART specific code sections into the drv_uart files
*/
#include <rtthread.h>
@@ -14,16 +15,7 @@
#include "gpio.h"
#include "usart.h"
#include "intc.h"
-#include "serial.h"
-
-#define FOSC0 12000000
-#define FCPU 60000000
-#define FHSB FCPU
-#define FPBA FCPU
-#define FPBB FCPU
-
-extern void rt_hw_serial_isr(void);
-extern void rt_hw_usart_init(void);
+#include "drv_uart.h"
/**
* System tick interrupt handler.
@@ -52,24 +44,7 @@ static void peripherals_init(void)
.osc0_startup = AVR32_PM_OSCCTRL0_STARTUP_2048_RCOSC
};
pm_configure_clocks(&pm_freq_param);
-
- /*
- * USART1 initialization
- */
- gpio_enable_module_pin(AVR32_USART1_TXD_0_1_PIN, AVR32_USART1_TXD_0_1_FUNCTION);
- gpio_enable_module_pin(AVR32_USART1_RXD_0_1_PIN, AVR32_USART1_RXD_0_1_FUNCTION);
- static const usart_options_t usartOptions = {
- .baudrate = 115200,
- .charlength = 8,
- .paritytype = USART_NO_PARITY,
- .stopbits = USART_1_STOPBIT,
- .channelmode = USART_NORMAL_CHMODE
- };
- usart_init_rs232(&AVR32_USART1, &usartOptions, FCPU);
-
INTC_init_interrupts();
- INTC_register_interrupt(&rt_hw_serial_isr, AVR32_USART1_IRQ, AVR32_INTC_INT0);
- AVR32_USART1.ier = AVR32_USART_IER_RXRDY_MASK;
}
/**
@@ -84,14 +59,20 @@ static void cpu_counter_init(void)
void rt_hw_board_init(void)
{
- extern struct rt_device _rt_usart_device;
- extern struct avr32_serial_device uart;
-
Disable_global_interrupt();
peripherals_init();
cpu_counter_init();
- rt_hw_serial_register(&_rt_usart_device, "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, &uart);
- rt_console_set_device("uart1");
+#ifdef RT_USING_COMPONENTS_INIT
+ rt_components_board_init();
+#endif
+
+#ifdef RT_USING_SERIAL
+ rt_hw_uart_init();
+#endif
+
+#ifdef RT_USING_CONSOLE
+ rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
+#endif
}
diff --git a/bsp/avr32uc3b0/drv_uart.c b/bsp/avr32uc3b0/drv_uart.c
new file mode 100644
index 0000000000..076202e662
--- /dev/null
+++ b/bsp/avr32uc3b0/drv_uart.c
@@ -0,0 +1,313 @@
+/*
+ * Copyright (c) 2006-2023, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2009-02-05 Bernard first version
+ * 2009-10-25 Bernard fix rt_serial_read bug when there is no data
+ * in the buffer.
+ * 2010-03-29 Bernard cleanup code.
+ * 2010-03-30 Kyle Ported from STM32 to AVR32.
+ * 2023-10-13 Raman Gopalan UART driver for at32uc3b: Initial version
+ */
+
+#include <rthw.h>
+#include <rtthread.h>
+#include <rtdevice.h>
+#include "drv_uart.h"
+
+#ifdef RT_USING_SERIAL
+
+#include "compiler.h"
+#include "usart.h"
+#include "gpio.h"
+#include "intc.h"
+
+#if !defined(BSP_USING_UART0) && !defined(BSP_USING_UART1)
+ #error "Please define at least one BSP_USING_UARTx"
+ /* this driver can be disabled at menuconfig -> RT-Thread Components -> Device Drivers */
+#endif
+
+#ifdef BSP_USING_UART0
+ void avr32uc3b_uart0_isr(void);
+#endif
+
+#ifdef BSP_USING_UART1
+ void avr32uc3b_uart1_isr(void);
+#endif
+
+#ifdef BSP_USING_UART2
+ void avr32uc3b_uart2_isr(void);
+#endif
+
+/* AVR32UC3B uart driver */
+struct avr32uc3b_uart_dev
+{
+ rt_serial_t parent;
+ avr32_usart_t *instance;
+ rt_uint32_t irqno;
+ rt_uint32_t irq_level;
+ rt_uint32_t tx_pin;
+ rt_uint32_t tx_pin_function;
+ rt_uint32_t rx_pin;
+ rt_uint32_t rx_pin_function;
+ void (*uart_isr)(void);
+};
+
+static struct avr32uc3b_uart_dev uart_dev[] =
+{
+#ifdef BSP_USING_UART0
+ {
+ .instance = (avr32_usart_t *)&AVR32_USART0,
+ .irqno = AVR32_USART0_IRQ,
+ .irq_level = AVR32_INTC_INT0,
+ .tx_pin = BSP_UART0_TX_PIN,
+ .tx_pin_function = BSP_UART0_TX_PIN_FUNCTION,
+ .rx_pin = BSP_UART0_RX_PIN,
+ .rx_pin_function = BSP_UART0_RX_PIN_FUNCTION,
+ .uart_isr = avr32uc3b_uart0_isr,
+ },
+#endif
+
+#ifdef BSP_USING_UART1
+ {
+ .instance = (avr32_usart_t *)&AVR32_USART1,
+ .irqno = AVR32_USART1_IRQ,
+ .irq_level = AVR32_INTC_INT0,
+ .tx_pin = BSP_UART1_TX_PIN,
+ .tx_pin_function = BSP_UART1_TX_PIN_FUNCTION,
+ .rx_pin = BSP_UART1_RX_PIN,
+ .rx_pin_function = BSP_UART1_RX_PIN_FUNCTION,
+ .uart_isr = avr32uc3b_uart1_isr,
+ },
+#endif
+
+#ifdef BSP_USING_UART2
+ {
+ .instance = (avr32_usart_t *)&AVR32_USART2,
+ .irqno = AVR32_USART2_IRQ,
+ .irq_level = AVR32_INTC_INT0,
+ .tx_pin = BSP_UART2_TX_PIN,
+ .tx_pin_function = BSP_UART2_TX_PIN_FUNCTION,
+ .rx_pin = BSP_UART2_RX_PIN,
+ .rx_pin_function = BSP_UART2_RX_PIN_FUNCTION,
+ .uart_isr = avr32uc3b_uart2_isr,
+ },
+#endif
+};
+
+enum
+{
+#ifdef BSP_USING_UART0
+ UART0_INDEX,
+#endif
+
+#ifdef BSP_USING_UART1
+ UART1_INDEX,
+#endif
+
+#ifdef BSP_USING_UART2
+ UART2_INDEX,
+#endif
+};
+
+#ifdef BSP_USING_UART0
+void avr32uc3b_uart0_isr(void)
+{
+ rt_interrupt_enter();
+ /* read interrupt status and clear it */
+ if (usart_test_hit(&AVR32_USART0)) /* rx ind */
+ {
+ rt_hw_serial_isr(&uart_dev[UART0_INDEX].parent, RT_SERIAL_EVENT_RX_IND);
+ }
+
+ rt_interrupt_leave();
+}
+#endif
+
+#ifdef BSP_USING_UART1
+void avr32uc3b_uart1_isr(void)
+{
+ rt_interrupt_enter();
+ /* read interrupt status and clear it */
+ if (usart_test_hit(&AVR32_USART1)) /* rx ind */
+ {
+ rt_hw_serial_isr(&uart_dev[UART1_INDEX].parent, RT_SERIAL_EVENT_RX_IND);
+ }
+
+ rt_interrupt_leave();
+}
+#endif
+
+#ifdef BSP_USING_UART2
+void avr32uc3b_uart2_isr(void)
+{
+ rt_interrupt_enter();
+ /* read interrupt status and clear it */
+ if (usart_test_hit(&AVR32_USART2)) /* rx ind */
+ {
+ rt_hw_serial_isr(&uart_dev[UART2_INDEX].parent, RT_SERIAL_EVENT_RX_IND);
+ }
+
+ rt_interrupt_leave();
+}
+#endif
+
+/**
+ * @addtogroup AVR32UC3
+ */
+/*@{*/
+
+static rt_err_t avr32uc3b_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
+{
+ struct avr32uc3b_uart_dev *uart = RT_NULL;
+ unsigned char l_parity;
+ unsigned short l_stop;
+ unsigned long l_baud;
+ unsigned char l_data_bits;
+
+ RT_ASSERT(serial != RT_NULL);
+ RT_ASSERT(cfg != RT_NULL);
+
+ uart = rt_container_of(serial, struct avr32uc3b_uart_dev, parent);
+ // Set the TX and RX pins by using the function select on the GPIO
+ // Set datasheet for more information on function select
+ gpio_enable_module_pin(uart->tx_pin, uart->tx_pin_function);
+ gpio_enable_module_pin(uart->rx_pin, uart->rx_pin_function);
+
+ /* Parity settings */
+ if (cfg->parity == PARITY_ODD)
+ l_parity = USART_ODD_PARITY;
+ else if (cfg->parity == PARITY_EVEN)
+ l_parity = USART_EVEN_PARITY;
+ else
+ l_parity = USART_NO_PARITY;
+
+ /* Stopbit settings */
+ if (cfg->stop_bits == STOP_BITS_1)
+ l_stop = USART_1_STOPBIT;
+ else
+ l_stop = USART_2_STOPBITS;
+
+ l_baud = cfg->baud_rate;
+ l_data_bits = cfg->data_bits;
+
+ /* Populate */
+ usart_options_t usart_options = {
+ .baudrate = l_baud,
+ .charlength = l_data_bits,
+ .paritytype = l_parity,
+ .stopbits = l_stop,
+ .channelmode = USART_NORMAL_CHMODE
+ };
+
+ usart_init_rs232(uart->instance, &usart_options, FCPU);
+
+ return RT_EOK;
+}
+
+static rt_err_t avr32uc3b_uart_control(struct rt_serial_device *serial, int cmd, void *arg)
+{
+ struct avr32uc3b_uart_dev *uart = RT_NULL;
+ RT_ASSERT(serial != RT_NULL);
+ uart = rt_container_of(serial, struct avr32uc3b_uart_dev, parent);
+
+ switch (cmd)
+ {
+ /* enable interrupt */
+ case RT_DEVICE_CTRL_SET_INT:
+ // Set up a RX interrupt
+ // We need to set up the handler first
+ // And set up and enable the interrupt handlers
+ //INTC_init_interrupts();
+ INTC_register_interrupt(uart->uart_isr, uart->irqno, uart->irq_level);
+ //*(uart->instance)->ier = AVR32_USART_IER_RXRDY_MASK;
+ AVR32_USART1.ier = AVR32_USART_IER_RXRDY_MASK;
+ break;
+ }
+ return RT_EOK;
+}
+
+static int avr32uc3b_uart_putc(struct rt_serial_device *serial, char c)
+{
+ struct avr32uc3b_uart_dev *uart = RT_NULL;
+ RT_ASSERT(serial != RT_NULL);
+ uart = rt_container_of(serial, struct avr32uc3b_uart_dev, parent);
+ usart_putchar(uart->instance, c);
+
+ return 1;
+}
+
+static int avr32uc3b_uart_getc(struct rt_serial_device *serial)
+{
+ struct avr32uc3b_uart_dev *uart = RT_NULL;
+ RT_ASSERT(serial != RT_NULL);
+ uart = rt_container_of(serial, struct avr32uc3b_uart_dev, parent);
+
+ int ch;
+ if (usart_read_char(uart->instance, &ch) == USART_SUCCESS)
+ return ch;
+
+ return -1;
+}
+
+const static struct rt_uart_ops _uart_ops =
+{
+ avr32uc3b_uart_configure,
+ avr32uc3b_uart_control,
+ avr32uc3b_uart_putc,
+ avr32uc3b_uart_getc,
+ RT_NULL,
+};
+
+/*
+ * UART Initiation
+ */
+int rt_hw_uart_init(void)
+{
+ rt_err_t ret = RT_EOK;
+
+ struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
+
+#ifdef BSP_USING_UART0
+ uart_dev[UART0_INDEX].parent.ops = &_uart_ops;
+ uart_dev[UART0_INDEX].parent.config = config;
+
+ ret = rt_hw_serial_register(&uart_dev[UART0_INDEX].parent,
+ "uart0",
+ RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
+ &uart_dev[UART0_INDEX]);
+ RT_ASSERT(ret == RT_EOK);
+#endif
+
+#ifdef BSP_USING_UART1
+ uart_dev[UART1_INDEX].parent.ops = &_uart_ops;
+ uart_dev[UART1_INDEX].parent.config = config;
+
+ ret = rt_hw_serial_register(&uart_dev[UART1_INDEX].parent,
+ "uart1",
+ RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
+ &uart_dev[UART1_INDEX]);
+ RT_ASSERT(ret == RT_EOK);
+#endif
+
+#ifdef BSP_USING_UART2
+ uart_dev[UART2_INDEX].parent.ops = &_uart_ops;
+ uart_dev[UART2_INDEX].parent.config = config;
+
+ ret = rt_hw_serial_register(&uart_dev[UART2_INDEX].parent,
+ "uart2",
+ RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
+ &uart_dev[UART2_INDEX]);
+ RT_ASSERT(ret == RT_EOK);
+#endif
+
+
+ return ret;
+}
+
+#endif /* RT_USING_SERIAL */
+
+/*@}*/
diff --git a/bsp/avr32uc3b0/drv_uart.h b/bsp/avr32uc3b0/drv_uart.h
new file mode 100644
index 0000000000..9b3a36e8fe
--- /dev/null
+++ b/bsp/avr32uc3b0/drv_uart.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2006-2023, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date Author Notes
+ * 2009-01-05 Bernard first version
+ * 2010-03-29 Bernard remove interrupt tx and DMA rx mode.
+ * 2010-03-30 Kyle Ported from STM32 to AVR32.
+ * 2023-10-13 Raman Gopalan UART driver for at32uc3b: Initial version
+ */
+
+#ifndef __RT_HW_SERIAL_H__
+#define __RT_HW_SERIAL_H__
+
+#include <rthw.h>
+#include <rtthread.h>
+#include "compiler.h"
+#include "usart.h"
+
+#define FOSC0 12000000
+#define FCPU 60000000
+#define FHSB FCPU
+#define FPBA FCPU
+#define FPBB FCPU
+
+#define UART_RX_BUFFER_SIZE 64
+#define UART_TX_DMA_NODE_SIZE 4
+
+#ifdef RT_USING_SERIAL
+int rt_hw_uart_init(void);
+#endif
+
+#endif
diff --git a/bsp/avr32uc3b0/rtconfig.h b/bsp/avr32uc3b0/rtconfig.h
index c48d8b8e17..046269c073 100644
--- a/bsp/avr32uc3b0/rtconfig.h
+++ b/bsp/avr32uc3b0/rtconfig.h
@@ -47,8 +47,8 @@
#define RT_USING_DEVICE
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
-#define RT_CONSOLE_DEVICE_NAME "uart"
-#define RT_VER_NUM 0x50002
+#define RT_CONSOLE_DEVICE_NAME "uart1"
+#define RT_VER_NUM 0x50100
/* RT-Thread Components */
@@ -76,7 +76,6 @@
#define RT_UNAMED_PIPE_NUMBER 64
#define RT_USING_SERIAL
#define RT_USING_SERIAL_V1
-#define RT_SERIAL_USING_DMA
#define RT_SERIAL_RB_BUFSZ 64
#define RT_USING_PIN
@@ -225,5 +224,16 @@
/* Uncategorized */
+/* On-chip Peripheral Drivers */
+
+#define BSP_USING_PIN
+#define BSP_USING_UART
+#define BSP_USING_UART1
+#define BSP_UART1_TX_PIN_34
+#define BSP_UART1_TX_PIN 34
+#define BSP_UART1_TX_PIN_FUNCTION 2
+#define BSP_UART1_RX_PIN_35
+#define BSP_UART1_RX_PIN 35
+#define BSP_UART1_RX_PIN_FUNCTION 2
#endif
diff --git a/bsp/avr32uc3b0/rtconfig.py b/bsp/avr32uc3b0/rtconfig.py
index a9400c6051..5a9d400c6b 100644
--- a/bsp/avr32uc3b0/rtconfig.py
+++ b/bsp/avr32uc3b0/rtconfig.py
@@ -5,6 +5,7 @@ ARCH = 'avr32'
CPU = 'uc3'
PART = 'uc3b0256'
BOARD = 'USERBOARD'
+ATOMICS = ' -D__STDC_NO_ATOMICS__'
CROSS_TOOL = 'gcc'
@@ -13,7 +14,7 @@ if os.getenv('RTT_CC'):
if CROSS_TOOL == 'gcc':
PLATFORM = 'gcc'
- EXEC_PATH = 'C:/Program Files/Atmel/AVR Tools/AVR Toolchain/bin'
+ EXEC_PATH = 'C:/Program Files (x86)/Atmel/AVR Tools/AVR Toolchain/bin'
elif CROSS_TOOL == 'keil':
print('================ERROR============================')
print('Not support keil yet!')
@@ -44,7 +45,7 @@ if PLATFORM == 'gcc':
OBJCPY = PREFIX + 'objcopy'
DEVICE = ' -mpart=' + PART
- CFLAGS = DEVICE + ' -DBOARD=' + BOARD + ' -fmessage-length=0 -ffunction-sections -masm-addr-pseudos'
+ CFLAGS = DEVICE + ' -DBOARD=' + BOARD + ATOMICS + ' -fmessage-length=0 -ffunction-sections -masm-addr-pseudos'
AFLAGS = ' -c -x assembler-with-cpp' + DEVICE
LFLAGS = DEVICE + ' -Wl,--gc-sections --rodata-writable -Wl,--direct-data -LSOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS -T avr32elf_uc3b0256.lds'
diff --git a/bsp/avr32uc3b0/startup.c b/bsp/avr32uc3b0/startup.c
index c408accff3..0c52980934 100644
--- a/bsp/avr32uc3b0/startup.c
+++ b/bsp/avr32uc3b0/startup.c
@@ -39,7 +39,7 @@ int main(void)
/* init finsh */
finsh_system_init();
#if !defined(RT_USING_POSIX_STDIO) && defined(RT_USING_DEVICE)
- finsh_set_device(FINSH_DEVICE_NAME);
+ finsh_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
#endif