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authorErnest <[email protected]>2019-07-12 09:37:26 +0800
committerErnest <[email protected]>2019-07-18 10:28:13 +0800
commit3211ae2c1677f34c80d6db4c2ba7f610e3151ee6 (patch)
tree06c406c7568ac8bc5601a3d73658b377c9e3fa3b /bsp
parenta962fb35321b7440af08caabc2f6065723d7179a (diff)
[bsp][stm32][prefect] crypto configure and solve a problem
Diffstat (limited to 'bsp')
-rw-r--r--bsp/stm32/libraries/HAL_Drivers/Kconfig.crypto6
-rw-r--r--bsp/stm32/libraries/HAL_Drivers/drv_crypto.c23
2 files changed, 14 insertions, 15 deletions
diff --git a/bsp/stm32/libraries/HAL_Drivers/Kconfig.crypto b/bsp/stm32/libraries/HAL_Drivers/Kconfig.crypto
index 0c19f9468d..9c224da4e1 100644
--- a/bsp/stm32/libraries/HAL_Drivers/Kconfig.crypto
+++ b/bsp/stm32/libraries/HAL_Drivers/Kconfig.crypto
@@ -1,12 +1,12 @@
config BSP_USING_CRC
- bool "Enable CRC (CRC-32 0x04C11DB7 polynomial)"
+ bool "Enable CRC (CRC-32 0x04C11DB7 Polynomial)"
select RT_USING_HWCRYPTO
select RT_HWCRYPTO_USING_CRC
default n
config BSP_USING_RNG
- bool "Enable RNG"
+ bool "Enable RNG (Random Number Generator)"
select RT_USING_HWCRYPTO
select RT_HWCRYPTO_USING_RNG
depends on (SOC_SERIES_STM32L4 || SOC_SERIES_STM32F4 || SOC_SERIES_STM32F7 || \
@@ -14,7 +14,7 @@ config BSP_USING_RNG
default n
config BSP_USING_UDID
- bool "Enable unique device identifier"
+ bool "Enable UDID (Unique Device Identifier)"
select RT_USING_HWCRYPTO
default n
diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_crypto.c b/bsp/stm32/libraries/HAL_Drivers/drv_crypto.c
index 0c0e76b7c2..7606066201 100644
--- a/bsp/stm32/libraries/HAL_Drivers/drv_crypto.c
+++ b/bsp/stm32/libraries/HAL_Drivers/drv_crypto.c
@@ -28,7 +28,7 @@ struct hash_ctx_des
CRC_HandleTypeDef contex;
};
-#if defined(SOC_SERIES_STM32L4)|| defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
+#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
static struct hwcrypto_crc_cfg crc_backup_cfg;
static int reverse_bit(rt_uint32_t n)
@@ -41,7 +41,7 @@ static int reverse_bit(rt_uint32_t n)
return n;
}
-#endif
+#endif /* defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7) */
static rt_uint32_t _crc_update(struct hwcrypto_crc *ctx, const rt_uint8_t *in, rt_size_t length)
{
@@ -53,8 +53,8 @@ static rt_uint32_t _crc_update(struct hwcrypto_crc *ctx, const rt_uint8_t *in, r
#endif
rt_mutex_take(&stm32_hw_dev->mutex, RT_WAITING_FOREVER);
-#if defined(SOC_SERIES_STM32L4)|| defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
- if (0 != memcmp(&crc_backup_cfg, &ctx->crc_cfg, sizeof(struct hwcrypto_crc_cfg)))
+#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
+ if (memcmp(&crc_backup_cfg, &ctx->crc_cfg, sizeof(struct hwcrypto_crc_cfg)) != 0)
{
if (HW_TypeDef->Init.DefaultPolynomialUse == DEFAULT_POLYNOMIAL_DISABLE)
{
@@ -103,17 +103,16 @@ static rt_uint32_t _crc_update(struct hwcrypto_crc *ctx, const rt_uint8_t *in, r
goto _exit;
}
#else
- if (ctx->crc_cfg.flags == 0 && ctx->crc_cfg.last_val == 0xFFFFFFFF && \
- ctx->crc_cfg.xorout == 0 && length % 4 != 0)
+ if (ctx->crc_cfg.flags != 0 || ctx->crc_cfg.last_val != 0xFFFFFFFF || ctx->crc_cfg.xorout != 0 || length % 4 != 0)
{
goto _exit;
}
- length >>= 2;
-#endif
+ length /= 4;
+#endif /* defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7) */
result = HAL_CRC_Accumulate(ctx->parent.contex, (rt_uint32_t *)in, length);
-#if defined(SOC_SERIES_STM32L4)|| defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
+#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
if (HW_TypeDef->Init.OutputDataInversionMode)
{
ctx ->crc_cfg.last_val = reverse_bit(result);
@@ -124,7 +123,7 @@ static rt_uint32_t _crc_update(struct hwcrypto_crc *ctx, const rt_uint8_t *in, r
}
crc_backup_cfg.last_val = ctx ->crc_cfg.last_val;
result = (result ? result ^ (ctx ->crc_cfg.xorout) : result);
-#endif
+#endif /* defined(SOC_SERIES_STM32L4)|| defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7) */
_exit:
rt_mutex_release(&stm32_hw_dev->mutex);
@@ -190,7 +189,7 @@ static rt_err_t _crypto_create(struct rt_hwcrypto_ctx *ctx)
}
hcrc->Instance = CRC;
-#if defined(SOC_SERIES_STM32L4)|| defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
+#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
hcrc->Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_ENABLE;
hcrc->Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_DISABLE;
hcrc->Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_BYTE;
@@ -201,7 +200,7 @@ static rt_err_t _crypto_create(struct rt_hwcrypto_ctx *ctx)
{
res = -RT_ERROR;
}
-#endif
+#endif /* defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7) */
ctx->contex = hcrc;
((struct hwcrypto_crc *)ctx)->ops = &crc_ops;
break;