diff options
| author | Wayne Lin <[email protected]> | 2022-01-25 18:53:52 +0800 |
|---|---|---|
| committer | Wayne Lin <[email protected]> | 2022-01-25 18:53:52 +0800 |
| commit | c95c296e9915a38a666ae1a2575c2a4d0ba1d376 (patch) | |
| tree | c6e5a1ffe4ceb997e853ba0c3daffc9dc60c8b79 /bsp | |
| parent | f7ba146a01fcf23a2b06a141d1b1a56cb27b878c (diff) | |
| parent | 32a5668593c578b85560338c29d76f3a252c8dbc (diff) | |
Merge branch 'master' of https://github.com/RT-Thread/rt-thread into nuvoton
# Conflicts:
# bsp/gd32/gd32107c-eval/rtconfig.h
Diffstat (limited to 'bsp')
247 files changed, 29073 insertions, 865 deletions
diff --git a/bsp/CME_M7/drivers/app_phy.c b/bsp/CME_M7/drivers/app_phy.c index b19d9e2348..5fb210d2ea 100644 --- a/bsp/CME_M7/drivers/app_phy.c +++ b/bsp/CME_M7/drivers/app_phy.c @@ -1,22 +1,22 @@ #include <stdio.h> #include "app_phy.h" -#define PHY_BASE_ADDR 0x7 +#define PHY_BASE_ADDR 0x7 #define PHY_REG_CONTROL 0x0 #define PHY_REG_STATUS 0x1 #define PHY_REG_ANE 0x6 #define PHY_REG_SPEC_STATUS 0x11 -#define PHY_REG_EXTEND_STATUS 0x1B +#define PHY_REG_EXTEND_STATUS 0x1B -#define PHY_BIT_CONTROL_RESET 0x8000 /*!< Control reg : reset */ -#define PHY_BIT_CONTROL_ANEN 0x1000 /*!< Control reg : auto-negotiation enable */ -#define PHY_BIT_CONTROL_RSAN 0x0200 /*!< Control reg : auto-negotiation restart */ +#define PHY_BIT_CONTROL_RESET 0x8000 /*!< Control reg : reset */ +#define PHY_BIT_CONTROL_ANEN 0x1000 /*!< Control reg : auto-negotiation enable */ +#define PHY_BIT_CONTROL_RSAN 0x0200 /*!< Control reg : auto-negotiation restart */ -#define PHY_BIT_STATUS_ANC 0x0020 /*!< Status reg : auto-negotiation complete */ -#define PHY_BIT_STATUS_LINK 0x0004 /*!< Status reg : link is up */ +#define PHY_BIT_STATUS_ANC 0x0020 /*!< Status reg : auto-negotiation complete */ +#define PHY_BIT_STATUS_LINK 0x0004 /*!< Status reg : link is up */ -#define PHY_BIT_ANE_LPAN 0x0001 /*!< ANE reg : link partner can auto-neg */ +#define PHY_BIT_ANE_LPAN 0x0001 /*!< ANE reg : link partner can auto-neg */ #define PHY_BIT_SPEED 0xC000 /*!< specific status reg : speed */ #define PHY_BIT_DUPLEX 0x2000 /*!< specific status reg : duplex */ @@ -25,24 +25,24 @@ #define PHY_BIT_AUTO_MEDIA_REG_DISABLE 0x0200 /*!< extended status reg : auto media register select disable */ void phy_Reset() { - ETH_PhyWrite(PHY_BASE_ADDR, PHY_REG_CONTROL, PHY_BIT_CONTROL_RESET); + ETH_PhyWrite(PHY_BASE_ADDR, PHY_REG_CONTROL, PHY_BIT_CONTROL_RESET); - while (1) { - uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_CONTROL); - if ((ret & PHY_BIT_CONTROL_RESET) == 0) { - break; - } - } + while (1) { + uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_CONTROL); + if ((ret & PHY_BIT_CONTROL_RESET) == 0) { + break; + } + } } void phy_AutoMediaSelect() { - uint32_t data; + uint32_t data; - // auto media and auto media register selection - data = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_EXTEND_STATUS); - data &= ~PHY_BIT_AUTO_MEDIA_DISABLE; - data &= ~PHY_BIT_AUTO_MEDIA_REG_DISABLE; - ETH_PhyWrite(PHY_BASE_ADDR, PHY_REG_EXTEND_STATUS, data); + // auto media and auto media register selection + data = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_EXTEND_STATUS); + data &= ~PHY_BIT_AUTO_MEDIA_DISABLE; + data &= ~PHY_BIT_AUTO_MEDIA_REG_DISABLE; + ETH_PhyWrite(PHY_BASE_ADDR, PHY_REG_EXTEND_STATUS, data); } void phy_AutoNeg() @@ -65,61 +65,61 @@ void phy_AutoNeg() } BOOL phy_IsLink() { - uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_STATUS); - return (ret & PHY_BIT_STATUS_LINK) ? TRUE : FALSE; + uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_STATUS); + return (ret & PHY_BIT_STATUS_LINK) ? TRUE : FALSE; } BOOL phy_PartnerCanAutoNeg() { - uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_ANE); - return (ret & PHY_BIT_ANE_LPAN) ? TRUE : FALSE; + uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_ANE); + return (ret & PHY_BIT_ANE_LPAN) ? TRUE : FALSE; } uint32_t phy_GetSpeed() { - uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_SPEC_STATUS); - return ((ret & PHY_BIT_SPEED) >> 14); + uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_SPEC_STATUS); + return ((ret & PHY_BIT_SPEED) >> 14); } uint32_t phy_GetDuplex() { - uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_SPEC_STATUS); - return ((ret & PHY_BIT_DUPLEX) >> 13); + uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_SPEC_STATUS); + return ((ret & PHY_BIT_DUPLEX) >> 13); } BOOL phy_Init() { - phy_AutoMediaSelect(); - phy_AutoNeg(); + phy_AutoMediaSelect(); + phy_AutoNeg(); - if (!phy_PartnerCanAutoNeg()) { - printf("Warning:: PHY's partner can't do auto-negotiation\n"); - } + if (!phy_PartnerCanAutoNeg()) { + printf("Warning:: PHY's partner can't do auto-negotiation\n"); + } - if (!phy_IsLink()) { - printf("link is down\n"); - return FALSE; - } + if (!phy_IsLink()) { + printf("link is down\n"); + return FALSE; + } - { - uint32_t speed = phy_GetSpeed(); - if (speed == PHY_SPEED_10) { - speed = 10; - } else if (speed == PHY_SPEED_100) { - speed = 100; - } else if (speed == PHY_SPEED_1000) { - speed = 1000; - } + { + uint32_t speed = phy_GetSpeed(); + if (speed == PHY_SPEED_10) { + speed = 10; + } else if (speed == PHY_SPEED_100) { + speed = 100; + } else if (speed == PHY_SPEED_1000) { + speed = 1000; + } - printf("PHY runs in %dM speed %s duplex\n", - speed, (phy_GetDuplex() == PHY_DUPLEX_HALF) ? "half" : "full"); - } + printf("PHY runs in %dM speed %s duplex\n", + speed, (phy_GetDuplex() == PHY_DUPLEX_HALF) ? "half" : "full"); + } - // After auto-negcioation, Mawell PHY need some - // time to initial itself. - // So we have to delay some time since different - // connection way, such as direct wire, hub, switch. - // If not to delay, the first several sent frame - // may be lost. - // Please according to actual environment to tune - // this delay. - udelay(200000); + // After auto-negcioation, Mawell PHY need some + // time to initial itself. + // So we have to delay some time since different + // connection way, such as direct wire, hub, switch. + // If not to delay, the first several sent frame + // may be lost. + // Please according to actual environment to tune + // this delay. + udelay(200000); - return TRUE; + return TRUE; } diff --git a/bsp/CME_M7/drivers/app_phy.h b/bsp/CME_M7/drivers/app_phy.h index ac8afd9d69..fc8fa24afe 100644 --- a/bsp/CME_M7/drivers/app_phy.h +++ b/bsp/CME_M7/drivers/app_phy.h @@ -7,13 +7,13 @@ #include "cmem7_includes.h" -#define PHY_SPEED_10 0x0 /*!< SPEED : 10M */ -#define PHY_SPEED_100 0x1 /*!< SPEED : 100M */ -#define PHY_SPEED_1000 0x2 /*!< SPEED : 1000M */ - -#define PHY_DUPLEX_HALF 0x0 /*!< DUPLEX : half */ -#define PHY_DUPLEX_FULL 0x1 /*!< DUPLEX : full */ - +#define PHY_SPEED_10 0x0 /*!< SPEED : 10M */ +#define PHY_SPEED_100 0x1 /*!< SPEED : 100M */ +#define PHY_SPEED_1000 0x2 /*!< SPEED : 1000M */ + +#define PHY_DUPLEX_HALF 0x0 /*!< DUPLEX : half */ +#define PHY_DUPLEX_FULL 0x1 /*!< DUPLEX : full */ + void phy_Reset(void); void phy_AutoNeg(void); BOOL phy_IsLink(void); @@ -26,7 +26,7 @@ BOOL phy_Init(void); } #endif -#endif +#endif diff --git a/bsp/CME_M7/drivers/emac.c b/bsp/CME_M7/drivers/emac.c index 2a262aa526..2582eab805 100644 --- a/bsp/CME_M7/drivers/emac.c +++ b/bsp/CME_M7/drivers/emac.c @@ -1,7 +1,7 @@ /* * File : emac.c * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006-2014, RT-Thread Develop Team + * COPYRIGHT (C) 2006-2021, RT-Thread Develop Team * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at @@ -38,7 +38,7 @@ struct rt_cme_eth struct eth_device parent; /* interface address info. */ - rt_uint8_t dev_addr[MAX_ADDR_LEN]; /* hw address */ + rt_uint8_t dev_addr[MAX_ADDR_LEN]; /* hw address */ uint32_t ETH_Speed; uint32_t ETH_Mode; @@ -95,8 +95,8 @@ uint32_t txTotalMemory = 0x2000; BOOL isRxNoBuf = FALSE; #define ETH_MAX_PACKET_SIZE 1520 /* ETH_HEADER + ETH_EXTRA + MAX_ETH_PAYLOAD + ETH_CRC */ -#define ETH_RXBUFNB 4 -#define ETH_TXBUFNB 2 +#define ETH_RXBUFNB 4 +#define ETH_TXBUFNB 2 struct eth_rx_buffer { diff --git a/bsp/CME_M7/drivers/uart.c b/bsp/CME_M7/drivers/uart.c index b7911b406f..cdb3d0e771 100644 --- a/bsp/CME_M7/drivers/uart.c +++ b/bsp/CME_M7/drivers/uart.c @@ -32,23 +32,23 @@ static struct rt_serial_device serial2; static rt_err_t CME_M7_configure(struct rt_serial_device *serial, struct serial_configure *cfg) { struct CME_M7_uart* uart; - UART_InitTypeDef init; + UART_InitTypeDef init; RT_ASSERT(serial != RT_NULL); RT_ASSERT(cfg != RT_NULL); uart = (struct CME_M7_uart *)serial->parent.user_data; - init.UART_BaudRate = cfg->baud_rate; - init.UART_StopBits = UART_StopBits_1; + init.UART_BaudRate = cfg->baud_rate; + init.UART_StopBits = UART_StopBits_1; init.UART_Parity = UART_Parity_None; - init.UART_LoopBack = FALSE; - init.UART_RxEn = TRUE; - init.UART_CtsEn = FALSE; + init.UART_LoopBack = FALSE; + init.UART_RxEn = TRUE; + init.UART_CtsEn = FALSE; UART_Init(uart->uart_device, &init); uart->uart_device->RX_RESET = 1; - UART_Enable(uart->uart_device, TRUE); + UART_Enable(uart->uart_device, TRUE); uart->uart_device->RX_RESET = 0; return RT_EOK; @@ -67,24 +67,24 @@ static rt_err_t CME_M7_control(struct rt_serial_device *serial, int cmd, void *a case RT_DEVICE_CTRL_CLR_INT: /* disable rx irq */ NVIC_InitStructure.NVIC_IRQChannel = uart->irq; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelCmd = FALSE; - NVIC_Init(&NVIC_InitStructure); + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelCmd = FALSE; + NVIC_Init(&NVIC_InitStructure); - UART_EnableInt(uart->uart_device, UART_Int_RxNotEmpty, FALSE); + UART_EnableInt(uart->uart_device, UART_Int_RxNotEmpty, FALSE); break; case RT_DEVICE_CTRL_SET_INT: /* enable rx irq */ NVIC_InitStructure.NVIC_IRQChannel = uart->irq; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelCmd = TRUE; - NVIC_Init(&NVIC_InitStructure); + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelCmd = TRUE; + NVIC_Init(&NVIC_InitStructure); - UART_ClearInt(uart->uart_device, UART_Int_RxNotEmpty); - UART_EnableInt(uart->uart_device, UART_Int_RxNotEmpty, TRUE); + UART_ClearInt(uart->uart_device, UART_Int_RxNotEmpty); + UART_EnableInt(uart->uart_device, UART_Int_RxNotEmpty, TRUE); break; } @@ -132,8 +132,8 @@ static const struct rt_uart_ops CME_M7_uart_ops = int rt_hw_uart_init(void) { - struct CME_M7_uart* uart; - struct rt_serial_device *serial; + struct CME_M7_uart* uart; + struct rt_serial_device *serial; struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT; #ifdef RT_USING_UART0 @@ -143,7 +143,7 @@ int rt_hw_uart_init(void) serial->ops = &CME_M7_uart_ops; serial->config = config; - /* register UART device */ + /* register UART device */ rt_hw_serial_register(serial, "uart0", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, @@ -157,14 +157,14 @@ int rt_hw_uart_init(void) serial->ops = &CME_M7_uart_ops; serial->config = config; - /* register UART device */ + /* register UART device */ rt_hw_serial_register(serial, "uart2", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, uart); #endif /* RT_USING_UART2 */ - return RT_EOK; + return RT_EOK; } INIT_BOARD_EXPORT(rt_hw_uart_init); diff --git a/bsp/at91sam9260/platform/interrupt.c b/bsp/at91sam9260/platform/interrupt.c index dc98fe7c4d..60c4d0790b 100644 --- a/bsp/at91sam9260/platform/interrupt.c +++ b/bsp/at91sam9260/platform/interrupt.c @@ -396,6 +396,28 @@ void rt_hw_interrupt_ack(rt_uint32_t fiq_irq, rt_uint32_t id) at91_sys_write(AT91_AIC_EOICR, 0x0); } +void rt_interrupt_dispatch(rt_uint32_t fiq_irq) +{ + rt_isr_handler_t isr_func; + rt_uint32_t irq; + void *param; + + /* get irq number */ + irq = rt_hw_interrupt_get_active(fiq_irq); + + /* get interrupt service routine */ + isr_func = irq_desc[irq].handler; + param = irq_desc[irq].param; + + /* turn to interrupt service routine */ + isr_func(irq, param); + + rt_hw_interrupt_ack(fiq_irq, irq); +#ifdef RT_USING_INTERRUPT_INFO + irq_desc[irq].counter ++; +#endif +} + #ifdef RT_USING_FINSH #ifdef RT_USING_INTERRUPT_INFO void list_irq(void) diff --git a/bsp/at91sam9260/template.uvopt b/bsp/at91sam9260/template.uvopt index 2dca5102b8..7454a3661d 100644 --- a/bsp/at91sam9260/template.uvopt +++ b/bsp/at91sam9260/template.uvopt @@ -13,6 +13,7 @@ <tExt>*.txt; *.h; *.inc</tExt> <pExt>*.plm</pExt> <CppX>*.cpp</CppX> + <nMigrate>0</nMigrate> </Extensions> <DaveTm> @@ -31,6 +32,7 @@ <BeepAtEnd>1</BeepAtEnd> <RunSim>1</RunSim> <RunTarget>0</RunTarget> + <RunAbUc>0</RunAbUc> </OPTTT> <OPTHX> <HexSelection>1</HexSelection> @@ -108,10 +110,10 @@ <tRtrace>1</tRtrace> <sRSysVw>1</sRSysVw> <tRSysVw>1</tRSysVw> - <tPdscDbg>1</tPdscDbg> <sRunDeb>0</sRunDeb> <sLrtime>0</sLrtime> - <nTsel>5</nTsel> + <bEvRecOn>1</bEvRecOn> + <nTsel>18</nTsel> <sDll></sDll> <sDllPa></sDllPa> <sDlgDll></sDlgDll> @@ -168,6 +170,13 @@ </DebugFlag> <LintExecutable></LintExecutable> <LintConfigFile></LintConfigFile> + <bLintAuto>0</bLintAuto> + <bAutoGenD>0</bAutoGenD> + <LntExFlags>0</LntExFlags> + <pMisraName></pMisraName> + <pszMrule></pszMrule> + <pSingCmds></pSingCmds> + <pMultCmds></pMultCmds> </TargetOption> </Target> diff --git a/bsp/at91sam9260/template.uvproj b/bsp/at91sam9260/template.uvproj index c644bc5440..6e4ee85615 100644 --- a/bsp/at91sam9260/template.uvproj +++ b/bsp/at91sam9260/template.uvproj @@ -72,14 +72,18 @@ <UserProg2Name></UserProg2Name> <UserProg1Dos16Mode>0</UserProg1Dos16Mode> <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopB1X>0</nStopB1X> + <nStopB2X>0</nStopB2X> </BeforeMake> <AfterMake> - <RunUserProg1>0</RunUserProg1> + <RunUserProg1>1</RunUserProg1> <RunUserProg2>0</RunUserProg2> - <UserProg1Name></UserProg1Name> + <UserProg1Name>fromelf.exe --bin -o [email protected] #L</UserProg1Name> <UserProg2Name></UserProg2Name> <UserProg1Dos16Mode>0</UserProg1Dos16Mode> <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopA1X>0</nStopA1X> + <nStopA2X>0</nStopA2X> </AfterMake> <SelectedForBatchBuild>0</SelectedForBatchBuild> <SVCSIdString></SVCSIdString> @@ -141,10 +145,9 @@ <RestoreToolbox>1</RestoreToolbox> <RestoreTracepoints>1</RestoreTracepoints> <RestoreSysVw>1</RestoreSysVw> - <UsePdscDebugDescription>1</UsePdscDebugDescription> </Target> <RunDebugAfterBuild>0</RunDebugAfterBuild> - <TargetSelection>5</TargetSelection> + <TargetSelection>18</TargetSelection> <SimDlls> <CpuDll></CpuDll> <CpuDllArguments></CpuDllArguments> @@ -224,6 +227,7 @@ <useUlib>0</useUlib> <EndSel>0</EndSel> <uLtcg>0</uLtcg> + <nSecure>0</nSecure> <RoSelD>3</RoSelD> <RwSelD>3</RwSelD> <CodeSel>0</CodeSel> @@ -356,8 +360,15 @@ <wLevel>2</wLevel> <uThumb>0</uThumb> <uSurpInc>0</uSurpInc> - <uC99>0</uC99> + <uC99>1</uC99> <useXO>0</useXO> + <v6Lang>1</v6Lang> + <v6LangP>1</v6LangP> + <vShortEn>1</vShortEn> + <vShortWch>1</vShortWch> + <v6Lto>0</v6Lto> + <v6WtE>0</v6WtE> + <v6Rtti>0</v6Rtti> <VariousControls> <MiscControls></MiscControls> <Define>RT_USING_INTERRUPT_INFO</Define> @@ -375,6 +386,7 @@ <NoWarn>0</NoWarn> <uSurpInc>0</uSurpInc> <useXO>0</useXO> + <uClangAs>0</uClangAs> <VariousControls> <MiscControls></MiscControls> <Define></Define> diff --git a/bsp/bluetrum/ab32vg1-ab-prougen/applications/mnt.c b/bsp/bluetrum/ab32vg1-ab-prougen/applications/mnt.c index 50681e7bc6..317dd4c862 100644 --- a/bsp/bluetrum/ab32vg1-ab-prougen/applications/mnt.c +++ b/bsp/bluetrum/ab32vg1-ab-prougen/applications/mnt.c @@ -14,7 +14,11 @@ #include <dfs_elm.h> #include <dfs_fs.h> -#include <dfs_posix.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #include "drv_gpio.h" // #define DRV_DEBUG diff --git a/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/SConscript b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/SConscript index 3321a76d91..625f186203 100644 --- a/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/SConscript +++ b/bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/SConscript @@ -18,12 +18,14 @@ DEPENDS = [""] # SOURCES: Need to compile c and c++ source, auto search when SOURCES is empty # # LOCAL_CPPPATH: Local file path (.h/.c/.cpp) -# LOCAL_CCFLAGS: Local compilation parameter +# LOCAL_CFLAGS: Local c compilation parameter +# LOCAL_CCFLAGS: Local c/c++ compilation parameter +# LOCAL_CXXFLAGS: Local c++ compilation parameter # LOCAL_ASFLAGS: Local assembly parameters # # CPPPATH: Global file path (.h/.c/.cpp), auto search when LOCAL_CPPPATH/CPPPATH # is empty # no pass!!! -# CCFLAGS: Global compilation parameter +# CFLAGS : Global compilation parameter # ASFLAGS: Global assembly parameters # # CPPDEFINES: Global macro definition @@ -37,12 +39,16 @@ DEPENDS = [""] CWD = GetCurrentDir() SOURCES = Glob("./source/*.c") -LOCAL_CPPPATH = [] -LOCAL_CCFLAGS = "" +LOCAL_CPPPATH = [] +LOCAL_CFLAGS = "" +LOCAL_CCFLAGS = "" +LOCAL_CXXFLAGS = "" LOCAL_ASFLAGS = "" CPPPATH = [GetCurrentDir(), os.path.join(GetCurrentDir(), 'include')] -CCFLAGS = "" +CFLAGS = "" +CCFLAGS = "" +CXXFLAGS = "" ASFLAGS = "" CPPDEFINES = [] @@ -61,10 +67,14 @@ CPPPATH_IGNORE = [] #--------------------------------------------------------------------------------- objs = DefineGroup(name = PKGNAME, src = SOURCES, depend = DEPENDS, CPPPATH = CPPPATH, + CFLAGS = CFLAGS, CCFLAGS = CCFLAGS, + CXXFLAGS = CXXFLAGS, ASFLAGS = ASFLAGS, LOCAL_CPPPATH = LOCAL_CPPPATH, + LOCAL_CFLAGS = LOCAL_CFLAGS, LOCAL_CCFLAGS = LOCAL_CCFLAGS, + LOCAL_CXXFLAGS = LOCAL_CXXFLAGS, LOCAL_ASFLAGS = LOCAL_ASFLAGS, CPPDEFINES = CPPDEFINES, LOCAL_CPPDEFINES = LOCAL_CPPDEFINES, diff --git a/bsp/bluetrum/libraries/hal_libraries/bmsis/SConscript b/bsp/bluetrum/libraries/hal_libraries/bmsis/SConscript index 9a82897032..a395e0acf8 100644 --- a/bsp/bluetrum/libraries/hal_libraries/bmsis/SConscript +++ b/bsp/bluetrum/libraries/hal_libraries/bmsis/SConscript @@ -19,12 +19,14 @@ DEPENDS = [""] # SOURCES: Need to compile c and c++ source, auto search when SOURCES is empty # # LOCAL_CPPPATH: Local file path (.h/.c/.cpp) -# LOCAL_CCFLAGS: Local compilation parameter +# LOCAL_CFLAGS: Local c compilation parameter +# LOCAL_CCFLAGS: Local c/c++ compilation parameter +# LOCAL_CXXFLAGS: Local c++ compilation parameter # LOCAL_ASFLAGS: Local assembly parameters # # CPPPATH: Global file path (.h/.c/.cpp), auto search when LOCAL_CPPPATH/CPPPATH # is empty # no pass!!! -# CCFLAGS: Global compilation parameter +# CFLAGS : Global compilation parameter # ASFLAGS: Global assembly parameters # # CPPDEFINES: Global macro definition @@ -35,22 +37,26 @@ DEPENDS = [""] # # LINKFLAGS: Link options #--------------------------------------------------------------------------------- +CWD = GetCurrentDir() SOURCES = Glob("./source/*.c") -SOURCES += Glob("./source/*.S") -LOCAL_CPPPATH = [] -LOCAL_CCFLAGS = "" +LOCAL_CPPPATH = [] +LOCAL_CFLAGS = "" +LOCAL_CCFLAGS = "" +LOCAL_CXXFLAGS = "" LOCAL_ASFLAGS = "" CPPPATH = [GetCurrentDir(), os.path.join(GetCurrentDir(), 'include')] -CCFLAGS = "" +CFLAGS = "" +CCFLAGS = "" +CXXFLAGS = "" ASFLAGS = "" CPPDEFINES = [] LOCAL_CPPDEFINES = [] LIBS = [] -LIBPATH = [] +LIBPATH = [] LINKFLAGS = "" @@ -62,10 +68,14 @@ CPPPATH_IGNORE = [] #--------------------------------------------------------------------------------- objs = DefineGroup(name = PKGNAME, src = SOURCES, depend = DEPENDS, CPPPATH = CPPPATH, + CFLAGS = CFLAGS, CCFLAGS = CCFLAGS, + CXXFLAGS = CXXFLAGS, ASFLAGS = ASFLAGS, LOCAL_CPPPATH = LOCAL_CPPPATH, + LOCAL_CFLAGS = LOCAL_CFLAGS, LOCAL_CCFLAGS = LOCAL_CCFLAGS, + LOCAL_CXXFLAGS = LOCAL_CXXFLAGS, LOCAL_ASFLAGS = LOCAL_ASFLAGS, CPPDEFINES = CPPDEFINES, LOCAL_CPPDEFINES = LOCAL_CPPDEFINES, diff --git a/bsp/ck802/applications/SConscript b/bsp/ck802/applications/SConscript index 78698e4ad3..8cffec4949 100644 --- a/bsp/ck802/applications/SConscript +++ b/bsp/ck802/applications/SConscript @@ -6,8 +6,8 @@ cwd = os.path.join(str(Dir('#')), 'applications') src = Glob('*.c') CPPPATH = [cwd, str(Dir('#'))] -CCFLAGS = ' -c -mistack -ffunction-sections' +CFLAGS = ' -c -mistack -ffunction-sections' -group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH, CCFLAGS=CCFLAGS) +group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH, CFLAGS=CFLAGS) Return('group') diff --git a/bsp/efm32/application.c b/bsp/efm32/application.c index d3bab9eabe..5f2ad9866c 100644 --- a/bsp/efm32/application.c +++ b/bsp/efm32/application.c @@ -69,6 +69,14 @@ #include <dfs_posix.h> #define PATH_SEPARATOR '/' #endif +#if defined(RTGUI_USING_DFS_FILERW) +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> +#define PATH_SEPARATOR '/' +#endif #endif /* Private typedef -----------------------------------------------------------*/ @@ -77,8 +85,8 @@ struct photo_event { struct rtgui_event_win win; rt_uint32_t cmd; - rt_uint8_t* path; - rt_uint8_t* format; + rt_uint8_t* path; + rt_uint8_t* format; }; /* Private defines -----------------------------------------------------------*/ @@ -95,10 +103,10 @@ volatile rt_uint32_t rt_system_status = 0; #if defined(RT_USING_RTGUI) static rt_bool_t pic_view_event_handler(rtgui_object_t *object, rtgui_event_t *event) { - rt_bool_t result; + rt_bool_t result; rt_bool_t load = RT_FALSE; - result = rtgui_container_event_handler(object, event); + result = rtgui_container_event_handler(object, event); switch(event->type) { @@ -108,27 +116,27 @@ static rt_bool_t pic_view_event_handler(rtgui_object_t *object, rtgui_event_t *e case RTGUI_EVENT_MOUSE_BUTTON: { - struct rtgui_event_mouse *mouse = (struct rtgui_event_mouse *)event; + struct rtgui_event_mouse *mouse = (struct rtgui_event_mouse *)event; - if (mouse->button == RTGUI_MOUSE_BUTTON_LEFT | RTGUI_MOUSE_BUTTON_UP) - { + if (mouse->button == RTGUI_MOUSE_BUTTON_LEFT | RTGUI_MOUSE_BUTTON_UP) + { rt_kprintf("APP: left click (%x)\n", mouse->button); - } + } } break; } if (load) - { - struct rtgui_dc* dc; - rtgui_rect_t rect; + { + struct rtgui_dc* dc; + rtgui_rect_t rect; rtgui_image_t* image; image = rtgui_image_create_from_file("jpg", "/test9.jpg", RT_FALSE); // image = rtgui_image_create_from_file("bmp", "/test_565.bmp", RT_FALSE); - dc = rtgui_dc_begin_drawing(RTGUI_WIDGET(object)); - if (dc == RT_NULL) + dc = rtgui_dc_begin_drawing(RTGUI_WIDGET(object)); + if (dc == RT_NULL) { return result; } @@ -138,9 +146,9 @@ static rt_bool_t pic_view_event_handler(rtgui_object_t *object, rtgui_event_t *e rect.x1 +=10; rect.y1 +=10; - if (image != RT_NULL) + if (image != RT_NULL) { - rtgui_image_blit(image, dc, &rect); + rtgui_image_blit(image, dc, &rect); rtgui_image_destroy(image); } else @@ -148,10 +156,10 @@ static rt_bool_t pic_view_event_handler(rtgui_object_t *object, rtgui_event_t *e rt_kprintf("APP err: no image found!\n"); } - rtgui_dc_end_drawing(dc, RT_TRUE); - } + rtgui_dc_end_drawing(dc, RT_TRUE); + } - return result; + return result; } static void app_main(void *parameter) @@ -169,21 +177,21 @@ static void app_main(void *parameter) lcd->control(lcd, RTGRAPHIC_CTRL_GET_INFO, (void *)&lcd_info); rt_kprintf("LCD size: %dX%d\n", lcd_info.width, lcd_info.height); - /* create application */ - struct rtgui_app *app; - app = rtgui_app_create("gui_app"); - if (app == RT_NULL) + /* create application */ + struct rtgui_app *app; + app = rtgui_app_create("gui_app"); + if (app == RT_NULL) { rt_kprintf("Create application \"gui_app\" failed!\n"); return; } - struct rtgui_rect rect1, rect2, rect3; + struct rtgui_rect rect1, rect2, rect3; struct rtgui_win *win_info, *win_main, *win_hello; - struct rtgui_container *container; + struct rtgui_container *container; struct rtgui_label* label; - rtgui_graphic_driver_get_rect(rtgui_graphic_driver_get_default(), &rect1); + rtgui_graphic_driver_get_rect(rtgui_graphic_driver_get_default(), &rect1); rect2.x1 = rect1.x1; rect2.y1 = 25; rect2.x2 = rect1.x2; @@ -191,119 +199,119 @@ static void app_main(void *parameter) rect1.y2 = 25; /* create info window */ - win_info = rtgui_win_create(RT_NULL, "info", + win_info = rtgui_win_create(RT_NULL, "info", &rect1, RTGUI_WIN_STYLE_NO_BORDER | RTGUI_WIN_STYLE_NO_TITLE); - if (win_info == RT_NULL) - { + if (win_info == RT_NULL) + { rt_kprintf("Create window \"info\" failed!\n"); - rtgui_app_destroy(app); + rtgui_app_destroy(app); return; - } + } /* create container in info window */ - container = rtgui_container_create(); - if (container == RT_NULL) - { + container = rtgui_container_create(); + if (container == RT_NULL) + { rt_kprintf("Create container failed!\n"); - return; - } - rtgui_widget_set_rect(RTGUI_WIDGET(container), &rect1); + return; + } + rtgui_widget_set_rect(RTGUI_WIDGET(container), &rect1); rtgui_container_add_child(RTGUI_CONTAINER(win_info), RTGUI_WIDGET(container)); /* create lable in info window */ - label = rtgui_label_create("RT-Thread & RTGUI"); + label = rtgui_label_create("RT-Thread & RTGUI"); if (label == RT_NULL) { rt_kprintf("Create lable failed!\n"); return; } - RTGUI_WIDGET_TEXTALIGN(RTGUI_WIDGET(label)) = RTGUI_ALIGN_LEFT; - RTGUI_WIDGET_BACKGROUND(RTGUI_WIDGET(label)) = red; + RTGUI_WIDGET_TEXTALIGN(RTGUI_WIDGET(label)) = RTGUI_ALIGN_LEFT; + RTGUI_WIDGET_BACKGROUND(RTGUI_WIDGET(label)) = red; RTGUI_WIDGET_FOREGROUND(RTGUI_WIDGET(label)) = white; - rect3.x1 = rect1.x1 + 5; - rect3.y1 = rect1.y1 + 5; - rect3.x2 = rect1.x2 - 5; - rect3.y2 = rect1.y2 - 5; - rtgui_widget_set_rect(RTGUI_WIDGET(label), &rect3); - rtgui_container_add_child(container, RTGUI_WIDGET(label)); + rect3.x1 = rect1.x1 + 5; + rect3.y1 = rect1.y1 + 5; + rect3.x2 = rect1.x2 - 5; + rect3.y2 = rect1.y2 - 5; + rtgui_widget_set_rect(RTGUI_WIDGET(label), &rect3); + rtgui_container_add_child(container, RTGUI_WIDGET(label)); /* create main window */ - win_main = rtgui_win_create(RT_NULL, "main", + win_main = rtgui_win_create(RT_NULL, "main", &rect2, RTGUI_WIN_STYLE_NO_BORDER | RTGUI_WIN_STYLE_NO_TITLE); - if (win_main == RT_NULL) - { + if (win_main == RT_NULL) + { rt_kprintf("Create window \"main\" failed!\n"); - rtgui_app_destroy(app); + rtgui_app_destroy(app); return; - } + } /* create container in main window */ - container = rtgui_container_create(); - if (container == RT_NULL) - { + container = rtgui_container_create(); + if (container == RT_NULL) + { rt_kprintf("Create container failed!\n"); - return; - } + return; + } - rtgui_widget_set_rect(RTGUI_WIDGET(container), &rect2); + rtgui_widget_set_rect(RTGUI_WIDGET(container), &rect2); rtgui_object_set_event_handler(RTGUI_OBJECT(container), pic_view_event_handler); rtgui_container_add_child(RTGUI_CONTAINER(win_main), RTGUI_WIDGET(container)); /* create lable in main window */ - label = rtgui_label_create("EFM32GG_DK3750 Kit"); + label = rtgui_label_create("EFM32GG_DK3750 Kit"); if (label == RT_NULL) { rt_kprintf("Create lable failed!\n"); return; } - RTGUI_WIDGET_TEXTALIGN(RTGUI_WIDGET(label)) = RTGUI_ALIGN_LEFT; - RTGUI_WIDGET_BACKGROUND(RTGUI_WIDGET(label)) = white; + RTGUI_WIDGET_TEXTALIGN(RTGUI_WIDGET(label)) = RTGUI_ALIGN_LEFT; + RTGUI_WIDGET_BACKGROUND(RTGUI_WIDGET(label)) = white; RTGUI_WIDGET_FOREGROUND(RTGUI_WIDGET(label)) = blue; - rect3.x1 = rect2.x1 + 5; - rect3.y1 = rect2.y1 + 5; - rect3.x2 = rect2.x2 - 5; - rect3.y2 = rect2.y1 + 20; - rtgui_widget_set_rect(RTGUI_WIDGET(label), &rect3); - rtgui_container_add_child(container, RTGUI_WIDGET(label)); + rect3.x1 = rect2.x1 + 5; + rect3.y1 = rect2.y1 + 5; + rect3.x2 = rect2.x2 - 5; + rect3.y2 = rect2.y1 + 20; + rtgui_widget_set_rect(RTGUI_WIDGET(label), &rect3); + rtgui_container_add_child(container, RTGUI_WIDGET(label)); /* create hello window */ - rect3.x1 = 80; - rect3.y1 = 50; - rect3.x2 = 320 - 80; - rect3.y2 = 240 - 50; - win_hello = rtgui_win_create(RT_NULL, "hello", + rect3.x1 = 80; + rect3.y1 = 50; + rect3.x2 = 320 - 80; + rect3.y2 = 240 - 50; + win_hello = rtgui_win_create(RT_NULL, "hello", &rect3, RTGUI_WIN_STYLE_DEFAULT); - if (win_hello == RT_NULL) - { + if (win_hello == RT_NULL) + { rt_kprintf("Create window \"hello\" failed!\n"); - rtgui_app_destroy(app); + rtgui_app_destroy(app); return; - } + } /* create a box */ rtgui_box_t *box = rtgui_box_create(RTGUI_VERTICAL, RT_NULL); - if(box == RT_NULL) + if(box == RT_NULL) { rt_kprintf("Create box failed!\n"); return; } // rtgui_win_set_box(win_hello, box); - label = rtgui_label_create("����,����!"); - if(label == RT_NULL) + label = rtgui_label_create("哈罗,盹胖!"); + if(label == RT_NULL) { rt_kprintf("Create lable failed!\n"); return; } - RTGUI_WIDGET_BACKGROUND(RTGUI_WIDGET(label)) = white; + RTGUI_WIDGET_BACKGROUND(RTGUI_WIDGET(label)) = white; RTGUI_WIDGET_FOREGROUND(RTGUI_WIDGET(label)) = black; RTGUI_WIDGET(label)->align = RTGUI_ALIGN_CENTER_HORIZONTAL | RTGUI_ALIGN_CENTER_VERTICAL; rtgui_widget_set_miniwidth(RTGUI_WIDGET(label),130); @@ -322,18 +330,18 @@ static void app_main(void *parameter) static rt_bool_t photo_view_event_handler(rtgui_object_t *object, rtgui_event_t *event) { - rt_bool_t result = RT_FALSE; + rt_bool_t result = RT_FALSE; struct photo_event *photo_event = (struct photo_event *)event; - result = rtgui_container_event_handler(object, event); + result = rtgui_container_event_handler(object, event); rt_kprintf("container event %x\n", event->type); - struct rtgui_event_win* wevent = (struct rtgui_event_win*)event; + struct rtgui_event_win* wevent = (struct rtgui_event_win*)event; rt_kprintf("wevent->wid %x\n", wevent->wid); if ((event->type == RTGUI_EVENT_COMMAND) && \ (photo_event->cmd == APP_CMD_PHOTO_FRAME)) - { + { rtgui_rect_t rect; rtgui_image_t* image; struct rtgui_dc* dc; @@ -361,25 +369,25 @@ static rt_bool_t photo_view_event_handler(rtgui_object_t *object, rtgui_event_t return RT_TRUE; } - return result; + return result; } static rt_bool_t photo_lable_event_handler(rtgui_object_t *object, rtgui_event_t *event) { - rt_bool_t result = RT_FALSE; + rt_bool_t result = RT_FALSE; - result = rtgui_label_event_handler(object, event); + result = rtgui_label_event_handler(object, event); rt_kprintf("lable event %x\n", event->type); if (event->type == RTGUI_EVENT_COMMAND) - { + { struct photo_event *photo = (struct photo_event *)event; rtgui_label_set_text((rtgui_label_t *)object, photo->path); rt_kprintf("path %s\n", photo->path); } - return result; + return result; } static void app_photo(void *parameter) @@ -399,64 +407,64 @@ static void app_photo(void *parameter) lcd->control(lcd, RTGRAPHIC_CTRL_GET_INFO, (void *)&lcd_info); rt_kprintf("LCD size: %dX%d\n", lcd_info.width, lcd_info.height); - /* create application */ - struct rtgui_app *app; - app = rtgui_app_create("pho_app"); - if (app == RT_NULL) + /* create application */ + struct rtgui_app *app; + app = rtgui_app_create("pho_app"); + if (app == RT_NULL) { rt_kprintf("Create application \"pho_app\" failed!\n"); return; } - struct rtgui_rect rect1, rect2; + struct rtgui_rect rect1, rect2; struct rtgui_win *window; - struct rtgui_container *container; + struct rtgui_container *container; struct rtgui_label* label; - rtgui_graphic_driver_get_rect(rtgui_graphic_driver_get_default(), &rect1); + rtgui_graphic_driver_get_rect(rtgui_graphic_driver_get_default(), &rect1); /* create window */ - window = rtgui_win_create(RT_NULL, "photo", + window = rtgui_win_create(RT_NULL, "photo", &rect1, RTGUI_WIN_STYLE_NO_BORDER | RTGUI_WIN_STYLE_NO_TITLE); - if (window == RT_NULL) - { + if (window == RT_NULL) + { rt_kprintf("Create window \"photo\" failed!\n"); - rtgui_app_destroy(app); + rtgui_app_destroy(app); return; - } + } event->win.wid = window; /* create container */ - container = rtgui_container_create(); - if (container == RT_NULL) - { + container = rtgui_container_create(); + if (container == RT_NULL) + { rt_kprintf("Create container failed!\n"); - return; - } - rtgui_widget_set_rect(RTGUI_WIDGET(container), &rect1); + return; + } + rtgui_widget_set_rect(RTGUI_WIDGET(container), &rect1); rtgui_object_set_event_handler(RTGUI_OBJECT(container), photo_view_event_handler); rtgui_container_add_child(RTGUI_CONTAINER(window), RTGUI_WIDGET(container)); /* create lable in info window */ - label = rtgui_label_create("Photo Frame Demo"); + label = rtgui_label_create("Photo Frame Demo"); if (label == RT_NULL) { rt_kprintf("Create lable failed!\n"); return; } - RTGUI_WIDGET_TEXTALIGN(RTGUI_WIDGET(label)) = RTGUI_ALIGN_LEFT; - RTGUI_WIDGET_BACKGROUND(RTGUI_WIDGET(label)) = white; + RTGUI_WIDGET_TEXTALIGN(RTGUI_WIDGET(label)) = RTGUI_ALIGN_LEFT; + RTGUI_WIDGET_BACKGROUND(RTGUI_WIDGET(label)) = white; RTGUI_WIDGET_FOREGROUND(RTGUI_WIDGET(label)) = blue; rect2.x1 = rect1.x1; rect2.y1 = rect1.y1; rect2.x2 = rect1.x2; rect2.y2 = 15; - rtgui_widget_set_rect(RTGUI_WIDGET(label), &rect2); + rtgui_widget_set_rect(RTGUI_WIDGET(label), &rect2); rtgui_object_set_event_handler(RTGUI_OBJECT(label), photo_lable_event_handler); - rtgui_container_add_child(container, RTGUI_WIDGET(label)); + rtgui_container_add_child(container, RTGUI_WIDGET(label)); rtgui_win_show(window, RT_FALSE); diff --git a/bsp/ft2004/drivers/drv_sdcard.c b/bsp/ft2004/drivers/drv_sdcard.c index a6494089f6..753a70b606 100644 --- a/bsp/ft2004/drivers/drv_sdcard.c +++ b/bsp/ft2004/drivers/drv_sdcard.c @@ -14,7 +14,11 @@ #include <dfs_elm.h> #include <dfs_fs.h> -#include <dfs_posix.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #include "drv_sdctrl.h" #define DBG_TAG "app.card" diff --git a/bsp/gd32/README.md b/bsp/gd32/README.md index fb706c2723..5937be20aa 100644 --- a/bsp/gd32/README.md +++ b/bsp/gd32/README.md @@ -6,13 +6,18 @@ GD32 系列 BSP 目前支持情况如下表所示： | **BSP 文件夹名称** | **开发板名称** | |:------------------------- |:-------------------------- | | **F1 系列** | | -| [gd32105r-start](gd32105r-start) | 兆易创新 官方 GD32105r-START 开发板 | +| [gd32103c-eval](gd32103c-eval) | 兆易创新 官方 GD32103C-EVAL 开发板 | +| [gd32105c-eval](gd32105c-eval) | 兆易创新 官方 GD32105C-EVAL 开发板 | +| [gd32105r-start](gd32105r-start) | 兆易创新 官方 GD32105R-START 开发板 | +| [gd32107c-eval](gd32107c-eval) | 兆易创新 官方 GD32107C-EVAL 开发板 | | **F2 系列** | | -| [gd32205r-start](gd32205r-start) | 兆易创新 官方 GD32205r-START 开发板 | +| [gd32205r-start](gd32205r-start) | 兆易创新 官方 GD32205R-START 开发板 | | **F3 系列** | | -| [gd32305r-start](gd32305r-start) | 兆易创新 官方 GD32305r-START 开发板 | +| [gd32303e-eval](gd32303e-eval) | 兆易创新 官方 GD32303E-EVAL 开发板 | +| [gd32305r-start](gd32305r-start) | 兆易创新 官方 GD32305R-START 开发板 | | **F4 系列** | | | [gd32407v-start](gd32407v-start) | 兆易创新 官方 GD32407V-START 开发板 | +| [gd32450z-eval](gd32450z-eval) | 兆易创新 官方 GD32450Z-EVAL 开发板 | 可以通过阅读相应 BSP 下的 README 来快速上手，如果想要使用 BSP 更多功能可参考 docs 文件夹下提供的说明文档，如下表所示： diff --git a/bsp/gd32/docs/GD32系列BSP制作教程.md b/bsp/gd32/docs/GD32系列BSP制作教程.md index 6f0a4427f7..4e517348b5 100644 --- a/bsp/gd32/docs/GD32系列BSP制作教程.md +++ b/bsp/gd32/docs/GD32系列BSP制作教程.md @@ -145,14 +145,14 @@ TARGET = 'rtthread.' + rtconfig.TARGET_EXT DefaultEnvironment(tools=[]) env = Environment(tools = ['mingw'], AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, - CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS, + CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS, AR = rtconfig.AR, ARFLAGS = '-rc', CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS, LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) env.PrependENVPath('PATH', rtconfig.EXEC_PATH) if rtconfig.PLATFORM == 'iar': - env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES']) + env.Replace(CCCOM = ['$CC $CFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES']) env.Replace(ARFLAGS = ['']) env.Replace(LINKCOM = env["LINKCOM"] + ' --map rtthread.map') diff --git a/bsp/gd32/gd32103c-eval/.config b/bsp/gd32/gd32103c-eval/.config new file mode 100644 index 0000000000..2b86e3f13b --- /dev/null +++ b/bsp/gd32/gd32103c-eval/.config @@ -0,0 +1,636 @@ +# +# Automatically generated file; DO NOT EDIT. +# RT-Thread Configuration +# + +# +# RT-Thread Kernel +# +CONFIG_RT_NAME_MAX=8 +# CONFIG_RT_USING_BIG_ENDIAN is not set +# CONFIG_RT_USING_ARCH_DATA_TYPE is not set +# CONFIG_RT_USING_SMP is not set +CONFIG_RT_ALIGN_SIZE=4 +# CONFIG_RT_THREAD_PRIORITY_8 is not set +CONFIG_RT_THREAD_PRIORITY_32=y +# CONFIG_RT_THREAD_PRIORITY_256 is not set +CONFIG_RT_THREAD_PRIORITY_MAX=32 +CONFIG_RT_TICK_PER_SECOND=100 +CONFIG_RT_USING_OVERFLOW_CHECK=y +CONFIG_RT_USING_HOOK=y +CONFIG_RT_USING_IDLE_HOOK=y +CONFIG_RT_IDLE_HOOK_LIST_SIZE=4 +CONFIG_IDLE_THREAD_STACK_SIZE=256 +# CONFIG_RT_USING_TIMER_SOFT is not set + +# +# kservice optimization +# +# CONFIG_RT_KSERVICE_USING_STDLIB is not set +# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set +# CONFIG_RT_USING_ASM_MEMCPY is not set +CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y +# CONFIG_RT_DEBUG_INIT_CONFIG is not set +# CONFIG_RT_DEBUG_THREAD_CONFIG is not set +# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set +# CONFIG_RT_DEBUG_IPC_CONFIG is not set +# CONFIG_RT_DEBUG_TIMER_CONFIG is not set +# CONFIG_RT_DEBUG_IRQ_CONFIG is not set +# CONFIG_RT_DEBUG_MEM_CONFIG is not set +# CONFIG_RT_DEBUG_SLAB_CONFIG is not set +# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set +# CONFIG_RT_DEBUG_MODULE_CONFIG is not set + +# +# Inter-Thread communication +# +CONFIG_RT_USING_SEMAPHORE=y +CONFIG_RT_USING_MUTEX=y +CONFIG_RT_USING_EVENT=y +CONFIG_RT_USING_MAILBOX=y +CONFIG_RT_USING_MESSAGEQUEUE=y +# CONFIG_RT_USING_SIGNALS is not set + +# +# Memory Management +# +CONFIG_RT_USING_MEMPOOL=y +# CONFIG_RT_USING_MEMHEAP is not set +# CONFIG_RT_USING_NOHEAP is not set +CONFIG_RT_USING_SMALL_MEM=y +# CONFIG_RT_USING_SLAB is not set +# CONFIG_RT_USING_USERHEAP is not set +# CONFIG_RT_USING_MEMTRACE is not set +CONFIG_RT_USING_HEAP=y + +# +# Kernel Device Object +# +CONFIG_RT_USING_DEVICE=y +# CONFIG_RT_USING_DEVICE_OPS is not set +# CONFIG_RT_USING_INTERRUPT_INFO is not set +CONFIG_RT_USING_CONSOLE=y +CONFIG_RT_CONSOLEBUF_SIZE=128 +CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" +# CONFIG_RT_PRINTF_LONGLONG is not set +CONFIG_RT_VER_NUM=0x40004 +# CONFIG_RT_USING_CPU_FFS is not set +# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set + +# +# RT-Thread Components +# +CONFIG_RT_USING_COMPONENTS_INIT=y +CONFIG_RT_USING_USER_MAIN=y +CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048 +CONFIG_RT_MAIN_THREAD_PRIORITY=10 + +# +# C++ features +# +# CONFIG_RT_USING_CPLUSPLUS is not set + +# +# Command shell +# +CONFIG_RT_USING_FINSH=y +CONFIG_RT_USING_MSH=y +CONFIG_FINSH_USING_MSH=y +CONFIG_FINSH_THREAD_NAME="tshell" +CONFIG_FINSH_THREAD_PRIORITY=20 +CONFIG_FINSH_THREAD_STACK_SIZE=4096 +CONFIG_FINSH_USING_HISTORY=y +CONFIG_FINSH_HISTORY_LINES=5 +CONFIG_FINSH_USING_SYMTAB=y +CONFIG_FINSH_CMD_SIZE=80 +CONFIG_MSH_USING_BUILT_IN_COMMANDS=y +CONFIG_FINSH_USING_DESCRIPTION=y +# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set +# CONFIG_FINSH_USING_AUTH is not set +CONFIG_FINSH_ARG_MAX=10 + +# +# Device virtual file system +# +# CONFIG_RT_USING_DFS is not set + +# +# Device Drivers +# +CONFIG_RT_USING_DEVICE_IPC=y +CONFIG_RT_PIPE_BUFSZ=512 +CONFIG_RT_USING_SYSTEM_WORKQUEUE=y +CONFIG_RT_SYSTEM_WORKQUEUE_STACKSIZE=2048 +CONFIG_RT_SYSTEM_WORKQUEUE_PRIORITY=23 +CONFIG_RT_USING_SERIAL=y +CONFIG_RT_USING_SERIAL_V1=y +# CONFIG_RT_USING_SERIAL_V2 is not set +CONFIG_RT_SERIAL_USING_DMA=y +CONFIG_RT_SERIAL_RB_BUFSZ=64 +# CONFIG_RT_USING_CAN is not set +# CONFIG_RT_USING_HWTIMER is not set +# CONFIG_RT_USING_CPUTIME is not set +# CONFIG_RT_USING_I2C is not set +# CONFIG_RT_USING_PHY is not set +CONFIG_RT_USING_PIN=y +# CONFIG_RT_USING_ADC is not set +# CONFIG_RT_USING_DAC is not set +# CONFIG_RT_USING_PWM is not set +# CONFIG_RT_USING_MTD_NOR is not set +# CONFIG_RT_USING_MTD_NAND is not set +# CONFIG_RT_USING_PM is not set +# CONFIG_RT_USING_RTC is not set +# CONFIG_RT_USING_SDIO is not set +# CONFIG_RT_USING_SPI is not set +# CONFIG_RT_USING_WDT is not set +# CONFIG_RT_USING_AUDIO is not set +# CONFIG_RT_USING_SENSOR is not set +# CONFIG_RT_USING_TOUCH is not set +# CONFIG_RT_USING_HWCRYPTO is not set +# CONFIG_RT_USING_PULSE_ENCODER is not set +# CONFIG_RT_USING_INPUT_CAPTURE is not set +# CONFIG_RT_USING_WIFI is not set + +# +# Using USB +# +# CONFIG_RT_USING_USB is not set +# CONFIG_RT_USING_USB_HOST is not set +# CONFIG_RT_USING_USB_DEVICE is not set + +# +# POSIX layer and C standard library +# +# CONFIG_RT_USING_LIBC is not set +CONFIG_RT_LIBC_USING_TIME=y +CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 +# CONFIG_RT_USING_PTHREADS is not set + +# +# Network +# + +# +# Socket abstraction layer +# +# CONFIG_RT_USING_SAL is not set + +# +# Network interface device +# +# CONFIG_RT_USING_NETDEV is not set + +# +# light weight TCP/IP stack +# +# CONFIG_RT_USING_LWIP is not set + +# +# AT commands +# +# CONFIG_RT_USING_AT is not set + +# +# VBUS(Virtual Software BUS) +# +# CONFIG_RT_USING_VBUS is not set + +# +# Utilities +# +# CONFIG_RT_USING_RYM is not set +# CONFIG_RT_USING_ULOG is not set +# CONFIG_RT_USING_UTEST is not set +# CONFIG_RT_USING_VAR_EXPORT is not set +# CONFIG_RT_USING_RT_LINK is not set + +# +# RT-Thread Utestcases +# +# CONFIG_RT_USING_UTESTCASES is not set + +# +# RT-Thread online packages +# + +# +# IoT - internet of things +# +# CONFIG_PKG_USING_LORAWAN_DRIVER is not set +# CONFIG_PKG_USING_PAHOMQTT is not set +# CONFIG_PKG_USING_UMQTT is not set +# CONFIG_PKG_USING_WEBCLIENT is not set +# CONFIG_PKG_USING_WEBNET is not set +# CONFIG_PKG_USING_MONGOOSE is not set +# CONFIG_PKG_USING_MYMQTT is not set +# CONFIG_PKG_USING_KAWAII_MQTT is not set +# CONFIG_PKG_USING_BC28_MQTT is not set +# CONFIG_PKG_USING_WEBTERMINAL is not set +# CONFIG_PKG_USING_CJSON is not set +# CONFIG_PKG_USING_JSMN is not set +# CONFIG_PKG_USING_LIBMODBUS is not set +# CONFIG_PKG_USING_FREEMODBUS is not set +# CONFIG_PKG_USING_LJSON is not set +# CONFIG_PKG_USING_EZXML is not set +# CONFIG_PKG_USING_NANOPB is not set + +# +# Wi-Fi +# + +# +# Marvell WiFi +# +# CONFIG_PKG_USING_WLANMARVELL is not set + +# +# Wiced WiFi +# +# CONFIG_PKG_USING_WLAN_WICED is not set +# CONFIG_PKG_USING_RW007 is not set +# CONFIG_PKG_USING_COAP is not set +# CONFIG_PKG_USING_NOPOLL is not set +# CONFIG_PKG_USING_NETUTILS is not set +# CONFIG_PKG_USING_CMUX is not set +# CONFIG_PKG_USING_PPP_DEVICE is not set +# CONFIG_PKG_USING_AT_DEVICE is not set +# CONFIG_PKG_USING_ATSRV_SOCKET is not set +# CONFIG_PKG_USING_WIZNET is not set +# CONFIG_PKG_USING_ZB_COORDINATOR is not set + +# +# IoT Cloud +# +# CONFIG_PKG_USING_ONENET is not set +# CONFIG_PKG_USING_GAGENT_CLOUD is not set +# CONFIG_PKG_USING_ALI_IOTKIT is not set +# CONFIG_PKG_USING_AZURE is not set +# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set +# CONFIG_PKG_USING_JIOT-C-SDK is not set +# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set +# CONFIG_PKG_USING_JOYLINK is not set +# CONFIG_PKG_USING_NIMBLE is not set +# CONFIG_PKG_USING_OTA_DOWNLOADER is not set +# CONFIG_PKG_USING_IPMSG is not set +# CONFIG_PKG_USING_LSSDP is not set +# CONFIG_PKG_USING_AIRKISS_OPEN is not set +# CONFIG_PKG_USING_LIBRWS is not set +# CONFIG_PKG_USING_TCPSERVER is not set +# CONFIG_PKG_USING_PROTOBUF_C is not set +# CONFIG_PKG_USING_DLT645 is not set +# CONFIG_PKG_USING_QXWZ is not set +# CONFIG_PKG_USING_SMTP_CLIENT is not set +# CONFIG_PKG_USING_ABUP_FOTA is not set +# CONFIG_PKG_USING_LIBCURL2RTT is not set +# CONFIG_PKG_USING_CAPNP is not set +# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set +# CONFIG_PKG_USING_AGILE_TELNET is not set +# CONFIG_PKG_USING_NMEALIB is not set +# CONFIG_PKG_USING_AGILE_JSMN is not set +# CONFIG_PKG_USING_PDULIB is not set +# CONFIG_PKG_USING_BTSTACK is not set +# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set +# CONFIG_PKG_USING_WAYZ_IOTKIT is not set +# CONFIG_PKG_USING_MAVLINK is not set +# CONFIG_PKG_USING_RAPIDJSON is not set +# CONFIG_PKG_USING_BSAL is not set +# CONFIG_PKG_USING_AGILE_MODBUS is not set +# CONFIG_PKG_USING_AGILE_FTP is not set +# CONFIG_PKG_USING_EMBEDDEDPROTO is not set +# CONFIG_PKG_USING_RT_LINK_HW is not set +# CONFIG_PKG_USING_LORA_PKT_FWD is not set +# CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set +# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set +# CONFIG_PKG_USING_HM is not set +# CONFIG_PKG_USING_SMALL_MODBUS is not set + +# +# security packages +# +# CONFIG_PKG_USING_MBEDTLS is not set +# CONFIG_PKG_USING_LIBSODIUM is not set +# CONFIG_PKG_USING_TINYCRYPT is not set +# CONFIG_PKG_USING_TFM is not set +# CONFIG_PKG_USING_YD_CRYPTO is not set + +# +# language packages +# +# CONFIG_PKG_USING_LUA is not set +# CONFIG_PKG_USING_JERRYSCRIPT is not set +# CONFIG_PKG_USING_MICROPYTHON is not set +# CONFIG_PKG_USING_PIKASCRIPT is not set + +# +# multimedia packages +# + +# +# LVGL: powerful and easy-to-use embedded GUI library +# +# CONFIG_PKG_USING_LVGL is not set +# CONFIG_PKG_USING_LITTLEVGL2RTT is not set +# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set + +# +# u8g2: a monochrome graphic library +# +# CONFIG_PKG_USING_U8G2_OFFICIAL is not set +# CONFIG_PKG_USING_U8G2 is not set +# CONFIG_PKG_USING_OPENMV is not set +# CONFIG_PKG_USING_MUPDF is not set +# CONFIG_PKG_USING_STEMWIN is not set +# CONFIG_PKG_USING_WAVPLAYER is not set +# CONFIG_PKG_USING_TJPGD is not set +# CONFIG_PKG_USING_PDFGEN is not set +# CONFIG_PKG_USING_HELIX is not set +# CONFIG_PKG_USING_AZUREGUIX is not set +# CONFIG_PKG_USING_TOUCHGFX2RTT is not set +# CONFIG_PKG_USING_NUEMWIN is not set +# CONFIG_PKG_USING_MP3PLAYER is not set +# CONFIG_PKG_USING_TINYJPEG is not set +# CONFIG_PKG_USING_UGUI is not set + +# +# PainterEngine: A cross-platform graphics application framework written in C language +# +# CONFIG_PKG_USING_PAINTERENGINE is not set +# CONFIG_PKG_USING_PAINTERENGINE_AUX is not set + +# +# tools packages +# +# CONFIG_PKG_USING_CMBACKTRACE is not set +# CONFIG_PKG_USING_EASYFLASH is not set +# CONFIG_PKG_USING_EASYLOGGER is not set +# CONFIG_PKG_USING_SYSTEMVIEW is not set +# CONFIG_PKG_USING_SEGGER_RTT is not set +# CONFIG_PKG_USING_RDB is not set +# CONFIG_PKG_USING_QRCODE is not set +# CONFIG_PKG_USING_ULOG_EASYFLASH is not set +# CONFIG_PKG_USING_ULOG_FILE is not set +# CONFIG_PKG_USING_LOGMGR is not set +# CONFIG_PKG_USING_ADBD is not set +# CONFIG_PKG_USING_COREMARK is not set +# CONFIG_PKG_USING_DHRYSTONE is not set +# CONFIG_PKG_USING_MEMORYPERF is not set +# CONFIG_PKG_USING_NR_MICRO_SHELL is not set +# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set +# CONFIG_PKG_USING_LUNAR_CALENDAR is not set +# CONFIG_PKG_USING_BS8116A is not set +# CONFIG_PKG_USING_GPS_RMC is not set +# CONFIG_PKG_USING_URLENCODE is not set +# CONFIG_PKG_USING_UMCN is not set +# CONFIG_PKG_USING_LWRB2RTT is not set +# CONFIG_PKG_USING_CPU_USAGE is not set +# CONFIG_PKG_USING_GBK2UTF8 is not set +# CONFIG_PKG_USING_VCONSOLE is not set +# CONFIG_PKG_USING_KDB is not set +# CONFIG_PKG_USING_WAMR is not set +# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set +# CONFIG_PKG_USING_LWLOG is not set +# CONFIG_PKG_USING_ANV_TRACE is not set +# CONFIG_PKG_USING_ANV_MEMLEAK is not set +# CONFIG_PKG_USING_ANV_TESTSUIT is not set +# CONFIG_PKG_USING_ANV_BENCH is not set +# CONFIG_PKG_USING_DEVMEM is not set +# CONFIG_PKG_USING_REGEX is not set +# CONFIG_PKG_USING_MEM_SANDBOX is not set +# CONFIG_PKG_USING_SOLAR_TERMS is not set +# CONFIG_PKG_USING_GAN_ZHI is not set +# CONFIG_PKG_USING_FDT is not set + +# +# system packages +# + +# +# enhanced kernel services +# +# CONFIG_PKG_USING_RT_MEMCPY_CM is not set +# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set +# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set + +# +# acceleration: Assembly language or algorithmic acceleration packages +# +# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set +# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set +# CONFIG_PKG_USING_QFPLIB_M3 is not set + +# +# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard +# +# CONFIG_PKG_USING_CMSIS_5 is not set +# CONFIG_PKG_USING_CMSIS_RTOS2 is not set + +# +# Micrium: Micrium software products porting for RT-Thread +# +# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set +# CONFIG_PKG_USING_UCOSII_WRAPPER is not set +# CONFIG_PKG_USING_UC_CRC is not set +# CONFIG_PKG_USING_UC_CLK is not set +# CONFIG_PKG_USING_UC_COMMON is not set +# CONFIG_PKG_USING_UC_MODBUS is not set +# CONFIG_RT_USING_ARDUINO is not set +# CONFIG_PKG_USING_GUIENGINE is not set +# CONFIG_PKG_USING_CAIRO is not set +# CONFIG_PKG_USING_PIXMAN is not set +# CONFIG_PKG_USING_PARTITION is not set +# CONFIG_PKG_USING_FAL is not set +# CONFIG_PKG_USING_FLASHDB is not set +# CONFIG_PKG_USING_SQLITE is not set +# CONFIG_PKG_USING_RTI is not set +# CONFIG_PKG_USING_DFS_YAFFS is not set +# CONFIG_PKG_USING_LITTLEFS is not set +# CONFIG_PKG_USING_DFS_JFFS2 is not set +# CONFIG_PKG_USING_DFS_UFFS is not set +# CONFIG_PKG_USING_LWEXT4 is not set +# CONFIG_PKG_USING_THREAD_POOL is not set +# CONFIG_PKG_USING_ROBOTS is not set +# CONFIG_PKG_USING_EV is not set +# CONFIG_PKG_USING_SYSWATCH is not set +# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set +# CONFIG_PKG_USING_PLCCORE is not set +# CONFIG_PKG_USING_RAMDISK is not set +# CONFIG_PKG_USING_MININI is not set +# CONFIG_PKG_USING_QBOOT is not set +# CONFIG_PKG_USING_PPOOL is not set +# CONFIG_PKG_USING_OPENAMP is not set +# CONFIG_PKG_USING_LPM is not set +# CONFIG_PKG_USING_TLSF is not set +# CONFIG_PKG_USING_EVENT_RECORDER is not set +# CONFIG_PKG_USING_ARM_2D is not set +# CONFIG_PKG_USING_WCWIDTH is not set +# CONFIG_PKG_USING_MCUBOOT is not set +# CONFIG_PKG_USING_TINYUSB is not set +# CONFIG_PKG_USING_USB_STACK is not set + +# +# peripheral libraries and drivers +# +# CONFIG_PKG_USING_SENSORS_DRIVERS is not set +# CONFIG_PKG_USING_REALTEK_AMEBA is not set +# CONFIG_PKG_USING_SHT2X is not set +# CONFIG_PKG_USING_SHT3X is not set +# CONFIG_PKG_USING_AS7341 is not set +# CONFIG_PKG_USING_STM32_SDIO is not set +# CONFIG_PKG_USING_ICM20608 is not set +# CONFIG_PKG_USING_BUTTON is not set +# CONFIG_PKG_USING_PCF8574 is not set +# CONFIG_PKG_USING_SX12XX is not set +# CONFIG_PKG_USING_SIGNAL_LED is not set +# CONFIG_PKG_USING_LEDBLINK is not set +# CONFIG_PKG_USING_LITTLED is not set +# CONFIG_PKG_USING_LKDGUI is not set +# CONFIG_PKG_USING_NRF5X_SDK is not set +# CONFIG_PKG_USING_NRFX is not set +# CONFIG_PKG_USING_WM_LIBRARIES is not set +# CONFIG_PKG_USING_KENDRYTE_SDK is not set +# CONFIG_PKG_USING_INFRARED is not set +# CONFIG_PKG_USING_AGILE_BUTTON is not set +# CONFIG_PKG_USING_AGILE_LED is not set +# CONFIG_PKG_USING_AT24CXX is not set +# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set +# CONFIG_PKG_USING_AD7746 is not set +# CONFIG_PKG_USING_PCA9685 is not set +# CONFIG_PKG_USING_I2C_TOOLS is not set +# CONFIG_PKG_USING_NRF24L01 is not set +# CONFIG_PKG_USING_TOUCH_DRIVERS is not set +# CONFIG_PKG_USING_MAX17048 is not set +# CONFIG_PKG_USING_RPLIDAR is not set +# CONFIG_PKG_USING_AS608 is not set +# CONFIG_PKG_USING_RC522 is not set +# CONFIG_PKG_USING_WS2812B is not set +# CONFIG_PKG_USING_EMBARC_BSP is not set +# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set +# CONFIG_PKG_USING_MULTI_RTIMER is not set +# CONFIG_PKG_USING_MAX7219 is not set +# CONFIG_PKG_USING_BEEP is not set +# CONFIG_PKG_USING_EASYBLINK is not set +# CONFIG_PKG_USING_PMS_SERIES is not set +# CONFIG_PKG_USING_CAN_YMODEM is not set +# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set +# CONFIG_PKG_USING_QLED is not set +# CONFIG_PKG_USING_PAJ7620 is not set +# CONFIG_PKG_USING_AGILE_CONSOLE is not set +# CONFIG_PKG_USING_LD3320 is not set +# CONFIG_PKG_USING_WK2124 is not set +# CONFIG_PKG_USING_LY68L6400 is not set +# CONFIG_PKG_USING_DM9051 is not set +# CONFIG_PKG_USING_SSD1306 is not set +# CONFIG_PKG_USING_QKEY is not set +# CONFIG_PKG_USING_RS485 is not set +# CONFIG_PKG_USING_NES is not set +# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set +# CONFIG_PKG_USING_VDEVICE is not set +# CONFIG_PKG_USING_SGM706 is not set +# CONFIG_PKG_USING_STM32WB55_SDK is not set +# CONFIG_PKG_USING_RDA58XX is not set +# CONFIG_PKG_USING_LIBNFC is not set +# CONFIG_PKG_USING_MFOC is not set +# CONFIG_PKG_USING_TMC51XX is not set +# CONFIG_PKG_USING_TCA9534 is not set +# CONFIG_PKG_USING_KOBUKI is not set +# CONFIG_PKG_USING_ROSSERIAL is not set +# CONFIG_PKG_USING_MICRO_ROS is not set +# CONFIG_PKG_USING_MCP23008 is not set +# CONFIG_PKG_USING_BLUETRUM_SDK is not set +# CONFIG_PKG_USING_MISAKA_AT24CXX is not set +# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set +# CONFIG_PKG_USING_BL_MCU_SDK is not set +# CONFIG_PKG_USING_SOFT_SERIAL is not set +# CONFIG_PKG_USING_MB85RS16 is not set + +# +# AI packages +# +# CONFIG_PKG_USING_LIBANN is not set +# CONFIG_PKG_USING_NNOM is not set +# CONFIG_PKG_USING_ONNX_BACKEND is not set +# CONFIG_PKG_USING_ONNX_PARSER is not set +# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set +# CONFIG_PKG_USING_ELAPACK is not set +# CONFIG_PKG_USING_ULAPACK is not set +# CONFIG_PKG_USING_QUEST is not set +# CONFIG_PKG_USING_NAXOS is not set + +# +# miscellaneous packages +# + +# +# samples: kernel and components samples +# +# CONFIG_PKG_USING_KERNEL_SAMPLES is not set +# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set +# CONFIG_PKG_USING_NETWORK_SAMPLES is not set +# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set + +# +# entertainment: terminal games and other interesting software packages +# +# CONFIG_PKG_USING_CMATRIX is not set +# CONFIG_PKG_USING_SL is not set +# CONFIG_PKG_USING_CAL is not set +# CONFIG_PKG_USING_ACLOCK is not set +# CONFIG_PKG_USING_THREES is not set +# CONFIG_PKG_USING_2048 is not set +# CONFIG_PKG_USING_SNAKE is not set +# CONFIG_PKG_USING_TETRIS is not set +# CONFIG_PKG_USING_DONUT is not set +# CONFIG_PKG_USING_LIBCSV is not set +# CONFIG_PKG_USING_OPTPARSE is not set +# CONFIG_PKG_USING_FASTLZ is not set +# CONFIG_PKG_USING_MINILZO is not set +# CONFIG_PKG_USING_QUICKLZ is not set +# CONFIG_PKG_USING_LZMA is not set +# CONFIG_PKG_USING_MULTIBUTTON is not set +# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set +# CONFIG_PKG_USING_CANFESTIVAL is not set +# CONFIG_PKG_USING_ZLIB is not set +# CONFIG_PKG_USING_MINIZIP is not set +# CONFIG_PKG_USING_DSTR is not set +# CONFIG_PKG_USING_TINYFRAME is not set +# CONFIG_PKG_USING_KENDRYTE_DEMO is not set +# CONFIG_PKG_USING_DIGITALCTRL is not set +# CONFIG_PKG_USING_UPACKER is not set +# CONFIG_PKG_USING_UPARAM is not set +# CONFIG_PKG_USING_HELLO is not set +# CONFIG_PKG_USING_VI is not set +# CONFIG_PKG_USING_KI is not set +# CONFIG_PKG_USING_ARMv7M_DWT is not set +# CONFIG_PKG_USING_VT100 is not set +# CONFIG_PKG_USING_UKAL is not set +# CONFIG_PKG_USING_CRCLIB is not set +# CONFIG_PKG_USING_LWGPS is not set +# CONFIG_PKG_USING_STATE_MACHINE is not set +# CONFIG_PKG_USING_MCURSES is not set +# CONFIG_PKG_USING_COWSAY is not set +# CONFIG_PKG_USING_TERMBOX is not set + +# +# Hardware Drivers Config +# +CONFIG_SOC_SERIES_GD32F10x=y +CONFIG_SOC_GD32103V=y + +# +# Onboard Peripheral Drivers +# + +# +# On-chip Peripheral Drivers +# +CONFIG_BSP_USING_GPIO=y +CONFIG_BSP_USING_UART=y +CONFIG_BSP_USING_UART1=y +# CONFIG_BSP_UART1_RX_USING_DMA is not set +# CONFIG_BSP_USING_SPI is not set +# CONFIG_BSP_USING_I2C1 is not set + +# +# Board extended module Drivers +# diff --git a/bsp/gd32/gd32103c-eval/Kconfig b/bsp/gd32/gd32103c-eval/Kconfig new file mode 100644 index 0000000000..8cbc7b71a8 --- /dev/null +++ b/bsp/gd32/gd32103c-eval/Kconfig @@ -0,0 +1,21 @@ +mainmenu "RT-Thread Configuration" + +config BSP_DIR + string + option env="BSP_ROOT" + default "." + +config RTT_DIR + string + option env="RTT_ROOT" + default "../../.." + +config PKGS_DIR + string + option env="PKGS_ROOT" + default "packages" + +source "$RTT_DIR/Kconfig" +source "$PKGS_DIR/Kconfig" +source "../libraries/Kconfig" +source "board/Kconfig" diff --git a/bsp/gd32/gd32103c-eval/README.md b/bsp/gd32/gd32103c-eval/README.md new file mode 100644 index 0000000000..bb7e51279b --- /dev/null +++ b/bsp/gd32/gd32103c-eval/README.md @@ -0,0 +1,94 @@ +# GD32103C-EVAL开发板BSP说明 + +## 简介 + +GD3103C-EVAL是-兆易创新推出的一款GD32F10X系列的评估板，最高主频高达108M，该开发板具有丰富的板载资源，可以充分发挥 GD32103VCT6的芯片性能。 + +该开发板常用 **板载资源** 如下： + +- GD32103VCT6，主频 108MHz，256KB FLASH ，48KB RAM + +- 常用外设 + + - LED ：5个，LED1 (电源指示灯），LED2（PC0），LED3（PC2），LED4（PE0），LED5（PE1） + - 按键：3个，K1（用户按键，PA0），K2（用户按键，PC13），K3（用户按键，PB14） + +- 常用接口：USB 接口 + +- 调试接口：GD-LINK + +## 外设支持 + +本 BSP 目前对外设的支持情况如下： + +| **片上外设** | **支持情况** | **备注** | +|:--------- |:--------:|:------------------------------------- | +| GPIO | 支持 | PA0, PA1... PK15 ---> PIN: 0, 1...144 | +| UART | 支持 | UART0 - UART7 | +| I2C | 支持 | I2C1 | +| SPI | 支持 | SPI0 - SPI2 | +| SPI FLASH | 支持 | | +| **扩展模块** | **支持情况** | **备注** | +| 暂无 | 暂不支持 | 暂不支持 | + +## 使用说明 + +使用说明分为如下两个章节： + +- 快速上手 + + 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 + +- 进阶使用 + + 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 + +### 快速上手 + +本 BSP 为开发者提供 MDK5 工程，并且支持 GCC 开发环境，也可使用RT-Thread Studio开发。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 + +#### 硬件连接 + +使用数据线连接开发板到 PC，使用USB转TTL模块连接PA2(MCU TX)和PA3(MCU RX)，打开电源开关。 + +#### 编译下载 + +双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 + +> 工程默认配置使用 GD-Link 仿真器下载程序，在通过 GD-Link 连接开发板的基础上，点击下载按钮即可下载程序到开发板 + +#### 运行结果 + +下载程序成功之后，系统会自动运行，LED 闪烁。 + +连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息: + +```bash + \ | / +- RT - Thread Operating System + / | \ 4.0.4 build Dec 19 2021 10:00:27 + 2006 - 2021 Copyright by rt-thread team +msh > +``` + +### 进阶使用 + +此 BSP 默认只开启了 GPIO 和 串口1的功能，如果需使用高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下： + +1. 在 bsp 下打开 env 工具。 + +2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 + +3. 输入`pkgs --update`命令更新软件包。 + +4. 输入`scons --target=mdk4/mdk5` 命令重新生成工程。 + +## 注意事项 + +暂无 + +## 联系人信息 + +维护人: + +- [BruceOu](https://github.com/Ouxiaolong/), 邮箱：<[email protected]>
\ No newline at end of file diff --git a/bsp/gd32/gd32103c-eval/SConscript b/bsp/gd32/gd32103c-eval/SConscript new file mode 100644 index 0000000000..20f7689c53 --- /dev/null +++ b/bsp/gd32/gd32103c-eval/SConscript @@ -0,0 +1,15 @@ +# for module compiling +import os +Import('RTT_ROOT') +from building import * + +cwd = GetCurrentDir() +objs = [] +list = os.listdir(cwd) + +for d in list: + path = os.path.join(cwd, d) + if os.path.isfile(os.path.join(path, 'SConscript')): + objs = objs + SConscript(os.path.join(d, 'SConscript')) + +Return('objs') diff --git a/bsp/gd32/gd32103c-eval/SConstruct b/bsp/gd32/gd32103c-eval/SConstruct new file mode 100644 index 0000000000..49074397d0 --- /dev/null +++ b/bsp/gd32/gd32103c-eval/SConstruct @@ -0,0 +1,60 @@ +import os +import sys +import rtconfig + +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') +else: + RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..') + +sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')] +try: + from building import * +except: + print('Cannot found RT-Thread root directory, please check RTT_ROOT') + print(RTT_ROOT) + exit(-1) + +TARGET = 'rtthread.' + rtconfig.TARGET_EXT + +DefaultEnvironment(tools=[]) +env = Environment(tools = ['mingw'], + AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, + CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS, + AR = rtconfig.AR, ARFLAGS = '-rc', + CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS, + LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) +env.PrependENVPath('PATH', rtconfig.EXEC_PATH) + +if rtconfig.PLATFORM == 'iar': + env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES']) + env.Replace(ARFLAGS = ['']) + env.Replace(LINKCOM = env["LINKCOM"] + ' --map rtthread.map') + +Export('RTT_ROOT') +Export('rtconfig') + +SDK_ROOT = os.path.abspath('./') + +if os.path.exists(SDK_ROOT + '/libraries'): + libraries_path_prefix = SDK_ROOT + '/libraries' +else: + libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries' + +SDK_LIB = libraries_path_prefix +Export('SDK_LIB') + +# prepare building environment +objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False) + +gd32_library = 'GD32F10x_Firmware_Library' +rtconfig.BSP_LIBRARY_TYPE = gd32_library + +# include libraries +objs.extend(SConscript(os.path.join(libraries_path_prefix, gd32_library, 'SConscript'))) + +# include drivers +objs.extend(SConscript(os.path.join(libraries_path_prefix, 'gd32_drivers', 'SConscript'))) + +# make a building +DoBuilding(TARGET, objs) diff --git a/bsp/gd32/gd32103c-eval/applications/SConscript b/bsp/gd32/gd32103c-eval/applications/SConscript new file mode 100644 index 0000000000..01eb940dfb --- /dev/null +++ b/bsp/gd32/gd32103c-eval/applications/SConscript @@ -0,0 +1,11 @@ +Import('RTT_ROOT') +Import('rtconfig') +from building import * + +cwd = os.path.join(str(Dir('#')), 'applications') +src = Glob('*.c') +CPPPATH = [cwd, str(Dir('#'))] + +group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/gd32/gd32103c-eval/applications/main.c b/bsp/gd32/gd32103c-eval/applications/main.c new file mode 100644 index 0000000000..d13b24ab50 --- /dev/null +++ b/bsp/gd32/gd32103c-eval/applications/main.c @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-12-18 BruceOu first implementation + */ + +#include <stdio.h> +#include <rtthread.h> +#include <rtdevice.h> +#include <board.h> + +/* defined the LED2 pin: PC0 */ +#define LED2_PIN GET_PIN(C, 0) + +int main(void) +{ + int count = 1; + + /* set LED2 pin mode to output */ + rt_pin_mode(LED2_PIN, PIN_MODE_OUTPUT); + + while (count++) + { + rt_pin_write(LED2_PIN, PIN_HIGH); + rt_thread_mdelay(500); + rt_pin_write(LED2_PIN, PIN_LOW); + rt_thread_mdelay(500); + } + + return RT_EOK; +} diff --git a/bsp/gd32/gd32103c-eval/board/Kconfig b/bsp/gd32/gd32103c-eval/board/Kconfig new file mode 100644 index 0000000000..01d1240fce --- /dev/null +++ b/bsp/gd32/gd32103c-eval/board/Kconfig @@ -0,0 +1,85 @@ +menu "Hardware Drivers Config" + +config SOC_SERIES_GD32F10x + bool + default y + +config SOC_GD32103V + bool + select SOC_SERIES_GD32F10x + select RT_USING_COMPONENTS_INIT + select RT_USING_USER_MAIN + default y + +menu "Onboard Peripheral Drivers" + +endmenu + +menu "On-chip Peripheral Drivers" + + config BSP_USING_GPIO + bool "Enable GPIO" + select RT_USING_PIN + default y + + menuconfig BSP_USING_UART + bool "Enable UART" + default y + select RT_USING_SERIAL + if BSP_USING_UART + config BSP_USING_UART1 + bool "Enable UART1" + default y + + config BSP_UART1_RX_USING_DMA + bool "Enable UART1 RX DMA" + depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA + default n + endif + + menuconfig BSP_USING_SPI + bool "Enable SPI BUS" + default n + select RT_USING_SPI + if BSP_USING_SPI + config BSP_USING_SPI1 + bool "Enable SPI1 BUS" + default n + + config BSP_SPI1_TX_USING_DMA + bool "Enable SPI1 TX DMA" + depends on BSP_USING_SPI1 + default n + + config BSP_SPI1_RX_USING_DMA + bool "Enable SPI1 RX DMA" + depends on BSP_USING_SPI1 + select BSP_SPI1_TX_USING_DMA + default n + endif + + menuconfig BSP_USING_I2C1 + bool "Enable I2C1 BUS (software simulation)" + default n + select RT_USING_I2C + select RT_USING_I2C_BITOPS + select RT_USING_PIN + if BSP_USING_I2C1 + config BSP_I2C1_SCL_PIN + int "i2c1 scl pin number" + range 1 216 + default 24 + config BSP_I2C1_SDA_PIN + int "I2C1 sda pin number" + range 1 216 + default 25 + endif + source "../libraries/gd32_drivers/Kconfig" + +endmenu + +menu "Board extended module Drivers" + +endmenu + +endmenu diff --git a/bsp/gd32/gd32103c-eval/board/SConscript b/bsp/gd32/gd32103c-eval/board/SConscript new file mode 100644 index 0000000000..95b0a6e9ac --- /dev/null +++ b/bsp/gd32/gd32103c-eval/board/SConscript @@ -0,0 +1,28 @@ +import os +import rtconfig +from building import * + +Import('SDK_LIB') + +cwd = GetCurrentDir() + +# add general drivers +src = Split(''' +board.c +''') + +path = [cwd] + +startup_path_prefix = SDK_LIB + +if rtconfig.CROSS_TOOL == 'gcc': + src += [startup_path_prefix + '/GD32F10x_Firmware_Library/CMSIS/GD/GD32F10x/Source/GCC/startup_gd32f10x_hd.s'] +elif rtconfig.CROSS_TOOL == 'keil': + src += [startup_path_prefix + '/GD32F10x_Firmware_Library/CMSIS/GD/GD32F10x/Source/ARM/startup_gd32f10x_hd.s'] +elif rtconfig.CROSS_TOOL == 'iar': + src += [startup_path_prefix + '/GD32F10x_Firmware_Library/CMSIS/GD/GD32F10x/Source/IAR/startup_gd32f10x_hd.s'] + +CPPDEFINES = ['GD32F10X_HD'] +group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES) + +Return('group') diff --git a/bsp/gd32/gd32103c-eval/board/board.c b/bsp/gd32/gd32103c-eval/board/board.c new file mode 100644 index 0000000000..c409645b37 --- /dev/null +++ b/bsp/gd32/gd32103c-eval/board/board.c @@ -0,0 +1,85 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-12-18 BruceOu first implementation + */ +#include <stdint.h> +#include <rthw.h> +#include <rtthread.h> +#include <board.h> + +/** + * @brief This function is executed in case of error occurrence. + * @param None + * @retval None + */ +void Error_Handler(void) +{ + /* USER CODE BEGIN Error_Handler */ + /* User can add his own implementation to report the HAL error return state */ + while (1) + { + } + /* USER CODE END Error_Handler */ +} + +/** System Clock Configuration +*/ +void SystemClock_Config(void) +{ + SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND); + NVIC_SetPriority(SysTick_IRQn, 0); +} + +/** + * This is the timer interrupt service routine. + * + */ +void SysTick_Handler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + rt_tick_increase(); + + /* leave interrupt */ + rt_interrupt_leave(); +} + +/** + * This function will initial GD32 board. + */ +void rt_hw_board_init() +{ + /* NVIC Configuration */ +#define NVIC_VTOR_MASK 0x3FFFFF80 +#ifdef VECT_TAB_RAM + /* Set the Vector Table base location at 0x10000000 */ + SCB->VTOR = (0x10000000 & NVIC_VTOR_MASK); +#else /* VECT_TAB_FLASH */ + /* Set the Vector Table base location at 0x08000000 */ + SCB->VTOR = (0x08000000 & NVIC_VTOR_MASK); +#endif + + SystemClock_Config(); + +#ifdef RT_USING_COMPONENTS_INIT + rt_components_board_init(); +#endif + +#ifdef RT_USING_CONSOLE + rt_console_set_device(RT_CONSOLE_DEVICE_NAME); +#endif + +#ifdef BSP_USING_SDRAM + rt_system_heap_init((void *)EXT_SDRAM_BEGIN, (void *)EXT_SDRAM_END); +#else + rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END); +#endif +} + +/*@}*/ diff --git a/bsp/gd32/gd32103c-eval/board/board.h b/bsp/gd32/gd32103c-eval/board/board.h new file mode 100644 index 0000000000..2eb804a9af --- /dev/null +++ b/bsp/gd32/gd32103c-eval/board/board.h @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-12-18 BruceOu first implementation + */ +#ifndef __BOARD_H__ +#define __BOARD_H__ + +#include "gd32f10x.h" +#include "drv_usart.h" +#include "drv_gpio.h" + +#include "gd32f10x_exti.h" + +#define EXT_SDRAM_BEGIN (0xC0000000U) /* the begining address of external SDRAM */ +#define EXT_SDRAM_END (EXT_SDRAM_BEGIN + (32U * 1024 * 1024)) /* the end address of external SDRAM */ + +// <o> Internal SRAM memory size[Kbytes] <8-48> +// <i>Default: 48 +#ifdef __ICCARM__ +// Use *.icf ram symbal, to avoid hardcode. +extern char __ICFEDIT_region_RAM_end__; +#define GD32_SRAM_END &__ICFEDIT_region_RAM_end__ +#else +#define GD32_SRAM_SIZE 48 +#define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024) +#endif + +#ifdef __CC_ARM +extern int Image$$RW_IRAM1$$ZI$$Limit; +#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) +#elif __ICCARM__ +#pragma section="HEAP" +#define HEAP_BEGIN (__segment_end("HEAP")) +#else +extern int __bss_end; +#define HEAP_BEGIN (&__bss_end) +#endif + +#define HEAP_END GD32_SRAM_END + +#endif + diff --git a/bsp/gd32/gd32103c-eval/board/gd32f10x_libopt.h b/bsp/gd32/gd32103c-eval/board/gd32f10x_libopt.h new file mode 100644 index 0000000000..5292c8eca7 --- /dev/null +++ b/bsp/gd32/gd32103c-eval/board/gd32f10x_libopt.h @@ -0,0 +1,64 @@ +/*! + \file gd32f10x_libopt.h + \brief library optional for gd32f10x + + \version 2014-12-26, V1.0.0, demo for GD32F10x + \version 2017-06-30, V2.0.0, demo for GD32F10x + \version 2021-04-30, V2.1.0, demo for GD32F10x +*/ + +/* + Copyright (c) 2021, GigaDevice Semiconductor Inc. + + Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + 3. Neither the name of the copyright holder nor the names of its contributors + may be used to endorse or promote products derived from this software without + specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, +INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, +WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY +OF SUCH DAMAGE. +*/ + +#ifndef GD32F10X_LIBOPT_H +#define GD32F10X_LIBOPT_H + +#include "gd32f10x_fmc.h" +#include "gd32f10x_pmu.h" +#include "gd32f10x_bkp.h" +#include "gd32f10x_rcu.h" +#include "gd32f10x_exti.h" +#include "gd32f10x_gpio.h" +#include "gd32f10x_crc.h" +#include "gd32f10x_dma.h" +#include "gd32f10x_dbg.h" +#include "gd32f10x_adc.h" +#include "gd32f10x_dac.h" +#include "gd32f10x_fwdgt.h" +#include "gd32f10x_wwdgt.h" +#include "gd32f10x_rtc.h" +#include "gd32f10x_timer.h" +#include "gd32f10x_usart.h" +#include "gd32f10x_i2c.h" +#include "gd32f10x_spi.h" +#include "gd32f10x_sdio.h" +#include "gd32f10x_exmc.h" +#include "gd32f10x_can.h" +#include "gd32f10x_enet.h" +#include "gd32f10x_misc.h" + +#endif /* GD32F10X_LIBOPT_H */ diff --git a/bsp/gd32/gd32103c-eval/board/linker_scripts/link.icf b/bsp/gd32/gd32103c-eval/board/linker_scripts/link.icf new file mode 100644 index 0000000000..c1b7bfa182 --- /dev/null +++ b/bsp/gd32/gd32103c-eval/board/linker_scripts/link.icf @@ -0,0 +1,40 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x2000BFFF;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x200;
+define symbol __ICFEDIT_size_heap__ = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+export symbol __ICFEDIT_region_RAM_end__;
+
+define symbol __region_RAM1_start__ = 0x10000000;
+define symbol __region_RAM1_end__ = 0x1000FFFF;
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+define region RAM1_region = mem:[from __region_RAM1_start__ to __region_RAM1_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+keep { section FSymTab };
+keep { section VSymTab };
+keep { section .rti_fn* };
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
+place in RAM1_region { section .sram };
\ No newline at end of file diff --git a/bsp/gd32/gd32103c-eval/board/linker_scripts/link.ld b/bsp/gd32/gd32103c-eval/board/linker_scripts/link.ld new file mode 100644 index 0000000000..7bacb5ab4a --- /dev/null +++ b/bsp/gd32/gd32103c-eval/board/linker_scripts/link.ld @@ -0,0 +1,142 @@ +/* + * linker script for GD32F30x with GNU ld + * BruceOu 2021-12-18 + */ + +/* Program Entry, set to mark it as "used" and avoid gc */ +MEMORY +{ + CODE (rx) : ORIGIN = 0x08000000, LENGTH = 256k /* 256KB flash */ + DATA (rw) : ORIGIN = 0x20000000, LENGTH = 48k /* 48KB sram */ +} +ENTRY(Reset_Handler) +_system_stack_size = 0x200; + +SECTIONS +{ + .text : + { + . = ALIGN(4); + _stext = .; + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + *(.text) /* remaining code */ + *(.text.*) /* remaining code */ + *(.rodata) /* read-only data (constants) */ + *(.rodata*) + *(.glue_7) + *(.glue_7t) + *(.gnu.linkonce.t*) + + /* section information for finsh shell */ + . = ALIGN(4); + __fsymtab_start = .; + KEEP(*(FSymTab)) + __fsymtab_end = .; + . = ALIGN(4); + __vsymtab_start = .; + KEEP(*(VSymTab)) + __vsymtab_end = .; + . = ALIGN(4); + + /* section information for initial. */ + . = ALIGN(4); + __rt_init_start = .; + KEEP(*(SORT(.rti_fn*))) + __rt_init_end = .; + . = ALIGN(4); + + . = ALIGN(4); + _etext = .; + } > CODE = 0 + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + + /* This is used by the startup in order to initialize the .data secion */ + _sidata = .; + } > CODE + __exidx_end = .; + + /* .data section which is used for initialized data */ + + .data : AT (_sidata) + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _sdata = . ; + + *(.data) + *(.data.*) + *(.gnu.linkonce.d*) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _edata = . ; + } >DATA + + .stack : + { + . = . + _system_stack_size; + . = ALIGN(4); + _estack = .; + } >DATA + + __bss_start = .; + .bss : + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; + + *(.bss) + *(.bss.*) + *(COMMON) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _ebss = . ; + + *(.bss.init) + } > DATA + __bss_end = .; + + _end = .; + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + * Symbols in the DWARF debugging sections are relative to the beginning + * of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff --git a/bsp/gd32/gd32103c-eval/board/linker_scripts/link.sct b/bsp/gd32/gd32103c-eval/board/linker_scripts/link.sct new file mode 100644 index 0000000000..99f1f72a75 --- /dev/null +++ b/bsp/gd32/gd32103c-eval/board/linker_scripts/link.sct @@ -0,0 +1,15 @@ +; *************************************************************
+; *** Scatter-Loading Description File generated by uVision ***
+; *************************************************************
+
+LR_IROM1 0x08000000 0x00040000 { ; load region size_region
+ ER_IROM1 0x08000000 0x00040000 { ; load address = execution address
+ *.o (RESET, +First)
+ *(InRoot$$Sections)
+ .ANY (+RO)
+ }
+ RW_IRAM1 0x20000000 0x0000C000 { ; RW data
+ .ANY (+RW +ZI)
+ }
+}
+
diff --git a/bsp/gd32/gd32103c-eval/project.uvoptx b/bsp/gd32/gd32103c-eval/project.uvoptx new file mode 100644 index 0000000000..3cd7319e9d --- /dev/null +++ b/bsp/gd32/gd32103c-eval/project.uvoptx @@ -0,0 +1,748 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd"> + + <SchemaVersion>1.0</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Extensions> + <cExt>*.c</cExt> + <aExt>*.s*; *.src; *.a*</aExt> + <oExt>*.obj; *.o</oExt> + <lExt>*.lib</lExt> + <tExt>*.txt; *.h; *.inc</tExt> + <pExt>*.plm</pExt> + <CppX>*.cpp</CppX> + <nMigrate>0</nMigrate> + </Extensions> + + <DaveTm> + <dwLowDateTime>0</dwLowDateTime> + <dwHighDateTime>0</dwHighDateTime> + </DaveTm> + + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>12000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>0</RunSim> + <RunTarget>1</RunTarget> + <RunAbUc>0</RunAbUc> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\build\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>1</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>1</IsCurrentTarget> + </OPTFL> + <CpuCode>255</CpuCode> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <tRtrace>1</tRtrace> + <sRSysVw>1</sRSysVw> + <tRSysVw>1</tRSysVw> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <bEvRecOn>1</bEvRecOn> + <bSchkAxf>0</bSchkAxf> + <bTchkAxf>0</bTchkAxf> + <nTsel>3</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>BIN\CMSIS_AGDI.dll</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0GD32F10x_CL -FL040000 -FS08000000 -FP0($$Device:GD32F105RC$Flash\GD32F10x_CL.FLM)</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint/> + <Tracepoint> + <THDelay>0</THDelay> + </Tracepoint> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>0</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>0</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + <bLintAuto>0</bLintAuto> + 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<IncludePath /> + </VariousControls> + </Aads> + <LDads> + <umfTarg>1</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x08000000</TextAddressRange> + <DataAddressRange>0x20000000</DataAddressRange> + <pXoBase /> + <ScatterFile /> + <IncludeLibs /> + <IncludeLibsPath /> + <Misc /> + <LinkerInputFile /> + <DisabledWarnings /> + </LDads> + </TargetArmAds> + </TargetOption> + <Groups> + <Group> + <GroupName>Applications</GroupName> + <Files> + <File> + <FileName>main.c</FileName> + <FileType>1</FileType> + <FilePath>applications\main.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>CPU</GroupName> + <Files> + <File> + <FileName>div0.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\libcpu\arm\common\div0.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>backtrace.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\libcpu\arm\common\backtrace.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>showmem.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\libcpu\arm\common\showmem.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>cpuport.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\libcpu\arm\cortex-m3\cpuport.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>context_rvds.S</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\libcpu\arm\cortex-m3\context_rvds.S</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>DeviceDrivers</GroupName> + <Files> + <File> + <FileName>pin.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\misc\pin.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>serial.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\serial\serial.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>ringbuffer.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\ringbuffer.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>pipe.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\pipe.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>ringblk_buf.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\ringblk_buf.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>workqueue.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\workqueue.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>dataqueue.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\dataqueue.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>completion.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\completion.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>waitqueue.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\waitqueue.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Drivers</GroupName> + <Files> + <File> + <FileName>startup_gd32f10x_hd.s</FileName> + <FileType>2</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\CMSIS\GD\GD32F10x\Source\ARM\startup_gd32f10x_hd.s</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>board.c</FileName> + <FileType>1</FileType> + <FilePath>board\board.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>drv_gpio.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\gd32_drivers\drv_gpio.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>drv_usart.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\gd32_drivers\drv_usart.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Finsh</GroupName> + <Files> + <File> + <FileName>shell.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\shell.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>msh.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\msh.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>cmd.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\cmd.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Kernel</GroupName> + <Files> + <File> + <FileName>kservice.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\kservice.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>ipc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\ipc.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>mem.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\mem.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>clock.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\clock.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>object.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\object.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>mempool.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\mempool.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>scheduler.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\scheduler.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>device.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\device.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>components.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\components.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>irq.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\irq.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>idle.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\idle.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>timer.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\timer.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>thread.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\thread.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>libc</GroupName> + <Files> + <File> + <FileName>time.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\libc\compilers\common\time.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Libraries</GroupName> + <Files> + <File> + <FileName>gd32f10x_exti.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\GD32F10x_standard_peripheral\Source\gd32f10x_exti.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>gd32f10x_gpio.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\GD32F10x_standard_peripheral\Source\gd32f10x_gpio.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>gd32f10x_misc.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\GD32F10x_standard_peripheral\Source\gd32f10x_misc.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>system_gd32f10x.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\CMSIS\GD\GD32F10x\Source\system_gd32f10x.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>gd32f10x_rcu.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\GD32F10x_standard_peripheral\Source\gd32f10x_rcu.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>gd32f10x_usart.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\GD32F10x_standard_peripheral\Source\gd32f10x_usart.c</FilePath> + </File> + </Files> + </Group> + </Groups> + </Target> + </Targets> +</Project> diff --git a/bsp/gd32/gd32103c-eval/project.uvprojx b/bsp/gd32/gd32103c-eval/project.uvprojx new file mode 100644 index 0000000000..297c9fc433 --- /dev/null +++ b/bsp/gd32/gd32103c-eval/project.uvprojx @@ -0,0 +1,668 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd"> + + <SchemaVersion>2.1</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Targets> + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <pCCUsed>5060750::V5.06 update 6 (build 750)::.\ARMCC</pCCUsed> + <uAC6>0</uAC6> + <TargetOption> + <TargetCommonOption> + <Device>GD32F103VC</Device> + <Vendor>GigaDevice</Vendor> + <PackID>GigaDevice.GD32F10x_DFP.2.0.1</PackID> + <PackURL>http://www.keil.com/pack/</PackURL> + <Cpu>IRAM(0x20000000,0x0000C000) IROM(0x08000000,0x00040000) CPUTYPE("Cortex-M3") CLOCK(10800000) ELITTLE</Cpu> + <FlashUtilSpec></FlashUtilSpec> + <StartupFile></StartupFile> + <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0GD32F10x_CL -FS08000000 -FL040000 -FP0($$Device:GD32F103VC$Flash\GD32F10x_CL.FLM))</FlashDriverDll> + <DeviceId>0</DeviceId> + <RegisterFile>$$Device:GD32F103VC$Device\Include\gd32f10x.h</RegisterFile> + <MemoryEnv></MemoryEnv> + <Cmp></Cmp> + <Asm></Asm> + <Linker></Linker> + <OHString></OHString> + <InfinionOptionDll></InfinionOptionDll> + <SLE66CMisc></SLE66CMisc> + <SLE66AMisc></SLE66AMisc> + <SLE66LinkerMisc></SLE66LinkerMisc> + <SFDFile>$$Device:GD32F103VC$SVD\GD32F10x\GD32F10x_CL.svd</SFDFile> + <bCustSvd>0</bCustSvd> + <UseEnv>0</UseEnv> + <BinPath></BinPath> + <IncludePath></IncludePath> + <LibPath></LibPath> + <RegisterFilePath></RegisterFilePath> + <DBRegisterFilePath></DBRegisterFilePath> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + </TargetStatus> + <OutputDirectory>.\build\</OutputDirectory> + <OutputName>rtthread</OutputName> + <CreateExecutable>1</CreateExecutable> + <CreateLib>0</CreateLib> + <CreateHexFile>0</CreateHexFile> + <DebugInformation>1</DebugInformation> + <BrowseInformation>0</BrowseInformation> + <ListingPath>.\build\</ListingPath> + <HexFormatSelection>1</HexFormatSelection> + <Merge32K>0</Merge32K> + <CreateBatchFile>0</CreateBatchFile> + <BeforeCompile> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopU1X>0</nStopU1X> + <nStopU2X>0</nStopU2X> + </BeforeCompile> + <BeforeMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopB1X>0</nStopB1X> + <nStopB2X>0</nStopB2X> + </BeforeMake> + <AfterMake> + <RunUserProg1>1</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopA1X>0</nStopA1X> + <nStopA2X>0</nStopA2X> + </AfterMake> + <SelectedForBatchBuild>0</SelectedForBatchBuild> + <SVCSIdString></SVCSIdString> + </TargetCommonOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>1</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>0</GenerateAssemblyFile> + <AssembleAssemblyFile>0</AssembleAssemblyFile> + <PublicsOnly>0</PublicsOnly> + <StopOnExitCode>3</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + <ComprImg>1</ComprImg> + </CommonProperty> + <DllOption> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments> -REMAP</SimDllArguments> + <SimDlgDll>DCM.DLL</SimDlgDll> + <SimDlgDllArguments>-pCM3</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDll>TCM.DLL</TargetDlgDll> + <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments> + </DllOption> + <DebugOption> + <OPTHX> + <HexSelection>1</HexSelection> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + <Oh166RecLen>16</Oh166RecLen> + </OPTHX> + </DebugOption> + <Utilities> + <Flash1> + <UseTargetDll>1</UseTargetDll> + <UseExternalTool>0</UseExternalTool> + <RunIndependent>0</RunIndependent> + <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> + <Capability>1</Capability> + <DriverSelection>4096</DriverSelection> + </Flash1> + <bUseTDR>1</bUseTDR> + <Flash2>BIN\UL2CM3.DLL</Flash2> + <Flash3></Flash3> + <Flash4></Flash4> + <pFcarmOut></pFcarmOut> + <pFcarmGrp></pFcarmGrp> + <pFcArmRoot></pFcArmRoot> + <FcArmLst>0</FcArmLst> + </Utilities> + <TargetArmAds> + <ArmAdsMisc> + <GenerateListings>0</GenerateListings> + <asHll>1</asHll> + <asAsm>1</asAsm> + <asMacX>1</asMacX> + <asSyms>1</asSyms> + <asFals>1</asFals> + <asDbgD>1</asDbgD> + <asForm>1</asForm> + <ldLst>0</ldLst> + <ldmm>1</ldmm> + <ldXref>1</ldXref> + <BigEnd>0</BigEnd> + <AdsALst>1</AdsALst> + <AdsACrf>1</AdsACrf> + <AdsANop>0</AdsANop> + <AdsANot>0</AdsANot> + <AdsLLst>1</AdsLLst> + <AdsLmap>1</AdsLmap> + <AdsLcgr>1</AdsLcgr> + <AdsLsym>1</AdsLsym> + <AdsLszi>1</AdsLszi> + <AdsLtoi>1</AdsLtoi> + <AdsLsun>1</AdsLsun> + <AdsLven>1</AdsLven> + <AdsLsxf>1</AdsLsxf> + <RvctClst>0</RvctClst> + <GenPPlst>0</GenPPlst> + <AdsCpuType>"Cortex-M3"</AdsCpuType> + <RvctDeviceName></RvctDeviceName> + <mOS>0</mOS> + <uocRom>0</uocRom> + <uocRam>0</uocRam> + <hadIROM>1</hadIROM> + <hadIRAM>1</hadIRAM> + <hadXRAM>0</hadXRAM> + <uocXRam>0</uocXRam> + <RvdsVP>0</RvdsVP> + <RvdsMve>0</RvdsMve> + <RvdsCdeCp>0</RvdsCdeCp> + <hadIRAM2>0</hadIRAM2> + <hadIROM2>0</hadIROM2> + <StupSel>8</StupSel> + <useUlib>0</useUlib> + <EndSel>0</EndSel> + <uLtcg>0</uLtcg> + <nSecure>0</nSecure> + <RoSelD>3</RoSelD> + <RwSelD>3</RwSelD> + <CodeSel>0</CodeSel> + <OptFeed>0</OptFeed> + <NoZi1>0</NoZi1> + <NoZi2>0</NoZi2> + <NoZi3>0</NoZi3> + <NoZi4>0</NoZi4> + <NoZi5>0</NoZi5> + <Ro1Chk>0</Ro1Chk> + <Ro2Chk>0</Ro2Chk> + <Ro3Chk>0</Ro3Chk> + <Ir1Chk>1</Ir1Chk> + <Ir2Chk>0</Ir2Chk> + <Ra1Chk>0</Ra1Chk> + <Ra2Chk>0</Ra2Chk> + <Ra3Chk>0</Ra3Chk> + <Im1Chk>1</Im1Chk> + <Im2Chk>0</Im2Chk> + <OnChipMemories> + <Ocm1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocm4> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0xc000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x40000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x40000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x18000</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector></RvctStartVector> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>4</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>0</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>0</wLevel> + <uThumb>0</uThumb> + <uSurpInc>0</uSurpInc> + <uC99>1</uC99> + <uGnu>0</uGnu> + <useXO>0</useXO> + <v6Lang>1</v6Lang> + <v6LangP>1</v6LangP> + <vShortEn>1</vShortEn> + <vShortWch>1</vShortWch> + <v6Lto>0</v6Lto> + <v6WtE>0</v6WtE> + <v6Rtti>0</v6Rtti> + <VariousControls> + <MiscControls></MiscControls> + <Define>GD32F10X_HD, USE_STDPERIPH_DRIVER, __RTTHREAD__, __CLK_TCK=RT_TICK_PER_SECOND</Define> + <Undefine></Undefine> + <IncludePath>applications;.;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m3;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;..\libraries\gd32_drivers;..\..\..\components\finsh;.;..\..\..\include;..\..\..\components\libc\compilers\common;..\..\..\components\libc\compilers\common\nogcc;..\libraries\GD32F10x_Firmware_Library\CMSIS\GD\GD32F10x\Include;..\libraries\GD32F10x_Firmware_Library\CMSIS;..\libraries\GD32F10x_Firmware_Library\GD32F10x_standard_peripheral\Include;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\ipc;..\..\..\examples\utest\testcases\kernel</IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <uSurpInc>0</uSurpInc> + <useXO>0</useXO> + <ClangAsOpt>4</ClangAsOpt> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + <LDads> + <umfTarg>1</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x08000000</TextAddressRange> + <DataAddressRange>0x20000000</DataAddressRange> + <pXoBase></pXoBase> + <ScatterFile>.\gd32_rom.ld</ScatterFile> + <IncludeLibs></IncludeLibs> + <IncludeLibsPath></IncludeLibsPath> + <Misc></Misc> + <LinkerInputFile></LinkerInputFile> + <DisabledWarnings></DisabledWarnings> + </LDads> + </TargetArmAds> + </TargetOption> + <Groups> + <Group> + <GroupName>Applications</GroupName> + <Files> + <File> + <FileName>main.c</FileName> + <FileType>1</FileType> + <FilePath>applications\main.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>CPU</GroupName> + <Files> + <File> + <FileName>div0.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\libcpu\arm\common\div0.c</FilePath> + </File> + <File> + <FileName>showmem.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\libcpu\arm\common\showmem.c</FilePath> + </File> + <File> + <FileName>backtrace.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\libcpu\arm\common\backtrace.c</FilePath> + </File> + <File> + <FileName>context_rvds.S</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\libcpu\arm\cortex-m3\context_rvds.S</FilePath> + </File> + <File> + <FileName>cpuport.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\libcpu\arm\cortex-m3\cpuport.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>DeviceDrivers</GroupName> + <Files> + <File> + <FileName>pin.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\misc\pin.c</FilePath> + </File> + <File> + <FileName>serial.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\serial\serial.c</FilePath> + </File> + <File> + <FileName>dataqueue.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\dataqueue.c</FilePath> + </File> + <File> + <FileName>waitqueue.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\waitqueue.c</FilePath> + </File> + <File> + <FileName>ringblk_buf.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\ringblk_buf.c</FilePath> + </File> + <File> + <FileName>workqueue.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\workqueue.c</FilePath> + </File> + <File> + <FileName>ringbuffer.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\ringbuffer.c</FilePath> + </File> + <File> + <FileName>completion.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\completion.c</FilePath> + </File> + <File> + <FileName>pipe.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\pipe.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Drivers</GroupName> + <Files> + <File> + <FileName>startup_gd32f10x_hd.s</FileName> + <FileType>2</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\CMSIS\GD\GD32F10x\Source\ARM\startup_gd32f10x_hd.s</FilePath> + </File> + <File> + <FileName>board.c</FileName> + <FileType>1</FileType> + <FilePath>board\board.c</FilePath> + </File> + <File> + <FileName>drv_gpio.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\gd32_drivers\drv_gpio.c</FilePath> + </File> + <File> + <FileName>drv_usart.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\gd32_drivers\drv_usart.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Finsh</GroupName> + <Files> + <File> + <FileName>shell.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\shell.c</FilePath> + </File> + <File> + <FileName>msh.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\msh.c</FilePath> + </File> + <File> + <FileName>cmd.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\cmd.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Kernel</GroupName> + <Files> + <File> + <FileName>clock.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\clock.c</FilePath> + </File> + <File> + <FileName>ipc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\ipc.c</FilePath> + </File> + <File> + <FileName>kservice.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\kservice.c</FilePath> + </File> + <File> + <FileName>components.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\components.c</FilePath> + </File> + <File> + <FileName>scheduler.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\scheduler.c</FilePath> + </File> + <File> + <FileName>idle.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\idle.c</FilePath> + </File> + <File> + <FileName>device.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\device.c</FilePath> + </File> + <File> + <FileName>timer.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\timer.c</FilePath> + </File> + <File> + <FileName>object.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\object.c</FilePath> + </File> + <File> + <FileName>mempool.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\mempool.c</FilePath> + </File> + <File> + <FileName>mem.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\mem.c</FilePath> + </File> + <File> + <FileName>irq.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\irq.c</FilePath> + </File> + <File> + <FileName>thread.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\thread.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>libc</GroupName> + <Files> + <File> + <FileName>time.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\libc\compilers\common\time.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Libraries</GroupName> + <Files> + <File> + <FileName>gd32f10x_exti.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\GD32F10x_standard_peripheral\Source\gd32f10x_exti.c</FilePath> + </File> + <File> + <FileName>gd32f10x_gpio.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\GD32F10x_standard_peripheral\Source\gd32f10x_gpio.c</FilePath> + </File> + <File> + <FileName>gd32f10x_misc.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\GD32F10x_standard_peripheral\Source\gd32f10x_misc.c</FilePath> + </File> + <File> + <FileName>system_gd32f10x.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\CMSIS\GD\GD32F10x\Source\system_gd32f10x.c</FilePath> + </File> + <File> + <FileName>gd32f10x_rcu.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\GD32F10x_standard_peripheral\Source\gd32f10x_rcu.c</FilePath> + </File> + <File> + <FileName>gd32f10x_usart.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\GD32F10x_standard_peripheral\Source\gd32f10x_usart.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>::CMSIS</GroupName> + </Group> + </Groups> + </Target> + </Targets> + + <RTE> + <apis/> + <components> + <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.4.0" condition="ARMv6_7_8-M Device"> + <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/> + <targetInfos> + <targetInfo name="rt-thread"/> + </targetInfos> + </component> + </components> + <files/> + </RTE> + + <LayerInfo> + <Layers> + <Layer> + <LayName><Project Info></LayName> + <LayDesc></LayDesc> + <LayUrl></LayUrl> + <LayKeys></LayKeys> + <LayCat></LayCat> + <LayLic></LayLic> + <LayTarg>0</LayTarg> + <LayPrjMark>1</LayPrjMark> + </Layer> + </Layers> + </LayerInfo> + +</Project> diff --git a/bsp/gd32/gd32103c-eval/rtconfig.h b/bsp/gd32/gd32103c-eval/rtconfig.h new file mode 100644 index 0000000000..c461a768e1 --- /dev/null +++ b/bsp/gd32/gd32103c-eval/rtconfig.h @@ -0,0 +1,200 @@ +#ifndef RT_CONFIG_H__ +#define RT_CONFIG_H__ + +/* Automatically generated file; DO NOT EDIT. */ +/* RT-Thread Configuration */ + +/* RT-Thread Kernel */ + +#define RT_NAME_MAX 8 +#define RT_ALIGN_SIZE 4 +#define RT_THREAD_PRIORITY_32 +#define RT_THREAD_PRIORITY_MAX 32 +#define RT_TICK_PER_SECOND 100 +#define RT_USING_OVERFLOW_CHECK +#define RT_USING_HOOK +#define RT_USING_IDLE_HOOK +#define RT_IDLE_HOOK_LIST_SIZE 4 +#define IDLE_THREAD_STACK_SIZE 256 + +/* kservice optimization */ + +#define RT_DEBUG +#define RT_DEBUG_COLOR + +/* Inter-Thread communication */ + +#define RT_USING_SEMAPHORE +#define RT_USING_MUTEX +#define RT_USING_EVENT +#define RT_USING_MAILBOX +#define RT_USING_MESSAGEQUEUE + +/* Memory Management */ + +#define RT_USING_MEMPOOL +#define RT_USING_SMALL_MEM +#define RT_USING_HEAP + +/* Kernel Device Object */ + +#define RT_USING_DEVICE +#define RT_USING_CONSOLE +#define RT_CONSOLEBUF_SIZE 128 +#define RT_CONSOLE_DEVICE_NAME "uart1" +#define RT_VER_NUM 0x40004 + +/* RT-Thread Components */ + +#define RT_USING_COMPONENTS_INIT +#define RT_USING_USER_MAIN +#define RT_MAIN_THREAD_STACK_SIZE 2048 +#define RT_MAIN_THREAD_PRIORITY 10 + +/* C++ features */ + + +/* Command shell */ + +#define RT_USING_FINSH +#define RT_USING_MSH +#define FINSH_USING_MSH +#define FINSH_THREAD_NAME "tshell" +#define FINSH_THREAD_PRIORITY 20 +#define FINSH_THREAD_STACK_SIZE 4096 +#define FINSH_USING_HISTORY +#define FINSH_HISTORY_LINES 5 +#define FINSH_USING_SYMTAB +#define FINSH_CMD_SIZE 80 +#define MSH_USING_BUILT_IN_COMMANDS +#define FINSH_USING_DESCRIPTION +#define FINSH_ARG_MAX 10 + +/* Device virtual file system */ + + +/* Device Drivers */ + +#define RT_USING_DEVICE_IPC +#define RT_PIPE_BUFSZ 512 +#define RT_USING_SYSTEM_WORKQUEUE +#define RT_SYSTEM_WORKQUEUE_STACKSIZE 2048 +#define RT_SYSTEM_WORKQUEUE_PRIORITY 23 +#define RT_USING_SERIAL +#define RT_USING_SERIAL_V1 +#define RT_SERIAL_USING_DMA +#define RT_SERIAL_RB_BUFSZ 64 +#define RT_USING_PIN + +/* Using USB */ + + +/* POSIX layer and C standard library */ + +#define RT_LIBC_USING_TIME +#define RT_LIBC_DEFAULT_TIMEZONE 8 + +/* Network */ + +/* Socket abstraction layer */ + + +/* Network interface device */ + + +/* light weight TCP/IP stack */ + + +/* AT commands */ + + +/* VBUS(Virtual Software BUS) */ + + +/* Utilities */ + + +/* RT-Thread Utestcases */ + + +/* RT-Thread online packages */ + +/* IoT - internet of things */ + + +/* Wi-Fi */ + +/* Marvell WiFi */ + + +/* Wiced WiFi */ + + +/* IoT Cloud */ + + +/* security packages */ + + +/* language packages */ + + +/* multimedia packages */ + +/* LVGL: powerful and easy-to-use embedded GUI library */ + + +/* u8g2: a monochrome graphic library */ + + +/* PainterEngine: A cross-platform graphics application framework written in C language */ + + +/* tools packages */ + + +/* system packages */ + +/* enhanced kernel services */ + + +/* acceleration: Assembly language or algorithmic acceleration packages */ + + +/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */ + + +/* Micrium: Micrium software products porting for RT-Thread */ + + +/* peripheral libraries and drivers */ + + +/* AI packages */ + + +/* miscellaneous packages */ + +/* samples: kernel and components samples */ + + +/* entertainment: terminal games and other interesting software packages */ + + +/* Hardware Drivers Config */ + +#define SOC_SERIES_GD32F10x +#define SOC_GD32103V + +/* Onboard Peripheral Drivers */ + +/* On-chip Peripheral Drivers */ + +#define BSP_USING_GPIO +#define BSP_USING_UART +#define BSP_USING_UART1 + +/* Board extended module Drivers */ + + +#endif diff --git a/bsp/gd32/gd32103c-eval/rtconfig.py b/bsp/gd32/gd32103c-eval/rtconfig.py new file mode 100644 index 0000000000..4285e6b03c --- /dev/null +++ b/bsp/gd32/gd32103c-eval/rtconfig.py @@ -0,0 +1,150 @@ +import os + +# toolchains options +ARCH='arm' +CPU='cortex-m3' +CROSS_TOOL='keil' + +# bsp lib config +BSP_LIBRARY_TYPE = None + +if os.getenv('RTT_CC'): + CROSS_TOOL = os.getenv('RTT_CC') +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') + +# cross_tool provides the cross compiler +# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR +if CROSS_TOOL == 'gcc': + PLATFORM = 'gcc' + EXEC_PATH = r'C:\Users\XXYYZZ' +elif CROSS_TOOL == 'keil': + PLATFORM = 'armcc' + EXEC_PATH = r'C:/Keil_v5' +elif CROSS_TOOL == 'iar': + PLATFORM = 'iar' + EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0' + +if os.getenv('RTT_EXEC_PATH'): + EXEC_PATH = os.getenv('RTT_EXEC_PATH') + +BUILD = 'debug' + +if PLATFORM == 'gcc': + # toolchains + PREFIX = 'arm-none-eabi-' + CC = PREFIX + 'gcc' + AS = PREFIX + 'gcc' + AR = PREFIX + 'ar' + CXX = PREFIX + 'g++' + LINK = PREFIX + 'gcc' + TARGET_EXT = 'elf' + SIZE = PREFIX + 'size' + OBJDUMP = PREFIX + 'objdump' + OBJCPY = PREFIX + 'objcopy' + + DEVICE = ' -mcpu=cortex-m3 -mthumb -ffunction-sections -fdata-sections' + CFLAGS = DEVICE + ' -Dgcc' + AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb ' + LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.ld' + + CPATH = '' + LPATH = '' + + if BUILD == 'debug': + CFLAGS += ' -O0 -gdwarf-2 -g' + AFLAGS += ' -gdwarf-2' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + + POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' + +elif PLATFORM == 'armcc': + # toolchains + CC = 'armcc' + CXX = 'armcc' + AS = 'armasm' + AR = 'armar' + LINK = 'armlink' + TARGET_EXT = 'axf' + + DEVICE = ' --cpu Cortex-M3.fp ' + CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99' + AFLAGS = DEVICE + ' --apcs=interwork ' + LFLAGS = DEVICE + ' --scatter "board\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rtthread.map --strict' + CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include' + LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib' + + CFLAGS += ' -D__MICROLIB ' + AFLAGS += ' --pd "__MICROLIB SETA 1" ' + LFLAGS += ' --library_type=microlib ' + EXEC_PATH += '/ARM/ARMCC/bin/' + + if BUILD == 'debug': + CFLAGS += ' -g -O0' + AFLAGS += ' -g' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + CFLAGS += ' -std=c99' + + POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET' + +elif PLATFORM == 'iar': + # toolchains + CC = 'iccarm' + CXX = 'iccarm' + AS = 'iasmarm' + AR = 'iarchive' + LINK = 'ilinkarm' + TARGET_EXT = 'out' + + DEVICE = '-Dewarm' + + CFLAGS = DEVICE + CFLAGS += ' --diag_suppress Pa050' + CFLAGS += ' --no_cse' + CFLAGS += ' --no_unroll' + CFLAGS += ' --no_inline' + CFLAGS += ' --no_code_motion' + CFLAGS += ' --no_tbaa' + CFLAGS += ' --no_clustering' + CFLAGS += ' --no_scheduling' + CFLAGS += ' --endian=little' + CFLAGS += ' --cpu=Cortex-M3' + CFLAGS += ' -e' + CFLAGS += ' --fpu=None' + CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"' + CFLAGS += ' --silent' + + AFLAGS = DEVICE + AFLAGS += ' -s+' + AFLAGS += ' -w+' + AFLAGS += ' -r' + AFLAGS += ' --cpu Cortex-M3' + AFLAGS += ' --fpu None' + AFLAGS += ' -S' + + if BUILD == 'debug': + CFLAGS += ' --debug' + CFLAGS += ' -On' + else: + CFLAGS += ' -Oh' + + LFLAGS = ' --config "board/linker_scripts/link.icf"' + LFLAGS += ' --entry __iar_program_start' + + CXXFLAGS = CFLAGS + + EXEC_PATH = EXEC_PATH + '/arm/bin/' + POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT, dist_dir): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT, dist_dir) diff --git a/bsp/gd32/gd32103c-eval/template.uvoptx b/bsp/gd32/gd32103c-eval/template.uvoptx new file mode 100644 index 0000000000..e99a756fe7 --- /dev/null +++ b/bsp/gd32/gd32103c-eval/template.uvoptx @@ -0,0 +1,180 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd"> + + <SchemaVersion>1.0</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Extensions> + <cExt>*.c</cExt> + <aExt>*.s*; *.src; *.a*</aExt> + <oExt>*.obj; *.o</oExt> + <lExt>*.lib</lExt> + <tExt>*.txt; *.h; *.inc</tExt> + <pExt>*.plm</pExt> + <CppX>*.cpp</CppX> + <nMigrate>0</nMigrate> + </Extensions> + + <DaveTm> + <dwLowDateTime>0</dwLowDateTime> + <dwHighDateTime>0</dwHighDateTime> + </DaveTm> + + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>12000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>0</RunSim> + <RunTarget>1</RunTarget> + <RunAbUc>0</RunAbUc> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\build\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>1</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>1</IsCurrentTarget> + </OPTFL> + <CpuCode>255</CpuCode> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <tRtrace>1</tRtrace> + <sRSysVw>1</sRSysVw> + <tRSysVw>1</tRSysVw> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <bEvRecOn>1</bEvRecOn> + <bSchkAxf>0</bSchkAxf> + <bTchkAxf>0</bTchkAxf> + <nTsel>3</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>BIN\CMSIS_AGDI.dll</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0GD32F10x_CL -FL040000 -FS08000000 -FP0($$Device:GD32F105RC$Flash\GD32F10x_CL.FLM)</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint/> + <Tracepoint> + <THDelay>0</THDelay> + </Tracepoint> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>0</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>0</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + <bLintAuto>0</bLintAuto> + <bAutoGenD>0</bAutoGenD> + <LntExFlags>0</LntExFlags> + <pMisraName></pMisraName> + <pszMrule></pszMrule> + <pSingCmds></pSingCmds> + <pMultCmds></pMultCmds> + <pMisraNamep></pMisraNamep> + <pszMrulep></pszMrulep> + <pSingCmdsp></pSingCmdsp> + <pMultCmdsp></pMultCmdsp> + </TargetOption> + </Target> + + <Group> + <GroupName>::CMSIS</GroupName> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <cbSel>0</cbSel> + <RteFlg>1</RteFlg> + </Group> + +</ProjectOpt> diff --git a/bsp/gd32/gd32103c-eval/template.uvproj b/bsp/gd32/gd32103c-eval/template.uvproj new file mode 100644 index 0000000000..33458e05f7 --- /dev/null +++ b/bsp/gd32/gd32103c-eval/template.uvproj @@ -0,0 +1,628 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd"> + + <SchemaVersion>1.1</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Targets> + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <uAC6>0</uAC6> + <TargetOption> + <TargetCommonOption> + <Device>GD32F103VC</Device> + <Vendor>GigaDevice</Vendor> + <Cpu>IRAM(0x20000000-0x20018000) IROM(0x08000000-0x08040000) CLOCK(10800000) CPUTYPE("Cortex-M3")</Cpu> + <FlashUtilSpec></FlashUtilSpec> + <StartupFile>"Startup\GD\GD32F10x\startup_gd32f10x.s" ("GD32F10x Startup Code")</StartupFile> + <FlashDriverDll>UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0GD32F10x_3MB -FS08000000 -FL0100000)</FlashDriverDll> + <DeviceId>0</DeviceId> + <RegisterFile>gd32f10x0.h</RegisterFile> + <MemoryEnv></MemoryEnv> + <Cmp></Cmp> + <Asm></Asm> + <Linker></Linker> + <OHString></OHString> + <InfinionOptionDll></InfinionOptionDll> + <SLE66CMisc></SLE66CMisc> + <SLE66AMisc></SLE66AMisc> + <SLE66LinkerMisc></SLE66LinkerMisc> + <SFDFile>SFD\GD\GD32F10x\GD32F10x.SFR</SFDFile> + <bCustSvd>0</bCustSvd> + <UseEnv>0</UseEnv> + <BinPath></BinPath> + <IncludePath></IncludePath> + <LibPath></LibPath> + <RegisterFilePath>GD\GD32F10x\</RegisterFilePath> + <DBRegisterFilePath>GD\GD32F10x\</DBRegisterFilePath> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + </TargetStatus> + <OutputDirectory>.\output\</OutputDirectory> + <OutputName>rtthread</OutputName> + <CreateExecutable>1</CreateExecutable> + <CreateLib>0</CreateLib> + <CreateHexFile>1</CreateHexFile> + <DebugInformation>1</DebugInformation> + <BrowseInformation>1</BrowseInformation> + <ListingPath>.\build\</ListingPath> + <HexFormatSelection>1</HexFormatSelection> + <Merge32K>0</Merge32K> + <CreateBatchFile>0</CreateBatchFile> + <BeforeCompile> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopU1X>0</nStopU1X> + <nStopU2X>0</nStopU2X> + </BeforeCompile> + <BeforeMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopB1X>0</nStopB1X> + <nStopB2X>0</nStopB2X> + </BeforeMake> + <AfterMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopA1X>0</nStopA1X> + <nStopA2X>0</nStopA2X> + </AfterMake> + <SelectedForBatchBuild>0</SelectedForBatchBuild> + <SVCSIdString></SVCSIdString> + </TargetCommonOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>1</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>0</GenerateAssemblyFile> + <AssembleAssemblyFile>0</AssembleAssemblyFile> + <PublicsOnly>0</PublicsOnly> + <StopOnExitCode>3</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + <ComprImg>1</ComprImg> + </CommonProperty> + <DllOption> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments> -REMAP</SimDllArguments> + <SimDlgDll>DCM.DLL</SimDlgDll> + <SimDlgDllArguments>-pCM3</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDll>TCM.DLL</TargetDlgDll> + <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments> + </DllOption> + <DebugOption> + <OPTHX> + <HexSelection>1</HexSelection> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + <Oh166RecLen>16</Oh166RecLen> + </OPTHX> + <Simulator> + <UseSimulator>0</UseSimulator> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>1</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <LimitSpeedToRealTime>0</LimitSpeedToRealTime> + <RestoreSysVw>1</RestoreSysVw> + </Simulator> + <Target> + <UseTarget>1</UseTarget> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>0</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <RestoreTracepoints>0</RestoreTracepoints> + <RestoreSysVw>1</RestoreSysVw> + </Target> + <RunDebugAfterBuild>0</RunDebugAfterBuild> + <TargetSelection>3</TargetSelection> + <SimDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + </SimDlls> + <TargetDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + <Driver>BIN\CMSIS_AGDI.dll</Driver> + </TargetDlls> + </DebugOption> + <Utilities> + <Flash1> + <UseTargetDll>1</UseTargetDll> + <UseExternalTool>0</UseExternalTool> + <RunIndependent>0</RunIndependent> + <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> + <Capability>1</Capability> + <DriverSelection>4096</DriverSelection> + </Flash1> + <bUseTDR>1</bUseTDR> + <Flash2>BIN\UL2CM3.DLL</Flash2> + <Flash3>"" ()</Flash3> + <Flash4></Flash4> + <pFcarmOut></pFcarmOut> + <pFcarmGrp></pFcarmGrp> + <pFcArmRoot></pFcArmRoot> + <FcArmLst>0</FcArmLst> + </Utilities> + <TargetArmAds> + <ArmAdsMisc> + <GenerateListings>0</GenerateListings> + <asHll>1</asHll> + <asAsm>1</asAsm> + <asMacX>1</asMacX> + <asSyms>1</asSyms> + <asFals>1</asFals> + <asDbgD>1</asDbgD> + <asForm>1</asForm> + <ldLst>0</ldLst> + <ldmm>1</ldmm> + <ldXref>1</ldXref> + <BigEnd>0</BigEnd> + <AdsALst>1</AdsALst> + <AdsACrf>1</AdsACrf> + <AdsANop>0</AdsANop> + <AdsANot>0</AdsANot> + <AdsLLst>1</AdsLLst> + <AdsLmap>1</AdsLmap> + <AdsLcgr>1</AdsLcgr> + <AdsLsym>1</AdsLsym> + <AdsLszi>1</AdsLszi> + <AdsLtoi>1</AdsLtoi> + <AdsLsun>1</AdsLsun> + <AdsLven>1</AdsLven> + <AdsLsxf>1</AdsLsxf> + <RvctClst>0</RvctClst> + <GenPPlst>0</GenPPlst> + <AdsCpuType>"Cortex-M3"</AdsCpuType> + <RvctDeviceName></RvctDeviceName> + <mOS>0</mOS> + <uocRom>0</uocRom> + <uocRam>0</uocRam> + <hadIROM>1</hadIROM> + <hadIRAM>1</hadIRAM> + <hadXRAM>0</hadXRAM> + <uocXRam>0</uocXRam> + <RvdsVP>2</RvdsVP> + <hadIRAM2>1</hadIRAM2> + <hadIROM2>0</hadIROM2> + <StupSel>8</StupSel> + <useUlib>1</useUlib> + <EndSel>0</EndSel> + <uLtcg>0</uLtcg> + <nSecure>0</nSecure> + <RoSelD>3</RoSelD> + <RwSelD>3</RwSelD> + <CodeSel>0</CodeSel> + <OptFeed>0</OptFeed> + <NoZi1>0</NoZi1> + <NoZi2>0</NoZi2> + <NoZi3>0</NoZi3> + <NoZi4>0</NoZi4> + <NoZi5>0</NoZi5> + <Ro1Chk>0</Ro1Chk> + <Ro2Chk>0</Ro2Chk> + <Ro3Chk>0</Ro3Chk> + <Ir1Chk>1</Ir1Chk> + <Ir2Chk>0</Ir2Chk> + <Ra1Chk>0</Ra1Chk> + <Ra2Chk>0</Ra2Chk> + <Ra3Chk>0</Ra3Chk> + <Im1Chk>1</Im1Chk> + <Im2Chk>0</Im2Chk> + <OnChipMemories> + <Ocm1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocm4> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x10000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x100000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x100000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x10000</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x10000000</StartAddress> + <Size>0x10000</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector></RvctStartVector> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>1</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>1</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>2</wLevel> + <uThumb>0</uThumb> + <uSurpInc>0</uSurpInc> + <uC99>1</uC99> + <uGnu>0</uGnu> + <useXO>0</useXO> + <v6Lang>1</v6Lang> + <v6LangP>1</v6LangP> + <vShortEn>1</vShortEn> + <vShortWch>1</vShortWch> + <v6Lto>0</v6Lto> + <v6WtE>0</v6WtE> + <v6Rtti>0</v6Rtti> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Include;..\..\..\Library\Firmware\CMSIS\GD\GD32F10x\Include;..\..\..\Library\Utilities;..\</IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <uSurpInc>0</uSurpInc> + <useXO>0</useXO> + <uClangAs>0</uClangAs> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + <LDads> + <umfTarg>1</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x08000000</TextAddressRange> + <DataAddressRange>0x20000000</DataAddressRange> + <pXoBase></pXoBase> + <ScatterFile></ScatterFile> + <IncludeLibs></IncludeLibs> + <IncludeLibsPath></IncludeLibsPath> + <Misc></Misc> + <LinkerInputFile></LinkerInputFile> + <DisabledWarnings></DisabledWarnings> + </LDads> + </TargetArmAds> + </TargetOption> + <Groups> + <Group> + <GroupName>Application</GroupName> + <Files> + <File> + <FileName>main.c</FileName> + <FileType>1</FileType> + <FilePath>..\main.c</FilePath> + </File> + <File> + <FileName>gd32f10x_it.c</FileName> + <FileType>1</FileType> + <FilePath>..\gd32f10x_it.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>CMSIS</GroupName> + <Files> + <File> + <FileName>system_gd32f10x.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\CMSIS\GD\GD32F10x\Source\system_gd32f10x.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>GD32F10x_Peripherals</GroupName> + <Files> + <File> + <FileName>gd32f10x_adc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_adc.c</FilePath> + </File> + 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<FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_dci.c</FilePath> + </File> + <File> + <FileName>gd32f10x_dma.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_dma.c</FilePath> + </File> + <File> + <FileName>gd32f10x_enet.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_enet.c</FilePath> + </File> + <File> + <FileName>gd32f10x_exmc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_exmc.c</FilePath> + </File> + <File> + <FileName>gd32f10x_exti.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_exti.c</FilePath> + </File> + <File> + <FileName>gd32f10x_fmc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_fmc.c</FilePath> + </File> + <File> + <FileName>gd32f10x_fwdgt.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_fwdgt.c</FilePath> + </File> + <File> + <FileName>gd32f10x_gpio.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_gpio.c</FilePath> + </File> + <File> + <FileName>gd32f10x_i2c.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_i2c.c</FilePath> + </File> + <File> + <FileName>gd32f10x_ipa.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_ipa.c</FilePath> + </File> + <File> + <FileName>gd32f10x_iref.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_iref.c</FilePath> + </File> + <File> + <FileName>gd32f10x_misc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_misc.c</FilePath> + </File> + <File> + <FileName>gd32f10x_pmu.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_pmu.c</FilePath> + </File> + <File> + <FileName>gd32f10x_rcu.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_rcu.c</FilePath> + </File> + <File> + <FileName>gd32f10x_rtc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_rtc.c</FilePath> + </File> + <File> + <FileName>gd32f10x_sdio.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_sdio.c</FilePath> + </File> + <File> + <FileName>gd32f10x_spi.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_spi.c</FilePath> + </File> + <File> + <FileName>gd32f10x_syscfg.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_syscfg.c</FilePath> + </File> + <File> + <FileName>gd32f10x_timer.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_timer.c</FilePath> + </File> + <File> + <FileName>gd32f10x_tli.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_tli.c</FilePath> + </File> + <File> + <FileName>gd32f10x_trng.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_trng.c</FilePath> + </File> + <File> + <FileName>gd32f10x_usart.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_usart.c</FilePath> + </File> + <File> + <FileName>gd32f10x_wwdgt.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_wwdgt.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>GD32F10x_EVAL</GroupName> + <Files> + <File> + <FileName>gd32f103c_eval.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Utilities\gd32f103c_eval.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Startup</GroupName> + <Files> + <File> + <FileName>startup_gd32f10x.s</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\Library\Firmware\CMSIS\GD\GD32F10x\Source\ARM\startup_gd32f10x.s</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Doc</GroupName> + <Files> + <File> + <FileName>readme.txt</FileName> + <FileType>5</FileType> + <FilePath>..\readme.txt</FilePath> + </File> + </Files> + </Group> + </Groups> + </Target> + </Targets> + +</Project> diff --git a/bsp/gd32/gd32103c-eval/template.uvprojx b/bsp/gd32/gd32103c-eval/template.uvprojx new file mode 100644 index 0000000000..efc072e87e --- /dev/null +++ b/bsp/gd32/gd32103c-eval/template.uvprojx @@ -0,0 +1,418 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd"> + + <SchemaVersion>2.1</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Targets> + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <pCCUsed>5060750::V5.06 update 6 (build 750)::.\ARMCC</pCCUsed> + <uAC6>0</uAC6> + <TargetOption> + <TargetCommonOption> + <Device>GD32F103VC</Device> + <Vendor>GigaDevice</Vendor> + <PackID>GigaDevice.GD32F10x_DFP.2.0.1</PackID> + <PackURL>http://www.keil.com/pack/</PackURL> + <Cpu>IRAM(0x20000000,0x0000C000) IROM(0x08000000,0x00040000) CPUTYPE("Cortex-M3") CLOCK(10800000) ELITTLE</Cpu> + <FlashUtilSpec></FlashUtilSpec> + <StartupFile></StartupFile> + <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0GD32F10x_CL -FS08000000 -FL040000 -FP0($$Device:GD32F103VC$Flash\GD32F10x_CL.FLM))</FlashDriverDll> + <DeviceId>0</DeviceId> + <RegisterFile>$$Device:GD32F103VC$Device\Include\gd32f10x.h</RegisterFile> + <MemoryEnv></MemoryEnv> + <Cmp></Cmp> + <Asm></Asm> + <Linker></Linker> + <OHString></OHString> + <InfinionOptionDll></InfinionOptionDll> + <SLE66CMisc></SLE66CMisc> + <SLE66AMisc></SLE66AMisc> + <SLE66LinkerMisc></SLE66LinkerMisc> + <SFDFile>$$Device:GD32F103VC$SVD\GD32F10x\GD32F10x_CL.svd</SFDFile> + <bCustSvd>0</bCustSvd> + <UseEnv>0</UseEnv> + <BinPath></BinPath> + <IncludePath></IncludePath> + <LibPath></LibPath> + <RegisterFilePath></RegisterFilePath> + <DBRegisterFilePath></DBRegisterFilePath> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + </TargetStatus> + <OutputDirectory>.\build\</OutputDirectory> + <OutputName>rtthread</OutputName> + <CreateExecutable>1</CreateExecutable> + <CreateLib>0</CreateLib> + <CreateHexFile>0</CreateHexFile> + <DebugInformation>1</DebugInformation> + <BrowseInformation>0</BrowseInformation> + <ListingPath>.\build\</ListingPath> + <HexFormatSelection>1</HexFormatSelection> + <Merge32K>0</Merge32K> + <CreateBatchFile>0</CreateBatchFile> + <BeforeCompile> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopU1X>0</nStopU1X> + <nStopU2X>0</nStopU2X> + </BeforeCompile> + <BeforeMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopB1X>0</nStopB1X> + <nStopB2X>0</nStopB2X> + </BeforeMake> + <AfterMake> + <RunUserProg1>1</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopA1X>0</nStopA1X> + <nStopA2X>0</nStopA2X> + </AfterMake> + <SelectedForBatchBuild>0</SelectedForBatchBuild> + <SVCSIdString></SVCSIdString> + </TargetCommonOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>1</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>0</GenerateAssemblyFile> + <AssembleAssemblyFile>0</AssembleAssemblyFile> + <PublicsOnly>0</PublicsOnly> + <StopOnExitCode>3</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + <ComprImg>1</ComprImg> + </CommonProperty> + <DllOption> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments> -REMAP</SimDllArguments> + <SimDlgDll>DCM.DLL</SimDlgDll> + <SimDlgDllArguments>-pCM3</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDll>TCM.DLL</TargetDlgDll> + <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments> + </DllOption> + <DebugOption> + <OPTHX> + <HexSelection>1</HexSelection> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + <Oh166RecLen>16</Oh166RecLen> + </OPTHX> + </DebugOption> + <Utilities> + <Flash1> + <UseTargetDll>1</UseTargetDll> + <UseExternalTool>0</UseExternalTool> + <RunIndependent>0</RunIndependent> + <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> + <Capability>1</Capability> + <DriverSelection>4096</DriverSelection> + </Flash1> + <bUseTDR>1</bUseTDR> + <Flash2>BIN\UL2CM3.DLL</Flash2> + <Flash3></Flash3> + <Flash4></Flash4> + <pFcarmOut></pFcarmOut> + <pFcarmGrp></pFcarmGrp> + <pFcArmRoot></pFcArmRoot> + <FcArmLst>0</FcArmLst> + </Utilities> + <TargetArmAds> + <ArmAdsMisc> + <GenerateListings>0</GenerateListings> + <asHll>1</asHll> + <asAsm>1</asAsm> + <asMacX>1</asMacX> + <asSyms>1</asSyms> + <asFals>1</asFals> + <asDbgD>1</asDbgD> + <asForm>1</asForm> + <ldLst>0</ldLst> + <ldmm>1</ldmm> + <ldXref>1</ldXref> + <BigEnd>0</BigEnd> + <AdsALst>1</AdsALst> + <AdsACrf>1</AdsACrf> + <AdsANop>0</AdsANop> + <AdsANot>0</AdsANot> + <AdsLLst>1</AdsLLst> + <AdsLmap>1</AdsLmap> + <AdsLcgr>1</AdsLcgr> + <AdsLsym>1</AdsLsym> + <AdsLszi>1</AdsLszi> + <AdsLtoi>1</AdsLtoi> + <AdsLsun>1</AdsLsun> + <AdsLven>1</AdsLven> + <AdsLsxf>1</AdsLsxf> + <RvctClst>0</RvctClst> + <GenPPlst>0</GenPPlst> + <AdsCpuType>"Cortex-M3"</AdsCpuType> + <RvctDeviceName></RvctDeviceName> + <mOS>0</mOS> + <uocRom>0</uocRom> + <uocRam>0</uocRam> + <hadIROM>1</hadIROM> + <hadIRAM>1</hadIRAM> + <hadXRAM>0</hadXRAM> + <uocXRam>0</uocXRam> + <RvdsVP>0</RvdsVP> + <RvdsMve>0</RvdsMve> + <RvdsCdeCp>0</RvdsCdeCp> + <hadIRAM2>0</hadIRAM2> + <hadIROM2>0</hadIROM2> + <StupSel>8</StupSel> + <useUlib>0</useUlib> + <EndSel>0</EndSel> + <uLtcg>0</uLtcg> + <nSecure>0</nSecure> + <RoSelD>3</RoSelD> + <RwSelD>3</RwSelD> + <CodeSel>0</CodeSel> + <OptFeed>0</OptFeed> + <NoZi1>0</NoZi1> + <NoZi2>0</NoZi2> + <NoZi3>0</NoZi3> + <NoZi4>0</NoZi4> + <NoZi5>0</NoZi5> + <Ro1Chk>0</Ro1Chk> + <Ro2Chk>0</Ro2Chk> + <Ro3Chk>0</Ro3Chk> + <Ir1Chk>1</Ir1Chk> + <Ir2Chk>0</Ir2Chk> + <Ra1Chk>0</Ra1Chk> + <Ra2Chk>0</Ra2Chk> + <Ra3Chk>0</Ra3Chk> + <Im1Chk>1</Im1Chk> + <Im2Chk>0</Im2Chk> + <OnChipMemories> + <Ocm1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocm4> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0xc000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x40000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x40000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x18000</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector></RvctStartVector> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>4</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>0</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>0</wLevel> + <uThumb>0</uThumb> + <uSurpInc>0</uSurpInc> + <uC99>1</uC99> + <uGnu>0</uGnu> + <useXO>0</useXO> + <v6Lang>1</v6Lang> + <v6LangP>1</v6LangP> + <vShortEn>1</vShortEn> + <vShortWch>1</vShortWch> + <v6Lto>0</v6Lto> + <v6WtE>0</v6WtE> + <v6Rtti>0</v6Rtti> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <uSurpInc>0</uSurpInc> + <useXO>0</useXO> + <ClangAsOpt>4</ClangAsOpt> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + <LDads> + <umfTarg>1</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x08000000</TextAddressRange> + <DataAddressRange>0x20000000</DataAddressRange> + <pXoBase></pXoBase> + <ScatterFile>.\gd32_rom.ld</ScatterFile> + <IncludeLibs></IncludeLibs> + <IncludeLibsPath></IncludeLibsPath> + <Misc></Misc> + <LinkerInputFile></LinkerInputFile> + <DisabledWarnings></DisabledWarnings> + </LDads> + </TargetArmAds> + </TargetOption> + <Groups> + <Group> + <GroupName>::CMSIS</GroupName> + </Group> + </Groups> + </Target> + </Targets> + + <RTE> + <apis/> + <components> + <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.4.0" condition="ARMv6_7_8-M Device"> + <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/> + <targetInfos> + <targetInfo name="rt-thread"/> + </targetInfos> + </component> + </components> + <files/> + </RTE> + + <LayerInfo> + <Layers> + <Layer> + <LayName><Project Info></LayName> + <LayDesc></LayDesc> + <LayUrl></LayUrl> + <LayKeys></LayKeys> + <LayCat></LayCat> + <LayLic></LayLic> + <LayTarg>0</LayTarg> + <LayPrjMark>1</LayPrjMark> + </Layer> + </Layers> + </LayerInfo> + +</Project> diff --git a/bsp/gd32/gd32105c-eval/.config b/bsp/gd32/gd32105c-eval/.config new file mode 100644 index 0000000000..84090ac74e --- /dev/null +++ b/bsp/gd32/gd32105c-eval/.config @@ -0,0 +1,636 @@ +# +# Automatically generated file; DO NOT EDIT. +# RT-Thread Configuration +# + +# +# RT-Thread Kernel +# +CONFIG_RT_NAME_MAX=8 +# CONFIG_RT_USING_BIG_ENDIAN is not set +# CONFIG_RT_USING_ARCH_DATA_TYPE is not set +# CONFIG_RT_USING_SMP is not set +CONFIG_RT_ALIGN_SIZE=4 +# CONFIG_RT_THREAD_PRIORITY_8 is not set +CONFIG_RT_THREAD_PRIORITY_32=y +# CONFIG_RT_THREAD_PRIORITY_256 is not set +CONFIG_RT_THREAD_PRIORITY_MAX=32 +CONFIG_RT_TICK_PER_SECOND=100 +CONFIG_RT_USING_OVERFLOW_CHECK=y +CONFIG_RT_USING_HOOK=y +CONFIG_RT_USING_IDLE_HOOK=y +CONFIG_RT_IDLE_HOOK_LIST_SIZE=4 +CONFIG_IDLE_THREAD_STACK_SIZE=256 +# CONFIG_RT_USING_TIMER_SOFT is not set + +# +# kservice optimization +# +# CONFIG_RT_KSERVICE_USING_STDLIB is not set +# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set +# CONFIG_RT_USING_ASM_MEMCPY is not set +CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y +# CONFIG_RT_DEBUG_INIT_CONFIG is not set +# CONFIG_RT_DEBUG_THREAD_CONFIG is not set +# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set +# CONFIG_RT_DEBUG_IPC_CONFIG is not set +# CONFIG_RT_DEBUG_TIMER_CONFIG is not set +# CONFIG_RT_DEBUG_IRQ_CONFIG is not set +# CONFIG_RT_DEBUG_MEM_CONFIG is not set +# CONFIG_RT_DEBUG_SLAB_CONFIG is not set +# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set +# CONFIG_RT_DEBUG_MODULE_CONFIG is not set + +# +# Inter-Thread communication +# +CONFIG_RT_USING_SEMAPHORE=y +CONFIG_RT_USING_MUTEX=y +CONFIG_RT_USING_EVENT=y +CONFIG_RT_USING_MAILBOX=y +CONFIG_RT_USING_MESSAGEQUEUE=y +# CONFIG_RT_USING_SIGNALS is not set + +# +# Memory Management +# +CONFIG_RT_USING_MEMPOOL=y +# CONFIG_RT_USING_MEMHEAP is not set +# CONFIG_RT_USING_NOHEAP is not set +CONFIG_RT_USING_SMALL_MEM=y +# CONFIG_RT_USING_SLAB is not set +# CONFIG_RT_USING_USERHEAP is not set +# CONFIG_RT_USING_MEMTRACE is not set +CONFIG_RT_USING_HEAP=y + +# +# Kernel Device Object +# +CONFIG_RT_USING_DEVICE=y +# CONFIG_RT_USING_DEVICE_OPS is not set +# CONFIG_RT_USING_INTERRUPT_INFO is not set +CONFIG_RT_USING_CONSOLE=y +CONFIG_RT_CONSOLEBUF_SIZE=128 +CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" +# CONFIG_RT_PRINTF_LONGLONG is not set +CONFIG_RT_VER_NUM=0x40004 +# CONFIG_RT_USING_CPU_FFS is not set +# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set + +# +# RT-Thread Components +# +CONFIG_RT_USING_COMPONENTS_INIT=y +CONFIG_RT_USING_USER_MAIN=y +CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048 +CONFIG_RT_MAIN_THREAD_PRIORITY=10 + +# +# C++ features +# +# CONFIG_RT_USING_CPLUSPLUS is not set + +# +# Command shell +# +CONFIG_RT_USING_FINSH=y +CONFIG_RT_USING_MSH=y +CONFIG_FINSH_USING_MSH=y +CONFIG_FINSH_THREAD_NAME="tshell" +CONFIG_FINSH_THREAD_PRIORITY=20 +CONFIG_FINSH_THREAD_STACK_SIZE=4096 +CONFIG_FINSH_USING_HISTORY=y +CONFIG_FINSH_HISTORY_LINES=5 +CONFIG_FINSH_USING_SYMTAB=y +CONFIG_FINSH_CMD_SIZE=80 +CONFIG_MSH_USING_BUILT_IN_COMMANDS=y +CONFIG_FINSH_USING_DESCRIPTION=y +# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set +# CONFIG_FINSH_USING_AUTH is not set +CONFIG_FINSH_ARG_MAX=10 + +# +# Device virtual file system +# +# CONFIG_RT_USING_DFS is not set + +# +# Device Drivers +# +CONFIG_RT_USING_DEVICE_IPC=y +CONFIG_RT_PIPE_BUFSZ=512 +CONFIG_RT_USING_SYSTEM_WORKQUEUE=y +CONFIG_RT_SYSTEM_WORKQUEUE_STACKSIZE=2048 +CONFIG_RT_SYSTEM_WORKQUEUE_PRIORITY=23 +CONFIG_RT_USING_SERIAL=y +CONFIG_RT_USING_SERIAL_V1=y +# CONFIG_RT_USING_SERIAL_V2 is not set +CONFIG_RT_SERIAL_USING_DMA=y +CONFIG_RT_SERIAL_RB_BUFSZ=64 +# CONFIG_RT_USING_CAN is not set +# CONFIG_RT_USING_HWTIMER is not set +# CONFIG_RT_USING_CPUTIME is not set +# CONFIG_RT_USING_I2C is not set +# CONFIG_RT_USING_PHY is not set +CONFIG_RT_USING_PIN=y +# CONFIG_RT_USING_ADC is not set +# CONFIG_RT_USING_DAC is not set +# CONFIG_RT_USING_PWM is not set +# CONFIG_RT_USING_MTD_NOR is not set +# CONFIG_RT_USING_MTD_NAND is not set +# CONFIG_RT_USING_PM is not set +# CONFIG_RT_USING_RTC is not set +# CONFIG_RT_USING_SDIO is not set +# CONFIG_RT_USING_SPI is not set +# CONFIG_RT_USING_WDT is not set +# CONFIG_RT_USING_AUDIO is not set +# CONFIG_RT_USING_SENSOR is not set +# CONFIG_RT_USING_TOUCH is not set +# CONFIG_RT_USING_HWCRYPTO is not set +# CONFIG_RT_USING_PULSE_ENCODER is not set +# CONFIG_RT_USING_INPUT_CAPTURE is not set +# CONFIG_RT_USING_WIFI is not set + +# +# Using USB +# +# CONFIG_RT_USING_USB is not set +# CONFIG_RT_USING_USB_HOST is not set +# CONFIG_RT_USING_USB_DEVICE is not set + +# +# POSIX layer and C standard library +# +# CONFIG_RT_USING_LIBC is not set +CONFIG_RT_LIBC_USING_TIME=y +CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 +# CONFIG_RT_USING_PTHREADS is not set + +# +# Network +# + +# +# Socket abstraction layer +# +# CONFIG_RT_USING_SAL is not set + +# +# Network interface device +# +# CONFIG_RT_USING_NETDEV is not set + +# +# light weight TCP/IP stack +# +# CONFIG_RT_USING_LWIP is not set + +# +# AT commands +# +# CONFIG_RT_USING_AT is not set + +# +# VBUS(Virtual Software BUS) +# +# CONFIG_RT_USING_VBUS is not set + +# +# Utilities +# +# CONFIG_RT_USING_RYM is not set +# CONFIG_RT_USING_ULOG is not set +# CONFIG_RT_USING_UTEST is not set +# CONFIG_RT_USING_VAR_EXPORT is not set +# CONFIG_RT_USING_RT_LINK is not set + +# +# RT-Thread Utestcases +# +# CONFIG_RT_USING_UTESTCASES is not set + +# +# RT-Thread online packages +# + +# +# IoT - internet of things +# +# CONFIG_PKG_USING_LORAWAN_DRIVER is not set +# CONFIG_PKG_USING_PAHOMQTT is not set +# CONFIG_PKG_USING_UMQTT is not set +# CONFIG_PKG_USING_WEBCLIENT is not set +# CONFIG_PKG_USING_WEBNET is not set +# CONFIG_PKG_USING_MONGOOSE is not set +# CONFIG_PKG_USING_MYMQTT is not set +# CONFIG_PKG_USING_KAWAII_MQTT is not set +# CONFIG_PKG_USING_BC28_MQTT is not set +# CONFIG_PKG_USING_WEBTERMINAL is not set +# CONFIG_PKG_USING_CJSON is not set +# CONFIG_PKG_USING_JSMN is not set +# CONFIG_PKG_USING_LIBMODBUS is not set +# CONFIG_PKG_USING_FREEMODBUS is not set +# CONFIG_PKG_USING_LJSON is not set +# CONFIG_PKG_USING_EZXML is not set +# CONFIG_PKG_USING_NANOPB is not set + +# +# Wi-Fi +# + +# +# Marvell WiFi +# +# CONFIG_PKG_USING_WLANMARVELL is not set + +# +# Wiced WiFi +# +# CONFIG_PKG_USING_WLAN_WICED is not set +# CONFIG_PKG_USING_RW007 is not set +# CONFIG_PKG_USING_COAP is not set +# CONFIG_PKG_USING_NOPOLL is not set +# CONFIG_PKG_USING_NETUTILS is not set +# CONFIG_PKG_USING_CMUX is not set +# CONFIG_PKG_USING_PPP_DEVICE is not set +# CONFIG_PKG_USING_AT_DEVICE is not set +# CONFIG_PKG_USING_ATSRV_SOCKET is not set +# CONFIG_PKG_USING_WIZNET is not set +# CONFIG_PKG_USING_ZB_COORDINATOR is not set + +# +# IoT Cloud +# +# CONFIG_PKG_USING_ONENET is not set +# CONFIG_PKG_USING_GAGENT_CLOUD is not set +# CONFIG_PKG_USING_ALI_IOTKIT is not set +# CONFIG_PKG_USING_AZURE is not set +# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set +# CONFIG_PKG_USING_JIOT-C-SDK is not set +# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set +# CONFIG_PKG_USING_JOYLINK is not set +# CONFIG_PKG_USING_NIMBLE is not set +# CONFIG_PKG_USING_OTA_DOWNLOADER is not set +# CONFIG_PKG_USING_IPMSG is not set +# CONFIG_PKG_USING_LSSDP is not set +# CONFIG_PKG_USING_AIRKISS_OPEN is not set +# CONFIG_PKG_USING_LIBRWS is not set +# CONFIG_PKG_USING_TCPSERVER is not set +# CONFIG_PKG_USING_PROTOBUF_C is not set +# CONFIG_PKG_USING_DLT645 is not set +# CONFIG_PKG_USING_QXWZ is not set +# CONFIG_PKG_USING_SMTP_CLIENT is not set +# CONFIG_PKG_USING_ABUP_FOTA is not set +# CONFIG_PKG_USING_LIBCURL2RTT is not set +# CONFIG_PKG_USING_CAPNP is not set +# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set +# CONFIG_PKG_USING_AGILE_TELNET is not set +# CONFIG_PKG_USING_NMEALIB is not set +# CONFIG_PKG_USING_AGILE_JSMN is not set +# CONFIG_PKG_USING_PDULIB is not set +# CONFIG_PKG_USING_BTSTACK is not set +# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set +# CONFIG_PKG_USING_WAYZ_IOTKIT is not set +# CONFIG_PKG_USING_MAVLINK is not set +# CONFIG_PKG_USING_RAPIDJSON is not set +# CONFIG_PKG_USING_BSAL is not set +# CONFIG_PKG_USING_AGILE_MODBUS is not set +# CONFIG_PKG_USING_AGILE_FTP is not set +# CONFIG_PKG_USING_EMBEDDEDPROTO is not set +# CONFIG_PKG_USING_RT_LINK_HW is not set +# CONFIG_PKG_USING_LORA_PKT_FWD is not set +# CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set +# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set +# CONFIG_PKG_USING_HM is not set +# CONFIG_PKG_USING_SMALL_MODBUS is not set + +# +# security packages +# +# CONFIG_PKG_USING_MBEDTLS is not set +# CONFIG_PKG_USING_LIBSODIUM is not set +# CONFIG_PKG_USING_TINYCRYPT is not set +# CONFIG_PKG_USING_TFM is not set +# CONFIG_PKG_USING_YD_CRYPTO is not set + +# +# language packages +# +# CONFIG_PKG_USING_LUA is not set +# CONFIG_PKG_USING_JERRYSCRIPT is not set +# CONFIG_PKG_USING_MICROPYTHON is not set +# CONFIG_PKG_USING_PIKASCRIPT is not set + +# +# multimedia packages +# + +# +# LVGL: powerful and easy-to-use embedded GUI library +# +# CONFIG_PKG_USING_LVGL is not set +# CONFIG_PKG_USING_LITTLEVGL2RTT is not set +# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set + +# +# u8g2: a monochrome graphic library +# +# CONFIG_PKG_USING_U8G2_OFFICIAL is not set +# CONFIG_PKG_USING_U8G2 is not set +# CONFIG_PKG_USING_OPENMV is not set +# CONFIG_PKG_USING_MUPDF is not set +# CONFIG_PKG_USING_STEMWIN is not set +# CONFIG_PKG_USING_WAVPLAYER is not set +# CONFIG_PKG_USING_TJPGD is not set +# CONFIG_PKG_USING_PDFGEN is not set +# CONFIG_PKG_USING_HELIX is not set +# CONFIG_PKG_USING_AZUREGUIX is not set +# CONFIG_PKG_USING_TOUCHGFX2RTT is not set +# CONFIG_PKG_USING_NUEMWIN is not set +# CONFIG_PKG_USING_MP3PLAYER is not set +# CONFIG_PKG_USING_TINYJPEG is not set +# CONFIG_PKG_USING_UGUI is not set + +# +# PainterEngine: A cross-platform graphics application framework written in C language +# +# CONFIG_PKG_USING_PAINTERENGINE is not set +# CONFIG_PKG_USING_PAINTERENGINE_AUX is not set + +# +# tools packages +# +# CONFIG_PKG_USING_CMBACKTRACE is not set +# CONFIG_PKG_USING_EASYFLASH is not set +# CONFIG_PKG_USING_EASYLOGGER is not set +# CONFIG_PKG_USING_SYSTEMVIEW is not set +# CONFIG_PKG_USING_SEGGER_RTT is not set +# CONFIG_PKG_USING_RDB is not set +# CONFIG_PKG_USING_QRCODE is not set +# CONFIG_PKG_USING_ULOG_EASYFLASH is not set +# CONFIG_PKG_USING_ULOG_FILE is not set +# CONFIG_PKG_USING_LOGMGR is not set +# CONFIG_PKG_USING_ADBD is not set +# CONFIG_PKG_USING_COREMARK is not set +# CONFIG_PKG_USING_DHRYSTONE is not set +# CONFIG_PKG_USING_MEMORYPERF is not set +# CONFIG_PKG_USING_NR_MICRO_SHELL is not set +# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set +# CONFIG_PKG_USING_LUNAR_CALENDAR is not set +# CONFIG_PKG_USING_BS8116A is not set +# CONFIG_PKG_USING_GPS_RMC is not set +# CONFIG_PKG_USING_URLENCODE is not set +# CONFIG_PKG_USING_UMCN is not set +# CONFIG_PKG_USING_LWRB2RTT is not set +# CONFIG_PKG_USING_CPU_USAGE is not set +# CONFIG_PKG_USING_GBK2UTF8 is not set +# CONFIG_PKG_USING_VCONSOLE is not set +# CONFIG_PKG_USING_KDB is not set +# CONFIG_PKG_USING_WAMR is not set +# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set +# CONFIG_PKG_USING_LWLOG is not set +# CONFIG_PKG_USING_ANV_TRACE is not set +# CONFIG_PKG_USING_ANV_MEMLEAK is not set +# CONFIG_PKG_USING_ANV_TESTSUIT is not set +# CONFIG_PKG_USING_ANV_BENCH is not set +# CONFIG_PKG_USING_DEVMEM is not set +# CONFIG_PKG_USING_REGEX is not set +# CONFIG_PKG_USING_MEM_SANDBOX is not set +# CONFIG_PKG_USING_SOLAR_TERMS is not set +# CONFIG_PKG_USING_GAN_ZHI is not set +# CONFIG_PKG_USING_FDT is not set + +# +# system packages +# + +# +# enhanced kernel services +# +# CONFIG_PKG_USING_RT_MEMCPY_CM is not set +# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set +# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set + +# +# acceleration: Assembly language or algorithmic acceleration packages +# +# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set +# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set +# CONFIG_PKG_USING_QFPLIB_M3 is not set + +# +# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard +# +# CONFIG_PKG_USING_CMSIS_5 is not set +# CONFIG_PKG_USING_CMSIS_RTOS2 is not set + +# +# Micrium: Micrium software products porting for RT-Thread +# +# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set +# CONFIG_PKG_USING_UCOSII_WRAPPER is not set +# CONFIG_PKG_USING_UC_CRC is not set +# CONFIG_PKG_USING_UC_CLK is not set +# CONFIG_PKG_USING_UC_COMMON is not set +# CONFIG_PKG_USING_UC_MODBUS is not set +# CONFIG_RT_USING_ARDUINO is not set +# CONFIG_PKG_USING_GUIENGINE is not set +# CONFIG_PKG_USING_CAIRO is not set +# CONFIG_PKG_USING_PIXMAN is not set +# CONFIG_PKG_USING_PARTITION is not set +# CONFIG_PKG_USING_FAL is not set +# CONFIG_PKG_USING_FLASHDB is not set +# CONFIG_PKG_USING_SQLITE is not set +# CONFIG_PKG_USING_RTI is not set +# CONFIG_PKG_USING_DFS_YAFFS is not set +# CONFIG_PKG_USING_LITTLEFS is not set +# CONFIG_PKG_USING_DFS_JFFS2 is not set +# CONFIG_PKG_USING_DFS_UFFS is not set +# CONFIG_PKG_USING_LWEXT4 is not set +# CONFIG_PKG_USING_THREAD_POOL is not set +# CONFIG_PKG_USING_ROBOTS is not set +# CONFIG_PKG_USING_EV is not set +# CONFIG_PKG_USING_SYSWATCH is not set +# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set +# CONFIG_PKG_USING_PLCCORE is not set +# CONFIG_PKG_USING_RAMDISK is not set +# CONFIG_PKG_USING_MININI is not set +# CONFIG_PKG_USING_QBOOT is not set +# CONFIG_PKG_USING_PPOOL is not set +# CONFIG_PKG_USING_OPENAMP is not set +# CONFIG_PKG_USING_LPM is not set +# CONFIG_PKG_USING_TLSF is not set +# CONFIG_PKG_USING_EVENT_RECORDER is not set +# CONFIG_PKG_USING_ARM_2D is not set +# CONFIG_PKG_USING_WCWIDTH is not set +# CONFIG_PKG_USING_MCUBOOT is not set +# CONFIG_PKG_USING_TINYUSB is not set +# CONFIG_PKG_USING_USB_STACK is not set + +# +# peripheral libraries and drivers +# +# CONFIG_PKG_USING_SENSORS_DRIVERS is not set +# CONFIG_PKG_USING_REALTEK_AMEBA is not set +# CONFIG_PKG_USING_SHT2X is not set +# CONFIG_PKG_USING_SHT3X is not set +# CONFIG_PKG_USING_AS7341 is not set +# CONFIG_PKG_USING_STM32_SDIO is not set +# CONFIG_PKG_USING_ICM20608 is not set +# CONFIG_PKG_USING_BUTTON is not set +# CONFIG_PKG_USING_PCF8574 is not set +# CONFIG_PKG_USING_SX12XX is not set +# CONFIG_PKG_USING_SIGNAL_LED is not set +# CONFIG_PKG_USING_LEDBLINK is not set +# CONFIG_PKG_USING_LITTLED is not set +# CONFIG_PKG_USING_LKDGUI is not set +# CONFIG_PKG_USING_NRF5X_SDK is not set +# CONFIG_PKG_USING_NRFX is not set +# CONFIG_PKG_USING_WM_LIBRARIES is not set +# CONFIG_PKG_USING_KENDRYTE_SDK is not set +# CONFIG_PKG_USING_INFRARED is not set +# CONFIG_PKG_USING_AGILE_BUTTON is not set +# CONFIG_PKG_USING_AGILE_LED is not set +# CONFIG_PKG_USING_AT24CXX is not set +# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set +# CONFIG_PKG_USING_AD7746 is not set +# CONFIG_PKG_USING_PCA9685 is not set +# CONFIG_PKG_USING_I2C_TOOLS is not set +# CONFIG_PKG_USING_NRF24L01 is not set +# CONFIG_PKG_USING_TOUCH_DRIVERS is not set +# CONFIG_PKG_USING_MAX17048 is not set +# CONFIG_PKG_USING_RPLIDAR is not set +# CONFIG_PKG_USING_AS608 is not set +# CONFIG_PKG_USING_RC522 is not set +# CONFIG_PKG_USING_WS2812B is not set +# CONFIG_PKG_USING_EMBARC_BSP is not set +# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set +# CONFIG_PKG_USING_MULTI_RTIMER is not set +# CONFIG_PKG_USING_MAX7219 is not set +# CONFIG_PKG_USING_BEEP is not set +# CONFIG_PKG_USING_EASYBLINK is not set +# CONFIG_PKG_USING_PMS_SERIES is not set +# CONFIG_PKG_USING_CAN_YMODEM is not set +# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set +# CONFIG_PKG_USING_QLED is not set +# CONFIG_PKG_USING_PAJ7620 is not set +# CONFIG_PKG_USING_AGILE_CONSOLE is not set +# CONFIG_PKG_USING_LD3320 is not set +# CONFIG_PKG_USING_WK2124 is not set +# CONFIG_PKG_USING_LY68L6400 is not set +# CONFIG_PKG_USING_DM9051 is not set +# CONFIG_PKG_USING_SSD1306 is not set +# CONFIG_PKG_USING_QKEY is not set +# CONFIG_PKG_USING_RS485 is not set +# CONFIG_PKG_USING_NES is not set +# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set +# CONFIG_PKG_USING_VDEVICE is not set +# CONFIG_PKG_USING_SGM706 is not set +# CONFIG_PKG_USING_STM32WB55_SDK is not set +# CONFIG_PKG_USING_RDA58XX is not set +# CONFIG_PKG_USING_LIBNFC is not set +# CONFIG_PKG_USING_MFOC is not set +# CONFIG_PKG_USING_TMC51XX is not set +# CONFIG_PKG_USING_TCA9534 is not set +# CONFIG_PKG_USING_KOBUKI is not set +# CONFIG_PKG_USING_ROSSERIAL is not set +# CONFIG_PKG_USING_MICRO_ROS is not set +# CONFIG_PKG_USING_MCP23008 is not set +# CONFIG_PKG_USING_BLUETRUM_SDK is not set +# CONFIG_PKG_USING_MISAKA_AT24CXX is not set +# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set +# CONFIG_PKG_USING_BL_MCU_SDK is not set +# CONFIG_PKG_USING_SOFT_SERIAL is not set +# CONFIG_PKG_USING_MB85RS16 is not set + +# +# AI packages +# +# CONFIG_PKG_USING_LIBANN is not set +# CONFIG_PKG_USING_NNOM is not set +# CONFIG_PKG_USING_ONNX_BACKEND is not set +# CONFIG_PKG_USING_ONNX_PARSER is not set +# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set +# CONFIG_PKG_USING_ELAPACK is not set +# CONFIG_PKG_USING_ULAPACK is not set +# CONFIG_PKG_USING_QUEST is not set +# CONFIG_PKG_USING_NAXOS is not set + +# +# miscellaneous packages +# + +# +# samples: kernel and components samples +# +# CONFIG_PKG_USING_KERNEL_SAMPLES is not set +# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set +# CONFIG_PKG_USING_NETWORK_SAMPLES is not set +# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set + +# +# entertainment: terminal games and other interesting software packages +# +# CONFIG_PKG_USING_CMATRIX is not set +# CONFIG_PKG_USING_SL is not set +# CONFIG_PKG_USING_CAL is not set +# CONFIG_PKG_USING_ACLOCK is not set +# CONFIG_PKG_USING_THREES is not set +# CONFIG_PKG_USING_2048 is not set +# CONFIG_PKG_USING_SNAKE is not set +# CONFIG_PKG_USING_TETRIS is not set +# CONFIG_PKG_USING_DONUT is not set +# CONFIG_PKG_USING_LIBCSV is not set +# CONFIG_PKG_USING_OPTPARSE is not set +# CONFIG_PKG_USING_FASTLZ is not set +# CONFIG_PKG_USING_MINILZO is not set +# CONFIG_PKG_USING_QUICKLZ is not set +# CONFIG_PKG_USING_LZMA is not set +# CONFIG_PKG_USING_MULTIBUTTON is not set +# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set +# CONFIG_PKG_USING_CANFESTIVAL is not set +# CONFIG_PKG_USING_ZLIB is not set +# CONFIG_PKG_USING_MINIZIP is not set +# CONFIG_PKG_USING_DSTR is not set +# CONFIG_PKG_USING_TINYFRAME is not set +# CONFIG_PKG_USING_KENDRYTE_DEMO is not set +# CONFIG_PKG_USING_DIGITALCTRL is not set +# CONFIG_PKG_USING_UPACKER is not set +# CONFIG_PKG_USING_UPARAM is not set +# CONFIG_PKG_USING_HELLO is not set +# CONFIG_PKG_USING_VI is not set +# CONFIG_PKG_USING_KI is not set +# CONFIG_PKG_USING_ARMv7M_DWT is not set +# CONFIG_PKG_USING_VT100 is not set +# CONFIG_PKG_USING_UKAL is not set +# CONFIG_PKG_USING_CRCLIB is not set +# CONFIG_PKG_USING_LWGPS is not set +# CONFIG_PKG_USING_STATE_MACHINE is not set +# CONFIG_PKG_USING_MCURSES is not set +# CONFIG_PKG_USING_COWSAY is not set +# CONFIG_PKG_USING_TERMBOX is not set + +# +# Hardware Drivers Config +# +CONFIG_SOC_SERIES_GD32F10x=y +CONFIG_SOC_GD32105V=y + +# +# Onboard Peripheral Drivers +# + +# +# On-chip Peripheral Drivers +# +CONFIG_BSP_USING_GPIO=y +CONFIG_BSP_USING_UART=y +CONFIG_BSP_USING_UART1=y +# CONFIG_BSP_UART1_RX_USING_DMA is not set +# CONFIG_BSP_USING_SPI is not set +# CONFIG_BSP_USING_I2C1 is not set + +# +# Board extended module Drivers +# diff --git a/bsp/gd32/gd32105c-eval/Kconfig b/bsp/gd32/gd32105c-eval/Kconfig new file mode 100644 index 0000000000..8cbc7b71a8 --- /dev/null +++ b/bsp/gd32/gd32105c-eval/Kconfig @@ -0,0 +1,21 @@ +mainmenu "RT-Thread Configuration" + +config BSP_DIR + string + option env="BSP_ROOT" + default "." + +config RTT_DIR + string + option env="RTT_ROOT" + default "../../.." + +config PKGS_DIR + string + option env="PKGS_ROOT" + default "packages" + +source "$RTT_DIR/Kconfig" +source "$PKGS_DIR/Kconfig" +source "../libraries/Kconfig" +source "board/Kconfig" diff --git a/bsp/gd32/gd32105c-eval/README.md b/bsp/gd32/gd32105c-eval/README.md new file mode 100644 index 0000000000..623501ef26 --- /dev/null +++ b/bsp/gd32/gd32105c-eval/README.md @@ -0,0 +1,98 @@ +# GD32105C-EVAL开发板BSP说明 + +## 简介 + +GD3105C-EVAL是-兆易创新推出的一款GD32F10X系列的评估板，最高主频高达108M，该开发板具有丰富的板载资源，可以充分发挥 GD32105VCT6 的芯片性能。 + +开发板外观如下图所示： + + + +该开发板常用 **板载资源** 如下： + +- GD32105VCT6，主频 108MHz，256KB FLASH ，96KB RAM + +- 常用外设 + + - LED ：5个，LED1 (电源指示灯），LED2（PC0），LED3（PC2），LED4（PE0），LED5（PE1） + - 按键：3个，K1（用户按键，PA0），K2（用户按键，PC13），K3（用户按键，PB14） + +- 常用接口：USB 接口 + +- 调试接口：GD-LINK + +## 外设支持 + +本 BSP 目前对外设的支持情况如下： + +| **片上外设** | **支持情况** | **备注** | +|:--------- |:--------:|:------------------------------------- | +| GPIO | 支持 | PA0, PA1... PK15 ---> PIN: 0, 1...144 | +| UART | 支持 | UART0 - UART7 | +| I2C | 支持 | I2C1 | +| SPI | 支持 | SPI0 - SPI2 | +| SPI FLASH | 支持 | | +| **扩展模块** | **支持情况** | **备注** | +| 暂无 | 暂不支持 | 暂不支持 | + +## 使用说明 + +使用说明分为如下两个章节： + +- 快速上手 + + 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 + +- 进阶使用 + + 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 + +### 快速上手 + +本 BSP 为开发者提供 MDK5 工程，并且支持 GCC 开发环境，也可使用RT-Thread Studio开发。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 + +#### 硬件连接 + +使用数据线连接开发板到 PC，使用USB转TTL模块连接PA2(MCU TX)和PA3(MCU RX)，打开电源开关。 + +#### 编译下载 + +双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 + +> 工程默认配置使用 GD-Link 仿真器下载程序，在通过 GD-Link 连接开发板的基础上，点击下载按钮即可下载程序到开发板 + +#### 运行结果 + +下载程序成功之后，系统会自动运行，LED 闪烁。 + +连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息: + +```bash + \ | / +- RT - Thread Operating System + / | \ 4.0.4 build Dec 19 2021 10:00:27 + 2006 - 2021 Copyright by rt-thread team +msh > +``` + +### 进阶使用 + +此 BSP 默认只开启了 GPIO 和 串口1的功能，如果需使用高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下： + +1. 在 bsp 下打开 env 工具。 + +2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 + +3. 输入`pkgs --update`命令更新软件包。 + +4. 输入`scons --target=mdk4/mdk5` 命令重新生成工程。 + +## 注意事项 + +暂无 + +## 联系人信息 + +维护人: + +- [BruceOu](https://github.com/Ouxiaolong/), 邮箱：<[email protected]>
\ No newline at end of file diff --git a/bsp/gd32/gd32105c-eval/SConscript b/bsp/gd32/gd32105c-eval/SConscript new file mode 100644 index 0000000000..20f7689c53 --- /dev/null +++ b/bsp/gd32/gd32105c-eval/SConscript @@ -0,0 +1,15 @@ +# for module compiling +import os +Import('RTT_ROOT') +from building import * + +cwd = GetCurrentDir() +objs = [] +list = os.listdir(cwd) + +for d in list: + path = os.path.join(cwd, d) + if os.path.isfile(os.path.join(path, 'SConscript')): + objs = objs + SConscript(os.path.join(d, 'SConscript')) + +Return('objs') diff --git a/bsp/gd32/gd32105c-eval/SConstruct b/bsp/gd32/gd32105c-eval/SConstruct new file mode 100644 index 0000000000..49074397d0 --- /dev/null +++ b/bsp/gd32/gd32105c-eval/SConstruct @@ -0,0 +1,60 @@ +import os +import sys +import rtconfig + +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') +else: + RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..') + +sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')] +try: + from building import * +except: + print('Cannot found RT-Thread root directory, please check RTT_ROOT') + print(RTT_ROOT) + exit(-1) + +TARGET = 'rtthread.' + rtconfig.TARGET_EXT + +DefaultEnvironment(tools=[]) +env = Environment(tools = ['mingw'], + AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, + CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS, + AR = rtconfig.AR, ARFLAGS = '-rc', + CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS, + LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) +env.PrependENVPath('PATH', rtconfig.EXEC_PATH) + +if rtconfig.PLATFORM == 'iar': + env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES']) + env.Replace(ARFLAGS = ['']) + env.Replace(LINKCOM = env["LINKCOM"] + ' --map rtthread.map') + +Export('RTT_ROOT') +Export('rtconfig') + +SDK_ROOT = os.path.abspath('./') + +if os.path.exists(SDK_ROOT + '/libraries'): + libraries_path_prefix = SDK_ROOT + '/libraries' +else: + libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries' + +SDK_LIB = libraries_path_prefix +Export('SDK_LIB') + +# prepare building environment +objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False) + +gd32_library = 'GD32F10x_Firmware_Library' +rtconfig.BSP_LIBRARY_TYPE = gd32_library + +# include libraries +objs.extend(SConscript(os.path.join(libraries_path_prefix, gd32_library, 'SConscript'))) + +# include drivers +objs.extend(SConscript(os.path.join(libraries_path_prefix, 'gd32_drivers', 'SConscript'))) + +# make a building +DoBuilding(TARGET, objs) diff --git a/bsp/gd32/gd32105c-eval/applications/SConscript b/bsp/gd32/gd32105c-eval/applications/SConscript new file mode 100644 index 0000000000..01eb940dfb --- /dev/null +++ b/bsp/gd32/gd32105c-eval/applications/SConscript @@ -0,0 +1,11 @@ +Import('RTT_ROOT') +Import('rtconfig') +from building import * + +cwd = os.path.join(str(Dir('#')), 'applications') +src = Glob('*.c') +CPPPATH = [cwd, str(Dir('#'))] + +group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/gd32/gd32105c-eval/applications/main.c b/bsp/gd32/gd32105c-eval/applications/main.c new file mode 100644 index 0000000000..4a528128b4 --- /dev/null +++ b/bsp/gd32/gd32105c-eval/applications/main.c @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-08-20 BruceOu first implementation + */ + +#include <stdio.h> +#include <rtthread.h> +#include <rtdevice.h> +#include <board.h> + +/* defined the LED2 pin: PC6 */ +#define LED2_PIN GET_PIN(C, 6) + +int main(void) +{ + int count = 1; + + /* set LED2 pin mode to output */ + rt_pin_mode(LED2_PIN, PIN_MODE_OUTPUT); + + while (count++) + { + rt_pin_write(LED2_PIN, PIN_HIGH); + rt_thread_mdelay(500); + rt_pin_write(LED2_PIN, PIN_LOW); + rt_thread_mdelay(500); + } + + return RT_EOK; +} diff --git a/bsp/gd32/gd32105c-eval/board/Kconfig b/bsp/gd32/gd32105c-eval/board/Kconfig new file mode 100644 index 0000000000..72f7f9634a --- /dev/null +++ b/bsp/gd32/gd32105c-eval/board/Kconfig @@ -0,0 +1,85 @@ +menu "Hardware Drivers Config" + +config SOC_SERIES_GD32F10x + bool + default y + +config SOC_GD32105V + bool + select SOC_SERIES_GD32F10x + select RT_USING_COMPONENTS_INIT + select RT_USING_USER_MAIN + default y + +menu "Onboard Peripheral Drivers" + +endmenu + +menu "On-chip Peripheral Drivers" + + config BSP_USING_GPIO + bool "Enable GPIO" + select RT_USING_PIN + default y + + menuconfig BSP_USING_UART + bool "Enable UART" + default y + select RT_USING_SERIAL + if BSP_USING_UART + config BSP_USING_UART1 + bool "Enable UART1" + default y + + config BSP_UART1_RX_USING_DMA + bool "Enable UART1 RX DMA" + depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA + default n + endif + + menuconfig BSP_USING_SPI + bool "Enable SPI BUS" + default n + select RT_USING_SPI + if BSP_USING_SPI + config BSP_USING_SPI1 + bool "Enable SPI1 BUS" + default n + + config BSP_SPI1_TX_USING_DMA + bool "Enable SPI1 TX DMA" + depends on BSP_USING_SPI1 + default n + + config BSP_SPI1_RX_USING_DMA + bool "Enable SPI1 RX DMA" + depends on BSP_USING_SPI1 + select BSP_SPI1_TX_USING_DMA + default n + endif + + menuconfig BSP_USING_I2C1 + bool "Enable I2C1 BUS (software simulation)" + default n + select RT_USING_I2C + select RT_USING_I2C_BITOPS + select RT_USING_PIN + if BSP_USING_I2C1 + config BSP_I2C1_SCL_PIN + int "i2c1 scl pin number" + range 1 216 + default 24 + config BSP_I2C1_SDA_PIN + int "I2C1 sda pin number" + range 1 216 + default 25 + endif + source "../libraries/gd32_drivers/Kconfig" + +endmenu + +menu "Board extended module Drivers" + +endmenu + +endmenu diff --git a/bsp/gd32/gd32105c-eval/board/SConscript b/bsp/gd32/gd32105c-eval/board/SConscript new file mode 100644 index 0000000000..c1f4a6001b --- /dev/null +++ b/bsp/gd32/gd32105c-eval/board/SConscript @@ -0,0 +1,28 @@ +import os +import rtconfig +from building import * + +Import('SDK_LIB') + +cwd = GetCurrentDir() + +# add general drivers +src = Split(''' +board.c +''') + +path = [cwd] + +startup_path_prefix = SDK_LIB + +if rtconfig.CROSS_TOOL == 'gcc': + src += [startup_path_prefix + '/GD32F10x_Firmware_Library/CMSIS/GD/GD32F10x/Source/GCC/startup_gd32f10x_cl.s'] +elif rtconfig.CROSS_TOOL == 'keil': + src += [startup_path_prefix + '/GD32F10x_Firmware_Library/CMSIS/GD/GD32F10x/Source/ARM/startup_gd32f10x_cl.s'] +elif rtconfig.CROSS_TOOL == 'iar': + src += [startup_path_prefix + '/GD32F10x_Firmware_Library/CMSIS/GD/GD32F10x/Source/IAR/startup_gd32f10x_cl.s'] + +CPPDEFINES = ['GD32F10X_CL'] +group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES) + +Return('group') diff --git a/bsp/gd32/gd32105c-eval/board/board.c b/bsp/gd32/gd32105c-eval/board/board.c new file mode 100644 index 0000000000..c409645b37 --- /dev/null +++ b/bsp/gd32/gd32105c-eval/board/board.c @@ -0,0 +1,85 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-12-18 BruceOu first implementation + */ +#include <stdint.h> +#include <rthw.h> +#include <rtthread.h> +#include <board.h> + +/** + * @brief This function is executed in case of error occurrence. + * @param None + * @retval None + */ +void Error_Handler(void) +{ + /* USER CODE BEGIN Error_Handler */ + /* User can add his own implementation to report the HAL error return state */ + while (1) + { + } + /* USER CODE END Error_Handler */ +} + +/** System Clock Configuration +*/ +void SystemClock_Config(void) +{ + SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND); + NVIC_SetPriority(SysTick_IRQn, 0); +} + +/** + * This is the timer interrupt service routine. + * + */ +void SysTick_Handler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + rt_tick_increase(); + + /* leave interrupt */ + rt_interrupt_leave(); +} + +/** + * This function will initial GD32 board. + */ +void rt_hw_board_init() +{ + /* NVIC Configuration */ +#define NVIC_VTOR_MASK 0x3FFFFF80 +#ifdef VECT_TAB_RAM + /* Set the Vector Table base location at 0x10000000 */ + SCB->VTOR = (0x10000000 & NVIC_VTOR_MASK); +#else /* VECT_TAB_FLASH */ + /* Set the Vector Table base location at 0x08000000 */ + SCB->VTOR = (0x08000000 & NVIC_VTOR_MASK); +#endif + + SystemClock_Config(); + +#ifdef RT_USING_COMPONENTS_INIT + rt_components_board_init(); +#endif + +#ifdef RT_USING_CONSOLE + rt_console_set_device(RT_CONSOLE_DEVICE_NAME); +#endif + +#ifdef BSP_USING_SDRAM + rt_system_heap_init((void *)EXT_SDRAM_BEGIN, (void *)EXT_SDRAM_END); +#else + rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END); +#endif +} + +/*@}*/ diff --git a/bsp/gd32/gd32105c-eval/board/board.h b/bsp/gd32/gd32105c-eval/board/board.h new file mode 100644 index 0000000000..11fb4fa084 --- /dev/null +++ b/bsp/gd32/gd32105c-eval/board/board.h @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-12-18 BruceOu first implementation + */ +#ifndef __BOARD_H__ +#define __BOARD_H__ + +#include "gd32f10x.h" +#include "drv_usart.h" +#include "drv_gpio.h" + +#include "gd32f10x_exti.h" + +#define EXT_SDRAM_BEGIN (0xC0000000U) /* the begining address of external SDRAM */ +#define EXT_SDRAM_END (EXT_SDRAM_BEGIN + (32U * 1024 * 1024)) /* the end address of external SDRAM */ + +// <o> Internal SRAM memory size[Kbytes] <8-96> +// <i>Default: 96 +#ifdef __ICCARM__ +// Use *.icf ram symbal, to avoid hardcode. +extern char __ICFEDIT_region_RAM_end__; +#define GD32_SRAM_END &__ICFEDIT_region_RAM_end__ +#else +#define GD32_SRAM_SIZE 96 +#define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024) +#endif + +#ifdef __CC_ARM +extern int Image$$RW_IRAM1$$ZI$$Limit; +#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) +#elif __ICCARM__ +#pragma section="HEAP" +#define HEAP_BEGIN (__segment_end("HEAP")) +#else +extern int __bss_end; +#define HEAP_BEGIN (&__bss_end) +#endif + +#define HEAP_END GD32_SRAM_END + +#endif + diff --git a/bsp/gd32/gd32105c-eval/board/gd32f10x_libopt.h b/bsp/gd32/gd32105c-eval/board/gd32f10x_libopt.h new file mode 100644 index 0000000000..5292c8eca7 --- /dev/null +++ b/bsp/gd32/gd32105c-eval/board/gd32f10x_libopt.h @@ -0,0 +1,64 @@ +/*! + \file gd32f10x_libopt.h + \brief library optional for gd32f10x + + \version 2014-12-26, V1.0.0, demo for GD32F10x + \version 2017-06-30, V2.0.0, demo for GD32F10x + \version 2021-04-30, V2.1.0, demo for GD32F10x +*/ + +/* + Copyright (c) 2021, GigaDevice Semiconductor Inc. + + Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + 3. Neither the name of the copyright holder nor the names of its contributors + may be used to endorse or promote products derived from this software without + specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, +INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, +WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY +OF SUCH DAMAGE. +*/ + +#ifndef GD32F10X_LIBOPT_H +#define GD32F10X_LIBOPT_H + +#include "gd32f10x_fmc.h" +#include "gd32f10x_pmu.h" +#include "gd32f10x_bkp.h" +#include "gd32f10x_rcu.h" +#include "gd32f10x_exti.h" +#include "gd32f10x_gpio.h" +#include "gd32f10x_crc.h" +#include "gd32f10x_dma.h" +#include "gd32f10x_dbg.h" +#include "gd32f10x_adc.h" +#include "gd32f10x_dac.h" +#include "gd32f10x_fwdgt.h" +#include "gd32f10x_wwdgt.h" +#include "gd32f10x_rtc.h" +#include "gd32f10x_timer.h" +#include "gd32f10x_usart.h" +#include "gd32f10x_i2c.h" +#include "gd32f10x_spi.h" +#include "gd32f10x_sdio.h" +#include "gd32f10x_exmc.h" +#include "gd32f10x_can.h" +#include "gd32f10x_enet.h" +#include "gd32f10x_misc.h" + +#endif /* GD32F10X_LIBOPT_H */ diff --git a/bsp/gd32/gd32105c-eval/board/linker_scripts/link.icf b/bsp/gd32/gd32105c-eval/board/linker_scripts/link.icf new file mode 100644 index 0000000000..283881a728 --- /dev/null +++ b/bsp/gd32/gd32105c-eval/board/linker_scripts/link.icf @@ -0,0 +1,40 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x200;
+define symbol __ICFEDIT_size_heap__ = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+export symbol __ICFEDIT_region_RAM_end__;
+
+define symbol __region_RAM1_start__ = 0x10000000;
+define symbol __region_RAM1_end__ = 0x1000FFFF;
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+define region RAM1_region = mem:[from __region_RAM1_start__ to __region_RAM1_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+keep { section FSymTab };
+keep { section VSymTab };
+keep { section .rti_fn* };
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
+place in RAM1_region { section .sram };
\ No newline at end of file diff --git a/bsp/gd32/gd32105c-eval/board/linker_scripts/link.ld b/bsp/gd32/gd32105c-eval/board/linker_scripts/link.ld new file mode 100644 index 0000000000..8ba4a0e9f2 --- /dev/null +++ b/bsp/gd32/gd32105c-eval/board/linker_scripts/link.ld @@ -0,0 +1,142 @@ +/* + * linker script for GD32F30x with GNU ld + * BruceOu 2021-12-14 + */ + +/* Program Entry, set to mark it as "used" and avoid gc */ +MEMORY +{ + CODE (rx) : ORIGIN = 0x08000000, LENGTH = 256k /* 256KB flash */ + DATA (rw) : ORIGIN = 0x20000000, LENGTH = 96k /* 96KB sram */ +} +ENTRY(Reset_Handler) +_system_stack_size = 0x200; + +SECTIONS +{ + .text : + { + . = ALIGN(4); + _stext = .; + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + *(.text) /* remaining code */ + *(.text.*) /* remaining code */ + *(.rodata) /* read-only data (constants) */ + *(.rodata*) + *(.glue_7) + *(.glue_7t) + *(.gnu.linkonce.t*) + + /* section information for finsh shell */ + . = ALIGN(4); + __fsymtab_start = .; + KEEP(*(FSymTab)) + __fsymtab_end = .; + . = ALIGN(4); + __vsymtab_start = .; + KEEP(*(VSymTab)) + __vsymtab_end = .; + . = ALIGN(4); + + /* section information for initial. */ + . = ALIGN(4); + __rt_init_start = .; + KEEP(*(SORT(.rti_fn*))) + __rt_init_end = .; + . = ALIGN(4); + + . = ALIGN(4); + _etext = .; + } > CODE = 0 + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + + /* This is used by the startup in order to initialize the .data secion */ + _sidata = .; + } > CODE + __exidx_end = .; + + /* .data section which is used for initialized data */ + + .data : AT (_sidata) + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _sdata = . ; + + *(.data) + *(.data.*) + *(.gnu.linkonce.d*) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _edata = . ; + } >DATA + + .stack : + { + . = . + _system_stack_size; + . = ALIGN(4); + _estack = .; + } >DATA + + __bss_start = .; + .bss : + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; + + *(.bss) + *(.bss.*) + *(COMMON) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _ebss = . ; + + *(.bss.init) + } > DATA + __bss_end = .; + + _end = .; + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + * Symbols in the DWARF debugging sections are relative to the beginning + * of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff --git a/bsp/gd32/gd32105c-eval/board/linker_scripts/link.sct b/bsp/gd32/gd32105c-eval/board/linker_scripts/link.sct new file mode 100644 index 0000000000..0529ba2b9c --- /dev/null +++ b/bsp/gd32/gd32105c-eval/board/linker_scripts/link.sct @@ -0,0 +1,15 @@ +; *************************************************************
+; *** Scatter-Loading Description File generated by uVision ***
+; *************************************************************
+
+LR_IROM1 0x08000000 0x00040000 { ; load region size_region
+ ER_IROM1 0x08000000 0x00040000 { ; load address = execution address
+ *.o (RESET, +First)
+ *(InRoot$$Sections)
+ .ANY (+RO)
+ }
+ RW_IRAM1 0x20000000 0x00018000 { ; RW data
+ .ANY (+RW +ZI)
+ }
+}
+
diff --git a/bsp/gd32/gd32105c-eval/figures/board.jpg b/bsp/gd32/gd32105c-eval/figures/board.jpg Binary files differnew file mode 100644 index 0000000000..3cec090a59 --- /dev/null +++ b/bsp/gd32/gd32105c-eval/figures/board.jpg diff --git a/bsp/gd32/gd32105c-eval/project.uvoptx b/bsp/gd32/gd32105c-eval/project.uvoptx new file mode 100644 index 0000000000..d691bf54c0 --- /dev/null +++ b/bsp/gd32/gd32105c-eval/project.uvoptx @@ -0,0 +1,180 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd"> + + <SchemaVersion>1.0</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Extensions> + <cExt>*.c</cExt> + <aExt>*.s*; *.src; *.a*</aExt> + <oExt>*.obj; *.o</oExt> + <lExt>*.lib</lExt> + <tExt>*.txt; *.h; *.inc</tExt> + <pExt>*.plm</pExt> + <CppX>*.cpp</CppX> + <nMigrate>0</nMigrate> + </Extensions> + + <DaveTm> + <dwLowDateTime>0</dwLowDateTime> + <dwHighDateTime>0</dwHighDateTime> + </DaveTm> + + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>12000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>0</RunSim> + <RunTarget>1</RunTarget> + <RunAbUc>0</RunAbUc> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\build\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>1</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>1</IsCurrentTarget> + </OPTFL> + <CpuCode>255</CpuCode> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <tRtrace>1</tRtrace> + <sRSysVw>1</sRSysVw> + <tRSysVw>1</tRSysVw> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <bEvRecOn>1</bEvRecOn> + <bSchkAxf>0</bSchkAxf> + <bTchkAxf>0</bTchkAxf> + <nTsel>3</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>BIN\CMSIS_AGDI.dll</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0GD32F10x_CL -FL040000 -FS08000000 -FP0($$Device:GD32F105VC$Flash\GD32F10x_CL.FLM)</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint/> + <Tracepoint> + <THDelay>0</THDelay> + </Tracepoint> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>0</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>0</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + <bLintAuto>0</bLintAuto> + <bAutoGenD>0</bAutoGenD> + <LntExFlags>0</LntExFlags> + <pMisraName></pMisraName> + <pszMrule></pszMrule> + <pSingCmds></pSingCmds> + <pMultCmds></pMultCmds> + <pMisraNamep></pMisraNamep> + <pszMrulep></pszMrulep> + <pSingCmdsp></pSingCmdsp> + <pMultCmdsp></pMultCmdsp> + </TargetOption> + </Target> + + <Group> + <GroupName>::CMSIS</GroupName> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <cbSel>0</cbSel> + <RteFlg>1</RteFlg> + </Group> + +</ProjectOpt> diff --git a/bsp/gd32/gd32105c-eval/project.uvproj b/bsp/gd32/gd32105c-eval/project.uvproj new file mode 100644 index 0000000000..e93bac770b --- /dev/null +++ b/bsp/gd32/gd32105c-eval/project.uvproj @@ -0,0 +1,737 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd"> + <SchemaVersion>1.1</SchemaVersion> + <Header>### uVision Project, (C) Keil Software</Header> + <Targets> + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <uAC6>0</uAC6> + <TargetOption> + <TargetCommonOption> + <Device>GD32F105VC</Device> + <Vendor>GigaDevice</Vendor> + <Cpu>IRAM(0x20000000-0x20018000) IROM(0x08000000-0x08040000) CLOCK(10800000) CPUTYPE("Cortex-M3")</Cpu> + <FlashUtilSpec /> + <StartupFile>"Startup\GD\GD32F10x\startup_gd32f10x.s" ("GD32F10x Startup Code")</StartupFile> + <FlashDriverDll>UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0GD32F10x_3MB -FS08000000 -FL0100000)</FlashDriverDll> + <DeviceId>0</DeviceId> + <RegisterFile>gd32f10x0.h</RegisterFile> + <MemoryEnv /> + <Cmp /> + <Asm /> + <Linker /> + <OHString /> + <InfinionOptionDll /> + <SLE66CMisc /> + <SLE66AMisc /> + <SLE66LinkerMisc /> + <SFDFile>SFD\GD\GD32F10x\GD32F10x.SFR</SFDFile> + <bCustSvd>0</bCustSvd> + <UseEnv>0</UseEnv> + <BinPath /> + <IncludePath /> + <LibPath /> + <RegisterFilePath>GD\GD32F10x\</RegisterFilePath> + <DBRegisterFilePath>GD\GD32F10x\</DBRegisterFilePath> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + </TargetStatus> + <OutputDirectory>.\output\</OutputDirectory> + <OutputName>rtthread</OutputName> + <CreateExecutable>1</CreateExecutable> + <CreateLib>0</CreateLib> + <CreateHexFile>1</CreateHexFile> + <DebugInformation>1</DebugInformation> + <BrowseInformation>1</BrowseInformation> + <ListingPath>.\build\</ListingPath> + <HexFormatSelection>1</HexFormatSelection> + <Merge32K>0</Merge32K> + <CreateBatchFile>0</CreateBatchFile> + <BeforeCompile> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name /> + <UserProg2Name /> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopU1X>0</nStopU1X> + <nStopU2X>0</nStopU2X> + </BeforeCompile> + <BeforeMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name /> + <UserProg2Name /> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopB1X>0</nStopB1X> + <nStopB2X>0</nStopB2X> + </BeforeMake> + <AfterMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name /> + <UserProg2Name /> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopA1X>0</nStopA1X> + <nStopA2X>0</nStopA2X> + </AfterMake> + <SelectedForBatchBuild>0</SelectedForBatchBuild> + <SVCSIdString /> + </TargetCommonOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>1</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>0</GenerateAssemblyFile> + <AssembleAssemblyFile>0</AssembleAssemblyFile> + <PublicsOnly>0</PublicsOnly> + <StopOnExitCode>3</StopOnExitCode> + <CustomArgument /> + <IncludeLibraryModules /> + <ComprImg>1</ComprImg> + </CommonProperty> + <DllOption> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments> -REMAP</SimDllArguments> + <SimDlgDll>DCM.DLL</SimDlgDll> + <SimDlgDllArguments>-pCM3</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments /> + <TargetDlgDll>TCM.DLL</TargetDlgDll> + <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments> + </DllOption> + <DebugOption> + <OPTHX> + <HexSelection>1</HexSelection> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + <Oh166RecLen>16</Oh166RecLen> + </OPTHX> + <Simulator> + <UseSimulator>0</UseSimulator> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>1</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <LimitSpeedToRealTime>0</LimitSpeedToRealTime> + <RestoreSysVw>1</RestoreSysVw> + </Simulator> + <Target> + <UseTarget>1</UseTarget> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>0</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <RestoreTracepoints>0</RestoreTracepoints> + <RestoreSysVw>1</RestoreSysVw> + </Target> + <RunDebugAfterBuild>0</RunDebugAfterBuild> + <TargetSelection>3</TargetSelection> + <SimDlls> + <CpuDll /> + <CpuDllArguments /> + <PeripheralDll /> + <PeripheralDllArguments /> + <InitializationFile /> + </SimDlls> + <TargetDlls> + <CpuDll /> + <CpuDllArguments /> + <PeripheralDll /> + <PeripheralDllArguments /> + <InitializationFile /> + <Driver>BIN\CMSIS_AGDI.dll</Driver> + </TargetDlls> + </DebugOption> + <Utilities> + <Flash1> + <UseTargetDll>1</UseTargetDll> + <UseExternalTool>0</UseExternalTool> + <RunIndependent>0</RunIndependent> + <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> + <Capability>1</Capability> + <DriverSelection>4096</DriverSelection> + </Flash1> + <bUseTDR>1</bUseTDR> + <Flash2>BIN\UL2CM3.DLL</Flash2> + <Flash3>"" ()</Flash3> + <Flash4 /> + <pFcarmOut /> + <pFcarmGrp /> + <pFcArmRoot /> + <FcArmLst>0</FcArmLst> + </Utilities> + <TargetArmAds> + <ArmAdsMisc> + <GenerateListings>0</GenerateListings> + <asHll>1</asHll> + <asAsm>1</asAsm> + <asMacX>1</asMacX> + <asSyms>1</asSyms> + <asFals>1</asFals> + <asDbgD>1</asDbgD> + <asForm>1</asForm> + <ldLst>0</ldLst> + <ldmm>1</ldmm> + <ldXref>1</ldXref> + <BigEnd>0</BigEnd> + <AdsALst>1</AdsALst> + <AdsACrf>1</AdsACrf> + <AdsANop>0</AdsANop> + <AdsANot>0</AdsANot> + <AdsLLst>1</AdsLLst> + <AdsLmap>1</AdsLmap> + <AdsLcgr>1</AdsLcgr> + <AdsLsym>1</AdsLsym> + <AdsLszi>1</AdsLszi> + <AdsLtoi>1</AdsLtoi> + <AdsLsun>1</AdsLsun> + <AdsLven>1</AdsLven> + <AdsLsxf>1</AdsLsxf> + <RvctClst>0</RvctClst> + <GenPPlst>0</GenPPlst> + <AdsCpuType>"Cortex-M3"</AdsCpuType> + <RvctDeviceName /> + <mOS>0</mOS> + <uocRom>0</uocRom> + <uocRam>0</uocRam> + <hadIROM>1</hadIROM> + <hadIRAM>1</hadIRAM> + <hadXRAM>0</hadXRAM> + <uocXRam>0</uocXRam> + <RvdsVP>2</RvdsVP> + <hadIRAM2>1</hadIRAM2> + <hadIROM2>0</hadIROM2> + <StupSel>8</StupSel> + <useUlib>1</useUlib> + <EndSel>0</EndSel> + <uLtcg>0</uLtcg> + <nSecure>0</nSecure> + <RoSelD>3</RoSelD> + <RwSelD>3</RwSelD> + <CodeSel>0</CodeSel> + <OptFeed>0</OptFeed> + <NoZi1>0</NoZi1> + <NoZi2>0</NoZi2> + <NoZi3>0</NoZi3> + <NoZi4>0</NoZi4> + <NoZi5>0</NoZi5> + <Ro1Chk>0</Ro1Chk> + <Ro2Chk>0</Ro2Chk> + <Ro3Chk>0</Ro3Chk> + <Ir1Chk>1</Ir1Chk> + <Ir2Chk>0</Ir2Chk> + <Ra1Chk>0</Ra1Chk> + <Ra2Chk>0</Ra2Chk> + <Ra3Chk>0</Ra3Chk> + <Im1Chk>1</Im1Chk> + <Im2Chk>0</Im2Chk> + <OnChipMemories> + <Ocm1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocm4> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x10000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x100000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x100000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x10000</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + 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<FileName>gd32f10x_misc.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\GD32F10x_standard_peripheral\Source\gd32f10x_misc.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>system_gd32f10x.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\CMSIS\GD\GD32F10x\Source\system_gd32f10x.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>gd32f10x_rcu.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\GD32F10x_standard_peripheral\Source\gd32f10x_rcu.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>gd32f10x_usart.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\GD32F10x_standard_peripheral\Source\gd32f10x_usart.c</FilePath> + </File> + </Files> + </Group> + </Groups> + </Target> + </Targets> +</Project> diff --git a/bsp/gd32/gd32105c-eval/project.uvprojx b/bsp/gd32/gd32105c-eval/project.uvprojx new file mode 100644 index 0000000000..2600998e70 --- /dev/null +++ b/bsp/gd32/gd32105c-eval/project.uvprojx @@ -0,0 +1,727 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd"> + <SchemaVersion>2.1</SchemaVersion> + <Header>### uVision Project, (C) Keil Software</Header> + <Targets> + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <pCCUsed>5060750::V5.06 update 6 (build 750)::.\ARMCC</pCCUsed> + <uAC6>0</uAC6> + <TargetOption> + <TargetCommonOption> + <Device>GD32F105VC</Device> + <Vendor>GigaDevice</Vendor> + <PackID>GigaDevice.GD32F10x_DFP.2.0.1</PackID> + <PackURL>http://www.keil.com/pack/</PackURL> + <Cpu>IRAM(0x20000000,0x00018000) IROM(0x08000000,0x00040000) CPUTYPE("Cortex-M3") CLOCK(10800000) ELITTLE</Cpu> + <FlashUtilSpec /> + <StartupFile /> + <FlashDriverDll>UL2CM3(-S0 -C0 -P0 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<StartAddress>0x8000000</StartAddress> + <Size>0x40000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x40000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x18000</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector /> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>4</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>0</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>0</wLevel> + <uThumb>0</uThumb> + <uSurpInc>0</uSurpInc> + <uC99>1</uC99> + <uGnu>0</uGnu> + <useXO>0</useXO> + <v6Lang>1</v6Lang> + <v6LangP>1</v6LangP> + <vShortEn>1</vShortEn> + <vShortWch>1</vShortWch> + <v6Lto>0</v6Lto> + <v6WtE>0</v6WtE> + <v6Rtti>0</v6Rtti> + <VariousControls> + <MiscControls /> + <Define>GD32F10X_CL, USE_STDPERIPH_DRIVER, __RTTHREAD__, __CLK_TCK=RT_TICK_PER_SECOND</Define> + <Undefine /> + <IncludePath>applications;.;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m3;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;..\libraries\gd32_drivers;..\..\..\components\finsh;.;..\..\..\include;..\..\..\components\libc\compilers\common;..\..\..\components\libc\compilers\common\nogcc;..\libraries\GD32F10x_Firmware_Library\CMSIS\GD\GD32F10x\Include;..\libraries\GD32F10x_Firmware_Library\CMSIS;..\libraries\GD32F10x_Firmware_Library\GD32F10x_standard_peripheral\Include;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\ipc;..\..\..\examples\utest\testcases\kernel</IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <uSurpInc>0</uSurpInc> + <useXO>0</useXO> + <ClangAsOpt>4</ClangAsOpt> + <VariousControls> + <MiscControls /> + <Define /> + <Undefine /> + <IncludePath /> + </VariousControls> + </Aads> + <LDads> + <umfTarg>1</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x08000000</TextAddressRange> + <DataAddressRange>0x20000000</DataAddressRange> + <pXoBase /> + <ScatterFile>.\gd32_rom.ld</ScatterFile> + <IncludeLibs /> + <IncludeLibsPath /> + <Misc /> + <LinkerInputFile /> + <DisabledWarnings /> + </LDads> + </TargetArmAds> + </TargetOption> + <Groups> + <Group> + <GroupName>Applications</GroupName> + <Files> + <File> + <FileName>main.c</FileName> + <FileType>1</FileType> + <FilePath>applications\main.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>CPU</GroupName> + <Files> + <File> + <FileName>backtrace.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\libcpu\arm\common\backtrace.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>showmem.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\libcpu\arm\common\showmem.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>div0.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\libcpu\arm\common\div0.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>cpuport.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\libcpu\arm\cortex-m3\cpuport.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>context_rvds.S</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\libcpu\arm\cortex-m3\context_rvds.S</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>DeviceDrivers</GroupName> + <Files> + <File> + <FileName>pin.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\misc\pin.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>serial.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\serial\serial.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>pipe.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\pipe.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>ringbuffer.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\ringbuffer.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>waitqueue.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\waitqueue.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>dataqueue.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\dataqueue.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>ringblk_buf.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\ringblk_buf.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>completion.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\completion.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>workqueue.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\workqueue.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Drivers</GroupName> + <Files> + <File> + <FileName>board.c</FileName> + <FileType>1</FileType> + <FilePath>board\board.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>startup_gd32f10x_cl.s</FileName> + <FileType>2</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\CMSIS\GD\GD32F10x\Source\ARM\startup_gd32f10x_cl.s</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>drv_gpio.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\gd32_drivers\drv_gpio.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>drv_usart.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\gd32_drivers\drv_usart.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Finsh</GroupName> + <Files> + <File> + <FileName>shell.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\shell.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>msh.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\msh.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>cmd.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\cmd.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Kernel</GroupName> + <Files> + <File> + <FileName>scheduler.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\scheduler.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>mem.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\mem.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>ipc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\ipc.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>irq.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\irq.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>clock.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\clock.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>timer.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\timer.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>mempool.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\mempool.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>object.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\object.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>idle.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\idle.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>components.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\components.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>kservice.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\kservice.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>device.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\device.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>thread.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\thread.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>libc</GroupName> + <Files> + <File> + <FileName>time.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\libc\compilers\common\time.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Libraries</GroupName> + <Files> + <File> + <FileName>gd32f10x_exti.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\GD32F10x_standard_peripheral\Source\gd32f10x_exti.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>gd32f10x_gpio.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\GD32F10x_standard_peripheral\Source\gd32f10x_gpio.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>gd32f10x_misc.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\GD32F10x_standard_peripheral\Source\gd32f10x_misc.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>system_gd32f10x.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\CMSIS\GD\GD32F10x\Source\system_gd32f10x.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>gd32f10x_rcu.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\GD32F10x_standard_peripheral\Source\gd32f10x_rcu.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>gd32f10x_usart.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\GD32F10x_standard_peripheral\Source\gd32f10x_usart.c</FilePath> + </File> + </Files> + </Group> + </Groups> + </Target> + </Targets> + <RTE> + <apis /> + <components> + <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.4.0" condition="ARMv6_7_8-M Device"> + <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0" /> + <targetInfos> + <targetInfo name="rt-thread" /> + </targetInfos> + </component> + </components> + <files /> + </RTE> + <LayerInfo> + <Layers> + <Layer> + <LayName><Project Info></LayName> + <LayDesc /> + <LayUrl /> + <LayKeys /> + <LayCat /> + <LayLic /> + <LayTarg>0</LayTarg> + <LayPrjMark>1</LayPrjMark> + </Layer> + </Layers> + </LayerInfo> +</Project> diff --git a/bsp/gd32/gd32105c-eval/rtconfig.h b/bsp/gd32/gd32105c-eval/rtconfig.h new file mode 100644 index 0000000000..67fb740e3b --- /dev/null +++ b/bsp/gd32/gd32105c-eval/rtconfig.h @@ -0,0 +1,200 @@ +#ifndef RT_CONFIG_H__ +#define RT_CONFIG_H__ + +/* Automatically generated file; DO NOT EDIT. */ +/* RT-Thread Configuration */ + +/* RT-Thread Kernel */ + +#define RT_NAME_MAX 8 +#define RT_ALIGN_SIZE 4 +#define RT_THREAD_PRIORITY_32 +#define RT_THREAD_PRIORITY_MAX 32 +#define RT_TICK_PER_SECOND 100 +#define RT_USING_OVERFLOW_CHECK +#define RT_USING_HOOK +#define RT_USING_IDLE_HOOK +#define RT_IDLE_HOOK_LIST_SIZE 4 +#define IDLE_THREAD_STACK_SIZE 256 + +/* kservice optimization */ + +#define RT_DEBUG +#define RT_DEBUG_COLOR + +/* Inter-Thread communication */ + +#define RT_USING_SEMAPHORE +#define RT_USING_MUTEX +#define RT_USING_EVENT +#define RT_USING_MAILBOX +#define RT_USING_MESSAGEQUEUE + +/* Memory Management */ + +#define RT_USING_MEMPOOL +#define RT_USING_SMALL_MEM +#define RT_USING_HEAP + +/* Kernel Device Object */ + +#define RT_USING_DEVICE +#define RT_USING_CONSOLE +#define RT_CONSOLEBUF_SIZE 128 +#define RT_CONSOLE_DEVICE_NAME "uart1" +#define RT_VER_NUM 0x40004 + +/* RT-Thread Components */ + +#define RT_USING_COMPONENTS_INIT +#define RT_USING_USER_MAIN +#define RT_MAIN_THREAD_STACK_SIZE 2048 +#define RT_MAIN_THREAD_PRIORITY 10 + +/* C++ features */ + + +/* Command shell */ + +#define RT_USING_FINSH +#define RT_USING_MSH +#define FINSH_USING_MSH +#define FINSH_THREAD_NAME "tshell" +#define FINSH_THREAD_PRIORITY 20 +#define FINSH_THREAD_STACK_SIZE 4096 +#define FINSH_USING_HISTORY +#define FINSH_HISTORY_LINES 5 +#define FINSH_USING_SYMTAB +#define FINSH_CMD_SIZE 80 +#define MSH_USING_BUILT_IN_COMMANDS +#define FINSH_USING_DESCRIPTION +#define FINSH_ARG_MAX 10 + +/* Device virtual file system */ + + +/* Device Drivers */ + +#define RT_USING_DEVICE_IPC +#define RT_PIPE_BUFSZ 512 +#define RT_USING_SYSTEM_WORKQUEUE +#define RT_SYSTEM_WORKQUEUE_STACKSIZE 2048 +#define RT_SYSTEM_WORKQUEUE_PRIORITY 23 +#define RT_USING_SERIAL +#define RT_USING_SERIAL_V1 +#define RT_SERIAL_USING_DMA +#define RT_SERIAL_RB_BUFSZ 64 +#define RT_USING_PIN + +/* Using USB */ + + +/* POSIX layer and C standard library */ + +#define RT_LIBC_USING_TIME +#define RT_LIBC_DEFAULT_TIMEZONE 8 + +/* Network */ + +/* Socket abstraction layer */ + + +/* Network interface device */ + + +/* light weight TCP/IP stack */ + + +/* AT commands */ + + +/* VBUS(Virtual Software BUS) */ + + +/* Utilities */ + + +/* RT-Thread Utestcases */ + + +/* RT-Thread online packages */ + +/* IoT - internet of things */ + + +/* Wi-Fi */ + +/* Marvell WiFi */ + + +/* Wiced WiFi */ + + +/* IoT Cloud */ + + +/* security packages */ + + +/* language packages */ + + +/* multimedia packages */ + +/* LVGL: powerful and easy-to-use embedded GUI library */ + + +/* u8g2: a monochrome graphic library */ + + +/* PainterEngine: A cross-platform graphics application framework written in C language */ + + +/* tools packages */ + + +/* system packages */ + +/* enhanced kernel services */ + + +/* acceleration: Assembly language or algorithmic acceleration packages */ + + +/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */ + + +/* Micrium: Micrium software products porting for RT-Thread */ + + +/* peripheral libraries and drivers */ + + +/* AI packages */ + + +/* miscellaneous packages */ + +/* samples: kernel and components samples */ + + +/* entertainment: terminal games and other interesting software packages */ + + +/* Hardware Drivers Config */ + +#define SOC_SERIES_GD32F10x +#define SOC_GD32105V + +/* Onboard Peripheral Drivers */ + +/* On-chip Peripheral Drivers */ + +#define BSP_USING_GPIO +#define BSP_USING_UART +#define BSP_USING_UART1 + +/* Board extended module Drivers */ + + +#endif diff --git a/bsp/gd32/gd32105c-eval/rtconfig.py b/bsp/gd32/gd32105c-eval/rtconfig.py new file mode 100644 index 0000000000..4285e6b03c --- /dev/null +++ b/bsp/gd32/gd32105c-eval/rtconfig.py @@ -0,0 +1,150 @@ +import os + +# toolchains options +ARCH='arm' +CPU='cortex-m3' +CROSS_TOOL='keil' + +# bsp lib config +BSP_LIBRARY_TYPE = None + +if os.getenv('RTT_CC'): + CROSS_TOOL = os.getenv('RTT_CC') +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') + +# cross_tool provides the cross compiler +# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR +if CROSS_TOOL == 'gcc': + PLATFORM = 'gcc' + EXEC_PATH = r'C:\Users\XXYYZZ' +elif CROSS_TOOL == 'keil': + PLATFORM = 'armcc' + EXEC_PATH = r'C:/Keil_v5' +elif CROSS_TOOL == 'iar': + PLATFORM = 'iar' + EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0' + +if os.getenv('RTT_EXEC_PATH'): + EXEC_PATH = os.getenv('RTT_EXEC_PATH') + +BUILD = 'debug' + +if PLATFORM == 'gcc': + # toolchains + PREFIX = 'arm-none-eabi-' + CC = PREFIX + 'gcc' + AS = PREFIX + 'gcc' + AR = PREFIX + 'ar' + CXX = PREFIX + 'g++' + LINK = PREFIX + 'gcc' + TARGET_EXT = 'elf' + SIZE = PREFIX + 'size' + OBJDUMP = PREFIX + 'objdump' + OBJCPY = PREFIX + 'objcopy' + + DEVICE = ' -mcpu=cortex-m3 -mthumb -ffunction-sections -fdata-sections' + CFLAGS = DEVICE + ' -Dgcc' + AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb ' + LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.ld' + + CPATH = '' + LPATH = '' + + if BUILD == 'debug': + CFLAGS += ' -O0 -gdwarf-2 -g' + AFLAGS += ' -gdwarf-2' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + + POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' + +elif PLATFORM == 'armcc': + # toolchains + CC = 'armcc' + CXX = 'armcc' + AS = 'armasm' + AR = 'armar' + LINK = 'armlink' + TARGET_EXT = 'axf' + + DEVICE = ' --cpu Cortex-M3.fp ' + CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99' + AFLAGS = DEVICE + ' --apcs=interwork ' + LFLAGS = DEVICE + ' --scatter "board\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rtthread.map --strict' + CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include' + LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib' + + CFLAGS += ' -D__MICROLIB ' + AFLAGS += ' --pd "__MICROLIB SETA 1" ' + LFLAGS += ' --library_type=microlib ' + EXEC_PATH += '/ARM/ARMCC/bin/' + + if BUILD == 'debug': + CFLAGS += ' -g -O0' + AFLAGS += ' -g' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + CFLAGS += ' -std=c99' + + POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET' + +elif PLATFORM == 'iar': + # toolchains + CC = 'iccarm' + CXX = 'iccarm' + AS = 'iasmarm' + AR = 'iarchive' + LINK = 'ilinkarm' + TARGET_EXT = 'out' + + DEVICE = '-Dewarm' + + CFLAGS = DEVICE + CFLAGS += ' --diag_suppress Pa050' + CFLAGS += ' --no_cse' + CFLAGS += ' --no_unroll' + CFLAGS += ' --no_inline' + CFLAGS += ' --no_code_motion' + CFLAGS += ' --no_tbaa' + CFLAGS += ' --no_clustering' + CFLAGS += ' --no_scheduling' + CFLAGS += ' --endian=little' + CFLAGS += ' --cpu=Cortex-M3' + CFLAGS += ' -e' + CFLAGS += ' --fpu=None' + CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"' + CFLAGS += ' --silent' + + AFLAGS = DEVICE + AFLAGS += ' -s+' + AFLAGS += ' -w+' + AFLAGS += ' -r' + AFLAGS += ' --cpu Cortex-M3' + AFLAGS += ' --fpu None' + AFLAGS += ' -S' + + if BUILD == 'debug': + CFLAGS += ' --debug' + CFLAGS += ' -On' + else: + CFLAGS += ' -Oh' + + LFLAGS = ' --config "board/linker_scripts/link.icf"' + LFLAGS += ' --entry __iar_program_start' + + CXXFLAGS = CFLAGS + + EXEC_PATH = EXEC_PATH + '/arm/bin/' + POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT, dist_dir): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT, dist_dir) diff --git a/bsp/gd32/gd32105c-eval/template.uvoptx b/bsp/gd32/gd32105c-eval/template.uvoptx new file mode 100644 index 0000000000..d691bf54c0 --- /dev/null +++ b/bsp/gd32/gd32105c-eval/template.uvoptx @@ -0,0 +1,180 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd"> + + <SchemaVersion>1.0</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Extensions> + <cExt>*.c</cExt> + <aExt>*.s*; *.src; *.a*</aExt> + <oExt>*.obj; *.o</oExt> + <lExt>*.lib</lExt> + <tExt>*.txt; *.h; *.inc</tExt> + <pExt>*.plm</pExt> + <CppX>*.cpp</CppX> + <nMigrate>0</nMigrate> + </Extensions> + + <DaveTm> + <dwLowDateTime>0</dwLowDateTime> + <dwHighDateTime>0</dwHighDateTime> + </DaveTm> + + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>12000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>0</RunSim> + <RunTarget>1</RunTarget> + <RunAbUc>0</RunAbUc> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\build\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>1</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>1</IsCurrentTarget> + </OPTFL> + <CpuCode>255</CpuCode> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <tRtrace>1</tRtrace> + <sRSysVw>1</sRSysVw> + <tRSysVw>1</tRSysVw> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <bEvRecOn>1</bEvRecOn> + <bSchkAxf>0</bSchkAxf> + <bTchkAxf>0</bTchkAxf> + <nTsel>3</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>BIN\CMSIS_AGDI.dll</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0GD32F10x_CL -FL040000 -FS08000000 -FP0($$Device:GD32F105VC$Flash\GD32F10x_CL.FLM)</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint/> + <Tracepoint> + <THDelay>0</THDelay> + </Tracepoint> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>0</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>0</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + <bLintAuto>0</bLintAuto> + <bAutoGenD>0</bAutoGenD> + <LntExFlags>0</LntExFlags> + <pMisraName></pMisraName> + <pszMrule></pszMrule> + <pSingCmds></pSingCmds> + <pMultCmds></pMultCmds> + <pMisraNamep></pMisraNamep> + <pszMrulep></pszMrulep> + <pSingCmdsp></pSingCmdsp> + <pMultCmdsp></pMultCmdsp> + </TargetOption> + </Target> + + <Group> + <GroupName>::CMSIS</GroupName> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <cbSel>0</cbSel> + <RteFlg>1</RteFlg> + </Group> + +</ProjectOpt> diff --git a/bsp/gd32/gd32105c-eval/template.uvproj b/bsp/gd32/gd32105c-eval/template.uvproj new file mode 100644 index 0000000000..8ad9e1c662 --- /dev/null +++ b/bsp/gd32/gd32105c-eval/template.uvproj @@ -0,0 +1,628 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd"> + + <SchemaVersion>1.1</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Targets> + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <uAC6>0</uAC6> + <TargetOption> + <TargetCommonOption> + <Device>GD32F105VC</Device> + <Vendor>GigaDevice</Vendor> + <Cpu>IRAM(0x20000000-0x20018000) IROM(0x08000000-0x08040000) CLOCK(10800000) CPUTYPE("Cortex-M3")</Cpu> + <FlashUtilSpec></FlashUtilSpec> + <StartupFile>"Startup\GD\GD32F10x\startup_gd32f10x.s" ("GD32F10x Startup Code")</StartupFile> + <FlashDriverDll>UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0GD32F10x_3MB -FS08000000 -FL0100000)</FlashDriverDll> + <DeviceId>0</DeviceId> + <RegisterFile>gd32f10x0.h</RegisterFile> + <MemoryEnv></MemoryEnv> + <Cmp></Cmp> + <Asm></Asm> + <Linker></Linker> + <OHString></OHString> + <InfinionOptionDll></InfinionOptionDll> + <SLE66CMisc></SLE66CMisc> + <SLE66AMisc></SLE66AMisc> + <SLE66LinkerMisc></SLE66LinkerMisc> + <SFDFile>SFD\GD\GD32F10x\GD32F10x.SFR</SFDFile> + <bCustSvd>0</bCustSvd> + <UseEnv>0</UseEnv> + <BinPath></BinPath> + <IncludePath></IncludePath> + <LibPath></LibPath> + <RegisterFilePath>GD\GD32F10x\</RegisterFilePath> + <DBRegisterFilePath>GD\GD32F10x\</DBRegisterFilePath> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + </TargetStatus> + <OutputDirectory>.\output\</OutputDirectory> + <OutputName>rtthread</OutputName> + <CreateExecutable>1</CreateExecutable> + <CreateLib>0</CreateLib> + <CreateHexFile>1</CreateHexFile> + <DebugInformation>1</DebugInformation> + <BrowseInformation>1</BrowseInformation> + <ListingPath>.\build\</ListingPath> + <HexFormatSelection>1</HexFormatSelection> + <Merge32K>0</Merge32K> + <CreateBatchFile>0</CreateBatchFile> + <BeforeCompile> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopU1X>0</nStopU1X> + <nStopU2X>0</nStopU2X> + </BeforeCompile> + <BeforeMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopB1X>0</nStopB1X> + <nStopB2X>0</nStopB2X> + </BeforeMake> + <AfterMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopA1X>0</nStopA1X> + <nStopA2X>0</nStopA2X> + </AfterMake> + <SelectedForBatchBuild>0</SelectedForBatchBuild> + <SVCSIdString></SVCSIdString> + </TargetCommonOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>1</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>0</GenerateAssemblyFile> + <AssembleAssemblyFile>0</AssembleAssemblyFile> + <PublicsOnly>0</PublicsOnly> + <StopOnExitCode>3</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + <ComprImg>1</ComprImg> + </CommonProperty> + <DllOption> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments> -REMAP</SimDllArguments> + <SimDlgDll>DCM.DLL</SimDlgDll> + <SimDlgDllArguments>-pCM3</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDll>TCM.DLL</TargetDlgDll> + <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments> + </DllOption> + <DebugOption> + <OPTHX> + <HexSelection>1</HexSelection> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + <Oh166RecLen>16</Oh166RecLen> + </OPTHX> + <Simulator> + <UseSimulator>0</UseSimulator> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>1</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <LimitSpeedToRealTime>0</LimitSpeedToRealTime> + <RestoreSysVw>1</RestoreSysVw> + </Simulator> + <Target> + <UseTarget>1</UseTarget> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>0</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <RestoreTracepoints>0</RestoreTracepoints> + <RestoreSysVw>1</RestoreSysVw> + </Target> + <RunDebugAfterBuild>0</RunDebugAfterBuild> + <TargetSelection>3</TargetSelection> + <SimDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + </SimDlls> + <TargetDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + <Driver>BIN\CMSIS_AGDI.dll</Driver> + </TargetDlls> + </DebugOption> + <Utilities> + <Flash1> + <UseTargetDll>1</UseTargetDll> + <UseExternalTool>0</UseExternalTool> + <RunIndependent>0</RunIndependent> + <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> + <Capability>1</Capability> + <DriverSelection>4096</DriverSelection> + </Flash1> + <bUseTDR>1</bUseTDR> + <Flash2>BIN\UL2CM3.DLL</Flash2> + <Flash3>"" ()</Flash3> + <Flash4></Flash4> + <pFcarmOut></pFcarmOut> + <pFcarmGrp></pFcarmGrp> + <pFcArmRoot></pFcArmRoot> + <FcArmLst>0</FcArmLst> + </Utilities> + <TargetArmAds> + <ArmAdsMisc> + <GenerateListings>0</GenerateListings> + <asHll>1</asHll> + <asAsm>1</asAsm> + <asMacX>1</asMacX> + <asSyms>1</asSyms> + <asFals>1</asFals> + <asDbgD>1</asDbgD> + <asForm>1</asForm> + <ldLst>0</ldLst> + <ldmm>1</ldmm> + <ldXref>1</ldXref> + <BigEnd>0</BigEnd> + <AdsALst>1</AdsALst> + <AdsACrf>1</AdsACrf> + <AdsANop>0</AdsANop> + <AdsANot>0</AdsANot> + <AdsLLst>1</AdsLLst> + <AdsLmap>1</AdsLmap> + <AdsLcgr>1</AdsLcgr> + <AdsLsym>1</AdsLsym> + <AdsLszi>1</AdsLszi> + <AdsLtoi>1</AdsLtoi> + <AdsLsun>1</AdsLsun> + <AdsLven>1</AdsLven> + <AdsLsxf>1</AdsLsxf> + <RvctClst>0</RvctClst> + <GenPPlst>0</GenPPlst> + <AdsCpuType>"Cortex-M3"</AdsCpuType> + <RvctDeviceName></RvctDeviceName> + <mOS>0</mOS> + <uocRom>0</uocRom> + <uocRam>0</uocRam> + <hadIROM>1</hadIROM> + <hadIRAM>1</hadIRAM> + <hadXRAM>0</hadXRAM> + <uocXRam>0</uocXRam> + <RvdsVP>2</RvdsVP> + <hadIRAM2>1</hadIRAM2> + <hadIROM2>0</hadIROM2> + <StupSel>8</StupSel> + <useUlib>1</useUlib> + <EndSel>0</EndSel> + <uLtcg>0</uLtcg> + <nSecure>0</nSecure> + <RoSelD>3</RoSelD> + <RwSelD>3</RwSelD> + <CodeSel>0</CodeSel> + <OptFeed>0</OptFeed> + <NoZi1>0</NoZi1> + <NoZi2>0</NoZi2> + <NoZi3>0</NoZi3> + <NoZi4>0</NoZi4> + <NoZi5>0</NoZi5> + <Ro1Chk>0</Ro1Chk> + <Ro2Chk>0</Ro2Chk> + <Ro3Chk>0</Ro3Chk> + <Ir1Chk>1</Ir1Chk> + <Ir2Chk>0</Ir2Chk> + <Ra1Chk>0</Ra1Chk> + <Ra2Chk>0</Ra2Chk> + <Ra3Chk>0</Ra3Chk> + <Im1Chk>1</Im1Chk> + <Im2Chk>0</Im2Chk> + <OnChipMemories> + <Ocm1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocm4> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x10000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x100000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x100000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x10000</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x10000000</StartAddress> + <Size>0x10000</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector></RvctStartVector> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>1</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>1</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>2</wLevel> + <uThumb>0</uThumb> + <uSurpInc>0</uSurpInc> + <uC99>1</uC99> + <uGnu>0</uGnu> + <useXO>0</useXO> + <v6Lang>1</v6Lang> + <v6LangP>1</v6LangP> + <vShortEn>1</vShortEn> + <vShortWch>1</vShortWch> + <v6Lto>0</v6Lto> + <v6WtE>0</v6WtE> + <v6Rtti>0</v6Rtti> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Include;..\..\..\Library\Firmware\CMSIS\GD\GD32F10x\Include;..\..\..\Library\Utilities;..\</IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <uSurpInc>0</uSurpInc> + <useXO>0</useXO> + <uClangAs>0</uClangAs> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + <LDads> + <umfTarg>1</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x08000000</TextAddressRange> + <DataAddressRange>0x20000000</DataAddressRange> + <pXoBase></pXoBase> + <ScatterFile></ScatterFile> + <IncludeLibs></IncludeLibs> + <IncludeLibsPath></IncludeLibsPath> + <Misc></Misc> + <LinkerInputFile></LinkerInputFile> + <DisabledWarnings></DisabledWarnings> + </LDads> + </TargetArmAds> + </TargetOption> + <Groups> + <Group> + <GroupName>Application</GroupName> + <Files> + <File> + <FileName>main.c</FileName> + <FileType>1</FileType> + <FilePath>..\main.c</FilePath> + </File> + <File> + <FileName>gd32f10x_it.c</FileName> + <FileType>1</FileType> + <FilePath>..\gd32f10x_it.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>CMSIS</GroupName> + <Files> + <File> + <FileName>system_gd32f10x.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\CMSIS\GD\GD32F10x\Source\system_gd32f10x.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>GD32F10x_Peripherals</GroupName> + <Files> + <File> + <FileName>gd32f10x_adc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_adc.c</FilePath> + </File> + <File> + <FileName>gd32f10x_can.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_can.c</FilePath> + </File> + <File> + <FileName>gd32f10x_crc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_crc.c</FilePath> + </File> + <File> + <FileName>gd32f10x_ctc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_ctc.c</FilePath> + </File> + <File> + <FileName>gd32f10x_dac.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_dac.c</FilePath> + </File> + <File> + <FileName>gd32f10x_dbg.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_dbg.c</FilePath> + </File> + <File> + <FileName>gd32f10x_dci.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_dci.c</FilePath> + </File> + <File> + <FileName>gd32f10x_dma.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_dma.c</FilePath> + </File> + <File> + <FileName>gd32f10x_enet.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_enet.c</FilePath> + </File> + <File> + <FileName>gd32f10x_exmc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_exmc.c</FilePath> + </File> + <File> + <FileName>gd32f10x_exti.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_exti.c</FilePath> + </File> + <File> + <FileName>gd32f10x_fmc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_fmc.c</FilePath> + </File> + <File> + <FileName>gd32f10x_fwdgt.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_fwdgt.c</FilePath> + </File> + <File> + <FileName>gd32f10x_gpio.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_gpio.c</FilePath> + </File> + <File> + <FileName>gd32f10x_i2c.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_i2c.c</FilePath> + </File> + <File> + <FileName>gd32f10x_ipa.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_ipa.c</FilePath> + </File> + <File> + <FileName>gd32f10x_iref.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_iref.c</FilePath> + </File> + <File> + <FileName>gd32f10x_misc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_misc.c</FilePath> + </File> + <File> + <FileName>gd32f10x_pmu.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_pmu.c</FilePath> + </File> + <File> + <FileName>gd32f10x_rcu.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_rcu.c</FilePath> + </File> + <File> + <FileName>gd32f10x_rtc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_rtc.c</FilePath> + </File> + <File> + <FileName>gd32f10x_sdio.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_sdio.c</FilePath> + </File> + <File> + <FileName>gd32f10x_spi.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_spi.c</FilePath> + </File> + <File> + <FileName>gd32f10x_syscfg.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_syscfg.c</FilePath> + </File> + <File> + <FileName>gd32f10x_timer.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_timer.c</FilePath> + </File> + <File> + <FileName>gd32f10x_tli.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_tli.c</FilePath> + </File> + <File> + <FileName>gd32f10x_trng.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_trng.c</FilePath> + </File> + <File> + <FileName>gd32f10x_usart.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_usart.c</FilePath> + </File> + <File> + <FileName>gd32f10x_wwdgt.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_wwdgt.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>GD32F10x_EVAL</GroupName> + <Files> + <File> + <FileName>gd32f105c_eval.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Utilities\gd32f105c_eval.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Startup</GroupName> + <Files> + <File> + <FileName>startup_gd32f10x.s</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\Library\Firmware\CMSIS\GD\GD32F10x\Source\ARM\startup_gd32f10x.s</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Doc</GroupName> + <Files> + <File> + <FileName>readme.txt</FileName> + <FileType>5</FileType> + <FilePath>..\readme.txt</FilePath> + </File> + </Files> + </Group> + </Groups> + </Target> + </Targets> + +</Project> diff --git a/bsp/gd32/gd32105c-eval/template.uvprojx b/bsp/gd32/gd32105c-eval/template.uvprojx new file mode 100644 index 0000000000..2b0da81501 --- /dev/null +++ b/bsp/gd32/gd32105c-eval/template.uvprojx @@ -0,0 +1,418 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd"> + + <SchemaVersion>2.1</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Targets> + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <pCCUsed>5060750::V5.06 update 6 (build 750)::.\ARMCC</pCCUsed> + <uAC6>0</uAC6> + <TargetOption> + <TargetCommonOption> + <Device>GD32F105VC</Device> + <Vendor>GigaDevice</Vendor> + <PackID>GigaDevice.GD32F10x_DFP.2.0.1</PackID> + <PackURL>http://www.keil.com/pack/</PackURL> + <Cpu>IRAM(0x20000000,0x00018000) IROM(0x08000000,0x00040000) CPUTYPE("Cortex-M3") CLOCK(10800000) ELITTLE</Cpu> + <FlashUtilSpec></FlashUtilSpec> + <StartupFile></StartupFile> + <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0GD32F10x_CL -FS08000000 -FL040000 -FP0($$Device:GD32F105VC$Flash\GD32F10x_CL.FLM))</FlashDriverDll> + <DeviceId>0</DeviceId> + <RegisterFile>$$Device:GD32F105VC$Device\Include\gd32f10x.h</RegisterFile> + <MemoryEnv></MemoryEnv> + <Cmp></Cmp> + <Asm></Asm> + <Linker></Linker> + <OHString></OHString> + <InfinionOptionDll></InfinionOptionDll> + <SLE66CMisc></SLE66CMisc> + <SLE66AMisc></SLE66AMisc> + <SLE66LinkerMisc></SLE66LinkerMisc> + <SFDFile>$$Device:GD32F105VC$SVD\GD32F10x\GD32F10x_CL.svd</SFDFile> + <bCustSvd>0</bCustSvd> + <UseEnv>0</UseEnv> + <BinPath></BinPath> + <IncludePath></IncludePath> + <LibPath></LibPath> + <RegisterFilePath></RegisterFilePath> + <DBRegisterFilePath></DBRegisterFilePath> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + </TargetStatus> + <OutputDirectory>.\build\</OutputDirectory> + <OutputName>rtthread</OutputName> + <CreateExecutable>1</CreateExecutable> + <CreateLib>0</CreateLib> + <CreateHexFile>0</CreateHexFile> + <DebugInformation>1</DebugInformation> + <BrowseInformation>0</BrowseInformation> + <ListingPath>.\build\</ListingPath> + <HexFormatSelection>1</HexFormatSelection> + <Merge32K>0</Merge32K> + <CreateBatchFile>0</CreateBatchFile> + <BeforeCompile> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopU1X>0</nStopU1X> + <nStopU2X>0</nStopU2X> + </BeforeCompile> + <BeforeMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopB1X>0</nStopB1X> + <nStopB2X>0</nStopB2X> + </BeforeMake> + <AfterMake> + <RunUserProg1>1</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopA1X>0</nStopA1X> + <nStopA2X>0</nStopA2X> + </AfterMake> + <SelectedForBatchBuild>0</SelectedForBatchBuild> + <SVCSIdString></SVCSIdString> + </TargetCommonOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>1</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>0</GenerateAssemblyFile> + <AssembleAssemblyFile>0</AssembleAssemblyFile> + <PublicsOnly>0</PublicsOnly> + <StopOnExitCode>3</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + <ComprImg>1</ComprImg> + </CommonProperty> + <DllOption> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments> -REMAP</SimDllArguments> + <SimDlgDll>DCM.DLL</SimDlgDll> + <SimDlgDllArguments>-pCM3</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDll>TCM.DLL</TargetDlgDll> + <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments> + </DllOption> + <DebugOption> + <OPTHX> + <HexSelection>1</HexSelection> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + <Oh166RecLen>16</Oh166RecLen> + </OPTHX> + </DebugOption> + <Utilities> + <Flash1> + <UseTargetDll>1</UseTargetDll> + <UseExternalTool>0</UseExternalTool> + <RunIndependent>0</RunIndependent> + <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> + <Capability>1</Capability> + <DriverSelection>4096</DriverSelection> + </Flash1> + <bUseTDR>1</bUseTDR> + <Flash2>BIN\UL2CM3.DLL</Flash2> + <Flash3></Flash3> + <Flash4></Flash4> + <pFcarmOut></pFcarmOut> + <pFcarmGrp></pFcarmGrp> + <pFcArmRoot></pFcArmRoot> + <FcArmLst>0</FcArmLst> + </Utilities> + <TargetArmAds> + <ArmAdsMisc> + <GenerateListings>0</GenerateListings> + <asHll>1</asHll> + <asAsm>1</asAsm> + <asMacX>1</asMacX> + <asSyms>1</asSyms> + <asFals>1</asFals> + <asDbgD>1</asDbgD> + <asForm>1</asForm> + <ldLst>0</ldLst> + <ldmm>1</ldmm> + <ldXref>1</ldXref> + <BigEnd>0</BigEnd> + <AdsALst>1</AdsALst> + <AdsACrf>1</AdsACrf> + <AdsANop>0</AdsANop> + <AdsANot>0</AdsANot> + <AdsLLst>1</AdsLLst> + <AdsLmap>1</AdsLmap> + <AdsLcgr>1</AdsLcgr> + <AdsLsym>1</AdsLsym> + <AdsLszi>1</AdsLszi> + <AdsLtoi>1</AdsLtoi> + <AdsLsun>1</AdsLsun> + <AdsLven>1</AdsLven> + <AdsLsxf>1</AdsLsxf> + <RvctClst>0</RvctClst> + <GenPPlst>0</GenPPlst> + <AdsCpuType>"Cortex-M3"</AdsCpuType> + <RvctDeviceName></RvctDeviceName> + <mOS>0</mOS> + <uocRom>0</uocRom> + <uocRam>0</uocRam> + <hadIROM>1</hadIROM> + <hadIRAM>1</hadIRAM> + <hadXRAM>0</hadXRAM> + <uocXRam>0</uocXRam> + <RvdsVP>0</RvdsVP> + <RvdsMve>0</RvdsMve> + <RvdsCdeCp>0</RvdsCdeCp> + <hadIRAM2>0</hadIRAM2> + <hadIROM2>0</hadIROM2> + <StupSel>8</StupSel> + <useUlib>0</useUlib> + <EndSel>0</EndSel> + <uLtcg>0</uLtcg> + <nSecure>0</nSecure> + <RoSelD>3</RoSelD> + <RwSelD>3</RwSelD> + <CodeSel>0</CodeSel> + <OptFeed>0</OptFeed> + <NoZi1>0</NoZi1> + <NoZi2>0</NoZi2> + <NoZi3>0</NoZi3> + <NoZi4>0</NoZi4> + <NoZi5>0</NoZi5> + <Ro1Chk>0</Ro1Chk> + <Ro2Chk>0</Ro2Chk> + <Ro3Chk>0</Ro3Chk> + <Ir1Chk>1</Ir1Chk> + <Ir2Chk>0</Ir2Chk> + <Ra1Chk>0</Ra1Chk> + <Ra2Chk>0</Ra2Chk> + <Ra3Chk>0</Ra3Chk> + <Im1Chk>1</Im1Chk> + <Im2Chk>0</Im2Chk> + <OnChipMemories> + <Ocm1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocm4> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x18000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x40000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x40000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x18000</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector></RvctStartVector> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>4</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>0</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>0</wLevel> + <uThumb>0</uThumb> + <uSurpInc>0</uSurpInc> + <uC99>1</uC99> + <uGnu>0</uGnu> + <useXO>0</useXO> + <v6Lang>1</v6Lang> + <v6LangP>1</v6LangP> + <vShortEn>1</vShortEn> + <vShortWch>1</vShortWch> + <v6Lto>0</v6Lto> + <v6WtE>0</v6WtE> + <v6Rtti>0</v6Rtti> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <uSurpInc>0</uSurpInc> + <useXO>0</useXO> + <ClangAsOpt>4</ClangAsOpt> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + <LDads> + <umfTarg>1</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x08000000</TextAddressRange> + <DataAddressRange>0x20000000</DataAddressRange> + <pXoBase></pXoBase> + <ScatterFile>.\gd32_rom.ld</ScatterFile> + <IncludeLibs></IncludeLibs> + <IncludeLibsPath></IncludeLibsPath> + <Misc></Misc> + <LinkerInputFile></LinkerInputFile> + <DisabledWarnings></DisabledWarnings> + </LDads> + </TargetArmAds> + </TargetOption> + <Groups> + <Group> + <GroupName>::CMSIS</GroupName> + </Group> + </Groups> + </Target> + </Targets> + + <RTE> + <apis/> + <components> + <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.4.0" condition="ARMv6_7_8-M Device"> + <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/> + <targetInfos> + <targetInfo name="rt-thread"/> + </targetInfos> + </component> + </components> + <files/> + </RTE> + + <LayerInfo> + <Layers> + <Layer> + <LayName><Project Info></LayName> + <LayDesc></LayDesc> + <LayUrl></LayUrl> + <LayKeys></LayKeys> + <LayCat></LayCat> + <LayLic></LayLic> + <LayTarg>0</LayTarg> + <LayPrjMark>1</LayPrjMark> + </Layer> + </Layers> + </LayerInfo> + +</Project> diff --git a/bsp/gd32/gd32107c-eval/.config b/bsp/gd32/gd32107c-eval/.config new file mode 100644 index 0000000000..595bf9bc01 --- /dev/null +++ b/bsp/gd32/gd32107c-eval/.config @@ -0,0 +1,670 @@ +# +# Automatically generated file; DO NOT EDIT. +# RT-Thread Configuration +# + +# +# RT-Thread Kernel +# +CONFIG_RT_NAME_MAX=8 +# CONFIG_RT_USING_BIG_ENDIAN is not set +# CONFIG_RT_USING_ARCH_DATA_TYPE is not set +# CONFIG_RT_USING_SMP is not set +CONFIG_RT_ALIGN_SIZE=4 +# CONFIG_RT_THREAD_PRIORITY_8 is not set +CONFIG_RT_THREAD_PRIORITY_32=y +# CONFIG_RT_THREAD_PRIORITY_256 is not set +CONFIG_RT_THREAD_PRIORITY_MAX=32 +CONFIG_RT_TICK_PER_SECOND=100 +CONFIG_RT_USING_OVERFLOW_CHECK=y +CONFIG_RT_USING_HOOK=y +CONFIG_RT_USING_IDLE_HOOK=y +CONFIG_RT_IDLE_HOOK_LIST_SIZE=4 +CONFIG_IDLE_THREAD_STACK_SIZE=256 +# CONFIG_RT_USING_TIMER_SOFT is not set + +# +# kservice optimization +# +# CONFIG_RT_KSERVICE_USING_STDLIB is not set +# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set +# CONFIG_RT_USING_TINY_FFS is not set +# CONFIG_RT_PRINTF_LONGLONG is not set +CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y +# CONFIG_RT_DEBUG_INIT_CONFIG is not set +# CONFIG_RT_DEBUG_THREAD_CONFIG is not set +# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set +# CONFIG_RT_DEBUG_IPC_CONFIG is not set +# CONFIG_RT_DEBUG_TIMER_CONFIG is not set +# CONFIG_RT_DEBUG_IRQ_CONFIG is not set +# CONFIG_RT_DEBUG_MEM_CONFIG is not set +# CONFIG_RT_DEBUG_SLAB_CONFIG is not set +# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set +# CONFIG_RT_DEBUG_MODULE_CONFIG is not set + +# +# Inter-Thread communication +# +CONFIG_RT_USING_SEMAPHORE=y +CONFIG_RT_USING_MUTEX=y +CONFIG_RT_USING_EVENT=y +CONFIG_RT_USING_MAILBOX=y +CONFIG_RT_USING_MESSAGEQUEUE=y +# CONFIG_RT_USING_SIGNALS is not set + +# +# Memory Management +# +CONFIG_RT_USING_MEMPOOL=y +CONFIG_RT_USING_SMALL_MEM=y +# CONFIG_RT_USING_SLAB is not set +# CONFIG_RT_USING_MEMHEAP is not set +CONFIG_RT_USING_SMALL_MEM_AS_HEAP=y +# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set +# CONFIG_RT_USING_SLAB_AS_HEAP is not set +# CONFIG_RT_USING_USERHEAP is not set +# CONFIG_RT_USING_NOHEAP is not set +# CONFIG_RT_USING_MEMTRACE is not set +# CONFIG_RT_USING_HEAP_ISR is not set +CONFIG_RT_USING_HEAP=y + +# +# Kernel Device Object +# +CONFIG_RT_USING_DEVICE=y +# CONFIG_RT_USING_DEVICE_OPS is not set +# CONFIG_RT_USING_INTERRUPT_INFO is not set +CONFIG_RT_USING_CONSOLE=y +CONFIG_RT_CONSOLEBUF_SIZE=128 +CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" +CONFIG_RT_VER_NUM=0x40100 +# CONFIG_RT_USING_CPU_FFS is not set +# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set + +# +# RT-Thread Components +# +CONFIG_RT_USING_COMPONENTS_INIT=y +CONFIG_RT_USING_USER_MAIN=y +CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048 +CONFIG_RT_MAIN_THREAD_PRIORITY=10 +# CONFIG_RT_USING_LEGACY is not set + +# +# C++ features +# +# CONFIG_RT_USING_CPLUSPLUS is not set + +# +# Command shell +# +CONFIG_RT_USING_FINSH=y +CONFIG_RT_USING_MSH=y +CONFIG_FINSH_USING_MSH=y +CONFIG_FINSH_THREAD_NAME="tshell" +CONFIG_FINSH_THREAD_PRIORITY=20 +CONFIG_FINSH_THREAD_STACK_SIZE=4096 +CONFIG_FINSH_USING_HISTORY=y +CONFIG_FINSH_HISTORY_LINES=5 +CONFIG_FINSH_USING_SYMTAB=y +CONFIG_FINSH_CMD_SIZE=80 +CONFIG_MSH_USING_BUILT_IN_COMMANDS=y +CONFIG_FINSH_USING_DESCRIPTION=y +# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set +# CONFIG_FINSH_USING_AUTH is not set +CONFIG_FINSH_ARG_MAX=10 + +# +# Device virtual file system +# +# CONFIG_RT_USING_DFS is not set + +# +# Device Drivers +# +CONFIG_RT_USING_DEVICE_IPC=y +CONFIG_RT_USING_SYSTEM_WORKQUEUE=y +CONFIG_RT_SYSTEM_WORKQUEUE_STACKSIZE=2048 +CONFIG_RT_SYSTEM_WORKQUEUE_PRIORITY=23 +CONFIG_RT_USING_SERIAL=y +CONFIG_RT_USING_SERIAL_V1=y +# CONFIG_RT_USING_SERIAL_V2 is not set +CONFIG_RT_SERIAL_USING_DMA=y +CONFIG_RT_SERIAL_RB_BUFSZ=64 +# CONFIG_RT_USING_CAN is not set +# CONFIG_RT_USING_HWTIMER is not set +# CONFIG_RT_USING_CPUTIME is not set +# CONFIG_RT_USING_I2C is not set +# CONFIG_RT_USING_PHY is not set +CONFIG_RT_USING_PIN=y +# CONFIG_RT_USING_ADC is not set +# CONFIG_RT_USING_DAC is not set +# CONFIG_RT_USING_PWM is not set +# CONFIG_RT_USING_MTD_NOR is not set +# CONFIG_RT_USING_MTD_NAND is not set +# CONFIG_RT_USING_PM is not set +# CONFIG_RT_USING_RTC is not set +# CONFIG_RT_USING_SDIO is not set +CONFIG_RT_USING_SPI=y +# CONFIG_RT_USING_QSPI is not set +# CONFIG_RT_USING_SPI_MSD is not set +# CONFIG_RT_USING_SFUD is not set +# CONFIG_RT_USING_ENC28J60 is not set +# CONFIG_RT_USING_SPI_WIFI is not set +# CONFIG_RT_USING_WDT is not set +# CONFIG_RT_USING_AUDIO is not set +# CONFIG_RT_USING_SENSOR is not set +# CONFIG_RT_USING_TOUCH is not set +# CONFIG_RT_USING_HWCRYPTO is not set +# CONFIG_RT_USING_PULSE_ENCODER is not set +# CONFIG_RT_USING_INPUT_CAPTURE is not set +# CONFIG_RT_USING_WIFI is not set + +# +# Using USB +# +# CONFIG_RT_USING_USB is not set +# CONFIG_RT_USING_USB_HOST is not set +# CONFIG_RT_USING_USB_DEVICE is not set + +# +# POSIX layer and C standard library +# +# CONFIG_RT_USING_LIBC is not set +CONFIG_RT_LIBC_USING_TIME=y +CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 + +# +# POSIX (Portable Operating System Interface) layer +# +# CONFIG_RT_USING_POSIX_FS is not set +# CONFIG_RT_USING_POSIX_DELAY is not set +# CONFIG_RT_USING_POSIX_CLOCK is not set +# CONFIG_RT_USING_POSIX_GETLINE is not set +# CONFIG_RT_USING_PTHREADS is not set + +# +# Interprocess Communication (IPC) +# +# CONFIG_RT_USING_POSIX_PIPE is not set +# CONFIG_RT_USING_POSIX_MESSAGE_QUEUE is not set +# CONFIG_RT_USING_POSIX_MESSAGE_SEMAPHORE is not set + +# +# Socket is in the 'Network' category +# + +# +# Network +# + +# +# Socket abstraction layer +# +# CONFIG_RT_USING_SAL is not set + +# +# Network interface device +# +# CONFIG_RT_USING_NETDEV is not set + +# +# light weight TCP/IP stack +# +# CONFIG_RT_USING_LWIP is not set + +# +# AT commands +# +# CONFIG_RT_USING_AT is not set + +# +# VBUS(Virtual Software BUS) +# +# CONFIG_RT_USING_VBUS is not set + +# +# Utilities +# +# CONFIG_RT_USING_RYM is not set +# CONFIG_RT_USING_ULOG is not set +# CONFIG_RT_USING_UTEST is not set +# CONFIG_RT_USING_VAR_EXPORT is not set +# CONFIG_RT_USING_RT_LINK is not set + +# +# RT-Thread Utestcases +# +# CONFIG_RT_USING_UTESTCASES is not set + +# +# RT-Thread online packages +# + +# +# IoT - internet of things +# +# CONFIG_PKG_USING_LORAWAN_DRIVER is not set +# CONFIG_PKG_USING_PAHOMQTT is not set +# CONFIG_PKG_USING_UMQTT is not set +# CONFIG_PKG_USING_WEBCLIENT is not set +# CONFIG_PKG_USING_WEBNET is not set +# CONFIG_PKG_USING_MONGOOSE is not set +# CONFIG_PKG_USING_MYMQTT is not set +# CONFIG_PKG_USING_KAWAII_MQTT is not set +# CONFIG_PKG_USING_BC28_MQTT is not set +# CONFIG_PKG_USING_WEBTERMINAL is not set +# CONFIG_PKG_USING_CJSON is not set +# CONFIG_PKG_USING_JSMN is not set +# CONFIG_PKG_USING_LIBMODBUS is not set +# CONFIG_PKG_USING_FREEMODBUS is not set +# CONFIG_PKG_USING_LJSON is not set +# CONFIG_PKG_USING_EZXML is not set +# CONFIG_PKG_USING_NANOPB is not set + +# +# Wi-Fi +# + +# +# Marvell WiFi +# +# CONFIG_PKG_USING_WLANMARVELL is not set + +# +# Wiced WiFi +# +# CONFIG_PKG_USING_WLAN_WICED is not set +# CONFIG_PKG_USING_RW007 is not set +# CONFIG_PKG_USING_COAP is not set +# CONFIG_PKG_USING_NOPOLL is not set +# CONFIG_PKG_USING_NETUTILS is not set +# CONFIG_PKG_USING_CMUX is not set +# CONFIG_PKG_USING_PPP_DEVICE is not set +# CONFIG_PKG_USING_AT_DEVICE is not set +# CONFIG_PKG_USING_ATSRV_SOCKET is not set +# CONFIG_PKG_USING_WIZNET is not set +# CONFIG_PKG_USING_ZB_COORDINATOR is not set + +# +# IoT Cloud +# +# CONFIG_PKG_USING_ONENET is not set +# CONFIG_PKG_USING_GAGENT_CLOUD is not set +# CONFIG_PKG_USING_ALI_IOTKIT is not set +# CONFIG_PKG_USING_AZURE is not set +# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set +# CONFIG_PKG_USING_JIOT-C-SDK is not set +# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set +# CONFIG_PKG_USING_JOYLINK is not set +# CONFIG_PKG_USING_NIMBLE is not set +# CONFIG_PKG_USING_OTA_DOWNLOADER is not set +# CONFIG_PKG_USING_IPMSG is not set +# CONFIG_PKG_USING_LSSDP is not set +# CONFIG_PKG_USING_AIRKISS_OPEN is not set +# CONFIG_PKG_USING_LIBRWS is not set +# CONFIG_PKG_USING_TCPSERVER is not set +# CONFIG_PKG_USING_PROTOBUF_C is not set +# CONFIG_PKG_USING_DLT645 is not set +# CONFIG_PKG_USING_QXWZ is not set +# CONFIG_PKG_USING_SMTP_CLIENT is not set +# CONFIG_PKG_USING_ABUP_FOTA is not set +# CONFIG_PKG_USING_LIBCURL2RTT is not set +# CONFIG_PKG_USING_CAPNP is not set +# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set +# CONFIG_PKG_USING_AGILE_TELNET is not set +# CONFIG_PKG_USING_NMEALIB is not set +# CONFIG_PKG_USING_AGILE_JSMN is not set +# CONFIG_PKG_USING_PDULIB is not set +# CONFIG_PKG_USING_BTSTACK is not set +# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set +# CONFIG_PKG_USING_WAYZ_IOTKIT is not set +# CONFIG_PKG_USING_MAVLINK is not set +# CONFIG_PKG_USING_RAPIDJSON is not set +# CONFIG_PKG_USING_BSAL is not set +# CONFIG_PKG_USING_AGILE_MODBUS is not set +# CONFIG_PKG_USING_AGILE_FTP is not set +# CONFIG_PKG_USING_EMBEDDEDPROTO is not set +# CONFIG_PKG_USING_RT_LINK_HW is not set +# CONFIG_PKG_USING_LORA_PKT_FWD is not set +# CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set +# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set +# CONFIG_PKG_USING_HM is not set +# CONFIG_PKG_USING_SMALL_MODBUS is not set +# CONFIG_PKG_USING_NET_SERVER is not set + +# +# security packages +# +# CONFIG_PKG_USING_MBEDTLS is not set +# CONFIG_PKG_USING_LIBSODIUM is not set +# CONFIG_PKG_USING_TINYCRYPT is not set +# CONFIG_PKG_USING_TFM is not set +# CONFIG_PKG_USING_YD_CRYPTO is not set + +# +# language packages +# +# CONFIG_PKG_USING_LUA is not set +# CONFIG_PKG_USING_JERRYSCRIPT is not set +# CONFIG_PKG_USING_MICROPYTHON is not set +# CONFIG_PKG_USING_PIKASCRIPT is not set + +# +# multimedia packages +# + +# +# LVGL: powerful and easy-to-use embedded GUI library +# +# CONFIG_PKG_USING_LVGL is not set +# CONFIG_PKG_USING_LITTLEVGL2RTT is not set +# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set + +# +# u8g2: a monochrome graphic library +# +# CONFIG_PKG_USING_U8G2_OFFICIAL is not set +# CONFIG_PKG_USING_U8G2 is not set +# CONFIG_PKG_USING_OPENMV is not set +# CONFIG_PKG_USING_MUPDF is not set +# CONFIG_PKG_USING_STEMWIN is not set +# CONFIG_PKG_USING_WAVPLAYER is not set +# CONFIG_PKG_USING_TJPGD is not set +# CONFIG_PKG_USING_PDFGEN is not set +# CONFIG_PKG_USING_HELIX is not set +# CONFIG_PKG_USING_AZUREGUIX is not set +# CONFIG_PKG_USING_TOUCHGFX2RTT is not set +# CONFIG_PKG_USING_NUEMWIN is not set +# CONFIG_PKG_USING_MP3PLAYER is not set +# CONFIG_PKG_USING_TINYJPEG is not set +# CONFIG_PKG_USING_UGUI is not set + +# +# PainterEngine: A cross-platform graphics application framework written in C language +# +# CONFIG_PKG_USING_PAINTERENGINE is not set +# CONFIG_PKG_USING_PAINTERENGINE_AUX is not set +# CONFIG_PKG_USING_MCURSES is not set +# CONFIG_PKG_USING_TERMBOX is not set +# CONFIG_PKG_USING_VT100 is not set + +# +# tools packages +# +# CONFIG_PKG_USING_CMBACKTRACE is not set +# CONFIG_PKG_USING_EASYFLASH is not set +# CONFIG_PKG_USING_EASYLOGGER is not set +# CONFIG_PKG_USING_SYSTEMVIEW is not set +# CONFIG_PKG_USING_SEGGER_RTT is not set +# CONFIG_PKG_USING_RDB is not set +# CONFIG_PKG_USING_QRCODE is not set +# CONFIG_PKG_USING_ULOG_EASYFLASH is not set +# CONFIG_PKG_USING_ULOG_FILE is not set +# CONFIG_PKG_USING_LOGMGR is not set +# CONFIG_PKG_USING_ADBD is not set +# CONFIG_PKG_USING_COREMARK is not set +# CONFIG_PKG_USING_DHRYSTONE is not set +# CONFIG_PKG_USING_MEMORYPERF is not set +# CONFIG_PKG_USING_NR_MICRO_SHELL is not set +# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set +# CONFIG_PKG_USING_LUNAR_CALENDAR is not set +# CONFIG_PKG_USING_BS8116A is not set +# CONFIG_PKG_USING_GPS_RMC is not set +# CONFIG_PKG_USING_URLENCODE is not set +# CONFIG_PKG_USING_UMCN is not set +# CONFIG_PKG_USING_LWRB2RTT is not set +# CONFIG_PKG_USING_CPU_USAGE is not set +# CONFIG_PKG_USING_GBK2UTF8 is not set +# CONFIG_PKG_USING_VCONSOLE is not set +# CONFIG_PKG_USING_KDB is not set +# CONFIG_PKG_USING_WAMR is not set +# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set +# CONFIG_PKG_USING_LWLOG is not set +# CONFIG_PKG_USING_ANV_TRACE is not set +# CONFIG_PKG_USING_ANV_MEMLEAK is not set +# CONFIG_PKG_USING_ANV_TESTSUIT is not set +# CONFIG_PKG_USING_ANV_BENCH is not set +# CONFIG_PKG_USING_DEVMEM is not set +# CONFIG_PKG_USING_REGEX is not set +# CONFIG_PKG_USING_MEM_SANDBOX is not set +# CONFIG_PKG_USING_SOLAR_TERMS is not set +# CONFIG_PKG_USING_GAN_ZHI is not set +# CONFIG_PKG_USING_FDT is not set + +# +# system packages +# +# CONFIG_PKG_USING_LUATOS_SOC is not set + +# +# enhanced kernel services +# +# CONFIG_PKG_USING_RT_MEMCPY_CM is not set +# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set +# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set + +# +# acceleration: Assembly language or algorithmic acceleration packages +# +# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set +# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set +# CONFIG_PKG_USING_QFPLIB_M3 is not set + +# +# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard +# +# CONFIG_PKG_USING_CMSIS_5 is not set +# CONFIG_PKG_USING_CMSIS_RTOS2 is not set + +# +# Micrium: Micrium software products porting for RT-Thread +# +# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set +# CONFIG_PKG_USING_UCOSII_WRAPPER is not set +# CONFIG_PKG_USING_UC_CRC is not set +# CONFIG_PKG_USING_UC_CLK is not set +# CONFIG_PKG_USING_UC_COMMON is not set +# CONFIG_PKG_USING_UC_MODBUS is not set +# CONFIG_RT_USING_ARDUINO is not set +# CONFIG_PKG_USING_GUIENGINE is not set +# CONFIG_PKG_USING_CAIRO is not set +# CONFIG_PKG_USING_PIXMAN is not set +# CONFIG_PKG_USING_PARTITION is not set +# CONFIG_PKG_USING_FAL is not set +# CONFIG_PKG_USING_FLASHDB is not set +# CONFIG_PKG_USING_SQLITE is not set +# CONFIG_PKG_USING_RTI is not set +# CONFIG_PKG_USING_DFS_YAFFS is not set +# CONFIG_PKG_USING_LITTLEFS is not set +# CONFIG_PKG_USING_DFS_JFFS2 is not set +# CONFIG_PKG_USING_DFS_UFFS is not set +# CONFIG_PKG_USING_LWEXT4 is not set +# CONFIG_PKG_USING_THREAD_POOL is not set +# CONFIG_PKG_USING_ROBOTS is not set +# CONFIG_PKG_USING_EV is not set +# CONFIG_PKG_USING_SYSWATCH is not set +# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set +# CONFIG_PKG_USING_PLCCORE is not set +# CONFIG_PKG_USING_RAMDISK is not set +# CONFIG_PKG_USING_MININI is not set +# CONFIG_PKG_USING_QBOOT is not set +# CONFIG_PKG_USING_PPOOL is not set +# CONFIG_PKG_USING_OPENAMP is not set +# CONFIG_PKG_USING_LPM is not set +# CONFIG_PKG_USING_TLSF is not set +# CONFIG_PKG_USING_EVENT_RECORDER is not set +# CONFIG_PKG_USING_ARM_2D is not set +# CONFIG_PKG_USING_WCWIDTH is not set +# CONFIG_PKG_USING_MCUBOOT is not set +# CONFIG_PKG_USING_TINYUSB is not set +# CONFIG_PKG_USING_USB_STACK is not set + +# +# peripheral libraries and drivers +# +# CONFIG_PKG_USING_SENSORS_DRIVERS is not set +# CONFIG_PKG_USING_REALTEK_AMEBA is not set +# CONFIG_PKG_USING_SHT2X is not set +# CONFIG_PKG_USING_SHT3X is not set +# CONFIG_PKG_USING_AS7341 is not set +# CONFIG_PKG_USING_STM32_SDIO is not set +# CONFIG_PKG_USING_ICM20608 is not set +# CONFIG_PKG_USING_BUTTON is not set +# CONFIG_PKG_USING_PCF8574 is not set +# CONFIG_PKG_USING_SX12XX is not set +# CONFIG_PKG_USING_SIGNAL_LED is not set +# CONFIG_PKG_USING_LEDBLINK is not set +# CONFIG_PKG_USING_LITTLED is not set +# CONFIG_PKG_USING_LKDGUI is not set +# CONFIG_PKG_USING_NRF5X_SDK is not set +# CONFIG_PKG_USING_NRFX is not set +# CONFIG_PKG_USING_WM_LIBRARIES is not set +# CONFIG_PKG_USING_KENDRYTE_SDK is not set +# CONFIG_PKG_USING_INFRARED is not set +# CONFIG_PKG_USING_AGILE_BUTTON is not set +# CONFIG_PKG_USING_AGILE_LED is not set +# CONFIG_PKG_USING_AT24CXX is not set +# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set +# CONFIG_PKG_USING_AD7746 is not set +# CONFIG_PKG_USING_PCA9685 is not set +# CONFIG_PKG_USING_I2C_TOOLS is not set +# CONFIG_PKG_USING_NRF24L01 is not set +# CONFIG_PKG_USING_TOUCH_DRIVERS is not set +# CONFIG_PKG_USING_MAX17048 is not set +# CONFIG_PKG_USING_RPLIDAR is not set +# CONFIG_PKG_USING_AS608 is not set +# CONFIG_PKG_USING_RC522 is not set +# CONFIG_PKG_USING_WS2812B is not set +# CONFIG_PKG_USING_EMBARC_BSP is not set +# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set +# CONFIG_PKG_USING_MULTI_RTIMER is not set +# CONFIG_PKG_USING_MAX7219 is not set +# CONFIG_PKG_USING_BEEP is not set +# CONFIG_PKG_USING_EASYBLINK is not set +# CONFIG_PKG_USING_PMS_SERIES is not set +# CONFIG_PKG_USING_CAN_YMODEM is not set +# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set +# CONFIG_PKG_USING_QLED is not set +# CONFIG_PKG_USING_PAJ7620 is not set +# CONFIG_PKG_USING_AGILE_CONSOLE is not set +# CONFIG_PKG_USING_LD3320 is not set +# CONFIG_PKG_USING_WK2124 is not set +# CONFIG_PKG_USING_LY68L6400 is not set +# CONFIG_PKG_USING_DM9051 is not set +# CONFIG_PKG_USING_SSD1306 is not set +# CONFIG_PKG_USING_QKEY is not set +# CONFIG_PKG_USING_RS485 is not set +# CONFIG_PKG_USING_NES is not set +# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set +# CONFIG_PKG_USING_VDEVICE is not set +# CONFIG_PKG_USING_SGM706 is not set +# CONFIG_PKG_USING_STM32WB55_SDK is not set +# CONFIG_PKG_USING_RDA58XX is not set +# CONFIG_PKG_USING_LIBNFC is not set +# CONFIG_PKG_USING_MFOC is not set +# CONFIG_PKG_USING_TMC51XX is not set +# CONFIG_PKG_USING_TCA9534 is not set +# CONFIG_PKG_USING_KOBUKI is not set +# CONFIG_PKG_USING_ROSSERIAL is not set +# CONFIG_PKG_USING_MICRO_ROS is not set +# CONFIG_PKG_USING_MCP23008 is not set +# CONFIG_PKG_USING_BLUETRUM_SDK is not set +# CONFIG_PKG_USING_MISAKA_AT24CXX is not set +# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set +# CONFIG_PKG_USING_BL_MCU_SDK is not set +# CONFIG_PKG_USING_SOFT_SERIAL is not set +# CONFIG_PKG_USING_MB85RS16 is not set + +# +# AI packages +# +# CONFIG_PKG_USING_LIBANN is not set +# CONFIG_PKG_USING_NNOM is not set +# CONFIG_PKG_USING_ONNX_BACKEND is not set +# CONFIG_PKG_USING_ONNX_PARSER is not set +# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set +# CONFIG_PKG_USING_ELAPACK is not set +# CONFIG_PKG_USING_ULAPACK is not set +# CONFIG_PKG_USING_QUEST is not set +# CONFIG_PKG_USING_NAXOS is not set + +# +# miscellaneous packages +# + +# +# samples: kernel and components samples +# +# CONFIG_PKG_USING_KERNEL_SAMPLES is not set +# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set +# CONFIG_PKG_USING_NETWORK_SAMPLES is not set +# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set + +# +# entertainment: terminal games and other interesting software packages +# +# CONFIG_PKG_USING_CMATRIX is not set +# CONFIG_PKG_USING_SL is not set +# CONFIG_PKG_USING_CAL is not set +# CONFIG_PKG_USING_ACLOCK is not set +# CONFIG_PKG_USING_THREES is not set +# CONFIG_PKG_USING_2048 is not set +# CONFIG_PKG_USING_SNAKE is not set +# CONFIG_PKG_USING_TETRIS is not set +# CONFIG_PKG_USING_DONUT is not set +# CONFIG_PKG_USING_COWSAY is not set +# CONFIG_PKG_USING_LIBCSV is not set +# CONFIG_PKG_USING_OPTPARSE is not set +# CONFIG_PKG_USING_FASTLZ is not set +# CONFIG_PKG_USING_MINILZO is not set +# CONFIG_PKG_USING_QUICKLZ is not set +# CONFIG_PKG_USING_LZMA is not set +# CONFIG_PKG_USING_MULTIBUTTON is not set +# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set +# CONFIG_PKG_USING_CANFESTIVAL is not set +# CONFIG_PKG_USING_ZLIB is not set +# CONFIG_PKG_USING_MINIZIP is not set +# CONFIG_PKG_USING_DSTR is not set +# CONFIG_PKG_USING_TINYFRAME is not set +# CONFIG_PKG_USING_KENDRYTE_DEMO is not set +# CONFIG_PKG_USING_DIGITALCTRL is not set +# CONFIG_PKG_USING_UPACKER is not set +# CONFIG_PKG_USING_UPARAM is not set +# CONFIG_PKG_USING_HELLO is not set +# CONFIG_PKG_USING_VI is not set +# CONFIG_PKG_USING_KI is not set +# CONFIG_PKG_USING_ARMv7M_DWT is not set +# CONFIG_PKG_USING_UKAL is not set +# CONFIG_PKG_USING_CRCLIB is not set +# CONFIG_PKG_USING_LWGPS is not set +# CONFIG_PKG_USING_STATE_MACHINE is not set +# CONFIG_PKG_USING_DESIGN_PATTERN is not set + +# +# Hardware Drivers Config +# +CONFIG_SOC_SERIES_GD32F10x=y +CONFIG_SOC_GD32107V=y + +# +# Onboard Peripheral Drivers +# + +# +# On-chip Peripheral Drivers +# +CONFIG_BSP_USING_GPIO=y +CONFIG_BSP_USING_UART=y +CONFIG_BSP_USING_UART1=y +# CONFIG_BSP_UART1_RX_USING_DMA is not set +CONFIG_BSP_USING_SPI=y +CONFIG_BSP_USING_SPI1=y +# CONFIG_BSP_SPI1_TX_USING_DMA is not set +# CONFIG_BSP_SPI1_RX_USING_DMA is not set +# CONFIG_BSP_USING_I2C1 is not set + +# +# Board extended module Drivers +# diff --git a/bsp/gd32/gd32107c-eval/Kconfig b/bsp/gd32/gd32107c-eval/Kconfig new file mode 100644 index 0000000000..8cbc7b71a8 --- /dev/null +++ b/bsp/gd32/gd32107c-eval/Kconfig @@ -0,0 +1,21 @@ +mainmenu "RT-Thread Configuration" + +config BSP_DIR + string + option env="BSP_ROOT" + default "." + +config RTT_DIR + string + option env="RTT_ROOT" + default "../../.." + +config PKGS_DIR + string + option env="PKGS_ROOT" + default "packages" + +source "$RTT_DIR/Kconfig" +source "$PKGS_DIR/Kconfig" +source "../libraries/Kconfig" +source "board/Kconfig" diff --git a/bsp/gd32/gd32107c-eval/README.md b/bsp/gd32/gd32107c-eval/README.md new file mode 100644 index 0000000000..a5dd4a3132 --- /dev/null +++ b/bsp/gd32/gd32107c-eval/README.md @@ -0,0 +1,98 @@ +# GD32107C-EVAL开发板BSP说明 + +## 简介 + +GD3107C-EVAL是-兆易创新推出的一款GD32F10X系列的评估板，最高主频高达108M，该开发板具有丰富的板载资源，可以充分发挥 GD32107VCT6 的芯片性能。 + +开发板外观如下图所示： + + + +该开发板常用 **板载资源** 如下： + +- GD32107VCT6，主频 108MHz，256KB FLASH ，96KB RAM + +- 常用外设 + + - LED ：5个，LED1 (电源指示灯），LED2（PC0），LED3（PC2），LED4（PE0），LED5（PE1） + - 按键：3个，K1（用户按键，PA0），K2（用户按键，PC13），K3（用户按键，PB14） + +- 常用接口：USB 接口 + +- 调试接口：GD-LINK + +## 外设支持 + +本 BSP 目前对外设的支持情况如下： + +| **片上外设** | **支持情况** | **备注** | +|:--------- |:--------:|:------------------------------------- | +| GPIO | 支持 | PA0, PA1... PK15 ---> PIN: 0, 1...144 | +| UART | 支持 | UART0 - UART7 | +| I2C | 支持 | I2C1 | +| SPI | 支持 | SPI0 - SPI2 | +| SPI FLASH | 支持 | | +| **扩展模块** | **支持情况** | **备注** | +| 暂无 | 暂不支持 | 暂不支持 | + +## 使用说明 + +使用说明分为如下两个章节： + +- 快速上手 + + 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 + +- 进阶使用 + + 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 + +### 快速上手 + +本 BSP 为开发者提供 MDK5 工程，并且支持 GCC 开发环境，也可使用RT-Thread Studio开发。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 + +#### 硬件连接 + +使用数据线连接开发板到 PC，使用USB转TTL模块连接PA2(MCU TX)和PA3(MCU RX)，打开电源开关。 + +#### 编译下载 + +双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 + +> 工程默认配置使用 GD-Link 仿真器下载程序，在通过 GD-Link 连接开发板的基础上，点击下载按钮即可下载程序到开发板 + +#### 运行结果 + +下载程序成功之后，系统会自动运行，LED 闪烁。 + +连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息: + +```bash + \ | / +- RT - Thread Operating System + / | \ 4.0.4 build Dec 19 2021 10:00:27 + 2006 - 2021 Copyright by rt-thread team +msh > +``` + +### 进阶使用 + +此 BSP 默认只开启了 GPIO 和 串口1的功能，如果需使用高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下： + +1. 在 bsp 下打开 env 工具。 + +2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 + +3. 输入`pkgs --update`命令更新软件包。 + +4. 输入`scons --target=mdk4/mdk5` 命令重新生成工程。 + +## 注意事项 + +暂无 + +## 联系人信息 + +维护人: + +- [BruceOu](https://github.com/Ouxiaolong/), 邮箱：<[email protected]>
\ No newline at end of file diff --git a/bsp/gd32/gd32107c-eval/SConscript b/bsp/gd32/gd32107c-eval/SConscript new file mode 100644 index 0000000000..20f7689c53 --- /dev/null +++ b/bsp/gd32/gd32107c-eval/SConscript @@ -0,0 +1,15 @@ +# for module compiling +import os +Import('RTT_ROOT') +from building import * + +cwd = GetCurrentDir() +objs = [] +list = os.listdir(cwd) + +for d in list: + path = os.path.join(cwd, d) + if os.path.isfile(os.path.join(path, 'SConscript')): + objs = objs + SConscript(os.path.join(d, 'SConscript')) + +Return('objs') diff --git a/bsp/gd32/gd32107c-eval/SConstruct b/bsp/gd32/gd32107c-eval/SConstruct new file mode 100644 index 0000000000..49074397d0 --- /dev/null +++ b/bsp/gd32/gd32107c-eval/SConstruct @@ -0,0 +1,60 @@ +import os +import sys +import rtconfig + +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') +else: + RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..') + +sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')] +try: + from building import * +except: + print('Cannot found RT-Thread root directory, please check RTT_ROOT') + print(RTT_ROOT) + exit(-1) + +TARGET = 'rtthread.' + rtconfig.TARGET_EXT + +DefaultEnvironment(tools=[]) +env = Environment(tools = ['mingw'], + AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, + CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS, + AR = rtconfig.AR, ARFLAGS = '-rc', + CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS, + LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) +env.PrependENVPath('PATH', rtconfig.EXEC_PATH) + +if rtconfig.PLATFORM == 'iar': + env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES']) + env.Replace(ARFLAGS = ['']) + env.Replace(LINKCOM = env["LINKCOM"] + ' --map rtthread.map') + +Export('RTT_ROOT') +Export('rtconfig') + +SDK_ROOT = os.path.abspath('./') + +if os.path.exists(SDK_ROOT + '/libraries'): + libraries_path_prefix = SDK_ROOT + '/libraries' +else: + libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries' + +SDK_LIB = libraries_path_prefix +Export('SDK_LIB') + +# prepare building environment +objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False) + +gd32_library = 'GD32F10x_Firmware_Library' +rtconfig.BSP_LIBRARY_TYPE = gd32_library + +# include libraries +objs.extend(SConscript(os.path.join(libraries_path_prefix, gd32_library, 'SConscript'))) + +# include drivers +objs.extend(SConscript(os.path.join(libraries_path_prefix, 'gd32_drivers', 'SConscript'))) + +# make a building +DoBuilding(TARGET, objs) diff --git a/bsp/gd32/gd32107c-eval/applications/SConscript b/bsp/gd32/gd32107c-eval/applications/SConscript new file mode 100644 index 0000000000..01eb940dfb --- /dev/null +++ b/bsp/gd32/gd32107c-eval/applications/SConscript @@ -0,0 +1,11 @@ +Import('RTT_ROOT') +Import('rtconfig') +from building import * + +cwd = os.path.join(str(Dir('#')), 'applications') +src = Glob('*.c') +CPPPATH = [cwd, str(Dir('#'))] + +group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/gd32/gd32107c-eval/applications/main.c b/bsp/gd32/gd32107c-eval/applications/main.c new file mode 100644 index 0000000000..4a528128b4 --- /dev/null +++ b/bsp/gd32/gd32107c-eval/applications/main.c @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-08-20 BruceOu first implementation + */ + +#include <stdio.h> +#include <rtthread.h> +#include <rtdevice.h> +#include <board.h> + +/* defined the LED2 pin: PC6 */ +#define LED2_PIN GET_PIN(C, 6) + +int main(void) +{ + int count = 1; + + /* set LED2 pin mode to output */ + rt_pin_mode(LED2_PIN, PIN_MODE_OUTPUT); + + while (count++) + { + rt_pin_write(LED2_PIN, PIN_HIGH); + rt_thread_mdelay(500); + rt_pin_write(LED2_PIN, PIN_LOW); + rt_thread_mdelay(500); + } + + return RT_EOK; +} diff --git a/bsp/gd32/gd32107c-eval/board/Kconfig b/bsp/gd32/gd32107c-eval/board/Kconfig new file mode 100644 index 0000000000..c20447d8e7 --- /dev/null +++ b/bsp/gd32/gd32107c-eval/board/Kconfig @@ -0,0 +1,85 @@ +menu "Hardware Drivers Config" + +config SOC_SERIES_GD32F10x + bool + default y + +config SOC_GD32107V + bool + select SOC_SERIES_GD32F10x + select RT_USING_COMPONENTS_INIT + select RT_USING_USER_MAIN + default y + +menu "Onboard Peripheral Drivers" + +endmenu + +menu "On-chip Peripheral Drivers" + + config BSP_USING_GPIO + bool "Enable GPIO" + select RT_USING_PIN + default y + + menuconfig BSP_USING_UART + bool "Enable UART" + default y + select RT_USING_SERIAL + if BSP_USING_UART + config BSP_USING_UART1 + bool "Enable UART1" + default y + + config BSP_UART1_RX_USING_DMA + bool "Enable UART1 RX DMA" + depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA + default n + endif + + menuconfig BSP_USING_SPI + bool "Enable SPI BUS" + default n + select RT_USING_SPI + if BSP_USING_SPI + config BSP_USING_SPI1 + bool "Enable SPI1 BUS" + default n + + config BSP_SPI1_TX_USING_DMA + bool "Enable SPI1 TX DMA" + depends on BSP_USING_SPI1 + default n + + config BSP_SPI1_RX_USING_DMA + bool "Enable SPI1 RX DMA" + depends on BSP_USING_SPI1 + select BSP_SPI1_TX_USING_DMA + default n + endif + + menuconfig BSP_USING_I2C1 + bool "Enable I2C1 BUS (software simulation)" + default n + select RT_USING_I2C + select RT_USING_I2C_BITOPS + select RT_USING_PIN + if BSP_USING_I2C1 + config BSP_I2C1_SCL_PIN + int "i2c1 scl pin number" + range 1 216 + default 24 + config BSP_I2C1_SDA_PIN + int "I2C1 sda pin number" + range 1 216 + default 25 + endif + source "../libraries/gd32_drivers/Kconfig" + +endmenu + +menu "Board extended module Drivers" + +endmenu + +endmenu diff --git a/bsp/gd32/gd32107c-eval/board/SConscript b/bsp/gd32/gd32107c-eval/board/SConscript new file mode 100644 index 0000000000..c1f4a6001b --- /dev/null +++ b/bsp/gd32/gd32107c-eval/board/SConscript @@ -0,0 +1,28 @@ +import os +import rtconfig +from building import * + +Import('SDK_LIB') + +cwd = GetCurrentDir() + +# add general drivers +src = Split(''' +board.c +''') + +path = [cwd] + +startup_path_prefix = SDK_LIB + +if rtconfig.CROSS_TOOL == 'gcc': + src += [startup_path_prefix + '/GD32F10x_Firmware_Library/CMSIS/GD/GD32F10x/Source/GCC/startup_gd32f10x_cl.s'] +elif rtconfig.CROSS_TOOL == 'keil': + src += [startup_path_prefix + '/GD32F10x_Firmware_Library/CMSIS/GD/GD32F10x/Source/ARM/startup_gd32f10x_cl.s'] +elif rtconfig.CROSS_TOOL == 'iar': + src += [startup_path_prefix + '/GD32F10x_Firmware_Library/CMSIS/GD/GD32F10x/Source/IAR/startup_gd32f10x_cl.s'] + +CPPDEFINES = ['GD32F10X_CL'] +group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES) + +Return('group') diff --git a/bsp/gd32/gd32107c-eval/board/board.c b/bsp/gd32/gd32107c-eval/board/board.c new file mode 100644 index 0000000000..c409645b37 --- /dev/null +++ b/bsp/gd32/gd32107c-eval/board/board.c @@ -0,0 +1,85 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-12-18 BruceOu first implementation + */ +#include <stdint.h> +#include <rthw.h> +#include <rtthread.h> +#include <board.h> + +/** + * @brief This function is executed in case of error occurrence. + * @param None + * @retval None + */ +void Error_Handler(void) +{ + /* USER CODE BEGIN Error_Handler */ + /* User can add his own implementation to report the HAL error return state */ + while (1) + { + } + /* USER CODE END Error_Handler */ +} + +/** System Clock Configuration +*/ +void SystemClock_Config(void) +{ + SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND); + NVIC_SetPriority(SysTick_IRQn, 0); +} + +/** + * This is the timer interrupt service routine. + * + */ +void SysTick_Handler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + rt_tick_increase(); + + /* leave interrupt */ + rt_interrupt_leave(); +} + +/** + * This function will initial GD32 board. + */ +void rt_hw_board_init() +{ + /* NVIC Configuration */ +#define NVIC_VTOR_MASK 0x3FFFFF80 +#ifdef VECT_TAB_RAM + /* Set the Vector Table base location at 0x10000000 */ + SCB->VTOR = (0x10000000 & NVIC_VTOR_MASK); +#else /* VECT_TAB_FLASH */ + /* Set the Vector Table base location at 0x08000000 */ + SCB->VTOR = (0x08000000 & NVIC_VTOR_MASK); +#endif + + SystemClock_Config(); + +#ifdef RT_USING_COMPONENTS_INIT + rt_components_board_init(); +#endif + +#ifdef RT_USING_CONSOLE + rt_console_set_device(RT_CONSOLE_DEVICE_NAME); +#endif + +#ifdef BSP_USING_SDRAM + rt_system_heap_init((void *)EXT_SDRAM_BEGIN, (void *)EXT_SDRAM_END); +#else + rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END); +#endif +} + +/*@}*/ diff --git a/bsp/gd32/gd32107c-eval/board/board.h b/bsp/gd32/gd32107c-eval/board/board.h new file mode 100644 index 0000000000..11fb4fa084 --- /dev/null +++ b/bsp/gd32/gd32107c-eval/board/board.h @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-12-18 BruceOu first implementation + */ +#ifndef __BOARD_H__ +#define __BOARD_H__ + +#include "gd32f10x.h" +#include "drv_usart.h" +#include "drv_gpio.h" + +#include "gd32f10x_exti.h" + +#define EXT_SDRAM_BEGIN (0xC0000000U) /* the begining address of external SDRAM */ +#define EXT_SDRAM_END (EXT_SDRAM_BEGIN + (32U * 1024 * 1024)) /* the end address of external SDRAM */ + +// <o> Internal SRAM memory size[Kbytes] <8-96> +// <i>Default: 96 +#ifdef __ICCARM__ +// Use *.icf ram symbal, to avoid hardcode. +extern char __ICFEDIT_region_RAM_end__; +#define GD32_SRAM_END &__ICFEDIT_region_RAM_end__ +#else +#define GD32_SRAM_SIZE 96 +#define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024) +#endif + +#ifdef __CC_ARM +extern int Image$$RW_IRAM1$$ZI$$Limit; +#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) +#elif __ICCARM__ +#pragma section="HEAP" +#define HEAP_BEGIN (__segment_end("HEAP")) +#else +extern int __bss_end; +#define HEAP_BEGIN (&__bss_end) +#endif + +#define HEAP_END GD32_SRAM_END + +#endif + diff --git a/bsp/gd32/gd32107c-eval/board/gd32f10x_libopt.h b/bsp/gd32/gd32107c-eval/board/gd32f10x_libopt.h new file mode 100644 index 0000000000..5292c8eca7 --- /dev/null +++ b/bsp/gd32/gd32107c-eval/board/gd32f10x_libopt.h @@ -0,0 +1,64 @@ +/*! + \file gd32f10x_libopt.h + \brief library optional for gd32f10x + + \version 2014-12-26, V1.0.0, demo for GD32F10x + \version 2017-06-30, V2.0.0, demo for GD32F10x + \version 2021-04-30, V2.1.0, demo for GD32F10x +*/ + +/* + Copyright (c) 2021, GigaDevice Semiconductor Inc. + + Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + 3. Neither the name of the copyright holder nor the names of its contributors + may be used to endorse or promote products derived from this software without + specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, +INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, +WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY +OF SUCH DAMAGE. +*/ + +#ifndef GD32F10X_LIBOPT_H +#define GD32F10X_LIBOPT_H + +#include "gd32f10x_fmc.h" +#include "gd32f10x_pmu.h" +#include "gd32f10x_bkp.h" +#include "gd32f10x_rcu.h" +#include "gd32f10x_exti.h" +#include "gd32f10x_gpio.h" +#include "gd32f10x_crc.h" +#include "gd32f10x_dma.h" +#include "gd32f10x_dbg.h" +#include "gd32f10x_adc.h" +#include "gd32f10x_dac.h" +#include "gd32f10x_fwdgt.h" +#include "gd32f10x_wwdgt.h" +#include "gd32f10x_rtc.h" +#include "gd32f10x_timer.h" +#include "gd32f10x_usart.h" +#include "gd32f10x_i2c.h" +#include "gd32f10x_spi.h" +#include "gd32f10x_sdio.h" +#include "gd32f10x_exmc.h" +#include "gd32f10x_can.h" +#include "gd32f10x_enet.h" +#include "gd32f10x_misc.h" + +#endif /* GD32F10X_LIBOPT_H */ diff --git a/bsp/gd32/gd32107c-eval/board/linker_scripts/link.icf b/bsp/gd32/gd32107c-eval/board/linker_scripts/link.icf new file mode 100644 index 0000000000..283881a728 --- /dev/null +++ b/bsp/gd32/gd32107c-eval/board/linker_scripts/link.icf @@ -0,0 +1,40 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x200;
+define symbol __ICFEDIT_size_heap__ = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+export symbol __ICFEDIT_region_RAM_end__;
+
+define symbol __region_RAM1_start__ = 0x10000000;
+define symbol __region_RAM1_end__ = 0x1000FFFF;
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+define region RAM1_region = mem:[from __region_RAM1_start__ to __region_RAM1_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+keep { section FSymTab };
+keep { section VSymTab };
+keep { section .rti_fn* };
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
+place in RAM1_region { section .sram };
\ No newline at end of file diff --git a/bsp/gd32/gd32107c-eval/board/linker_scripts/link.ld b/bsp/gd32/gd32107c-eval/board/linker_scripts/link.ld new file mode 100644 index 0000000000..8ba4a0e9f2 --- /dev/null +++ b/bsp/gd32/gd32107c-eval/board/linker_scripts/link.ld @@ -0,0 +1,142 @@ +/* + * linker script for GD32F30x with GNU ld + * BruceOu 2021-12-14 + */ + +/* Program Entry, set to mark it as "used" and avoid gc */ +MEMORY +{ + CODE (rx) : ORIGIN = 0x08000000, LENGTH = 256k /* 256KB flash */ + DATA (rw) : ORIGIN = 0x20000000, LENGTH = 96k /* 96KB sram */ +} +ENTRY(Reset_Handler) +_system_stack_size = 0x200; + +SECTIONS +{ + .text : + { + . = ALIGN(4); + _stext = .; + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + *(.text) /* remaining code */ + *(.text.*) /* remaining code */ + *(.rodata) /* read-only data (constants) */ + *(.rodata*) + *(.glue_7) + *(.glue_7t) + *(.gnu.linkonce.t*) + + /* section information for finsh shell */ + . = ALIGN(4); + __fsymtab_start = .; + KEEP(*(FSymTab)) + __fsymtab_end = .; + . = ALIGN(4); + __vsymtab_start = .; + KEEP(*(VSymTab)) + __vsymtab_end = .; + . = ALIGN(4); + + /* section information for initial. */ + . = ALIGN(4); + __rt_init_start = .; + KEEP(*(SORT(.rti_fn*))) + __rt_init_end = .; + . = ALIGN(4); + + . = ALIGN(4); + _etext = .; + } > CODE = 0 + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + + /* This is used by the startup in order to initialize the .data secion */ + _sidata = .; + } > CODE + __exidx_end = .; + + /* .data section which is used for initialized data */ + + .data : AT (_sidata) + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _sdata = . ; + + *(.data) + *(.data.*) + *(.gnu.linkonce.d*) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _edata = . ; + } >DATA + + .stack : + { + . = . + _system_stack_size; + . = ALIGN(4); + _estack = .; + } >DATA + + __bss_start = .; + .bss : + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; + + *(.bss) + *(.bss.*) + *(COMMON) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _ebss = . ; + + *(.bss.init) + } > DATA + __bss_end = .; + + _end = .; + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + * Symbols in the DWARF debugging sections are relative to the beginning + * of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff --git a/bsp/gd32/gd32107c-eval/board/linker_scripts/link.sct b/bsp/gd32/gd32107c-eval/board/linker_scripts/link.sct new file mode 100644 index 0000000000..0529ba2b9c --- /dev/null +++ b/bsp/gd32/gd32107c-eval/board/linker_scripts/link.sct @@ -0,0 +1,15 @@ +; *************************************************************
+; *** Scatter-Loading Description File generated by uVision ***
+; *************************************************************
+
+LR_IROM1 0x08000000 0x00040000 { ; load region size_region
+ ER_IROM1 0x08000000 0x00040000 { ; load address = execution address
+ *.o (RESET, +First)
+ *(InRoot$$Sections)
+ .ANY (+RO)
+ }
+ RW_IRAM1 0x20000000 0x00018000 { ; RW data
+ .ANY (+RW +ZI)
+ }
+}
+
diff --git a/bsp/gd32/gd32107c-eval/figures/board.jpg b/bsp/gd32/gd32107c-eval/figures/board.jpg Binary files differnew file mode 100644 index 0000000000..7eec2d53d5 --- /dev/null +++ b/bsp/gd32/gd32107c-eval/figures/board.jpg diff --git a/bsp/gd32/gd32107c-eval/project.uvoptx b/bsp/gd32/gd32107c-eval/project.uvoptx new file mode 100644 index 0000000000..a78b865bc5 --- /dev/null +++ b/bsp/gd32/gd32107c-eval/project.uvoptx @@ -0,0 +1,796 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd"> + + <SchemaVersion>1.0</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Extensions> + <cExt>*.c</cExt> + <aExt>*.s*; *.src; *.a*</aExt> + <oExt>*.obj; *.o</oExt> + <lExt>*.lib</lExt> + <tExt>*.txt; *.h; *.inc</tExt> + <pExt>*.plm</pExt> + <CppX>*.cpp</CppX> + <nMigrate>0</nMigrate> + </Extensions> + + <DaveTm> + <dwLowDateTime>0</dwLowDateTime> + <dwHighDateTime>0</dwHighDateTime> + </DaveTm> + + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>12000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>0</RunSim> + <RunTarget>1</RunTarget> + <RunAbUc>0</RunAbUc> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\build\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>1</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>1</IsCurrentTarget> + </OPTFL> + <CpuCode>255</CpuCode> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <tRtrace>1</tRtrace> + <sRSysVw>1</sRSysVw> + <tRSysVw>1</tRSysVw> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <bEvRecOn>1</bEvRecOn> + <bSchkAxf>0</bSchkAxf> + <bTchkAxf>0</bTchkAxf> + <nTsel>3</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>BIN\CMSIS_AGDI.dll</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0GD32F10x_CL -FL040000 -FS08000000 -FP0($$Device:GD32F107VC$Flash\GD32F10x_CL.FLM)</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint/> + <Tracepoint> + <THDelay>0</THDelay> + </Tracepoint> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>0</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>0</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + <bLintAuto>0</bLintAuto> + <bAutoGenD>0</bAutoGenD> + <LntExFlags>0</LntExFlags> + <pMisraName></pMisraName> + <pszMrule></pszMrule> + <pSingCmds></pSingCmds> + <pMultCmds></pMultCmds> + <pMisraNamep></pMisraNamep> + <pszMrulep></pszMrulep> + <pSingCmdsp></pSingCmdsp> + <pMultCmdsp></pMultCmdsp> + </TargetOption> + </Target> + + <Group> + <GroupName>Applications</GroupName> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <cbSel>0</cbSel> + <RteFlg>0</RteFlg> + <File> + <GroupNumber>1</GroupNumber> + <FileNumber>1</FileNumber> + <FileType>1</FileType> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <bDave2>0</bDave2> + <PathWithFileName>applications\main.c</PathWithFileName> + <FilenameWithoutPath>main.c</FilenameWithoutPath> + <RteFlg>0</RteFlg> + <bShared>0</bShared> + </File> + </Group> + + <Group> + <GroupName>CPU</GroupName> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <cbSel>0</cbSel> + <RteFlg>0</RteFlg> + <File> + <GroupNumber>2</GroupNumber> + <FileNumber>2</FileNumber> + <FileType>1</FileType> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <bDave2>0</bDave2> + <PathWithFileName>..\..\..\libcpu\arm\common\backtrace.c</PathWithFileName> + <FilenameWithoutPath>backtrace.c</FilenameWithoutPath> + <RteFlg>0</RteFlg> + <bShared>0</bShared> + </File> + <File> + <GroupNumber>2</GroupNumber> + <FileNumber>3</FileNumber> + <FileType>1</FileType> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <bDave2>0</bDave2> + <PathWithFileName>..\..\..\libcpu\arm\common\showmem.c</PathWithFileName> + <FilenameWithoutPath>showmem.c</FilenameWithoutPath> + <RteFlg>0</RteFlg> + <bShared>0</bShared> + </File> + <File> + <GroupNumber>2</GroupNumber> + <FileNumber>4</FileNumber> + <FileType>1</FileType> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <bDave2>0</bDave2> + <PathWithFileName>..\..\..\libcpu\arm\common\div0.c</PathWithFileName> + <FilenameWithoutPath>div0.c</FilenameWithoutPath> + <RteFlg>0</RteFlg> + <bShared>0</bShared> + </File> + <File> + <GroupNumber>2</GroupNumber> + <FileNumber>5</FileNumber> + <FileType>1</FileType> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <bDave2>0</bDave2> + <PathWithFileName>..\..\..\libcpu\arm\cortex-m3\cpuport.c</PathWithFileName> + <FilenameWithoutPath>cpuport.c</FilenameWithoutPath> + <RteFlg>0</RteFlg> + <bShared>0</bShared> + </File> + <File> + <GroupNumber>2</GroupNumber> + <FileNumber>6</FileNumber> + <FileType>2</FileType> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <bDave2>0</bDave2> + <PathWithFileName>..\..\..\libcpu\arm\cortex-m3\context_rvds.S</PathWithFileName> + <FilenameWithoutPath>context_rvds.S</FilenameWithoutPath> + <RteFlg>0</RteFlg> + <bShared>0</bShared> + </File> + </Group> + + <Group> + <GroupName>DeviceDrivers</GroupName> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <cbSel>0</cbSel> + <RteFlg>0</RteFlg> + <File> + <GroupNumber>3</GroupNumber> + <FileNumber>7</FileNumber> + <FileType>1</FileType> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <bDave2>0</bDave2> + <PathWithFileName>..\..\..\components\drivers\misc\pin.c</PathWithFileName> + <FilenameWithoutPath>pin.c</FilenameWithoutPath> + <RteFlg>0</RteFlg> + <bShared>0</bShared> + </File> + <File> + <GroupNumber>3</GroupNumber> + <FileNumber>8</FileNumber> + <FileType>1</FileType> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <bDave2>0</bDave2> + <PathWithFileName>..\..\..\components\drivers\serial\serial.c</PathWithFileName> + <FilenameWithoutPath>serial.c</FilenameWithoutPath> + <RteFlg>0</RteFlg> + <bShared>0</bShared> + </File> + <File> + <GroupNumber>3</GroupNumber> + <FileNumber>9</FileNumber> + <FileType>1</FileType> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <bDave2>0</bDave2> + <PathWithFileName>..\..\..\components\drivers\spi\spi_core.c</PathWithFileName> + <FilenameWithoutPath>spi_core.c</FilenameWithoutPath> + <RteFlg>0</RteFlg> + <bShared>0</bShared> + </File> + <File> + <GroupNumber>3</GroupNumber> + <FileNumber>10</FileNumber> + <FileType>1</FileType> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <bDave2>0</bDave2> + <PathWithFileName>..\..\..\components\drivers\spi\spi_dev.c</PathWithFileName> + <FilenameWithoutPath>spi_dev.c</FilenameWithoutPath> + <RteFlg>0</RteFlg> + <bShared>0</bShared> + </File> + <File> + <GroupNumber>3</GroupNumber> + <FileNumber>11</FileNumber> + <FileType>1</FileType> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <bDave2>0</bDave2> + <PathWithFileName>..\..\..\components\drivers\src\waitqueue.c</PathWithFileName> + <FilenameWithoutPath>waitqueue.c</FilenameWithoutPath> + <RteFlg>0</RteFlg> + <bShared>0</bShared> + </File> + <File> + <GroupNumber>3</GroupNumber> + <FileNumber>12</FileNumber> + <FileType>1</FileType> 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<FilePath>..\..\..\src\scheduler.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>libc</GroupName> + <Files> + <File> + <FileName>time.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\libc\compilers\common\time.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Libraries</GroupName> + <Files> + <File> + <FileName>gd32f10x_spi.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\GD32F10x_standard_peripheral\Source\gd32f10x_spi.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>gd32f10x_exti.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\GD32F10x_standard_peripheral\Source\gd32f10x_exti.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>gd32f10x_gpio.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\GD32F10x_standard_peripheral\Source\gd32f10x_gpio.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>gd32f10x_misc.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\GD32F10x_standard_peripheral\Source\gd32f10x_misc.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>system_gd32f10x.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\CMSIS\GD\GD32F10x\Source\system_gd32f10x.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>gd32f10x_rcu.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\GD32F10x_standard_peripheral\Source\gd32f10x_rcu.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>gd32f10x_usart.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\GD32F10x_standard_peripheral\Source\gd32f10x_usart.c</FilePath> + </File> + </Files> + </Group> + </Groups> + </Target> + </Targets> +</Project> diff --git a/bsp/gd32/gd32107c-eval/project.uvprojx b/bsp/gd32/gd32107c-eval/project.uvprojx new file mode 100644 index 0000000000..3d5ae39245 --- /dev/null +++ b/bsp/gd32/gd32107c-eval/project.uvprojx @@ -0,0 +1,757 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd"> + + <SchemaVersion>2.1</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Targets> + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <pCCUsed>5060750::V5.06 update 6 (build 750)::.\ARMCC</pCCUsed> + <uAC6>0</uAC6> + <TargetOption> + <TargetCommonOption> + <Device>GD32F107VC</Device> + <Vendor>GigaDevice</Vendor> + <PackID>GigaDevice.GD32F10x_DFP.2.0.1</PackID> + <PackURL>http://www.keil.com/pack/</PackURL> + <Cpu>IRAM(0x20000000,0x00018000) IROM(0x08000000,0x00040000) CPUTYPE("Cortex-M3") CLOCK(10800000) ELITTLE</Cpu> + <FlashUtilSpec></FlashUtilSpec> + <StartupFile></StartupFile> + <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0GD32F10x_CL -FS08000000 -FL040000 -FP0($$Device:GD32F107VC$Flash\GD32F10x_CL.FLM))</FlashDriverDll> + <DeviceId>0</DeviceId> + <RegisterFile>$$Device:GD32F107VC$Device\Include\gd32f10x.h</RegisterFile> + <MemoryEnv></MemoryEnv> + <Cmp></Cmp> + <Asm></Asm> + <Linker></Linker> + <OHString></OHString> + <InfinionOptionDll></InfinionOptionDll> + <SLE66CMisc></SLE66CMisc> + <SLE66AMisc></SLE66AMisc> + <SLE66LinkerMisc></SLE66LinkerMisc> + <SFDFile>$$Device:GD32F107VC$SVD\GD32F10x\GD32F10x_CL.svd</SFDFile> + <bCustSvd>0</bCustSvd> + <UseEnv>0</UseEnv> + <BinPath></BinPath> + <IncludePath></IncludePath> + <LibPath></LibPath> + <RegisterFilePath></RegisterFilePath> + <DBRegisterFilePath></DBRegisterFilePath> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + </TargetStatus> + <OutputDirectory>.\build\</OutputDirectory> + <OutputName>rtthread</OutputName> + <CreateExecutable>1</CreateExecutable> + <CreateLib>0</CreateLib> + <CreateHexFile>0</CreateHexFile> + <DebugInformation>1</DebugInformation> + <BrowseInformation>0</BrowseInformation> + <ListingPath>.\build\</ListingPath> + <HexFormatSelection>1</HexFormatSelection> + <Merge32K>0</Merge32K> + <CreateBatchFile>0</CreateBatchFile> + <BeforeCompile> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopU1X>0</nStopU1X> + <nStopU2X>0</nStopU2X> + </BeforeCompile> + <BeforeMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + 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<CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + <ComprImg>1</ComprImg> + </CommonProperty> + <DllOption> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments> -REMAP</SimDllArguments> + <SimDlgDll>DCM.DLL</SimDlgDll> + <SimDlgDllArguments>-pCM3</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDll>TCM.DLL</TargetDlgDll> + <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments> + </DllOption> + <DebugOption> + <OPTHX> + <HexSelection>1</HexSelection> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + <Oh166RecLen>16</Oh166RecLen> + </OPTHX> + </DebugOption> + <Utilities> + <Flash1> + <UseTargetDll>1</UseTargetDll> + <UseExternalTool>0</UseExternalTool> + <RunIndependent>0</RunIndependent> + <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> + <Capability>1</Capability> + <DriverSelection>4096</DriverSelection> + </Flash1> + <bUseTDR>1</bUseTDR> + <Flash2>BIN\UL2CM3.DLL</Flash2> + <Flash3></Flash3> + <Flash4></Flash4> + <pFcarmOut></pFcarmOut> + <pFcarmGrp></pFcarmGrp> + <pFcArmRoot></pFcArmRoot> + <FcArmLst>0</FcArmLst> + </Utilities> + <TargetArmAds> + <ArmAdsMisc> + <GenerateListings>0</GenerateListings> + <asHll>1</asHll> + <asAsm>1</asAsm> + <asMacX>1</asMacX> + <asSyms>1</asSyms> + <asFals>1</asFals> + <asDbgD>1</asDbgD> + <asForm>1</asForm> + <ldLst>0</ldLst> + <ldmm>1</ldmm> + <ldXref>1</ldXref> + <BigEnd>0</BigEnd> + <AdsALst>1</AdsALst> + <AdsACrf>1</AdsACrf> + <AdsANop>0</AdsANop> + <AdsANot>0</AdsANot> + <AdsLLst>1</AdsLLst> + <AdsLmap>1</AdsLmap> + <AdsLcgr>1</AdsLcgr> + <AdsLsym>1</AdsLsym> + <AdsLszi>1</AdsLszi> + <AdsLtoi>1</AdsLtoi> + <AdsLsun>1</AdsLsun> + <AdsLven>1</AdsLven> + <AdsLsxf>1</AdsLsxf> + <RvctClst>0</RvctClst> + <GenPPlst>0</GenPPlst> + <AdsCpuType>"Cortex-M3"</AdsCpuType> + <RvctDeviceName></RvctDeviceName> + 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<StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocm4> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x18000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x40000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x40000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x18000</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector></RvctStartVector> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>4</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>0</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>0</wLevel> + <uThumb>0</uThumb> + <uSurpInc>0</uSurpInc> + <uC99>1</uC99> + <uGnu>0</uGnu> + <useXO>0</useXO> + <v6Lang>1</v6Lang> + <v6LangP>1</v6LangP> + <vShortEn>1</vShortEn> + <vShortWch>1</vShortWch> + <v6Lto>0</v6Lto> + <v6WtE>0</v6WtE> + <v6Rtti>0</v6Rtti> + <VariousControls> + <MiscControls></MiscControls> + <Define>GD32F10X_CL, USE_STDPERIPH_DRIVER, __RTTHREAD__, __CLK_TCK=RT_TICK_PER_SECOND</Define> + <Undefine></Undefine> + <IncludePath>applications;.;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m3;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\spi;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;..\libraries\gd32_drivers;..\..\..\components\finsh;.;..\..\..\include;..\..\..\components\libc\compilers\common;..\..\..\components\libc\compilers\common\nogcc;..\libraries\GD32F10x_Firmware_Library\CMSIS\GD\GD32F10x\Include;..\libraries\GD32F10x_Firmware_Library\CMSIS;..\libraries\GD32F10x_Firmware_Library\GD32F10x_standard_peripheral\Include;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\ipc;..\..\..\examples\utest\testcases\kernel</IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <uSurpInc>0</uSurpInc> + <useXO>0</useXO> + <ClangAsOpt>4</ClangAsOpt> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + <LDads> + <umfTarg>1</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x08000000</TextAddressRange> + <DataAddressRange>0x20000000</DataAddressRange> + <pXoBase></pXoBase> + <ScatterFile>.\gd32_rom.ld</ScatterFile> + <IncludeLibs></IncludeLibs> + <IncludeLibsPath></IncludeLibsPath> + <Misc></Misc> + <LinkerInputFile></LinkerInputFile> + <DisabledWarnings></DisabledWarnings> + </LDads> + </TargetArmAds> + </TargetOption> + <Groups> + <Group> + <GroupName>Applications</GroupName> + <Files> + <File> + <FileName>main.c</FileName> + <FileType>1</FileType> + <FilePath>applications\main.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>CPU</GroupName> + <Files> + <File> + <FileName>backtrace.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\libcpu\arm\common\backtrace.c</FilePath> + </File> + <File> + <FileName>showmem.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\libcpu\arm\common\showmem.c</FilePath> + </File> + <File> + <FileName>div0.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\libcpu\arm\common\div0.c</FilePath> + </File> + <File> + <FileName>cpuport.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\libcpu\arm\cortex-m3\cpuport.c</FilePath> + </File> + <File> + <FileName>context_rvds.S</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\libcpu\arm\cortex-m3\context_rvds.S</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>DeviceDrivers</GroupName> + <GroupOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>1</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>0</GenerateAssemblyFile> + <AssembleAssemblyFile>0</AssembleAssemblyFile> + <PublicsOnly>0</PublicsOnly> + <StopOnExitCode>3</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + <ComprImg>0</ComprImg> + </CommonProperty> + <GroupArmAds> + <Cads> + <interw>2</interw> + <Optim>0</Optim> + <oTime>2</oTime> + <SplitLS>2</SplitLS> + <OneElfS>2</OneElfS> + <Strict>2</Strict> + <EnumInt>2</EnumInt> + <PlainCh>2</PlainCh> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <wLevel>0</wLevel> + <uThumb>2</uThumb> + <uSurpInc>2</uSurpInc> + <uC99>2</uC99> + <uGnu>2</uGnu> + <useXO>2</useXO> + <v6Lang>0</v6Lang> + <v6LangP>0</v6LangP> + <vShortEn>2</vShortEn> + <vShortWch>2</vShortWch> + <v6Lto>2</v6Lto> + <v6WtE>2</v6WtE> + <v6Rtti>2</v6Rtti> + <VariousControls> + <MiscControls></MiscControls> + <Define> </Define> + <Undefine> </Undefine> + <IncludePath> </IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>2</interw> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <thumb>2</thumb> + <SplitLS>2</SplitLS> + <SwStkChk>2</SwStkChk> + <NoWarn>2</NoWarn> + <uSurpInc>2</uSurpInc> + <useXO>2</useXO> + <ClangAsOpt>0</ClangAsOpt> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + </GroupArmAds> + </GroupOption> + <Files> + <File> + <FileName>pin.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\misc\pin.c</FilePath> + </File> + <File> + <FileName>serial.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\serial\serial.c</FilePath> + </File> + <File> + <FileName>spi_core.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\spi\spi_core.c</FilePath> + </File> + <File> + <FileName>spi_dev.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\spi\spi_dev.c</FilePath> + </File> + <File> + <FileName>waitqueue.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\waitqueue.c</FilePath> + </File> + <File> + <FileName>pipe.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\pipe.c</FilePath> + </File> + <File> + <FileName>workqueue.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\workqueue.c</FilePath> + </File> + <File> + <FileName>dataqueue.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\dataqueue.c</FilePath> + </File> + <File> + <FileName>completion.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\completion.c</FilePath> + </File> + <File> + <FileName>ringbuffer.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\ringbuffer.c</FilePath> + </File> + <File> + <FileName>ringblk_buf.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\ringblk_buf.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Drivers</GroupName> + <Files> + <File> + <FileName>board.c</FileName> + <FileType>1</FileType> + <FilePath>board\board.c</FilePath> + </File> + <File> + <FileName>startup_gd32f10x_cl.s</FileName> + <FileType>2</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\CMSIS\GD\GD32F10x\Source\ARM\startup_gd32f10x_cl.s</FilePath> + </File> + <File> + <FileName>drv_gpio.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\gd32_drivers\drv_gpio.c</FilePath> + </File> + <File> + <FileName>drv_usart.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\gd32_drivers\drv_usart.c</FilePath> + </File> + <File> + <FileName>drv_spi.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\gd32_drivers\drv_spi.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Finsh</GroupName> + <Files> + <File> + <FileName>shell.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\shell.c</FilePath> + </File> + <File> + <FileName>msh.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\msh.c</FilePath> + </File> + <File> + <FileName>cmd.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\cmd.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Kernel</GroupName> + <Files> + <File> + <FileName>mempool.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\mempool.c</FilePath> + </File> + <File> + <FileName>kservice.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\kservice.c</FilePath> + </File> + <File> + <FileName>thread.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\thread.c</FilePath> + </File> + <File> + <FileName>irq.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\irq.c</FilePath> + </File> + <File> + <FileName>mem.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\mem.c</FilePath> + </File> + <File> + <FileName>components.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\components.c</FilePath> + </File> + <File> + <FileName>ipc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\ipc.c</FilePath> + </File> + <File> + <FileName>device.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\device.c</FilePath> + </File> + <File> + <FileName>scheduler.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\scheduler.c</FilePath> + </File> + <File> + <FileName>clock.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\clock.c</FilePath> + </File> + <File> + <FileName>idle.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\idle.c</FilePath> + </File> + <File> + <FileName>timer.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\timer.c</FilePath> + </File> + <File> + <FileName>object.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\object.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>libc</GroupName> + <Files> + <File> + <FileName>time.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\libc\compilers\common\time.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Libraries</GroupName> + <Files> + <File> + <FileName>gd32f10x_spi.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\GD32F10x_standard_peripheral\Source\gd32f10x_spi.c</FilePath> + </File> + <File> + <FileName>gd32f10x_exti.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\GD32F10x_standard_peripheral\Source\gd32f10x_exti.c</FilePath> + </File> + <File> + <FileName>gd32f10x_gpio.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\GD32F10x_standard_peripheral\Source\gd32f10x_gpio.c</FilePath> + </File> + <File> + <FileName>gd32f10x_misc.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\GD32F10x_standard_peripheral\Source\gd32f10x_misc.c</FilePath> + </File> + <File> + <FileName>system_gd32f10x.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\CMSIS\GD\GD32F10x\Source\system_gd32f10x.c</FilePath> + </File> + <File> + <FileName>gd32f10x_rcu.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\GD32F10x_standard_peripheral\Source\gd32f10x_rcu.c</FilePath> + </File> + <File> + <FileName>gd32f10x_usart.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F10x_Firmware_Library\GD32F10x_standard_peripheral\Source\gd32f10x_usart.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>::CMSIS</GroupName> + </Group> + </Groups> + </Target> + </Targets> + + <RTE> + <apis/> + <components> + <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.4.0" condition="ARMv6_7_8-M Device"> + <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/> + <targetInfos> + <targetInfo name="rt-thread"/> + </targetInfos> + </component> + </components> + <files/> + </RTE> + + <LayerInfo> + <Layers> + <Layer> + <LayName><Project Info></LayName> + <LayDesc></LayDesc> + <LayUrl></LayUrl> + <LayKeys></LayKeys> + <LayCat></LayCat> + <LayLic></LayLic> + <LayTarg>0</LayTarg> + <LayPrjMark>1</LayPrjMark> + </Layer> + </Layers> + </LayerInfo> + +</Project> diff --git a/bsp/gd32/gd32107c-eval/rtconfig.h b/bsp/gd32/gd32107c-eval/rtconfig.h new file mode 100644 index 0000000000..21caecd9ee --- /dev/null +++ b/bsp/gd32/gd32107c-eval/rtconfig.h @@ -0,0 +1,212 @@ +#ifndef RT_CONFIG_H__ +#define RT_CONFIG_H__ + +/* Automatically generated file; DO NOT EDIT. */ +/* RT-Thread Configuration */ + +/* RT-Thread Kernel */ + +#define RT_NAME_MAX 8 +#define RT_ALIGN_SIZE 4 +#define RT_THREAD_PRIORITY_32 +#define RT_THREAD_PRIORITY_MAX 32 +#define RT_TICK_PER_SECOND 100 +#define RT_USING_OVERFLOW_CHECK +#define RT_USING_HOOK +#define RT_USING_IDLE_HOOK +#define RT_IDLE_HOOK_LIST_SIZE 4 +#define IDLE_THREAD_STACK_SIZE 256 + +/* kservice optimization */ + +#define RT_DEBUG +#define RT_DEBUG_COLOR + +/* Inter-Thread communication */ + +#define RT_USING_SEMAPHORE +#define RT_USING_MUTEX +#define RT_USING_EVENT +#define RT_USING_MAILBOX +#define RT_USING_MESSAGEQUEUE + +/* Memory Management */ + +#define RT_USING_MEMPOOL +#define RT_USING_SMALL_MEM +#define RT_USING_SMALL_MEM_AS_HEAP +#define RT_USING_HEAP + +/* Kernel Device Object */ + +#define RT_USING_DEVICE +#define RT_USING_CONSOLE +#define RT_CONSOLEBUF_SIZE 128 +#define RT_CONSOLE_DEVICE_NAME "uart1" +#define RT_VER_NUM 0x40100 + +/* RT-Thread Components */ + +#define RT_USING_COMPONENTS_INIT +#define RT_USING_USER_MAIN +#define RT_MAIN_THREAD_STACK_SIZE 2048 +#define RT_MAIN_THREAD_PRIORITY 10 + +/* C++ features */ + + +/* Command shell */ + +#define RT_USING_FINSH +#define RT_USING_MSH +#define FINSH_USING_MSH +#define FINSH_THREAD_NAME "tshell" +#define FINSH_THREAD_PRIORITY 20 +#define FINSH_THREAD_STACK_SIZE 4096 +#define FINSH_USING_HISTORY +#define FINSH_HISTORY_LINES 5 +#define FINSH_USING_SYMTAB +#define FINSH_CMD_SIZE 80 +#define MSH_USING_BUILT_IN_COMMANDS +#define FINSH_USING_DESCRIPTION +#define FINSH_ARG_MAX 10 + +/* Device virtual file system */ + + +/* Device Drivers */ + +#define RT_USING_DEVICE_IPC +#define RT_USING_SYSTEM_WORKQUEUE +#define RT_SYSTEM_WORKQUEUE_STACKSIZE 2048 +#define RT_SYSTEM_WORKQUEUE_PRIORITY 23 +#define RT_USING_SERIAL +#define RT_USING_SERIAL_V1 +#define RT_SERIAL_USING_DMA +#define RT_SERIAL_RB_BUFSZ 64 +#define RT_USING_PIN +#define RT_USING_SPI + +/* Using USB */ + + +/* POSIX layer and C standard library */ + +#define RT_LIBC_USING_TIME +#define RT_LIBC_DEFAULT_TIMEZONE 8 + +/* POSIX (Portable Operating System Interface) layer */ + + +/* Interprocess Communication (IPC) */ + + +/* Socket is in the 'Network' category */ + +/* Network */ + +/* Socket abstraction layer */ + + +/* Network interface device */ + + +/* light weight TCP/IP stack */ + + +/* AT commands */ + + +/* VBUS(Virtual Software BUS) */ + + +/* Utilities */ + + +/* RT-Thread Utestcases */ + + +/* RT-Thread online packages */ + +/* IoT - internet of things */ + + +/* Wi-Fi */ + +/* Marvell WiFi */ + + +/* Wiced WiFi */ + + +/* IoT Cloud */ + + +/* security packages */ + + +/* language packages */ + + +/* multimedia packages */ + +/* LVGL: powerful and easy-to-use embedded GUI library */ + + +/* u8g2: a monochrome graphic library */ + + +/* PainterEngine: A cross-platform graphics application framework written in C language */ + + +/* tools packages */ + + +/* system packages */ + + +/* enhanced kernel services */ + + +/* acceleration: Assembly language or algorithmic acceleration packages */ + + +/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */ + + +/* Micrium: Micrium software products porting for RT-Thread */ + + +/* peripheral libraries and drivers */ + + +/* AI packages */ + + +/* miscellaneous packages */ + +/* samples: kernel and components samples */ + + +/* entertainment: terminal games and other interesting software packages */ + + +/* Hardware Drivers Config */ + +#define SOC_SERIES_GD32F10x +#define SOC_GD32107V + +/* Onboard Peripheral Drivers */ + +/* On-chip Peripheral Drivers */ + +#define BSP_USING_GPIO +#define BSP_USING_UART +#define BSP_USING_UART1 +#define BSP_USING_SPI +#define BSP_USING_SPI1 + +/* Board extended module Drivers */ + + +#endif diff --git a/bsp/gd32/gd32107c-eval/rtconfig.py b/bsp/gd32/gd32107c-eval/rtconfig.py new file mode 100644 index 0000000000..4285e6b03c --- /dev/null +++ b/bsp/gd32/gd32107c-eval/rtconfig.py @@ -0,0 +1,150 @@ +import os + +# toolchains options +ARCH='arm' +CPU='cortex-m3' +CROSS_TOOL='keil' + +# bsp lib config +BSP_LIBRARY_TYPE = None + +if os.getenv('RTT_CC'): + CROSS_TOOL = os.getenv('RTT_CC') +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') + +# cross_tool provides the cross compiler +# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR +if CROSS_TOOL == 'gcc': + PLATFORM = 'gcc' + EXEC_PATH = r'C:\Users\XXYYZZ' +elif CROSS_TOOL == 'keil': + PLATFORM = 'armcc' + EXEC_PATH = r'C:/Keil_v5' +elif CROSS_TOOL == 'iar': + PLATFORM = 'iar' + EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0' + +if os.getenv('RTT_EXEC_PATH'): + EXEC_PATH = os.getenv('RTT_EXEC_PATH') + +BUILD = 'debug' + +if PLATFORM == 'gcc': + # toolchains + PREFIX = 'arm-none-eabi-' + CC = PREFIX + 'gcc' + AS = PREFIX + 'gcc' + AR = PREFIX + 'ar' + CXX = PREFIX + 'g++' + LINK = PREFIX + 'gcc' + TARGET_EXT = 'elf' + SIZE = PREFIX + 'size' + OBJDUMP = PREFIX + 'objdump' + OBJCPY = PREFIX + 'objcopy' + + DEVICE = ' -mcpu=cortex-m3 -mthumb -ffunction-sections -fdata-sections' + CFLAGS = DEVICE + ' -Dgcc' + AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb ' + LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.ld' + + CPATH = '' + LPATH = '' + + if BUILD == 'debug': + CFLAGS += ' -O0 -gdwarf-2 -g' + AFLAGS += ' -gdwarf-2' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + + POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' + +elif PLATFORM == 'armcc': + # toolchains + CC = 'armcc' + CXX = 'armcc' + AS = 'armasm' + AR = 'armar' + LINK = 'armlink' + TARGET_EXT = 'axf' + + DEVICE = ' --cpu Cortex-M3.fp ' + CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99' + AFLAGS = DEVICE + ' --apcs=interwork ' + LFLAGS = DEVICE + ' --scatter "board\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rtthread.map --strict' + CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include' + LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib' + + CFLAGS += ' -D__MICROLIB ' + AFLAGS += ' --pd "__MICROLIB SETA 1" ' + LFLAGS += ' --library_type=microlib ' + EXEC_PATH += '/ARM/ARMCC/bin/' + + if BUILD == 'debug': + CFLAGS += ' -g -O0' + AFLAGS += ' -g' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + CFLAGS += ' -std=c99' + + POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET' + +elif PLATFORM == 'iar': + # toolchains + CC = 'iccarm' + CXX = 'iccarm' + AS = 'iasmarm' + AR = 'iarchive' + LINK = 'ilinkarm' + TARGET_EXT = 'out' + + DEVICE = '-Dewarm' + + CFLAGS = DEVICE + CFLAGS += ' --diag_suppress Pa050' + CFLAGS += ' --no_cse' + CFLAGS += ' --no_unroll' + CFLAGS += ' --no_inline' + CFLAGS += ' --no_code_motion' + CFLAGS += ' --no_tbaa' + CFLAGS += ' --no_clustering' + CFLAGS += ' --no_scheduling' + CFLAGS += ' --endian=little' + CFLAGS += ' --cpu=Cortex-M3' + CFLAGS += ' -e' + CFLAGS += ' --fpu=None' + CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"' + CFLAGS += ' --silent' + + AFLAGS = DEVICE + AFLAGS += ' -s+' + AFLAGS += ' -w+' + AFLAGS += ' -r' + AFLAGS += ' --cpu Cortex-M3' + AFLAGS += ' --fpu None' + AFLAGS += ' -S' + + if BUILD == 'debug': + CFLAGS += ' --debug' + CFLAGS += ' -On' + else: + CFLAGS += ' -Oh' + + LFLAGS = ' --config "board/linker_scripts/link.icf"' + LFLAGS += ' --entry __iar_program_start' + + CXXFLAGS = CFLAGS + + EXEC_PATH = EXEC_PATH + '/arm/bin/' + POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT, dist_dir): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT, dist_dir) diff --git a/bsp/gd32/gd32107c-eval/template.uvoptx b/bsp/gd32/gd32107c-eval/template.uvoptx new file mode 100644 index 0000000000..4dfb02c5ad --- /dev/null +++ b/bsp/gd32/gd32107c-eval/template.uvoptx @@ -0,0 +1,180 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd"> + + <SchemaVersion>1.0</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Extensions> + <cExt>*.c</cExt> + <aExt>*.s*; *.src; *.a*</aExt> + <oExt>*.obj; *.o</oExt> + <lExt>*.lib</lExt> + <tExt>*.txt; *.h; *.inc</tExt> + <pExt>*.plm</pExt> + <CppX>*.cpp</CppX> + <nMigrate>0</nMigrate> + </Extensions> + + <DaveTm> + <dwLowDateTime>0</dwLowDateTime> + <dwHighDateTime>0</dwHighDateTime> + </DaveTm> + + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>12000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>0</RunSim> + <RunTarget>1</RunTarget> + <RunAbUc>0</RunAbUc> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\build\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>1</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>1</IsCurrentTarget> + </OPTFL> + <CpuCode>255</CpuCode> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <tRtrace>1</tRtrace> + <sRSysVw>1</sRSysVw> + <tRSysVw>1</tRSysVw> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <bEvRecOn>1</bEvRecOn> + <bSchkAxf>0</bSchkAxf> + <bTchkAxf>0</bTchkAxf> + <nTsel>3</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>BIN\CMSIS_AGDI.dll</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0GD32F10x_CL -FL040000 -FS08000000 -FP0($$Device:GD32F107VC$Flash\GD32F10x_CL.FLM)</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint/> + <Tracepoint> + <THDelay>0</THDelay> + </Tracepoint> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>0</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>0</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + <bLintAuto>0</bLintAuto> + <bAutoGenD>0</bAutoGenD> + <LntExFlags>0</LntExFlags> + <pMisraName></pMisraName> + <pszMrule></pszMrule> + <pSingCmds></pSingCmds> + <pMultCmds></pMultCmds> + <pMisraNamep></pMisraNamep> + <pszMrulep></pszMrulep> + <pSingCmdsp></pSingCmdsp> + <pMultCmdsp></pMultCmdsp> + </TargetOption> + </Target> + + <Group> + <GroupName>::CMSIS</GroupName> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <cbSel>0</cbSel> + <RteFlg>1</RteFlg> + </Group> + +</ProjectOpt> diff --git a/bsp/gd32/gd32107c-eval/template.uvproj b/bsp/gd32/gd32107c-eval/template.uvproj new file mode 100644 index 0000000000..a165464790 --- /dev/null +++ b/bsp/gd32/gd32107c-eval/template.uvproj @@ -0,0 +1,628 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd"> + + <SchemaVersion>1.1</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Targets> + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <uAC6>0</uAC6> + <TargetOption> + <TargetCommonOption> + <Device>GD32F107VC</Device> + <Vendor>GigaDevice</Vendor> + <Cpu>IRAM(0x20000000-0x20018000) IROM(0x08000000-0x08040000) CLOCK(12000000) CPUTYPE("Cortex-M3")</Cpu> + <FlashUtilSpec></FlashUtilSpec> + <StartupFile>"Startup\GD\GD32F10x\startup_gd32f10x.s" ("GD32F10x Startup Code")</StartupFile> + <FlashDriverDll>UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0GD32F10x_3MB -FS08000000 -FL0100000)</FlashDriverDll> + <DeviceId>0</DeviceId> + <RegisterFile>gd32f10x0.h</RegisterFile> + <MemoryEnv></MemoryEnv> + <Cmp></Cmp> + <Asm></Asm> + <Linker></Linker> + <OHString></OHString> + <InfinionOptionDll></InfinionOptionDll> + <SLE66CMisc></SLE66CMisc> + <SLE66AMisc></SLE66AMisc> + <SLE66LinkerMisc></SLE66LinkerMisc> + <SFDFile>SFD\GD\GD32F10x\GD32F10x.SFR</SFDFile> + <bCustSvd>0</bCustSvd> + <UseEnv>0</UseEnv> + <BinPath></BinPath> + <IncludePath></IncludePath> + <LibPath></LibPath> + <RegisterFilePath>GD\GD32F10x\</RegisterFilePath> + <DBRegisterFilePath>GD\GD32F10x\</DBRegisterFilePath> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + </TargetStatus> + <OutputDirectory>.\output\</OutputDirectory> + <OutputName>rtthread</OutputName> + <CreateExecutable>1</CreateExecutable> + <CreateLib>0</CreateLib> + <CreateHexFile>1</CreateHexFile> + <DebugInformation>1</DebugInformation> + <BrowseInformation>1</BrowseInformation> + <ListingPath>.\build\</ListingPath> + <HexFormatSelection>1</HexFormatSelection> + <Merge32K>0</Merge32K> + <CreateBatchFile>0</CreateBatchFile> + <BeforeCompile> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopU1X>0</nStopU1X> + <nStopU2X>0</nStopU2X> + </BeforeCompile> + <BeforeMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopB1X>0</nStopB1X> + <nStopB2X>0</nStopB2X> + </BeforeMake> + <AfterMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopA1X>0</nStopA1X> + <nStopA2X>0</nStopA2X> + </AfterMake> + <SelectedForBatchBuild>0</SelectedForBatchBuild> + <SVCSIdString></SVCSIdString> + </TargetCommonOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>1</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>0</GenerateAssemblyFile> + <AssembleAssemblyFile>0</AssembleAssemblyFile> + <PublicsOnly>0</PublicsOnly> + <StopOnExitCode>3</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + <ComprImg>1</ComprImg> + </CommonProperty> + <DllOption> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments> -REMAP</SimDllArguments> + <SimDlgDll>DCM.DLL</SimDlgDll> + <SimDlgDllArguments>-pCM3</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDll>TCM.DLL</TargetDlgDll> + <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments> + </DllOption> + <DebugOption> + <OPTHX> + <HexSelection>1</HexSelection> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + <Oh166RecLen>16</Oh166RecLen> + </OPTHX> + <Simulator> + <UseSimulator>0</UseSimulator> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>1</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <LimitSpeedToRealTime>0</LimitSpeedToRealTime> + <RestoreSysVw>1</RestoreSysVw> + </Simulator> + <Target> + <UseTarget>1</UseTarget> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>0</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <RestoreTracepoints>0</RestoreTracepoints> + <RestoreSysVw>1</RestoreSysVw> + </Target> + <RunDebugAfterBuild>0</RunDebugAfterBuild> + <TargetSelection>3</TargetSelection> + <SimDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + </SimDlls> + <TargetDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + <Driver>BIN\CMSIS_AGDI.dll</Driver> + </TargetDlls> + </DebugOption> + <Utilities> + <Flash1> + <UseTargetDll>1</UseTargetDll> + <UseExternalTool>0</UseExternalTool> + <RunIndependent>0</RunIndependent> + <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> + <Capability>1</Capability> + <DriverSelection>4096</DriverSelection> + </Flash1> + <bUseTDR>1</bUseTDR> + <Flash2>BIN\UL2CM3.DLL</Flash2> + <Flash3>"" ()</Flash3> + <Flash4></Flash4> + <pFcarmOut></pFcarmOut> + <pFcarmGrp></pFcarmGrp> + <pFcArmRoot></pFcArmRoot> + <FcArmLst>0</FcArmLst> + </Utilities> + <TargetArmAds> + <ArmAdsMisc> + <GenerateListings>0</GenerateListings> + <asHll>1</asHll> + <asAsm>1</asAsm> + <asMacX>1</asMacX> + <asSyms>1</asSyms> + <asFals>1</asFals> + <asDbgD>1</asDbgD> + <asForm>1</asForm> + <ldLst>0</ldLst> + <ldmm>1</ldmm> + <ldXref>1</ldXref> + <BigEnd>0</BigEnd> + <AdsALst>1</AdsALst> + <AdsACrf>1</AdsACrf> + <AdsANop>0</AdsANop> + <AdsANot>0</AdsANot> + <AdsLLst>1</AdsLLst> + <AdsLmap>1</AdsLmap> + <AdsLcgr>1</AdsLcgr> + <AdsLsym>1</AdsLsym> + <AdsLszi>1</AdsLszi> + <AdsLtoi>1</AdsLtoi> + <AdsLsun>1</AdsLsun> + <AdsLven>1</AdsLven> + <AdsLsxf>1</AdsLsxf> + <RvctClst>0</RvctClst> + <GenPPlst>0</GenPPlst> + <AdsCpuType>"Cortex-M3"</AdsCpuType> + <RvctDeviceName></RvctDeviceName> + <mOS>0</mOS> + <uocRom>0</uocRom> + <uocRam>0</uocRam> + <hadIROM>1</hadIROM> + <hadIRAM>1</hadIRAM> + <hadXRAM>0</hadXRAM> + <uocXRam>0</uocXRam> + <RvdsVP>2</RvdsVP> + <hadIRAM2>1</hadIRAM2> + <hadIROM2>0</hadIROM2> + <StupSel>8</StupSel> + <useUlib>1</useUlib> + <EndSel>0</EndSel> + <uLtcg>0</uLtcg> + <nSecure>0</nSecure> + <RoSelD>3</RoSelD> + <RwSelD>3</RwSelD> + <CodeSel>0</CodeSel> + <OptFeed>0</OptFeed> + <NoZi1>0</NoZi1> + <NoZi2>0</NoZi2> + <NoZi3>0</NoZi3> + <NoZi4>0</NoZi4> + <NoZi5>0</NoZi5> + <Ro1Chk>0</Ro1Chk> + <Ro2Chk>0</Ro2Chk> + <Ro3Chk>0</Ro3Chk> + <Ir1Chk>1</Ir1Chk> + <Ir2Chk>0</Ir2Chk> + <Ra1Chk>0</Ra1Chk> + <Ra2Chk>0</Ra2Chk> + <Ra3Chk>0</Ra3Chk> + <Im1Chk>1</Im1Chk> + <Im2Chk>0</Im2Chk> + <OnChipMemories> + <Ocm1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocm4> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x10000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x100000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x100000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x10000</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x10000000</StartAddress> + <Size>0x10000</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector></RvctStartVector> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>1</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>1</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>2</wLevel> + <uThumb>0</uThumb> + <uSurpInc>0</uSurpInc> + <uC99>1</uC99> + <uGnu>0</uGnu> + <useXO>0</useXO> + <v6Lang>1</v6Lang> + <v6LangP>1</v6LangP> + <vShortEn>1</vShortEn> + <vShortWch>1</vShortWch> + <v6Lto>0</v6Lto> + <v6WtE>0</v6WtE> + <v6Rtti>0</v6Rtti> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Include;..\..\..\Library\Firmware\CMSIS\GD\GD32F10x\Include;..\..\..\Library\Utilities;..\</IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <uSurpInc>0</uSurpInc> + <useXO>0</useXO> + <uClangAs>0</uClangAs> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + <LDads> + <umfTarg>1</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x08000000</TextAddressRange> + <DataAddressRange>0x20000000</DataAddressRange> + <pXoBase></pXoBase> + <ScatterFile></ScatterFile> + <IncludeLibs></IncludeLibs> + <IncludeLibsPath></IncludeLibsPath> + <Misc></Misc> + <LinkerInputFile></LinkerInputFile> + <DisabledWarnings></DisabledWarnings> + </LDads> + </TargetArmAds> + </TargetOption> + <Groups> + <Group> + <GroupName>Application</GroupName> + <Files> + <File> + <FileName>main.c</FileName> + <FileType>1</FileType> + <FilePath>..\main.c</FilePath> + </File> + <File> + <FileName>gd32f10x_it.c</FileName> + <FileType>1</FileType> + <FilePath>..\gd32f10x_it.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>CMSIS</GroupName> + <Files> + <File> + <FileName>system_gd32f10x.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\CMSIS\GD\GD32F10x\Source\system_gd32f10x.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>GD32F10x_Peripherals</GroupName> + <Files> + <File> + <FileName>gd32f10x_adc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_adc.c</FilePath> + </File> + <File> + <FileName>gd32f10x_can.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_can.c</FilePath> + </File> + <File> + <FileName>gd32f10x_crc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_crc.c</FilePath> + </File> + <File> + <FileName>gd32f10x_ctc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_ctc.c</FilePath> + </File> + <File> + <FileName>gd32f10x_dac.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_dac.c</FilePath> + </File> + <File> + <FileName>gd32f10x_dbg.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_dbg.c</FilePath> + </File> + <File> + <FileName>gd32f10x_dci.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_dci.c</FilePath> + </File> + <File> + <FileName>gd32f10x_dma.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_dma.c</FilePath> + </File> + <File> + <FileName>gd32f10x_enet.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_enet.c</FilePath> + </File> + <File> + <FileName>gd32f10x_exmc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_exmc.c</FilePath> + </File> + <File> + <FileName>gd32f10x_exti.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_exti.c</FilePath> + </File> + <File> + <FileName>gd32f10x_fmc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_fmc.c</FilePath> + </File> + <File> + <FileName>gd32f10x_fwdgt.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_fwdgt.c</FilePath> + </File> + <File> + <FileName>gd32f10x_gpio.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_gpio.c</FilePath> + </File> + <File> + <FileName>gd32f10x_i2c.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_i2c.c</FilePath> + </File> + <File> + <FileName>gd32f10x_ipa.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_ipa.c</FilePath> + </File> + <File> + <FileName>gd32f10x_iref.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_iref.c</FilePath> + </File> + <File> + <FileName>gd32f10x_misc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_misc.c</FilePath> + </File> + <File> + <FileName>gd32f10x_pmu.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_pmu.c</FilePath> + </File> + <File> + <FileName>gd32f10x_rcu.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_rcu.c</FilePath> + </File> + <File> + <FileName>gd32f10x_rtc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_rtc.c</FilePath> + </File> + <File> + <FileName>gd32f10x_sdio.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_sdio.c</FilePath> + </File> + <File> + <FileName>gd32f10x_spi.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_spi.c</FilePath> + </File> + <File> + <FileName>gd32f10x_syscfg.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_syscfg.c</FilePath> + </File> + <File> + <FileName>gd32f10x_timer.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_timer.c</FilePath> + </File> + <File> + <FileName>gd32f10x_tli.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_tli.c</FilePath> + </File> + <File> + <FileName>gd32f10x_trng.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_trng.c</FilePath> + </File> + <File> + <FileName>gd32f10x_usart.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_usart.c</FilePath> + </File> + <File> + <FileName>gd32f10x_wwdgt.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F10x_standard_peripheral\Source\gd32f10x_wwdgt.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>GD32F10x_EVAL</GroupName> + <Files> + <File> + <FileName>gd32f107c_eval.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Utilities\gd32f107c_eval.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Startup</GroupName> + <Files> + <File> + <FileName>startup_gd32f10x.s</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\Library\Firmware\CMSIS\GD\GD32F10x\Source\ARM\startup_gd32f10x.s</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Doc</GroupName> + <Files> + <File> + <FileName>readme.txt</FileName> + <FileType>5</FileType> + <FilePath>..\readme.txt</FilePath> + </File> + </Files> + </Group> + </Groups> + </Target> + </Targets> + +</Project> diff --git a/bsp/gd32/gd32107c-eval/template.uvprojx b/bsp/gd32/gd32107c-eval/template.uvprojx new file mode 100644 index 0000000000..a80f13ffb9 --- /dev/null +++ b/bsp/gd32/gd32107c-eval/template.uvprojx @@ -0,0 +1,418 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd"> + + <SchemaVersion>2.1</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Targets> + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <pCCUsed>5060750::V5.06 update 6 (build 750)::.\ARMCC</pCCUsed> + <uAC6>0</uAC6> + <TargetOption> + <TargetCommonOption> + <Device>GD32F107VC</Device> + <Vendor>GigaDevice</Vendor> + <PackID>GigaDevice.GD32F10x_DFP.2.0.1</PackID> + <PackURL>http://www.keil.com/pack/</PackURL> + <Cpu>IRAM(0x20000000,0x00018000) IROM(0x08000000,0x00040000) CPUTYPE("Cortex-M3") CLOCK(10800000) ELITTLE</Cpu> + <FlashUtilSpec></FlashUtilSpec> + <StartupFile></StartupFile> + <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0GD32F10x_CL -FS08000000 -FL040000 -FP0($$Device:GD32F107VC$Flash\GD32F10x_CL.FLM))</FlashDriverDll> + <DeviceId>0</DeviceId> + <RegisterFile>$$Device:GD32F107VC$Device\Include\gd32f10x.h</RegisterFile> + <MemoryEnv></MemoryEnv> + <Cmp></Cmp> + <Asm></Asm> + <Linker></Linker> + <OHString></OHString> + <InfinionOptionDll></InfinionOptionDll> + <SLE66CMisc></SLE66CMisc> + <SLE66AMisc></SLE66AMisc> + <SLE66LinkerMisc></SLE66LinkerMisc> + <SFDFile>$$Device:GD32F107VC$SVD\GD32F10x\GD32F10x_CL.svd</SFDFile> + <bCustSvd>0</bCustSvd> + <UseEnv>0</UseEnv> + <BinPath></BinPath> + <IncludePath></IncludePath> + <LibPath></LibPath> + <RegisterFilePath></RegisterFilePath> + <DBRegisterFilePath></DBRegisterFilePath> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + </TargetStatus> + <OutputDirectory>.\build\</OutputDirectory> + <OutputName>rtthread</OutputName> + <CreateExecutable>1</CreateExecutable> + <CreateLib>0</CreateLib> + <CreateHexFile>0</CreateHexFile> + <DebugInformation>1</DebugInformation> + <BrowseInformation>0</BrowseInformation> + <ListingPath>.\build\</ListingPath> + <HexFormatSelection>1</HexFormatSelection> + <Merge32K>0</Merge32K> + <CreateBatchFile>0</CreateBatchFile> + <BeforeCompile> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopU1X>0</nStopU1X> + <nStopU2X>0</nStopU2X> + </BeforeCompile> + <BeforeMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopB1X>0</nStopB1X> + <nStopB2X>0</nStopB2X> + </BeforeMake> + <AfterMake> + <RunUserProg1>1</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopA1X>0</nStopA1X> + <nStopA2X>0</nStopA2X> + </AfterMake> + <SelectedForBatchBuild>0</SelectedForBatchBuild> + <SVCSIdString></SVCSIdString> + </TargetCommonOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>1</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>0</GenerateAssemblyFile> + <AssembleAssemblyFile>0</AssembleAssemblyFile> + <PublicsOnly>0</PublicsOnly> + <StopOnExitCode>3</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + <ComprImg>1</ComprImg> + </CommonProperty> + <DllOption> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments> -REMAP</SimDllArguments> + <SimDlgDll>DCM.DLL</SimDlgDll> + <SimDlgDllArguments>-pCM3</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDll>TCM.DLL</TargetDlgDll> + <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments> + </DllOption> + <DebugOption> + <OPTHX> + <HexSelection>1</HexSelection> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + <Oh166RecLen>16</Oh166RecLen> + </OPTHX> + </DebugOption> + <Utilities> + <Flash1> + <UseTargetDll>1</UseTargetDll> + <UseExternalTool>0</UseExternalTool> + <RunIndependent>0</RunIndependent> + <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> + <Capability>1</Capability> + <DriverSelection>4096</DriverSelection> + </Flash1> + <bUseTDR>1</bUseTDR> + <Flash2>BIN\UL2CM3.DLL</Flash2> + <Flash3></Flash3> + <Flash4></Flash4> + <pFcarmOut></pFcarmOut> + <pFcarmGrp></pFcarmGrp> + <pFcArmRoot></pFcArmRoot> + <FcArmLst>0</FcArmLst> + </Utilities> + <TargetArmAds> + <ArmAdsMisc> + <GenerateListings>0</GenerateListings> + <asHll>1</asHll> + <asAsm>1</asAsm> + <asMacX>1</asMacX> + <asSyms>1</asSyms> + <asFals>1</asFals> + <asDbgD>1</asDbgD> + <asForm>1</asForm> + <ldLst>0</ldLst> + <ldmm>1</ldmm> + <ldXref>1</ldXref> + <BigEnd>0</BigEnd> + <AdsALst>1</AdsALst> + <AdsACrf>1</AdsACrf> + <AdsANop>0</AdsANop> + <AdsANot>0</AdsANot> + <AdsLLst>1</AdsLLst> + <AdsLmap>1</AdsLmap> + <AdsLcgr>1</AdsLcgr> + <AdsLsym>1</AdsLsym> + <AdsLszi>1</AdsLszi> + <AdsLtoi>1</AdsLtoi> + <AdsLsun>1</AdsLsun> + <AdsLven>1</AdsLven> + <AdsLsxf>1</AdsLsxf> + <RvctClst>0</RvctClst> + <GenPPlst>0</GenPPlst> + <AdsCpuType>"Cortex-M3"</AdsCpuType> + <RvctDeviceName></RvctDeviceName> + <mOS>0</mOS> + <uocRom>0</uocRom> + <uocRam>0</uocRam> + <hadIROM>1</hadIROM> + <hadIRAM>1</hadIRAM> + <hadXRAM>0</hadXRAM> + <uocXRam>0</uocXRam> + <RvdsVP>0</RvdsVP> + <RvdsMve>0</RvdsMve> + <RvdsCdeCp>0</RvdsCdeCp> + <hadIRAM2>0</hadIRAM2> + <hadIROM2>0</hadIROM2> + <StupSel>8</StupSel> + <useUlib>0</useUlib> + <EndSel>0</EndSel> + <uLtcg>0</uLtcg> + <nSecure>0</nSecure> + <RoSelD>3</RoSelD> + <RwSelD>3</RwSelD> + <CodeSel>0</CodeSel> + <OptFeed>0</OptFeed> + <NoZi1>0</NoZi1> + <NoZi2>0</NoZi2> + <NoZi3>0</NoZi3> + <NoZi4>0</NoZi4> + <NoZi5>0</NoZi5> + <Ro1Chk>0</Ro1Chk> + <Ro2Chk>0</Ro2Chk> + <Ro3Chk>0</Ro3Chk> + <Ir1Chk>1</Ir1Chk> + <Ir2Chk>0</Ir2Chk> + <Ra1Chk>0</Ra1Chk> + <Ra2Chk>0</Ra2Chk> + <Ra3Chk>0</Ra3Chk> + <Im1Chk>1</Im1Chk> + <Im2Chk>0</Im2Chk> + <OnChipMemories> + <Ocm1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocm4> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x18000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x40000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x40000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x18000</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector></RvctStartVector> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>4</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>0</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>0</wLevel> + <uThumb>0</uThumb> + <uSurpInc>0</uSurpInc> + <uC99>1</uC99> + <uGnu>0</uGnu> + <useXO>0</useXO> + <v6Lang>1</v6Lang> + <v6LangP>1</v6LangP> + <vShortEn>1</vShortEn> + <vShortWch>1</vShortWch> + <v6Lto>0</v6Lto> + <v6WtE>0</v6WtE> + <v6Rtti>0</v6Rtti> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <uSurpInc>0</uSurpInc> + <useXO>0</useXO> + <ClangAsOpt>4</ClangAsOpt> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + <LDads> + <umfTarg>1</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x08000000</TextAddressRange> + <DataAddressRange>0x20000000</DataAddressRange> + <pXoBase></pXoBase> + <ScatterFile>.\gd32_rom.ld</ScatterFile> + <IncludeLibs></IncludeLibs> + <IncludeLibsPath></IncludeLibsPath> + <Misc></Misc> + <LinkerInputFile></LinkerInputFile> + <DisabledWarnings></DisabledWarnings> + </LDads> + </TargetArmAds> + </TargetOption> + <Groups> + <Group> + <GroupName>::CMSIS</GroupName> + </Group> + </Groups> + </Target> + </Targets> + + <RTE> + <apis/> + <components> + <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.4.0" condition="ARMv6_7_8-M Device"> + <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/> + <targetInfos> + <targetInfo name="rt-thread"/> + </targetInfos> + </component> + </components> + <files/> + </RTE> + + <LayerInfo> + <Layers> + <Layer> + <LayName><Project Info></LayName> + <LayDesc></LayDesc> + <LayUrl></LayUrl> + <LayKeys></LayKeys> + <LayCat></LayCat> + <LayLic></LayLic> + <LayTarg>0</LayTarg> + <LayPrjMark>1</LayPrjMark> + </Layer> + </Layers> + </LayerInfo> + +</Project> diff --git a/bsp/gd32/gd32303e-eval/.config b/bsp/gd32/gd32303e-eval/.config new file mode 100644 index 0000000000..c8f9feac51 --- /dev/null +++ b/bsp/gd32/gd32303e-eval/.config @@ -0,0 +1,636 @@ +# +# Automatically generated file; DO NOT EDIT. +# RT-Thread Configuration +# + +# +# RT-Thread Kernel +# +CONFIG_RT_NAME_MAX=8 +# CONFIG_RT_USING_BIG_ENDIAN is not set +# CONFIG_RT_USING_ARCH_DATA_TYPE is not set +# CONFIG_RT_USING_SMP is not set +CONFIG_RT_ALIGN_SIZE=4 +# CONFIG_RT_THREAD_PRIORITY_8 is not set +CONFIG_RT_THREAD_PRIORITY_32=y +# CONFIG_RT_THREAD_PRIORITY_256 is not set +CONFIG_RT_THREAD_PRIORITY_MAX=32 +CONFIG_RT_TICK_PER_SECOND=100 +CONFIG_RT_USING_OVERFLOW_CHECK=y +CONFIG_RT_USING_HOOK=y +CONFIG_RT_USING_IDLE_HOOK=y +CONFIG_RT_IDLE_HOOK_LIST_SIZE=4 +CONFIG_IDLE_THREAD_STACK_SIZE=256 +# CONFIG_RT_USING_TIMER_SOFT is not set + +# +# kservice optimization +# +# CONFIG_RT_KSERVICE_USING_STDLIB is not set +# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set +# CONFIG_RT_USING_ASM_MEMCPY is not set +CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y +# CONFIG_RT_DEBUG_INIT_CONFIG is not set +# CONFIG_RT_DEBUG_THREAD_CONFIG is not set +# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set +# CONFIG_RT_DEBUG_IPC_CONFIG is not set +# CONFIG_RT_DEBUG_TIMER_CONFIG is not set +# CONFIG_RT_DEBUG_IRQ_CONFIG is not set +# CONFIG_RT_DEBUG_MEM_CONFIG is not set +# CONFIG_RT_DEBUG_SLAB_CONFIG is not set +# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set +# CONFIG_RT_DEBUG_MODULE_CONFIG is not set + +# +# Inter-Thread communication +# +CONFIG_RT_USING_SEMAPHORE=y +CONFIG_RT_USING_MUTEX=y +CONFIG_RT_USING_EVENT=y +CONFIG_RT_USING_MAILBOX=y +CONFIG_RT_USING_MESSAGEQUEUE=y +# CONFIG_RT_USING_SIGNALS is not set + +# +# Memory Management +# +CONFIG_RT_USING_MEMPOOL=y +# CONFIG_RT_USING_MEMHEAP is not set +# CONFIG_RT_USING_NOHEAP is not set +CONFIG_RT_USING_SMALL_MEM=y +# CONFIG_RT_USING_SLAB is not set +# CONFIG_RT_USING_USERHEAP is not set +# CONFIG_RT_USING_MEMTRACE is not set +CONFIG_RT_USING_HEAP=y + +# +# Kernel Device Object +# +CONFIG_RT_USING_DEVICE=y +# CONFIG_RT_USING_DEVICE_OPS is not set +# CONFIG_RT_USING_INTERRUPT_INFO is not set +CONFIG_RT_USING_CONSOLE=y +CONFIG_RT_CONSOLEBUF_SIZE=128 +CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" +# CONFIG_RT_PRINTF_LONGLONG is not set +CONFIG_RT_VER_NUM=0x40004 +# CONFIG_RT_USING_CPU_FFS is not set +# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set + +# +# RT-Thread Components +# +CONFIG_RT_USING_COMPONENTS_INIT=y +CONFIG_RT_USING_USER_MAIN=y +CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048 +CONFIG_RT_MAIN_THREAD_PRIORITY=10 + +# +# C++ features +# +# CONFIG_RT_USING_CPLUSPLUS is not set + +# +# Command shell +# +CONFIG_RT_USING_FINSH=y +CONFIG_RT_USING_MSH=y +CONFIG_FINSH_USING_MSH=y +CONFIG_FINSH_THREAD_NAME="tshell" +CONFIG_FINSH_THREAD_PRIORITY=20 +CONFIG_FINSH_THREAD_STACK_SIZE=4096 +CONFIG_FINSH_USING_HISTORY=y +CONFIG_FINSH_HISTORY_LINES=5 +CONFIG_FINSH_USING_SYMTAB=y +CONFIG_FINSH_CMD_SIZE=80 +CONFIG_MSH_USING_BUILT_IN_COMMANDS=y +CONFIG_FINSH_USING_DESCRIPTION=y +# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set +# CONFIG_FINSH_USING_AUTH is not set +CONFIG_FINSH_ARG_MAX=10 + +# +# Device virtual file system +# +# CONFIG_RT_USING_DFS is not set + +# +# Device Drivers +# +CONFIG_RT_USING_DEVICE_IPC=y +CONFIG_RT_PIPE_BUFSZ=512 +CONFIG_RT_USING_SYSTEM_WORKQUEUE=y +CONFIG_RT_SYSTEM_WORKQUEUE_STACKSIZE=2048 +CONFIG_RT_SYSTEM_WORKQUEUE_PRIORITY=23 +CONFIG_RT_USING_SERIAL=y +CONFIG_RT_USING_SERIAL_V1=y +# CONFIG_RT_USING_SERIAL_V2 is not set +CONFIG_RT_SERIAL_USING_DMA=y +CONFIG_RT_SERIAL_RB_BUFSZ=64 +# CONFIG_RT_USING_CAN is not set +# CONFIG_RT_USING_HWTIMER is not set +# CONFIG_RT_USING_CPUTIME is not set +# CONFIG_RT_USING_I2C is not set +# CONFIG_RT_USING_PHY is not set +CONFIG_RT_USING_PIN=y +# CONFIG_RT_USING_ADC is not set +# CONFIG_RT_USING_DAC is not set +# CONFIG_RT_USING_PWM is not set +# CONFIG_RT_USING_MTD_NOR is not set +# CONFIG_RT_USING_MTD_NAND is not set +# CONFIG_RT_USING_PM is not set +# CONFIG_RT_USING_RTC is not set +# CONFIG_RT_USING_SDIO is not set +# CONFIG_RT_USING_SPI is not set +# CONFIG_RT_USING_WDT is not set +# CONFIG_RT_USING_AUDIO is not set +# CONFIG_RT_USING_SENSOR is not set +# CONFIG_RT_USING_TOUCH is not set +# CONFIG_RT_USING_HWCRYPTO is not set +# CONFIG_RT_USING_PULSE_ENCODER is not set +# CONFIG_RT_USING_INPUT_CAPTURE is not set +# CONFIG_RT_USING_WIFI is not set + +# +# Using USB +# +# CONFIG_RT_USING_USB is not set +# CONFIG_RT_USING_USB_HOST is not set +# CONFIG_RT_USING_USB_DEVICE is not set + +# +# POSIX layer and C standard library +# +# CONFIG_RT_USING_LIBC is not set +CONFIG_RT_LIBC_USING_TIME=y +CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 +# CONFIG_RT_USING_PTHREADS is not set + +# +# Network +# + +# +# Socket abstraction layer +# +# CONFIG_RT_USING_SAL is not set + +# +# Network interface device +# +# CONFIG_RT_USING_NETDEV is not set + +# +# light weight TCP/IP stack +# +# CONFIG_RT_USING_LWIP is not set + +# +# AT commands +# +# CONFIG_RT_USING_AT is not set + +# +# VBUS(Virtual Software BUS) +# +# CONFIG_RT_USING_VBUS is not set + +# +# Utilities +# +# CONFIG_RT_USING_RYM is not set +# CONFIG_RT_USING_ULOG is not set +# CONFIG_RT_USING_UTEST is not set +# CONFIG_RT_USING_VAR_EXPORT is not set +# CONFIG_RT_USING_RT_LINK is not set + +# +# RT-Thread Utestcases +# +# CONFIG_RT_USING_UTESTCASES is not set + +# +# RT-Thread online packages +# + +# +# IoT - internet of things +# +# CONFIG_PKG_USING_LORAWAN_DRIVER is not set +# CONFIG_PKG_USING_PAHOMQTT is not set +# CONFIG_PKG_USING_UMQTT is not set +# CONFIG_PKG_USING_WEBCLIENT is not set +# CONFIG_PKG_USING_WEBNET is not set +# CONFIG_PKG_USING_MONGOOSE is not set +# CONFIG_PKG_USING_MYMQTT is not set +# CONFIG_PKG_USING_KAWAII_MQTT is not set +# CONFIG_PKG_USING_BC28_MQTT is not set +# CONFIG_PKG_USING_WEBTERMINAL is not set +# CONFIG_PKG_USING_CJSON is not set +# CONFIG_PKG_USING_JSMN is not set +# CONFIG_PKG_USING_LIBMODBUS is not set +# CONFIG_PKG_USING_FREEMODBUS is not set +# CONFIG_PKG_USING_LJSON is not set +# CONFIG_PKG_USING_EZXML is not set +# CONFIG_PKG_USING_NANOPB is not set + +# +# Wi-Fi +# + +# +# Marvell WiFi +# +# CONFIG_PKG_USING_WLANMARVELL is not set + +# +# Wiced WiFi +# +# CONFIG_PKG_USING_WLAN_WICED is not set +# CONFIG_PKG_USING_RW007 is not set +# CONFIG_PKG_USING_COAP is not set +# CONFIG_PKG_USING_NOPOLL is not set +# CONFIG_PKG_USING_NETUTILS is not set +# CONFIG_PKG_USING_CMUX is not set +# CONFIG_PKG_USING_PPP_DEVICE is not set +# CONFIG_PKG_USING_AT_DEVICE is not set +# CONFIG_PKG_USING_ATSRV_SOCKET is not set +# CONFIG_PKG_USING_WIZNET is not set +# CONFIG_PKG_USING_ZB_COORDINATOR is not set + +# +# IoT Cloud +# +# CONFIG_PKG_USING_ONENET is not set +# CONFIG_PKG_USING_GAGENT_CLOUD is not set +# CONFIG_PKG_USING_ALI_IOTKIT is not set +# CONFIG_PKG_USING_AZURE is not set +# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set +# CONFIG_PKG_USING_JIOT-C-SDK is not set +# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set +# CONFIG_PKG_USING_JOYLINK is not set +# CONFIG_PKG_USING_NIMBLE is not set +# CONFIG_PKG_USING_OTA_DOWNLOADER is not set +# CONFIG_PKG_USING_IPMSG is not set +# CONFIG_PKG_USING_LSSDP is not set +# CONFIG_PKG_USING_AIRKISS_OPEN is not set +# CONFIG_PKG_USING_LIBRWS is not set +# CONFIG_PKG_USING_TCPSERVER is not set +# CONFIG_PKG_USING_PROTOBUF_C is not set +# CONFIG_PKG_USING_DLT645 is not set +# CONFIG_PKG_USING_QXWZ is not set +# CONFIG_PKG_USING_SMTP_CLIENT is not set +# CONFIG_PKG_USING_ABUP_FOTA is not set +# CONFIG_PKG_USING_LIBCURL2RTT is not set +# CONFIG_PKG_USING_CAPNP is not set +# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set +# CONFIG_PKG_USING_AGILE_TELNET is not set +# CONFIG_PKG_USING_NMEALIB is not set +# CONFIG_PKG_USING_AGILE_JSMN is not set +# CONFIG_PKG_USING_PDULIB is not set +# CONFIG_PKG_USING_BTSTACK is not set +# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set +# CONFIG_PKG_USING_WAYZ_IOTKIT is not set +# CONFIG_PKG_USING_MAVLINK is not set +# CONFIG_PKG_USING_RAPIDJSON is not set +# CONFIG_PKG_USING_BSAL is not set +# CONFIG_PKG_USING_AGILE_MODBUS is not set +# CONFIG_PKG_USING_AGILE_FTP is not set +# CONFIG_PKG_USING_EMBEDDEDPROTO is not set +# CONFIG_PKG_USING_RT_LINK_HW is not set +# CONFIG_PKG_USING_LORA_PKT_FWD is not set +# CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set +# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set +# CONFIG_PKG_USING_HM is not set +# CONFIG_PKG_USING_SMALL_MODBUS is not set + +# +# security packages +# +# CONFIG_PKG_USING_MBEDTLS is not set +# CONFIG_PKG_USING_LIBSODIUM is not set +# CONFIG_PKG_USING_TINYCRYPT is not set +# CONFIG_PKG_USING_TFM is not set +# CONFIG_PKG_USING_YD_CRYPTO is not set + +# +# language packages +# +# CONFIG_PKG_USING_LUA is not set +# CONFIG_PKG_USING_JERRYSCRIPT is not set +# CONFIG_PKG_USING_MICROPYTHON is not set +# CONFIG_PKG_USING_PIKASCRIPT is not set + +# +# multimedia packages +# + +# +# LVGL: powerful and easy-to-use embedded GUI library +# +# CONFIG_PKG_USING_LVGL is not set +# CONFIG_PKG_USING_LITTLEVGL2RTT is not set +# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set + +# +# u8g2: a monochrome graphic library +# +# CONFIG_PKG_USING_U8G2_OFFICIAL is not set +# CONFIG_PKG_USING_U8G2 is not set +# CONFIG_PKG_USING_OPENMV is not set +# CONFIG_PKG_USING_MUPDF is not set +# CONFIG_PKG_USING_STEMWIN is not set +# CONFIG_PKG_USING_WAVPLAYER is not set +# CONFIG_PKG_USING_TJPGD is not set +# CONFIG_PKG_USING_PDFGEN is not set +# CONFIG_PKG_USING_HELIX is not set +# CONFIG_PKG_USING_AZUREGUIX is not set +# CONFIG_PKG_USING_TOUCHGFX2RTT is not set +# CONFIG_PKG_USING_NUEMWIN is not set +# CONFIG_PKG_USING_MP3PLAYER is not set +# CONFIG_PKG_USING_TINYJPEG is not set +# CONFIG_PKG_USING_UGUI is not set + +# +# PainterEngine: A cross-platform graphics application framework written in C language +# +# CONFIG_PKG_USING_PAINTERENGINE is not set +# CONFIG_PKG_USING_PAINTERENGINE_AUX is not set + +# +# tools packages +# +# CONFIG_PKG_USING_CMBACKTRACE is not set +# CONFIG_PKG_USING_EASYFLASH is not set +# CONFIG_PKG_USING_EASYLOGGER is not set +# CONFIG_PKG_USING_SYSTEMVIEW is not set +# CONFIG_PKG_USING_SEGGER_RTT is not set +# CONFIG_PKG_USING_RDB is not set +# CONFIG_PKG_USING_QRCODE is not set +# CONFIG_PKG_USING_ULOG_EASYFLASH is not set +# CONFIG_PKG_USING_ULOG_FILE is not set +# CONFIG_PKG_USING_LOGMGR is not set +# CONFIG_PKG_USING_ADBD is not set +# CONFIG_PKG_USING_COREMARK is not set +# CONFIG_PKG_USING_DHRYSTONE is not set +# CONFIG_PKG_USING_MEMORYPERF is not set +# CONFIG_PKG_USING_NR_MICRO_SHELL is not set +# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set +# CONFIG_PKG_USING_LUNAR_CALENDAR is not set +# CONFIG_PKG_USING_BS8116A is not set +# CONFIG_PKG_USING_GPS_RMC is not set +# CONFIG_PKG_USING_URLENCODE is not set +# CONFIG_PKG_USING_UMCN is not set +# CONFIG_PKG_USING_LWRB2RTT is not set +# CONFIG_PKG_USING_CPU_USAGE is not set +# CONFIG_PKG_USING_GBK2UTF8 is not set +# CONFIG_PKG_USING_VCONSOLE is not set +# CONFIG_PKG_USING_KDB is not set +# CONFIG_PKG_USING_WAMR is not set +# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set +# CONFIG_PKG_USING_LWLOG is not set +# CONFIG_PKG_USING_ANV_TRACE is not set +# CONFIG_PKG_USING_ANV_MEMLEAK is not set +# CONFIG_PKG_USING_ANV_TESTSUIT is not set +# CONFIG_PKG_USING_ANV_BENCH is not set +# CONFIG_PKG_USING_DEVMEM is not set +# CONFIG_PKG_USING_REGEX is not set +# CONFIG_PKG_USING_MEM_SANDBOX is not set +# CONFIG_PKG_USING_SOLAR_TERMS is not set +# CONFIG_PKG_USING_GAN_ZHI is not set +# CONFIG_PKG_USING_FDT is not set + +# +# system packages +# + +# +# enhanced kernel services +# +# CONFIG_PKG_USING_RT_MEMCPY_CM is not set +# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set +# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set + +# +# acceleration: Assembly language or algorithmic acceleration packages +# +# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set +# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set +# CONFIG_PKG_USING_QFPLIB_M3 is not set + +# +# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard +# +# CONFIG_PKG_USING_CMSIS_5 is not set +# CONFIG_PKG_USING_CMSIS_RTOS2 is not set + +# +# Micrium: Micrium software products porting for RT-Thread +# +# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set +# CONFIG_PKG_USING_UCOSII_WRAPPER is not set +# CONFIG_PKG_USING_UC_CRC is not set +# CONFIG_PKG_USING_UC_CLK is not set +# CONFIG_PKG_USING_UC_COMMON is not set +# CONFIG_PKG_USING_UC_MODBUS is not set +# CONFIG_RT_USING_ARDUINO is not set +# CONFIG_PKG_USING_GUIENGINE is not set +# CONFIG_PKG_USING_CAIRO is not set +# CONFIG_PKG_USING_PIXMAN is not set +# CONFIG_PKG_USING_PARTITION is not set +# CONFIG_PKG_USING_FAL is not set +# CONFIG_PKG_USING_FLASHDB is not set +# CONFIG_PKG_USING_SQLITE is not set +# CONFIG_PKG_USING_RTI is not set +# CONFIG_PKG_USING_DFS_YAFFS is not set +# CONFIG_PKG_USING_LITTLEFS is not set +# CONFIG_PKG_USING_DFS_JFFS2 is not set +# CONFIG_PKG_USING_DFS_UFFS is not set +# CONFIG_PKG_USING_LWEXT4 is not set +# CONFIG_PKG_USING_THREAD_POOL is not set +# CONFIG_PKG_USING_ROBOTS is not set +# CONFIG_PKG_USING_EV is not set +# CONFIG_PKG_USING_SYSWATCH is not set +# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set +# CONFIG_PKG_USING_PLCCORE is not set +# CONFIG_PKG_USING_RAMDISK is not set +# CONFIG_PKG_USING_MININI is not set +# CONFIG_PKG_USING_QBOOT is not set +# CONFIG_PKG_USING_PPOOL is not set +# CONFIG_PKG_USING_OPENAMP is not set +# CONFIG_PKG_USING_LPM is not set +# CONFIG_PKG_USING_TLSF is not set +# CONFIG_PKG_USING_EVENT_RECORDER is not set +# CONFIG_PKG_USING_ARM_2D is not set +# CONFIG_PKG_USING_WCWIDTH is not set +# CONFIG_PKG_USING_MCUBOOT is not set +# CONFIG_PKG_USING_TINYUSB is not set +# CONFIG_PKG_USING_USB_STACK is not set + +# +# peripheral libraries and drivers +# +# CONFIG_PKG_USING_SENSORS_DRIVERS is not set +# CONFIG_PKG_USING_REALTEK_AMEBA is not set +# CONFIG_PKG_USING_SHT2X is not set +# CONFIG_PKG_USING_SHT3X is not set +# CONFIG_PKG_USING_AS7341 is not set +# CONFIG_PKG_USING_STM32_SDIO is not set +# CONFIG_PKG_USING_ICM20608 is not set +# CONFIG_PKG_USING_BUTTON is not set +# CONFIG_PKG_USING_PCF8574 is not set +# CONFIG_PKG_USING_SX12XX is not set +# CONFIG_PKG_USING_SIGNAL_LED is not set +# CONFIG_PKG_USING_LEDBLINK is not set +# CONFIG_PKG_USING_LITTLED is not set +# CONFIG_PKG_USING_LKDGUI is not set +# CONFIG_PKG_USING_NRF5X_SDK is not set +# CONFIG_PKG_USING_NRFX is not set +# CONFIG_PKG_USING_WM_LIBRARIES is not set +# CONFIG_PKG_USING_KENDRYTE_SDK is not set +# CONFIG_PKG_USING_INFRARED is not set +# CONFIG_PKG_USING_AGILE_BUTTON is not set +# CONFIG_PKG_USING_AGILE_LED is not set +# CONFIG_PKG_USING_AT24CXX is not set +# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set +# CONFIG_PKG_USING_AD7746 is not set +# CONFIG_PKG_USING_PCA9685 is not set +# CONFIG_PKG_USING_I2C_TOOLS is not set +# CONFIG_PKG_USING_NRF24L01 is not set +# CONFIG_PKG_USING_TOUCH_DRIVERS is not set +# CONFIG_PKG_USING_MAX17048 is not set +# CONFIG_PKG_USING_RPLIDAR is not set +# CONFIG_PKG_USING_AS608 is not set +# CONFIG_PKG_USING_RC522 is not set +# CONFIG_PKG_USING_WS2812B is not set +# CONFIG_PKG_USING_EMBARC_BSP is not set +# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set +# CONFIG_PKG_USING_MULTI_RTIMER is not set +# CONFIG_PKG_USING_MAX7219 is not set +# CONFIG_PKG_USING_BEEP is not set +# CONFIG_PKG_USING_EASYBLINK is not set +# CONFIG_PKG_USING_PMS_SERIES is not set +# CONFIG_PKG_USING_CAN_YMODEM is not set +# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set +# CONFIG_PKG_USING_QLED is not set +# CONFIG_PKG_USING_PAJ7620 is not set +# CONFIG_PKG_USING_AGILE_CONSOLE is not set +# CONFIG_PKG_USING_LD3320 is not set +# CONFIG_PKG_USING_WK2124 is not set +# CONFIG_PKG_USING_LY68L6400 is not set +# CONFIG_PKG_USING_DM9051 is not set +# CONFIG_PKG_USING_SSD1306 is not set +# CONFIG_PKG_USING_QKEY is not set +# CONFIG_PKG_USING_RS485 is not set +# CONFIG_PKG_USING_NES is not set +# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set +# CONFIG_PKG_USING_VDEVICE is not set +# CONFIG_PKG_USING_SGM706 is not set +# CONFIG_PKG_USING_STM32WB55_SDK is not set +# CONFIG_PKG_USING_RDA58XX is not set +# CONFIG_PKG_USING_LIBNFC is not set +# CONFIG_PKG_USING_MFOC is not set +# CONFIG_PKG_USING_TMC51XX is not set +# CONFIG_PKG_USING_TCA9534 is not set +# CONFIG_PKG_USING_KOBUKI is not set +# CONFIG_PKG_USING_ROSSERIAL is not set +# CONFIG_PKG_USING_MICRO_ROS is not set +# CONFIG_PKG_USING_MCP23008 is not set +# CONFIG_PKG_USING_BLUETRUM_SDK is not set +# CONFIG_PKG_USING_MISAKA_AT24CXX is not set +# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set +# CONFIG_PKG_USING_BL_MCU_SDK is not set +# CONFIG_PKG_USING_SOFT_SERIAL is not set +# CONFIG_PKG_USING_MB85RS16 is not set + +# +# AI packages +# +# CONFIG_PKG_USING_LIBANN is not set +# CONFIG_PKG_USING_NNOM is not set +# CONFIG_PKG_USING_ONNX_BACKEND is not set +# CONFIG_PKG_USING_ONNX_PARSER is not set +# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set +# CONFIG_PKG_USING_ELAPACK is not set +# CONFIG_PKG_USING_ULAPACK is not set +# CONFIG_PKG_USING_QUEST is not set +# CONFIG_PKG_USING_NAXOS is not set + +# +# miscellaneous packages +# + +# +# samples: kernel and components samples +# +# CONFIG_PKG_USING_KERNEL_SAMPLES is not set +# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set +# CONFIG_PKG_USING_NETWORK_SAMPLES is not set +# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set + +# +# entertainment: terminal games and other interesting software packages +# +# CONFIG_PKG_USING_CMATRIX is not set +# CONFIG_PKG_USING_SL is not set +# CONFIG_PKG_USING_CAL is not set +# CONFIG_PKG_USING_ACLOCK is not set +# CONFIG_PKG_USING_THREES is not set +# CONFIG_PKG_USING_2048 is not set +# CONFIG_PKG_USING_SNAKE is not set +# CONFIG_PKG_USING_TETRIS is not set +# CONFIG_PKG_USING_DONUT is not set +# CONFIG_PKG_USING_LIBCSV is not set +# CONFIG_PKG_USING_OPTPARSE is not set +# CONFIG_PKG_USING_FASTLZ is not set +# CONFIG_PKG_USING_MINILZO is not set +# CONFIG_PKG_USING_QUICKLZ is not set +# CONFIG_PKG_USING_LZMA is not set +# CONFIG_PKG_USING_MULTIBUTTON is not set +# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set +# CONFIG_PKG_USING_CANFESTIVAL is not set +# CONFIG_PKG_USING_ZLIB is not set +# CONFIG_PKG_USING_MINIZIP is not set +# CONFIG_PKG_USING_DSTR is not set +# CONFIG_PKG_USING_TINYFRAME is not set +# CONFIG_PKG_USING_KENDRYTE_DEMO is not set +# CONFIG_PKG_USING_DIGITALCTRL is not set +# CONFIG_PKG_USING_UPACKER is not set +# CONFIG_PKG_USING_UPARAM is not set +# CONFIG_PKG_USING_HELLO is not set +# CONFIG_PKG_USING_VI is not set +# CONFIG_PKG_USING_KI is not set +# CONFIG_PKG_USING_ARMv7M_DWT is not set +# CONFIG_PKG_USING_VT100 is not set +# CONFIG_PKG_USING_UKAL is not set +# CONFIG_PKG_USING_CRCLIB is not set +# CONFIG_PKG_USING_LWGPS is not set +# CONFIG_PKG_USING_STATE_MACHINE is not set +# CONFIG_PKG_USING_MCURSES is not set +# CONFIG_PKG_USING_COWSAY is not set +# CONFIG_PKG_USING_TERMBOX is not set + +# +# Hardware Drivers Config +# +CONFIG_SOC_SERIES_GD32F30x=y +CONFIG_SOC_GD32305R=y + +# +# Onboard Peripheral Drivers +# + +# +# On-chip Peripheral Drivers +# +CONFIG_BSP_USING_GPIO=y +CONFIG_BSP_USING_UART=y +CONFIG_BSP_USING_UART1=y +# CONFIG_BSP_UART1_RX_USING_DMA is not set +# CONFIG_BSP_USING_SPI is not set +# CONFIG_BSP_USING_I2C1 is not set + +# +# Board extended module Drivers +# diff --git a/bsp/gd32/gd32303e-eval/Kconfig b/bsp/gd32/gd32303e-eval/Kconfig new file mode 100644 index 0000000000..8cbc7b71a8 --- /dev/null +++ b/bsp/gd32/gd32303e-eval/Kconfig @@ -0,0 +1,21 @@ +mainmenu "RT-Thread Configuration" + +config BSP_DIR + string + option env="BSP_ROOT" + default "." + +config RTT_DIR + string + option env="RTT_ROOT" + default "../../.." + +config PKGS_DIR + string + option env="PKGS_ROOT" + default "packages" + +source "$RTT_DIR/Kconfig" +source "$PKGS_DIR/Kconfig" +source "../libraries/Kconfig" +source "board/Kconfig" diff --git a/bsp/gd32/gd32303e-eval/README.md b/bsp/gd32/gd32303e-eval/README.md new file mode 100644 index 0000000000..dd789e8394 --- /dev/null +++ b/bsp/gd32/gd32303e-eval/README.md @@ -0,0 +1,94 @@ +# GD32303E-EVAL开发板BSP说明 + +## 简介 + +GD3303E-EVAL是-兆易创新推出的一款GD32F30X系列的评估板，最高主频高达120M，该开发板具有丰富的板载资源，可以充分发挥 GD32303ZET6 的芯片性能。 + +该开发板常用 **板载资源** 如下： + +- GD32303ZET6，主频 120MHz，512KB FLASH ，64KB RAM + +- 常用外设 + + - LED ：5个，LED1 (电源指示灯），LED2（PC0），LED3（PC2），LED4（PE0），LED5（PE1） + - 按键：3个，K1（用户按键，PA0），K2（用户按键，PC13），K3（用户按键，PB14） + +- 常用接口：USB 接口 + +- 调试接口：GD-LINK + +## 外设支持 + +本 BSP 目前对外设的支持情况如下： + +| **片上外设** | **支持情况** | **备注** | +|:--------- |:--------:|:------------------------------------- | +| GPIO | 支持 | PA0, PA1... PK15 ---> PIN: 0, 1...144 | +| UART | 支持 | UART0 - UART7 | +| I2C | 支持 | I2C1 | +| SPI | 支持 | SPI0 - SPI2 | +| SPI FLASH | 支持 | | +| **扩展模块** | **支持情况** | **备注** | +| 暂无 | 暂不支持 | 暂不支持 | + +## 使用说明 + +使用说明分为如下两个章节： + +- 快速上手 + + 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 + +- 进阶使用 + + 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 + +### 快速上手 + +本 BSP 为开发者提供 MDK5 工程，并且支持 GCC 开发环境，也可使用RT-Thread Studio开发。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 + +#### 硬件连接 + +使用数据线连接开发板到 PC，使用USB转TTL模块连接PA2(MCU TX)和PA3(MCU RX)，打开电源开关。 + +#### 编译下载 + +双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 + +> 工程默认配置使用 GD-Link 仿真器下载程序，在通过 GD-Link 连接开发板的基础上，点击下载按钮即可下载程序到开发板 + +#### 运行结果 + +下载程序成功之后，系统会自动运行，LED 闪烁。 + +连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息: + +```bash + \ | / +- RT - Thread Operating System + / | \ 4.0.4 build Jan 9 2021 + 2006 - 2021 Copyright by rt-thread team +msh > +``` + +### 进阶使用 + +此 BSP 默认只开启了 GPIO 和 串口1的功能，如果需使用高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下： + +1. 在 bsp 下打开 env 工具。 + +2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 + +3. 输入`pkgs --update`命令更新软件包。 + +4. 输入`scons --target=mdk4/mdk5` 命令重新生成工程。 + +## 注意事项 + +暂无 + +## 联系人信息 + +维护人: + +- [BruceOu](https://github.com/Ouxiaolong/), 邮箱：<[email protected]>
\ No newline at end of file diff --git a/bsp/gd32/gd32303e-eval/SConscript b/bsp/gd32/gd32303e-eval/SConscript new file mode 100644 index 0000000000..20f7689c53 --- /dev/null +++ b/bsp/gd32/gd32303e-eval/SConscript @@ -0,0 +1,15 @@ +# for module compiling +import os +Import('RTT_ROOT') +from building import * + +cwd = GetCurrentDir() +objs = [] +list = os.listdir(cwd) + +for d in list: + path = os.path.join(cwd, d) + if os.path.isfile(os.path.join(path, 'SConscript')): + objs = objs + SConscript(os.path.join(d, 'SConscript')) + +Return('objs') diff --git a/bsp/gd32/gd32303e-eval/SConstruct b/bsp/gd32/gd32303e-eval/SConstruct new file mode 100644 index 0000000000..f32e96f624 --- /dev/null +++ b/bsp/gd32/gd32303e-eval/SConstruct @@ -0,0 +1,60 @@ +import os +import sys +import rtconfig + +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') +else: + RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..') + +sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')] +try: + from building import * +except: + print('Cannot found RT-Thread root directory, please check RTT_ROOT') + print(RTT_ROOT) + exit(-1) + +TARGET = 'rtthread.' + rtconfig.TARGET_EXT + +DefaultEnvironment(tools=[]) +env = Environment(tools = ['mingw'], + AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, + CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS, + AR = rtconfig.AR, ARFLAGS = '-rc', + CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS, + LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) +env.PrependENVPath('PATH', rtconfig.EXEC_PATH) + +if rtconfig.PLATFORM == 'iar': + env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES']) + env.Replace(ARFLAGS = ['']) + env.Replace(LINKCOM = env["LINKCOM"] + ' --map rtthread.map') + +Export('RTT_ROOT') +Export('rtconfig') + +SDK_ROOT = os.path.abspath('./') + +if os.path.exists(SDK_ROOT + '/libraries'): + libraries_path_prefix = SDK_ROOT + '/libraries' +else: + libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries' + +SDK_LIB = libraries_path_prefix +Export('SDK_LIB') + +# prepare building environment +objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False) + +gd32_library = 'GD32F30x_Firmware_Library' +rtconfig.BSP_LIBRARY_TYPE = gd32_library + +# include libraries +objs.extend(SConscript(os.path.join(libraries_path_prefix, gd32_library, 'SConscript'))) + +# include drivers +objs.extend(SConscript(os.path.join(libraries_path_prefix, 'gd32_drivers', 'SConscript'))) + +# make a building +DoBuilding(TARGET, objs) diff --git a/bsp/gd32/gd32303e-eval/applications/SConscript b/bsp/gd32/gd32303e-eval/applications/SConscript new file mode 100644 index 0000000000..01eb940dfb --- /dev/null +++ b/bsp/gd32/gd32303e-eval/applications/SConscript @@ -0,0 +1,11 @@ +Import('RTT_ROOT') +Import('rtconfig') +from building import * + +cwd = os.path.join(str(Dir('#')), 'applications') +src = Glob('*.c') +CPPPATH = [cwd, str(Dir('#'))] + +group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/gd32/gd32303e-eval/applications/main.c b/bsp/gd32/gd32303e-eval/applications/main.c new file mode 100644 index 0000000000..3e85fc86ca --- /dev/null +++ b/bsp/gd32/gd32303e-eval/applications/main.c @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-08-20 BruceOu first implementation + */ + +#include <stdio.h> +#include <rtthread.h> +#include <rtdevice.h> +#include <board.h> + +/* defined the LED2 pin: PF0 */ +#define LED2_PIN GET_PIN(F, 0) + +int main(void) +{ + int count = 1; + + /* set LED2 pin mode to output */ + rt_pin_mode(LED2_PIN, PIN_MODE_OUTPUT); + + while (count++) + { + rt_pin_write(LED2_PIN, PIN_HIGH); + rt_thread_mdelay(500); + rt_pin_write(LED2_PIN, PIN_LOW); + rt_thread_mdelay(500); + } + + return RT_EOK; +} diff --git a/bsp/gd32/gd32303e-eval/board/Kconfig b/bsp/gd32/gd32303e-eval/board/Kconfig new file mode 100644 index 0000000000..c4b496f179 --- /dev/null +++ b/bsp/gd32/gd32303e-eval/board/Kconfig @@ -0,0 +1,85 @@ +menu "Hardware Drivers Config" + +config SOC_SERIES_GD32F30x + bool + default y + +config SOC_GD32303Z + bool + select SOC_SERIES_GD32F30x + select RT_USING_COMPONENTS_INIT + select RT_USING_USER_MAIN + default y + +menu "Onboard Peripheral Drivers" + +endmenu + +menu "On-chip Peripheral Drivers" + + config BSP_USING_GPIO + bool "Enable GPIO" + select RT_USING_PIN + default y + + menuconfig BSP_USING_UART + bool "Enable UART" + default y + select RT_USING_SERIAL + if BSP_USING_UART + config BSP_USING_UART1 + bool "Enable UART1" + default y + + config BSP_UART1_RX_USING_DMA + bool "Enable UART1 RX DMA" + depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA + default n + endif + + menuconfig BSP_USING_SPI + bool "Enable SPI BUS" + default n + select RT_USING_SPI + if BSP_USING_SPI + config BSP_USING_SPI1 + bool "Enable SPI1 BUS" + default n + + config BSP_SPI1_TX_USING_DMA + bool "Enable SPI1 TX DMA" + depends on BSP_USING_SPI1 + default n + + config BSP_SPI1_RX_USING_DMA + bool "Enable SPI1 RX DMA" + depends on BSP_USING_SPI1 + select BSP_SPI1_TX_USING_DMA + default n + endif + + menuconfig BSP_USING_I2C1 + bool "Enable I2C1 BUS (software simulation)" + default n + select RT_USING_I2C + select RT_USING_I2C_BITOPS + select RT_USING_PIN + if BSP_USING_I2C1 + config BSP_I2C1_SCL_PIN + int "i2c1 scl pin number" + range 1 216 + default 24 + config BSP_I2C1_SDA_PIN + int "I2C1 sda pin number" + range 1 216 + default 25 + endif + source "../libraries/gd32_drivers/Kconfig" + +endmenu + +menu "Board extended module Drivers" + +endmenu + +endmenu diff --git a/bsp/gd32/gd32303e-eval/board/SConscript b/bsp/gd32/gd32303e-eval/board/SConscript new file mode 100644 index 0000000000..1d4c0408eb --- /dev/null +++ b/bsp/gd32/gd32303e-eval/board/SConscript @@ -0,0 +1,28 @@ +import os +import rtconfig +from building import * + +Import('SDK_LIB') + +cwd = GetCurrentDir() + +# add general drivers +src = Split(''' +board.c +''') + +path = [cwd] + +startup_path_prefix = SDK_LIB + +if rtconfig.CROSS_TOOL == 'gcc': + src += [startup_path_prefix + '/GD32F30x_Firmware_Library/CMSIS/GD/GD32F30x/Source/GCC/startup_gd32f30x_hd.s'] +elif rtconfig.CROSS_TOOL == 'keil': + src += [startup_path_prefix + '/GD32F30x_Firmware_Library/CMSIS/GD/GD32F30x/Source/ARM/startup_gd32f30x_hd.s'] +elif rtconfig.CROSS_TOOL == 'iar': + src += [startup_path_prefix + '/GD32F30x_Firmware_Library/CMSIS/GD/GD32F30x/Source/IAR/startup_gd32f30x_hd.s'] + +CPPDEFINES = ['GD32F30X_HD'] +group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES) + +Return('group') diff --git a/bsp/gd32/gd32303e-eval/board/board.c b/bsp/gd32/gd32303e-eval/board/board.c new file mode 100644 index 0000000000..c409645b37 --- /dev/null +++ b/bsp/gd32/gd32303e-eval/board/board.c @@ -0,0 +1,85 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-12-18 BruceOu first implementation + */ +#include <stdint.h> +#include <rthw.h> +#include <rtthread.h> +#include <board.h> + +/** + * @brief This function is executed in case of error occurrence. + * @param None + * @retval None + */ +void Error_Handler(void) +{ + /* USER CODE BEGIN Error_Handler */ + /* User can add his own implementation to report the HAL error return state */ + while (1) + { + } + /* USER CODE END Error_Handler */ +} + +/** System Clock Configuration +*/ +void SystemClock_Config(void) +{ + SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND); + NVIC_SetPriority(SysTick_IRQn, 0); +} + +/** + * This is the timer interrupt service routine. + * + */ +void SysTick_Handler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + rt_tick_increase(); + + /* leave interrupt */ + rt_interrupt_leave(); +} + +/** + * This function will initial GD32 board. + */ +void rt_hw_board_init() +{ + /* NVIC Configuration */ +#define NVIC_VTOR_MASK 0x3FFFFF80 +#ifdef VECT_TAB_RAM + /* Set the Vector Table base location at 0x10000000 */ + SCB->VTOR = (0x10000000 & NVIC_VTOR_MASK); +#else /* VECT_TAB_FLASH */ + /* Set the Vector Table base location at 0x08000000 */ + SCB->VTOR = (0x08000000 & NVIC_VTOR_MASK); +#endif + + SystemClock_Config(); + +#ifdef RT_USING_COMPONENTS_INIT + rt_components_board_init(); +#endif + +#ifdef RT_USING_CONSOLE + rt_console_set_device(RT_CONSOLE_DEVICE_NAME); +#endif + +#ifdef BSP_USING_SDRAM + rt_system_heap_init((void *)EXT_SDRAM_BEGIN, (void *)EXT_SDRAM_END); +#else + rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END); +#endif +} + +/*@}*/ diff --git a/bsp/gd32/gd32303e-eval/board/board.h b/bsp/gd32/gd32303e-eval/board/board.h new file mode 100644 index 0000000000..aecf8beaad --- /dev/null +++ b/bsp/gd32/gd32303e-eval/board/board.h @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-12-18 BruceOu first implementation + */ +#ifndef __BOARD_H__ +#define __BOARD_H__ + +#include "gd32f30x.h" +#include "drv_usart.h" +#include "drv_gpio.h" + +#include "gd32f30x_exti.h" + +#define EXT_SDRAM_BEGIN (0xC0000000U) /* the begining address of external SDRAM */ +#define EXT_SDRAM_END (EXT_SDRAM_BEGIN + (32U * 1024 * 1024)) /* the end address of external SDRAM */ + +// <o> Internal SRAM memory size[Kbytes] <8-64> +// <i>Default: 64 +#ifdef __ICCARM__ +// Use *.icf ram symbal, to avoid hardcode. +extern char __ICFEDIT_region_RAM_end__; +#define GD32_SRAM_END &__ICFEDIT_region_RAM_end__ +#else +#define GD32_SRAM_SIZE 64 +#define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024) +#endif + +#ifdef __CC_ARM +extern int Image$$RW_IRAM1$$ZI$$Limit; +#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) +#elif __ICCARM__ +#pragma section="HEAP" +#define HEAP_BEGIN (__segment_end("HEAP")) +#else +extern int __bss_end; +#define HEAP_BEGIN (&__bss_end) +#endif + +#define HEAP_END GD32_SRAM_END + +#endif + diff --git a/bsp/gd32/gd32303e-eval/board/gd32f30x_libopt.h b/bsp/gd32/gd32303e-eval/board/gd32f30x_libopt.h new file mode 100644 index 0000000000..e026fd658a --- /dev/null +++ b/bsp/gd32/gd32303e-eval/board/gd32f30x_libopt.h @@ -0,0 +1,65 @@ +/*! + \file gd32f30x_libopt.h + \brief library optional for gd32f30x + + \version 2021-03-23, V2.0.0, demo for GD32F30x +*/ + +/* + Copyright (c) 2021, GigaDevice Semiconductor Inc. + + Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + 3. Neither the name of the copyright holder nor the names of its contributors + may be used to endorse or promote products derived from this software without + specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, +INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, +WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY +OF SUCH DAMAGE. +*/ + +#ifndef GD32F30X_LIBOPT_H +#define GD32F30X_LIBOPT_H + +#include "gd32f30x_rcu.h" +#include "gd32f30x_adc.h" +#include "gd32f30x_can.h" +#include "gd32f30x_crc.h" +#include "gd32f30x_ctc.h" +#include "gd32f30x_dac.h" +#include "gd32f30x_dbg.h" +#include "gd32f30x_dma.h" +#include "gd32f30x_exti.h" +#include "gd32f30x_fmc.h" +#include "gd32f30x_fwdgt.h" +#include "gd32f30x_gpio.h" +#include "gd32f30x_i2c.h" +#include "gd32f30x_pmu.h" +#include "gd32f30x_bkp.h" +#include "gd32f30x_rtc.h" +#include "gd32f30x_sdio.h" +#include "gd32f30x_spi.h" +#include "gd32f30x_timer.h" +#include "gd32f30x_usart.h" +#include "gd32f30x_wwdgt.h" +#include "gd32f30x_misc.h" +#include "gd32f30x_exmc.h" +#ifdef GD32F30X_CL +#include "gd32f30x_enet.h" +#endif /* GD32F30X_CL */ + +#endif /* GD32F30X_LIBOPT_H */ diff --git a/bsp/gd32/gd32303e-eval/board/linker_scripts/link.icf b/bsp/gd32/gd32303e-eval/board/linker_scripts/link.icf new file mode 100644 index 0000000000..f68fd14425 --- /dev/null +++ b/bsp/gd32/gd32303e-eval/board/linker_scripts/link.icf @@ -0,0 +1,40 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x200FFFF;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x200;
+define symbol __ICFEDIT_size_heap__ = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+export symbol __ICFEDIT_region_RAM_end__;
+
+define symbol __region_RAM1_start__ = 0x10000000;
+define symbol __region_RAM1_end__ = 0x1000FFFF;
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+define region RAM1_region = mem:[from __region_RAM1_start__ to __region_RAM1_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+keep { section FSymTab };
+keep { section VSymTab };
+keep { section .rti_fn* };
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
+place in RAM1_region { section .sram };
\ No newline at end of file diff --git a/bsp/gd32/gd32303e-eval/board/linker_scripts/link.ld b/bsp/gd32/gd32303e-eval/board/linker_scripts/link.ld new file mode 100644 index 0000000000..357cefe333 --- /dev/null +++ b/bsp/gd32/gd32303e-eval/board/linker_scripts/link.ld @@ -0,0 +1,142 @@ +/* + * linker script for GD32F30x with GNU ld + * BruceOu 2021-12-14 + */ + +/* Program Entry, set to mark it as "used" and avoid gc */ +MEMORY +{ + CODE (rx) : ORIGIN = 0x08000000, LENGTH = 512k /* 512KB flash */ + DATA (rw) : ORIGIN = 0x20000000, LENGTH = 64k /* 64KB sram */ +} +ENTRY(Reset_Handler) +_system_stack_size = 0x200; + +SECTIONS +{ + .text : + { + . = ALIGN(4); + _stext = .; + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + *(.text) /* remaining code */ + *(.text.*) /* remaining code */ + *(.rodata) /* read-only data (constants) */ + *(.rodata*) + *(.glue_7) + *(.glue_7t) + *(.gnu.linkonce.t*) + + /* section information for finsh shell */ + . = ALIGN(4); + __fsymtab_start = .; + KEEP(*(FSymTab)) + __fsymtab_end = .; + . = ALIGN(4); + __vsymtab_start = .; + KEEP(*(VSymTab)) + __vsymtab_end = .; + . = ALIGN(4); + + /* section information for initial. */ + . = ALIGN(4); + __rt_init_start = .; + KEEP(*(SORT(.rti_fn*))) + __rt_init_end = .; + . = ALIGN(4); + + . = ALIGN(4); + _etext = .; + } > CODE = 0 + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + + /* This is used by the startup in order to initialize the .data secion */ + _sidata = .; + } > CODE + __exidx_end = .; + + /* .data section which is used for initialized data */ + + .data : AT (_sidata) + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _sdata = . ; + + *(.data) + *(.data.*) + *(.gnu.linkonce.d*) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _edata = . ; + } >DATA + + .stack : + { + . = . + _system_stack_size; + . = ALIGN(4); + _estack = .; + } >DATA + + __bss_start = .; + .bss : + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; + + *(.bss) + *(.bss.*) + *(COMMON) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _ebss = . ; + + *(.bss.init) + } > DATA + __bss_end = .; + + _end = .; + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + * Symbols in the DWARF debugging sections are relative to the beginning + * of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff --git a/bsp/gd32/gd32303e-eval/board/linker_scripts/link.sct b/bsp/gd32/gd32303e-eval/board/linker_scripts/link.sct new file mode 100644 index 0000000000..0835abf43e --- /dev/null +++ b/bsp/gd32/gd32303e-eval/board/linker_scripts/link.sct @@ -0,0 +1,15 @@ +; *************************************************************
+; *** Scatter-Loading Description File generated by uVision ***
+; *************************************************************
+
+LR_IROM1 0x08000000 0x00080000 { ; load region size_region
+ ER_IROM1 0x08000000 0x00080000 { ; load address = execution address
+ *.o (RESET, +First)
+ *(InRoot$$Sections)
+ .ANY (+RO)
+ }
+ RW_IRAM1 0x20000000 0x00010000 { ; RW data
+ .ANY (+RW +ZI)
+ }
+}
+
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b/bsp/gd32/gd32303e-eval/project.uvproj @@ -0,0 +1,737 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd"> + <SchemaVersion>1.1</SchemaVersion> + <Header>### uVision Project, (C) Keil Software</Header> + <Targets> + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <uAC6>0</uAC6> + <TargetOption> + <TargetCommonOption> + <Device>GD32F303ZE</Device> + <Vendor>GigaDevice</Vendor> + <Cpu>IRAM(0x20000000-0x20010000) IROM(0x08000000-0x08080000) CLOCK(12000000) CPUTYPE("Cortex-M4") FPU2</Cpu> + <FlashUtilSpec /> + <StartupFile>"Startup\GD\GD32F30x\startup_gd32f30x.s" ("GD32F30x Startup Code")</StartupFile> + <FlashDriverDll>UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0GD32F30x_3MB -FS08000000 -FL0300000)</FlashDriverDll> + <DeviceId>0</DeviceId> + <RegisterFile>gd32f30x0.h</RegisterFile> + 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<FileName>gd32f30x_usart.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F30x_Firmware_Library\GD32F30x_standard_peripheral\Source\gd32f30x_usart.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>gd32f30x_exti.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F30x_Firmware_Library\GD32F30x_standard_peripheral\Source\gd32f30x_exti.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>gd32f30x_gpio.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F30x_Firmware_Library\GD32F30x_standard_peripheral\Source\gd32f30x_gpio.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>gd32f30x_misc.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F30x_Firmware_Library\GD32F30x_standard_peripheral\Source\gd32f30x_misc.c</FilePath> + </File> + </Files> + </Group> + </Groups> + </Target> + </Targets> +</Project> diff --git a/bsp/gd32/gd32303e-eval/project.uvprojx b/bsp/gd32/gd32303e-eval/project.uvprojx new file mode 100644 index 0000000000..126600ce4b --- /dev/null +++ b/bsp/gd32/gd32303e-eval/project.uvprojx @@ -0,0 +1,668 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd"> + + <SchemaVersion>2.1</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Targets> + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <pCCUsed>5060750::V5.06 update 6 (build 750)::.\ARMCC</pCCUsed> + <uAC6>0</uAC6> + <TargetOption> + <TargetCommonOption> + <Device>GD32F303ZE</Device> + <Vendor>GigaDevice</Vendor> + <PackID>GigaDevice.GD32F30x_DFP.2.1.0</PackID> + <PackURL>http://gd32mcu.com/data/documents/pack/</PackURL> + <Cpu>IRAM(0x20000000,0x010000) IROM(0x08000000,0x080000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu> + <FlashUtilSpec></FlashUtilSpec> + <StartupFile></StartupFile> + <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0GD32F30x_CL -FS08000000 -FL040000 -FP0($$Device:GD32F303ZE$Flash\GD32F30x_CL.FLM))</FlashDriverDll> + <DeviceId>0</DeviceId> + <RegisterFile>$$Device:GD32F303ZE$Device\Include\gd32f30x.h</RegisterFile> + <MemoryEnv></MemoryEnv> + <Cmp></Cmp> + <Asm></Asm> + <Linker></Linker> + <OHString></OHString> + <InfinionOptionDll></InfinionOptionDll> + <SLE66CMisc></SLE66CMisc> + <SLE66AMisc></SLE66AMisc> + <SLE66LinkerMisc></SLE66LinkerMisc> + <SFDFile>$$Device:GD32F303ZE$SVD\GD32F30x_CL.svd</SFDFile> + <bCustSvd>0</bCustSvd> + <UseEnv>0</UseEnv> + <BinPath></BinPath> + <IncludePath></IncludePath> + <LibPath></LibPath> + <RegisterFilePath></RegisterFilePath> + <DBRegisterFilePath></DBRegisterFilePath> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + 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<IncludeLibraryModules></IncludeLibraryModules> + <ComprImg>1</ComprImg> + </CommonProperty> + <DllOption> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments> -REMAP -MPU</SimDllArguments> + <SimDlgDll>DCM.DLL</SimDlgDll> + <SimDlgDllArguments>-pCM4</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments> -MPU</TargetDllArguments> + <TargetDlgDll>TCM.DLL</TargetDlgDll> + <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments> + </DllOption> + <DebugOption> + <OPTHX> + <HexSelection>1</HexSelection> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + <Oh166RecLen>16</Oh166RecLen> + </OPTHX> + </DebugOption> + <Utilities> + <Flash1> + <UseTargetDll>1</UseTargetDll> + <UseExternalTool>0</UseExternalTool> + <RunIndependent>0</RunIndependent> + <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> + <Capability>1</Capability> + <DriverSelection>4096</DriverSelection> + </Flash1> + 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<GroupName>Drivers</GroupName> + <Files> + <File> + <FileName>startup_gd32f30x_hd.s</FileName> + <FileType>2</FileType> + <FilePath>..\libraries\GD32F30x_Firmware_Library\CMSIS\GD\GD32F30x\Source\ARM\startup_gd32f30x_hd.s</FilePath> + </File> + <File> + <FileName>board.c</FileName> + <FileType>1</FileType> + <FilePath>board\board.c</FilePath> + </File> + <File> + <FileName>drv_gpio.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\gd32_drivers\drv_gpio.c</FilePath> + </File> + <File> + <FileName>drv_usart.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\gd32_drivers\drv_usart.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Finsh</GroupName> + <Files> + <File> + <FileName>shell.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\shell.c</FilePath> + </File> + <File> + <FileName>msh.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\msh.c</FilePath> + </File> + <File> + <FileName>cmd.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\cmd.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Kernel</GroupName> + <Files> + <File> + <FileName>mempool.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\mempool.c</FilePath> + </File> + <File> + <FileName>device.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\device.c</FilePath> + </File> + <File> + <FileName>thread.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\thread.c</FilePath> + </File> + <File> + <FileName>ipc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\ipc.c</FilePath> + </File> + <File> + <FileName>scheduler.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\scheduler.c</FilePath> + </File> + <File> + <FileName>irq.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\irq.c</FilePath> + </File> + <File> + <FileName>components.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\components.c</FilePath> + </File> + <File> + <FileName>mem.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\mem.c</FilePath> + </File> + <File> + <FileName>timer.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\timer.c</FilePath> + </File> + <File> + <FileName>clock.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\clock.c</FilePath> + </File> + <File> + <FileName>object.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\object.c</FilePath> + </File> + <File> + <FileName>kservice.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\kservice.c</FilePath> + </File> + <File> + <FileName>idle.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\idle.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>libc</GroupName> + <Files> + <File> + <FileName>time.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\libc\compilers\common\time.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Libraries</GroupName> + <Files> + <File> + <FileName>system_gd32f30x.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F30x_Firmware_Library\CMSIS\GD\GD32F30x\Source\system_gd32f30x.c</FilePath> + </File> + <File> + <FileName>gd32f30x_rcu.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F30x_Firmware_Library\GD32F30x_standard_peripheral\Source\gd32f30x_rcu.c</FilePath> + </File> + <File> + <FileName>gd32f30x_usart.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F30x_Firmware_Library\GD32F30x_standard_peripheral\Source\gd32f30x_usart.c</FilePath> + </File> + <File> + <FileName>gd32f30x_exti.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F30x_Firmware_Library\GD32F30x_standard_peripheral\Source\gd32f30x_exti.c</FilePath> + </File> + <File> + <FileName>gd32f30x_gpio.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F30x_Firmware_Library\GD32F30x_standard_peripheral\Source\gd32f30x_gpio.c</FilePath> + </File> + <File> + <FileName>gd32f30x_misc.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F30x_Firmware_Library\GD32F30x_standard_peripheral\Source\gd32f30x_misc.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>::CMSIS</GroupName> + </Group> + </Groups> + </Target> + </Targets> + + <RTE> + <apis/> + <components> + <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.4.0" condition="ARMv6_7_8-M Device"> + <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/> + <targetInfos> + <targetInfo name="rt-thread"/> + </targetInfos> + </component> + </components> + <files/> + </RTE> + + <LayerInfo> + <Layers> + <Layer> + <LayName><Project Info></LayName> + <LayDesc></LayDesc> + <LayUrl></LayUrl> + <LayKeys></LayKeys> + <LayCat></LayCat> + <LayLic></LayLic> + <LayTarg>0</LayTarg> + <LayPrjMark>1</LayPrjMark> + </Layer> + </Layers> + </LayerInfo> + +</Project> diff --git a/bsp/gd32/gd32303e-eval/rtconfig.h b/bsp/gd32/gd32303e-eval/rtconfig.h new file mode 100644 index 0000000000..099327af24 --- /dev/null +++ b/bsp/gd32/gd32303e-eval/rtconfig.h @@ -0,0 +1,200 @@ +#ifndef RT_CONFIG_H__ +#define RT_CONFIG_H__ + +/* Automatically generated file; DO NOT EDIT. */ +/* RT-Thread Configuration */ + +/* RT-Thread Kernel */ + +#define RT_NAME_MAX 8 +#define RT_ALIGN_SIZE 4 +#define RT_THREAD_PRIORITY_32 +#define RT_THREAD_PRIORITY_MAX 32 +#define RT_TICK_PER_SECOND 100 +#define RT_USING_OVERFLOW_CHECK +#define RT_USING_HOOK +#define RT_USING_IDLE_HOOK +#define RT_IDLE_HOOK_LIST_SIZE 4 +#define IDLE_THREAD_STACK_SIZE 256 + +/* kservice optimization */ + +#define RT_DEBUG +#define RT_DEBUG_COLOR + +/* Inter-Thread communication */ + +#define RT_USING_SEMAPHORE +#define RT_USING_MUTEX +#define RT_USING_EVENT +#define RT_USING_MAILBOX +#define RT_USING_MESSAGEQUEUE + +/* Memory Management */ + +#define RT_USING_MEMPOOL +#define RT_USING_SMALL_MEM +#define RT_USING_HEAP + +/* Kernel Device Object */ + +#define RT_USING_DEVICE +#define RT_USING_CONSOLE +#define RT_CONSOLEBUF_SIZE 128 +#define RT_CONSOLE_DEVICE_NAME "uart1" +#define RT_VER_NUM 0x40004 + +/* RT-Thread Components */ + +#define RT_USING_COMPONENTS_INIT +#define RT_USING_USER_MAIN +#define RT_MAIN_THREAD_STACK_SIZE 2048 +#define RT_MAIN_THREAD_PRIORITY 10 + +/* C++ features */ + + +/* Command shell */ + +#define RT_USING_FINSH +#define RT_USING_MSH +#define FINSH_USING_MSH +#define FINSH_THREAD_NAME "tshell" +#define FINSH_THREAD_PRIORITY 20 +#define FINSH_THREAD_STACK_SIZE 4096 +#define FINSH_USING_HISTORY +#define FINSH_HISTORY_LINES 5 +#define FINSH_USING_SYMTAB +#define FINSH_CMD_SIZE 80 +#define MSH_USING_BUILT_IN_COMMANDS +#define FINSH_USING_DESCRIPTION +#define FINSH_ARG_MAX 10 + +/* Device virtual file system */ + + +/* Device Drivers */ + +#define RT_USING_DEVICE_IPC +#define RT_PIPE_BUFSZ 512 +#define RT_USING_SYSTEM_WORKQUEUE +#define RT_SYSTEM_WORKQUEUE_STACKSIZE 2048 +#define RT_SYSTEM_WORKQUEUE_PRIORITY 23 +#define RT_USING_SERIAL +#define RT_USING_SERIAL_V1 +#define RT_SERIAL_USING_DMA +#define RT_SERIAL_RB_BUFSZ 64 +#define RT_USING_PIN + +/* Using USB */ + + +/* POSIX layer and C standard library */ + +#define RT_LIBC_USING_TIME +#define RT_LIBC_DEFAULT_TIMEZONE 8 + +/* Network */ + +/* Socket abstraction layer */ + + +/* Network interface device */ + + +/* light weight TCP/IP stack */ + + +/* AT commands */ + + +/* VBUS(Virtual Software BUS) */ + + +/* Utilities */ + + +/* RT-Thread Utestcases */ + + +/* RT-Thread online packages */ + +/* IoT - internet of things */ + + +/* Wi-Fi */ + +/* Marvell WiFi */ + + +/* Wiced WiFi */ + + +/* IoT Cloud */ + + +/* security packages */ + + +/* language packages */ + + +/* multimedia packages */ + +/* LVGL: powerful and easy-to-use embedded GUI library */ + + +/* u8g2: a monochrome graphic library */ + + +/* PainterEngine: A cross-platform graphics application framework written in C language */ + + +/* tools packages */ + + +/* system packages */ + +/* enhanced kernel services */ + + +/* acceleration: Assembly language or algorithmic acceleration packages */ + + +/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */ + + +/* Micrium: Micrium software products porting for RT-Thread */ + + +/* peripheral libraries and drivers */ + + +/* AI packages */ + + +/* miscellaneous packages */ + +/* samples: kernel and components samples */ + + +/* entertainment: terminal games and other interesting software packages */ + + +/* Hardware Drivers Config */ + +#define SOC_SERIES_GD32F30x +#define SOC_GD32305R + +/* Onboard Peripheral Drivers */ + +/* On-chip Peripheral Drivers */ + +#define BSP_USING_GPIO +#define BSP_USING_UART +#define BSP_USING_UART1 + +/* Board extended module Drivers */ + + +#endif diff --git a/bsp/gd32/gd32303e-eval/rtconfig.py b/bsp/gd32/gd32303e-eval/rtconfig.py new file mode 100644 index 0000000000..a91905a233 --- /dev/null +++ b/bsp/gd32/gd32303e-eval/rtconfig.py @@ -0,0 +1,150 @@ +import os + +# toolchains options +ARCH='arm' +CPU='cortex-m4' +CROSS_TOOL='keil' + +# bsp lib config +BSP_LIBRARY_TYPE = None + +if os.getenv('RTT_CC'): + CROSS_TOOL = os.getenv('RTT_CC') +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') + +# cross_tool provides the cross compiler +# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR +if CROSS_TOOL == 'gcc': + PLATFORM = 'gcc' + EXEC_PATH = r'C:\Users\XXYYZZ' +elif CROSS_TOOL == 'keil': + PLATFORM = 'armcc' + EXEC_PATH = r'C:/Keil_v5' +elif CROSS_TOOL == 'iar': + PLATFORM = 'iar' + EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0' + +if os.getenv('RTT_EXEC_PATH'): + EXEC_PATH = os.getenv('RTT_EXEC_PATH') + +BUILD = 'debug' + +if PLATFORM == 'gcc': + # toolchains + PREFIX = 'arm-none-eabi-' + CC = PREFIX + 'gcc' + AS = PREFIX + 'gcc' + AR = PREFIX + 'ar' + CXX = PREFIX + 'g++' + LINK = PREFIX + 'gcc' + TARGET_EXT = 'elf' + SIZE = PREFIX + 'size' + OBJDUMP = PREFIX + 'objdump' + OBJCPY = PREFIX + 'objcopy' + + DEVICE = ' -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections' + CFLAGS = DEVICE + ' -Dgcc' + AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb ' + LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.ld' + + CPATH = '' + LPATH = '' + + if BUILD == 'debug': + CFLAGS += ' -O0 -gdwarf-2 -g' + AFLAGS += ' -gdwarf-2' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + + POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' + +elif PLATFORM == 'armcc': + # toolchains + CC = 'armcc' + CXX = 'armcc' + AS = 'armasm' + AR = 'armar' + LINK = 'armlink' + TARGET_EXT = 'axf' + + DEVICE = ' --cpu Cortex-M4.fp ' + CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99' + AFLAGS = DEVICE + ' --apcs=interwork ' + LFLAGS = DEVICE + ' --scatter "board\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rtthread.map --strict' + CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include' + LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib' + + CFLAGS += ' -D__MICROLIB ' + AFLAGS += ' --pd "__MICROLIB SETA 1" ' + LFLAGS += ' --library_type=microlib ' + EXEC_PATH += '/ARM/ARMCC/bin/' + + if BUILD == 'debug': + CFLAGS += ' -g -O0' + AFLAGS += ' -g' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + CFLAGS += ' -std=c99' + + POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET' + +elif PLATFORM == 'iar': + # toolchains + CC = 'iccarm' + CXX = 'iccarm' + AS = 'iasmarm' + AR = 'iarchive' + LINK = 'ilinkarm' + TARGET_EXT = 'out' + + DEVICE = '-Dewarm' + + CFLAGS = DEVICE + CFLAGS += ' --diag_suppress Pa050' + CFLAGS += ' --no_cse' + CFLAGS += ' --no_unroll' + CFLAGS += ' --no_inline' + CFLAGS += ' --no_code_motion' + CFLAGS += ' --no_tbaa' + CFLAGS += ' --no_clustering' + CFLAGS += ' --no_scheduling' + CFLAGS += ' --endian=little' + CFLAGS += ' --cpu=Cortex-M4' + CFLAGS += ' -e' + CFLAGS += ' --fpu=VFPv4_sp' + CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"' + CFLAGS += ' --silent' + + AFLAGS = DEVICE + AFLAGS += ' -s+' + AFLAGS += ' -w+' + AFLAGS += ' -r' + AFLAGS += ' --cpu Cortex-M4' + AFLAGS += ' --fpu VFPv4_sp' + AFLAGS += ' -S' + + if BUILD == 'debug': + CFLAGS += ' --debug' + CFLAGS += ' -On' + else: + CFLAGS += ' -Oh' + + LFLAGS = ' --config "board/linker_scripts/link.icf"' + LFLAGS += ' --entry __iar_program_start' + + CXXFLAGS = CFLAGS + + EXEC_PATH = EXEC_PATH + '/arm/bin/' + POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT, dist_dir): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT, dist_dir) diff --git a/bsp/gd32/gd32303e-eval/template.uvoptx b/bsp/gd32/gd32303e-eval/template.uvoptx new file mode 100644 index 0000000000..18fdad5165 --- /dev/null +++ b/bsp/gd32/gd32303e-eval/template.uvoptx @@ -0,0 +1,180 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd"> + + <SchemaVersion>1.0</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Extensions> + <cExt>*.c</cExt> + <aExt>*.s*; *.src; *.a*</aExt> + <oExt>*.obj; *.o</oExt> + <lExt>*.lib</lExt> + <tExt>*.txt; *.h; *.inc</tExt> + <pExt>*.plm</pExt> + <CppX>*.cpp</CppX> + <nMigrate>0</nMigrate> + </Extensions> + + <DaveTm> + <dwLowDateTime>0</dwLowDateTime> + <dwHighDateTime>0</dwHighDateTime> + </DaveTm> + + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>12000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>0</RunSim> + <RunTarget>1</RunTarget> + <RunAbUc>0</RunAbUc> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\build\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>1</IsCurrentTarget> + </OPTFL> + <CpuCode>0</CpuCode> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <tRtrace>1</tRtrace> + <sRSysVw>1</sRSysVw> + <tRSysVw>1</tRSysVw> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <bEvRecOn>1</bEvRecOn> + <bSchkAxf>0</bSchkAxf> + <bTchkAxf>0</bTchkAxf> + <nTsel>3</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>BIN\CMSIS_AGDI.dll</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0GD32F30x_CL -FS08000000 -FL040000 -FP0($$Device:GD32F305RC$Flash\GD32F30x_CL.FLM))</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint/> + <Tracepoint> + <THDelay>0</THDelay> + </Tracepoint> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>0</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>0</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + <bLintAuto>0</bLintAuto> + <bAutoGenD>0</bAutoGenD> + <LntExFlags>0</LntExFlags> + <pMisraName></pMisraName> + <pszMrule></pszMrule> + <pSingCmds></pSingCmds> + <pMultCmds></pMultCmds> + <pMisraNamep></pMisraNamep> + <pszMrulep></pszMrulep> + <pSingCmdsp></pSingCmdsp> + <pMultCmdsp></pMultCmdsp> + </TargetOption> + </Target> + + <Group> + <GroupName>::CMSIS</GroupName> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <cbSel>0</cbSel> + <RteFlg>1</RteFlg> + </Group> + +</ProjectOpt> diff --git a/bsp/gd32/gd32303e-eval/template.uvproj b/bsp/gd32/gd32303e-eval/template.uvproj new file mode 100644 index 0000000000..c42d8a33b1 --- /dev/null +++ b/bsp/gd32/gd32303e-eval/template.uvproj @@ -0,0 +1,628 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd"> + + <SchemaVersion>1.1</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Targets> + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <uAC6>0</uAC6> + <TargetOption> + <TargetCommonOption> + <Device>GD32F303ZE</Device> + <Vendor>GigaDevice</Vendor> + <Cpu>IRAM(0x20000000-0x20010000) IROM(0x08000000-0x08080000) CLOCK(12000000) CPUTYPE("Cortex-M4") FPU2</Cpu> + <FlashUtilSpec></FlashUtilSpec> + <StartupFile>"Startup\GD\GD32F30x\startup_gd32f30x.s" ("GD32F30x Startup Code")</StartupFile> + <FlashDriverDll>UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0GD32F30x_3MB -FS08000000 -FL0300000)</FlashDriverDll> + <DeviceId>0</DeviceId> + <RegisterFile>gd32f30x0.h</RegisterFile> + <MemoryEnv></MemoryEnv> + <Cmp></Cmp> + <Asm></Asm> + <Linker></Linker> + <OHString></OHString> + <InfinionOptionDll></InfinionOptionDll> + <SLE66CMisc></SLE66CMisc> + <SLE66AMisc></SLE66AMisc> + <SLE66LinkerMisc></SLE66LinkerMisc> + <SFDFile>SFD\GD\GD32F30x\GD32F30x.SFR</SFDFile> + <bCustSvd>0</bCustSvd> + <UseEnv>0</UseEnv> + <BinPath></BinPath> + <IncludePath></IncludePath> + <LibPath></LibPath> + <RegisterFilePath>GD\GD32F30x\</RegisterFilePath> + <DBRegisterFilePath>GD\GD32F30x\</DBRegisterFilePath> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + </TargetStatus> + <OutputDirectory>.\output\</OutputDirectory> + <OutputName>rtthread</OutputName> + <CreateExecutable>1</CreateExecutable> + <CreateLib>0</CreateLib> + <CreateHexFile>1</CreateHexFile> + <DebugInformation>1</DebugInformation> + <BrowseInformation>1</BrowseInformation> + <ListingPath>.\build\</ListingPath> + <HexFormatSelection>1</HexFormatSelection> + <Merge32K>0</Merge32K> + <CreateBatchFile>0</CreateBatchFile> + <BeforeCompile> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + 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+ <Simulator> + <UseSimulator>0</UseSimulator> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>1</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <LimitSpeedToRealTime>0</LimitSpeedToRealTime> + <RestoreSysVw>1</RestoreSysVw> + </Simulator> + <Target> + <UseTarget>1</UseTarget> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>0</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <RestoreTracepoints>0</RestoreTracepoints> + <RestoreSysVw>1</RestoreSysVw> + </Target> + <RunDebugAfterBuild>0</RunDebugAfterBuild> + <TargetSelection>3</TargetSelection> + <SimDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + </SimDlls> + <TargetDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + <Driver>BIN\CMSIS_AGDI.dll</Driver> + </TargetDlls> + </DebugOption> + <Utilities> + <Flash1> + <UseTargetDll>1</UseTargetDll> + <UseExternalTool>0</UseExternalTool> + <RunIndependent>0</RunIndependent> + <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> + <Capability>1</Capability> + <DriverSelection>4096</DriverSelection> + </Flash1> + <bUseTDR>1</bUseTDR> + <Flash2>BIN\UL2CM3.DLL</Flash2> + <Flash3>"" ()</Flash3> + <Flash4></Flash4> + <pFcarmOut></pFcarmOut> + <pFcarmGrp></pFcarmGrp> + <pFcArmRoot></pFcArmRoot> + <FcArmLst>0</FcArmLst> + </Utilities> + <TargetArmAds> + <ArmAdsMisc> + <GenerateListings>0</GenerateListings> + <asHll>1</asHll> + <asAsm>1</asAsm> + <asMacX>1</asMacX> + <asSyms>1</asSyms> + <asFals>1</asFals> + <asDbgD>1</asDbgD> + <asForm>1</asForm> + <ldLst>0</ldLst> + <ldmm>1</ldmm> + <ldXref>1</ldXref> + <BigEnd>0</BigEnd> + <AdsALst>1</AdsALst> + <AdsACrf>1</AdsACrf> + <AdsANop>0</AdsANop> + <AdsANot>0</AdsANot> + <AdsLLst>1</AdsLLst> + <AdsLmap>1</AdsLmap> + <AdsLcgr>1</AdsLcgr> + <AdsLsym>1</AdsLsym> + <AdsLszi>1</AdsLszi> + <AdsLtoi>1</AdsLtoi> + <AdsLsun>1</AdsLsun> + <AdsLven>1</AdsLven> + <AdsLsxf>1</AdsLsxf> + <RvctClst>0</RvctClst> + <GenPPlst>0</GenPPlst> + <AdsCpuType>"Cortex-M4"</AdsCpuType> + <RvctDeviceName></RvctDeviceName> + <mOS>0</mOS> + <uocRom>0</uocRom> + <uocRam>0</uocRam> + <hadIROM>1</hadIROM> + <hadIRAM>1</hadIRAM> + <hadXRAM>0</hadXRAM> + <uocXRam>0</uocXRam> + <RvdsVP>2</RvdsVP> + <hadIRAM2>1</hadIRAM2> + <hadIROM2>0</hadIROM2> + <StupSel>8</StupSel> + <useUlib>1</useUlib> + <EndSel>0</EndSel> + <uLtcg>0</uLtcg> + <nSecure>0</nSecure> + <RoSelD>3</RoSelD> + <RwSelD>3</RwSelD> + <CodeSel>0</CodeSel> + <OptFeed>0</OptFeed> + <NoZi1>0</NoZi1> + <NoZi2>0</NoZi2> + <NoZi3>0</NoZi3> + <NoZi4>0</NoZi4> + <NoZi5>0</NoZi5> + <Ro1Chk>0</Ro1Chk> + <Ro2Chk>0</Ro2Chk> + <Ro3Chk>0</Ro3Chk> + <Ir1Chk>1</Ir1Chk> + <Ir2Chk>0</Ir2Chk> + <Ra1Chk>0</Ra1Chk> + <Ra2Chk>0</Ra2Chk> + <Ra3Chk>0</Ra3Chk> + <Im1Chk>1</Im1Chk> + <Im2Chk>0</Im2Chk> + <OnChipMemories> + <Ocm1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocm4> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x30000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x300000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x300000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x30000</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x10000000</StartAddress> + <Size>0x10000</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector></RvctStartVector> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>1</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>1</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>2</wLevel> + <uThumb>0</uThumb> + <uSurpInc>0</uSurpInc> + <uC99>1</uC99> + <uGnu>0</uGnu> + <useXO>0</useXO> + <v6Lang>1</v6Lang> + <v6LangP>1</v6LangP> + <vShortEn>1</vShortEn> + <vShortWch>1</vShortWch> + <v6Lto>0</v6Lto> + <v6WtE>0</v6WtE> + <v6Rtti>0</v6Rtti> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath>..\..\..\Library\Firmware\GD32F30x_standard_peripheral\Include;..\..\..\Library\Firmware\CMSIS\GD\GD32F30x\Include;..\..\..\Library\Utilities;..\</IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <uSurpInc>0</uSurpInc> + <useXO>0</useXO> + <uClangAs>0</uClangAs> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + <LDads> + <umfTarg>1</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x08000000</TextAddressRange> + <DataAddressRange>0x20000000</DataAddressRange> + <pXoBase></pXoBase> + <ScatterFile></ScatterFile> + <IncludeLibs></IncludeLibs> + <IncludeLibsPath></IncludeLibsPath> + <Misc></Misc> + <LinkerInputFile></LinkerInputFile> + <DisabledWarnings></DisabledWarnings> + </LDads> + </TargetArmAds> + </TargetOption> + <Groups> + <Group> + <GroupName>Application</GroupName> + <Files> + <File> + <FileName>main.c</FileName> + <FileType>1</FileType> + <FilePath>..\main.c</FilePath> + </File> + <File> + <FileName>gd32f30x_it.c</FileName> + <FileType>1</FileType> + <FilePath>..\gd32f30x_it.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>CMSIS</GroupName> + <Files> + <File> + <FileName>system_gd32f30x.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\CMSIS\GD\GD32F30x\Source\system_gd32f30x.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>GD32F30x_Peripherals</GroupName> + <Files> + <File> + <FileName>gd32f30x_adc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F30x_standard_peripheral\Source\gd32f30x_adc.c</FilePath> + </File> + <File> + <FileName>gd32f30x_can.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F30x_standard_peripheral\Source\gd32f30x_can.c</FilePath> + </File> + <File> + <FileName>gd32f30x_crc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F30x_standard_peripheral\Source\gd32f30x_crc.c</FilePath> + </File> + <File> + <FileName>gd32f30x_ctc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F30x_standard_peripheral\Source\gd32f30x_ctc.c</FilePath> + </File> + <File> + <FileName>gd32f30x_dac.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F30x_standard_peripheral\Source\gd32f30x_dac.c</FilePath> + </File> + <File> + <FileName>gd32f30x_dbg.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F30x_standard_peripheral\Source\gd32f30x_dbg.c</FilePath> + </File> + <File> + <FileName>gd32f30x_dci.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F30x_standard_peripheral\Source\gd32f30x_dci.c</FilePath> + </File> + <File> + <FileName>gd32f30x_dma.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F30x_standard_peripheral\Source\gd32f30x_dma.c</FilePath> + </File> + <File> + <FileName>gd32f30x_enet.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F30x_standard_peripheral\Source\gd32f30x_enet.c</FilePath> + </File> + <File> + <FileName>gd32f30x_exmc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F30x_standard_peripheral\Source\gd32f30x_exmc.c</FilePath> + </File> + <File> + <FileName>gd32f30x_exti.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F30x_standard_peripheral\Source\gd32f30x_exti.c</FilePath> + </File> + <File> + <FileName>gd32f30x_fmc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F30x_standard_peripheral\Source\gd32f30x_fmc.c</FilePath> + </File> + <File> + <FileName>gd32f30x_fwdgt.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F30x_standard_peripheral\Source\gd32f30x_fwdgt.c</FilePath> + </File> + <File> + <FileName>gd32f30x_gpio.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F30x_standard_peripheral\Source\gd32f30x_gpio.c</FilePath> + </File> + <File> + <FileName>gd32f30x_i2c.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F30x_standard_peripheral\Source\gd32f30x_i2c.c</FilePath> + </File> + <File> + <FileName>gd32f30x_ipa.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F30x_standard_peripheral\Source\gd32f30x_ipa.c</FilePath> + </File> + <File> + <FileName>gd32f30x_iref.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F30x_standard_peripheral\Source\gd32f30x_iref.c</FilePath> + </File> + <File> + <FileName>gd32f30x_misc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F30x_standard_peripheral\Source\gd32f30x_misc.c</FilePath> + </File> + <File> + <FileName>gd32f30x_pmu.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F30x_standard_peripheral\Source\gd32f30x_pmu.c</FilePath> + </File> + <File> + <FileName>gd32f30x_rcu.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F30x_standard_peripheral\Source\gd32f30x_rcu.c</FilePath> + </File> + <File> + <FileName>gd32f30x_rtc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F30x_standard_peripheral\Source\gd32f30x_rtc.c</FilePath> + </File> + <File> + <FileName>gd32f30x_sdio.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F30x_standard_peripheral\Source\gd32f30x_sdio.c</FilePath> + </File> + <File> + <FileName>gd32f30x_spi.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F30x_standard_peripheral\Source\gd32f30x_spi.c</FilePath> + </File> + <File> + <FileName>gd32f30x_syscfg.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F30x_standard_peripheral\Source\gd32f30x_syscfg.c</FilePath> + </File> + <File> + <FileName>gd32f30x_timer.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F30x_standard_peripheral\Source\gd32f30x_timer.c</FilePath> + </File> + <File> + <FileName>gd32f30x_tli.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F30x_standard_peripheral\Source\gd32f30x_tli.c</FilePath> + </File> + <File> + <FileName>gd32f30x_trng.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F30x_standard_peripheral\Source\gd32f30x_trng.c</FilePath> + </File> + <File> + <FileName>gd32f30x_usart.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F30x_standard_peripheral\Source\gd32f30x_usart.c</FilePath> + </File> + <File> + <FileName>gd32f30x_wwdgt.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F30x_standard_peripheral\Source\gd32f30x_wwdgt.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>GD32F30x_EVAL</GroupName> + <Files> + <File> + <FileName>gd32f303e_eval.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Utilities\gd32f303e_eval.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Startup</GroupName> + <Files> + <File> + <FileName>startup_gd32f30x.s</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\Library\Firmware\CMSIS\GD\GD32F30x\Source\ARM\startup_gd32f30x.s</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Doc</GroupName> + <Files> + <File> + <FileName>readme.txt</FileName> + <FileType>5</FileType> + <FilePath>..\readme.txt</FilePath> + </File> + </Files> + </Group> + </Groups> + </Target> + </Targets> + +</Project> diff --git a/bsp/gd32/gd32303e-eval/template.uvprojx b/bsp/gd32/gd32303e-eval/template.uvprojx new file mode 100644 index 0000000000..7f6137db37 --- /dev/null +++ b/bsp/gd32/gd32303e-eval/template.uvprojx @@ -0,0 +1,418 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd"> + + <SchemaVersion>2.1</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Targets> + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <pCCUsed>5060750::V5.06 update 6 (build 750)::.\ARMCC</pCCUsed> + <uAC6>0</uAC6> + <TargetOption> + <TargetCommonOption> + <Device>GD32F303ZE</Device> + <Vendor>GigaDevice</Vendor> + <PackID>GigaDevice.GD32F30x_DFP.2.1.0</PackID> + <PackURL>http://gd32mcu.com/data/documents/pack/</PackURL> + <Cpu>IRAM(0x20000000,0x010000) IROM(0x08000000,0x080000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu> + <FlashUtilSpec></FlashUtilSpec> + <StartupFile></StartupFile> + <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0GD32F30x_CL -FS08000000 -FL040000 -FP0($$Device:GD32F303ZE$Flash\GD32F30x_CL.FLM))</FlashDriverDll> + <DeviceId>0</DeviceId> + <RegisterFile>$$Device:GD32F303ZE$Device\Include\gd32f30x.h</RegisterFile> + <MemoryEnv></MemoryEnv> + <Cmp></Cmp> + <Asm></Asm> + <Linker></Linker> + <OHString></OHString> + <InfinionOptionDll></InfinionOptionDll> + <SLE66CMisc></SLE66CMisc> + <SLE66AMisc></SLE66AMisc> + <SLE66LinkerMisc></SLE66LinkerMisc> + <SFDFile>$$Device:GD32F303ZE$SVD\GD32F30x_CL.svd</SFDFile> + <bCustSvd>0</bCustSvd> + <UseEnv>0</UseEnv> + <BinPath></BinPath> + <IncludePath></IncludePath> + <LibPath></LibPath> + <RegisterFilePath></RegisterFilePath> + <DBRegisterFilePath></DBRegisterFilePath> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + </TargetStatus> + <OutputDirectory>.\build\</OutputDirectory> + <OutputName>rtthread</OutputName> + <CreateExecutable>1</CreateExecutable> + <CreateLib>0</CreateLib> + <CreateHexFile>0</CreateHexFile> + <DebugInformation>1</DebugInformation> + <BrowseInformation>0</BrowseInformation> + <ListingPath>.\build\</ListingPath> + <HexFormatSelection>1</HexFormatSelection> + <Merge32K>0</Merge32K> + <CreateBatchFile>0</CreateBatchFile> + <BeforeCompile> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopU1X>0</nStopU1X> + <nStopU2X>0</nStopU2X> + </BeforeCompile> + <BeforeMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopB1X>0</nStopB1X> + <nStopB2X>0</nStopB2X> + </BeforeMake> + <AfterMake> + <RunUserProg1>1</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopA1X>0</nStopA1X> + <nStopA2X>0</nStopA2X> + </AfterMake> + <SelectedForBatchBuild>0</SelectedForBatchBuild> + <SVCSIdString></SVCSIdString> + </TargetCommonOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>1</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>0</GenerateAssemblyFile> + <AssembleAssemblyFile>0</AssembleAssemblyFile> + <PublicsOnly>0</PublicsOnly> + <StopOnExitCode>3</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + <ComprImg>1</ComprImg> + </CommonProperty> + <DllOption> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments> -REMAP -MPU</SimDllArguments> + <SimDlgDll>DCM.DLL</SimDlgDll> + <SimDlgDllArguments>-pCM4</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments> -MPU</TargetDllArguments> + <TargetDlgDll>TCM.DLL</TargetDlgDll> + <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments> + </DllOption> + <DebugOption> + <OPTHX> + <HexSelection>1</HexSelection> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + <Oh166RecLen>16</Oh166RecLen> + </OPTHX> + </DebugOption> + <Utilities> + <Flash1> + <UseTargetDll>1</UseTargetDll> + <UseExternalTool>0</UseExternalTool> + <RunIndependent>0</RunIndependent> + <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> + <Capability>1</Capability> + <DriverSelection>4096</DriverSelection> + </Flash1> + <bUseTDR>1</bUseTDR> + <Flash2>BIN\UL2CM3.DLL</Flash2> + <Flash3></Flash3> + <Flash4></Flash4> + <pFcarmOut></pFcarmOut> + <pFcarmGrp></pFcarmGrp> + <pFcArmRoot></pFcArmRoot> + <FcArmLst>0</FcArmLst> + </Utilities> + <TargetArmAds> + <ArmAdsMisc> + <GenerateListings>0</GenerateListings> + <asHll>1</asHll> + <asAsm>1</asAsm> + <asMacX>1</asMacX> + <asSyms>1</asSyms> + <asFals>1</asFals> + <asDbgD>1</asDbgD> + <asForm>1</asForm> + <ldLst>0</ldLst> + <ldmm>1</ldmm> + <ldXref>1</ldXref> + <BigEnd>0</BigEnd> + <AdsALst>1</AdsALst> + <AdsACrf>1</AdsACrf> + <AdsANop>0</AdsANop> + <AdsANot>0</AdsANot> + <AdsLLst>1</AdsLLst> + <AdsLmap>1</AdsLmap> + <AdsLcgr>1</AdsLcgr> + <AdsLsym>1</AdsLsym> + <AdsLszi>1</AdsLszi> + <AdsLtoi>1</AdsLtoi> + <AdsLsun>1</AdsLsun> + <AdsLven>1</AdsLven> + <AdsLsxf>1</AdsLsxf> + <RvctClst>0</RvctClst> + <GenPPlst>0</GenPPlst> + <AdsCpuType>"Cortex-M4"</AdsCpuType> + <RvctDeviceName></RvctDeviceName> + <mOS>0</mOS> + <uocRom>0</uocRom> + <uocRam>0</uocRam> + <hadIROM>1</hadIROM> + <hadIRAM>1</hadIRAM> + <hadXRAM>0</hadXRAM> + <uocXRam>0</uocXRam> + <RvdsVP>2</RvdsVP> + <RvdsMve>0</RvdsMve> + <RvdsCdeCp>0</RvdsCdeCp> + <hadIRAM2>0</hadIRAM2> + <hadIROM2>0</hadIROM2> + <StupSel>8</StupSel> + <useUlib>0</useUlib> + <EndSel>0</EndSel> + <uLtcg>0</uLtcg> + <nSecure>0</nSecure> + <RoSelD>3</RoSelD> + <RwSelD>3</RwSelD> + <CodeSel>0</CodeSel> + <OptFeed>0</OptFeed> + <NoZi1>0</NoZi1> + <NoZi2>0</NoZi2> + <NoZi3>0</NoZi3> + <NoZi4>0</NoZi4> + <NoZi5>0</NoZi5> + <Ro1Chk>0</Ro1Chk> + <Ro2Chk>0</Ro2Chk> + <Ro3Chk>0</Ro3Chk> + <Ir1Chk>1</Ir1Chk> + <Ir2Chk>0</Ir2Chk> + <Ra1Chk>0</Ra1Chk> + <Ra2Chk>0</Ra2Chk> + <Ra3Chk>0</Ra3Chk> + <Im1Chk>1</Im1Chk> + <Im2Chk>0</Im2Chk> + <OnChipMemories> + <Ocm1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocm4> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x18000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x40000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x40000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x18000</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector></RvctStartVector> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>4</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>0</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>0</wLevel> + <uThumb>0</uThumb> + <uSurpInc>0</uSurpInc> + <uC99>1</uC99> + <uGnu>0</uGnu> + <useXO>0</useXO> + <v6Lang>1</v6Lang> + <v6LangP>1</v6LangP> + <vShortEn>1</vShortEn> + <vShortWch>1</vShortWch> + <v6Lto>0</v6Lto> + <v6WtE>0</v6WtE> + <v6Rtti>0</v6Rtti> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <uSurpInc>0</uSurpInc> + <useXO>0</useXO> + <ClangAsOpt>4</ClangAsOpt> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + <LDads> + <umfTarg>1</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x08000000</TextAddressRange> + <DataAddressRange>0x20000000</DataAddressRange> + <pXoBase></pXoBase> + <ScatterFile>.\gd32_rom.ld</ScatterFile> + <IncludeLibs></IncludeLibs> + <IncludeLibsPath></IncludeLibsPath> + <Misc></Misc> + <LinkerInputFile></LinkerInputFile> + <DisabledWarnings></DisabledWarnings> + </LDads> + </TargetArmAds> + </TargetOption> + <Groups> + <Group> + <GroupName>::CMSIS</GroupName> + </Group> + </Groups> + </Target> + </Targets> + + <RTE> + <apis/> + <components> + <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.4.0" condition="ARMv6_7_8-M Device"> + <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/> + <targetInfos> + <targetInfo name="rt-thread"/> + </targetInfos> + </component> + </components> + <files/> + </RTE> + + <LayerInfo> + <Layers> + <Layer> + <LayName><Project Info></LayName> + <LayDesc></LayDesc> + <LayUrl></LayUrl> + <LayKeys></LayKeys> + <LayCat></LayCat> + <LayLic></LayLic> + <LayTarg>0</LayTarg> + <LayPrjMark>1</LayPrjMark> + </Layer> + </Layers> + </LayerInfo> + +</Project> diff --git a/bsp/gd32/gd32450z-eval/.config b/bsp/gd32/gd32450z-eval/.config new file mode 100644 index 0000000000..0acca6c304 --- /dev/null +++ b/bsp/gd32/gd32450z-eval/.config @@ -0,0 +1,636 @@ +# +# Automatically generated file; DO NOT EDIT. +# RT-Thread Configuration +# + +# +# RT-Thread Kernel +# +CONFIG_RT_NAME_MAX=8 +# CONFIG_RT_USING_BIG_ENDIAN is not set +# CONFIG_RT_USING_ARCH_DATA_TYPE is not set +# CONFIG_RT_USING_SMP is not set +CONFIG_RT_ALIGN_SIZE=4 +# CONFIG_RT_THREAD_PRIORITY_8 is not set +CONFIG_RT_THREAD_PRIORITY_32=y +# CONFIG_RT_THREAD_PRIORITY_256 is not set +CONFIG_RT_THREAD_PRIORITY_MAX=32 +CONFIG_RT_TICK_PER_SECOND=100 +CONFIG_RT_USING_OVERFLOW_CHECK=y +CONFIG_RT_USING_HOOK=y +CONFIG_RT_USING_IDLE_HOOK=y +CONFIG_RT_IDLE_HOOK_LIST_SIZE=4 +CONFIG_IDLE_THREAD_STACK_SIZE=256 +# CONFIG_RT_USING_TIMER_SOFT is not set + +# +# kservice optimization +# +# CONFIG_RT_KSERVICE_USING_STDLIB is not set +# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set +# CONFIG_RT_USING_ASM_MEMCPY is not set +CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y +# CONFIG_RT_DEBUG_INIT_CONFIG is not set +# CONFIG_RT_DEBUG_THREAD_CONFIG is not set +# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set +# CONFIG_RT_DEBUG_IPC_CONFIG is not set +# CONFIG_RT_DEBUG_TIMER_CONFIG is not set +# CONFIG_RT_DEBUG_IRQ_CONFIG is not set +# CONFIG_RT_DEBUG_MEM_CONFIG is not set +# CONFIG_RT_DEBUG_SLAB_CONFIG is not set +# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set +# CONFIG_RT_DEBUG_MODULE_CONFIG is not set + +# +# Inter-Thread communication +# +CONFIG_RT_USING_SEMAPHORE=y +CONFIG_RT_USING_MUTEX=y +CONFIG_RT_USING_EVENT=y +CONFIG_RT_USING_MAILBOX=y +CONFIG_RT_USING_MESSAGEQUEUE=y +# CONFIG_RT_USING_SIGNALS is not set + +# +# Memory Management +# +CONFIG_RT_USING_MEMPOOL=y +# CONFIG_RT_USING_MEMHEAP is not set +# CONFIG_RT_USING_NOHEAP is not set +CONFIG_RT_USING_SMALL_MEM=y +# CONFIG_RT_USING_SLAB is not set +# CONFIG_RT_USING_USERHEAP is not set +# CONFIG_RT_USING_MEMTRACE is not set +CONFIG_RT_USING_HEAP=y + +# +# Kernel Device Object +# +CONFIG_RT_USING_DEVICE=y +# CONFIG_RT_USING_DEVICE_OPS is not set +# CONFIG_RT_USING_INTERRUPT_INFO is not set +CONFIG_RT_USING_CONSOLE=y +CONFIG_RT_CONSOLEBUF_SIZE=128 +CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" +# CONFIG_RT_PRINTF_LONGLONG is not set +CONFIG_RT_VER_NUM=0x40004 +# CONFIG_RT_USING_CPU_FFS is not set +# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set + +# +# RT-Thread Components +# +CONFIG_RT_USING_COMPONENTS_INIT=y +CONFIG_RT_USING_USER_MAIN=y +CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048 +CONFIG_RT_MAIN_THREAD_PRIORITY=10 + +# +# C++ features +# +# CONFIG_RT_USING_CPLUSPLUS is not set + +# +# Command shell +# +CONFIG_RT_USING_FINSH=y +CONFIG_RT_USING_MSH=y +CONFIG_FINSH_USING_MSH=y +CONFIG_FINSH_THREAD_NAME="tshell" +CONFIG_FINSH_THREAD_PRIORITY=20 +CONFIG_FINSH_THREAD_STACK_SIZE=4096 +CONFIG_FINSH_USING_HISTORY=y +CONFIG_FINSH_HISTORY_LINES=5 +CONFIG_FINSH_USING_SYMTAB=y +CONFIG_FINSH_CMD_SIZE=80 +CONFIG_MSH_USING_BUILT_IN_COMMANDS=y +CONFIG_FINSH_USING_DESCRIPTION=y +# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set +# CONFIG_FINSH_USING_AUTH is not set +CONFIG_FINSH_ARG_MAX=10 + +# +# Device virtual file system +# +# CONFIG_RT_USING_DFS is not set + +# +# Device Drivers +# +CONFIG_RT_USING_DEVICE_IPC=y +CONFIG_RT_PIPE_BUFSZ=512 +CONFIG_RT_USING_SYSTEM_WORKQUEUE=y +CONFIG_RT_SYSTEM_WORKQUEUE_STACKSIZE=2048 +CONFIG_RT_SYSTEM_WORKQUEUE_PRIORITY=23 +CONFIG_RT_USING_SERIAL=y +CONFIG_RT_USING_SERIAL_V1=y +# CONFIG_RT_USING_SERIAL_V2 is not set +CONFIG_RT_SERIAL_USING_DMA=y +CONFIG_RT_SERIAL_RB_BUFSZ=64 +# CONFIG_RT_USING_CAN is not set +# CONFIG_RT_USING_HWTIMER is not set +# CONFIG_RT_USING_CPUTIME is not set +# CONFIG_RT_USING_I2C is not set +# CONFIG_RT_USING_PHY is not set +CONFIG_RT_USING_PIN=y +# CONFIG_RT_USING_ADC is not set +# CONFIG_RT_USING_DAC is not set +# CONFIG_RT_USING_PWM is not set +# CONFIG_RT_USING_MTD_NOR is not set +# CONFIG_RT_USING_MTD_NAND is not set +# CONFIG_RT_USING_PM is not set +# CONFIG_RT_USING_RTC is not set +# CONFIG_RT_USING_SDIO is not set +# CONFIG_RT_USING_SPI is not set +# CONFIG_RT_USING_WDT is not set +# CONFIG_RT_USING_AUDIO is not set +# CONFIG_RT_USING_SENSOR is not set +# CONFIG_RT_USING_TOUCH is not set +# CONFIG_RT_USING_HWCRYPTO is not set +# CONFIG_RT_USING_PULSE_ENCODER is not set +# CONFIG_RT_USING_INPUT_CAPTURE is not set +# CONFIG_RT_USING_WIFI is not set + +# +# Using USB +# +# CONFIG_RT_USING_USB is not set +# CONFIG_RT_USING_USB_HOST is not set +# CONFIG_RT_USING_USB_DEVICE is not set + +# +# POSIX layer and C standard library +# +# CONFIG_RT_USING_LIBC is not set +CONFIG_RT_LIBC_USING_TIME=y +CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 +# CONFIG_RT_USING_PTHREADS is not set + +# +# Network +# + +# +# Socket abstraction layer +# +# CONFIG_RT_USING_SAL is not set + +# +# Network interface device +# +# CONFIG_RT_USING_NETDEV is not set + +# +# light weight TCP/IP stack +# +# CONFIG_RT_USING_LWIP is not set + +# +# AT commands +# +# CONFIG_RT_USING_AT is not set + +# +# VBUS(Virtual Software BUS) +# +# CONFIG_RT_USING_VBUS is not set + +# +# Utilities +# +# CONFIG_RT_USING_RYM is not set +# CONFIG_RT_USING_ULOG is not set +# CONFIG_RT_USING_UTEST is not set +# CONFIG_RT_USING_VAR_EXPORT is not set +# CONFIG_RT_USING_RT_LINK is not set + +# +# RT-Thread Utestcases +# +# CONFIG_RT_USING_UTESTCASES is not set + +# +# RT-Thread online packages +# + +# +# IoT - internet of things +# +# CONFIG_PKG_USING_LORAWAN_DRIVER is not set +# CONFIG_PKG_USING_PAHOMQTT is not set +# CONFIG_PKG_USING_UMQTT is not set +# CONFIG_PKG_USING_WEBCLIENT is not set +# CONFIG_PKG_USING_WEBNET is not set +# CONFIG_PKG_USING_MONGOOSE is not set +# CONFIG_PKG_USING_MYMQTT is not set +# CONFIG_PKG_USING_KAWAII_MQTT is not set +# CONFIG_PKG_USING_BC28_MQTT is not set +# CONFIG_PKG_USING_WEBTERMINAL is not set +# CONFIG_PKG_USING_CJSON is not set +# CONFIG_PKG_USING_JSMN is not set +# CONFIG_PKG_USING_LIBMODBUS is not set +# CONFIG_PKG_USING_FREEMODBUS is not set +# CONFIG_PKG_USING_LJSON is not set +# CONFIG_PKG_USING_EZXML is not set +# CONFIG_PKG_USING_NANOPB is not set + +# +# Wi-Fi +# + +# +# Marvell WiFi +# +# CONFIG_PKG_USING_WLANMARVELL is not set + +# +# Wiced WiFi +# +# CONFIG_PKG_USING_WLAN_WICED is not set +# CONFIG_PKG_USING_RW007 is not set +# CONFIG_PKG_USING_COAP is not set +# CONFIG_PKG_USING_NOPOLL is not set +# CONFIG_PKG_USING_NETUTILS is not set +# CONFIG_PKG_USING_CMUX is not set +# CONFIG_PKG_USING_PPP_DEVICE is not set +# CONFIG_PKG_USING_AT_DEVICE is not set +# CONFIG_PKG_USING_ATSRV_SOCKET is not set +# CONFIG_PKG_USING_WIZNET is not set +# CONFIG_PKG_USING_ZB_COORDINATOR is not set + +# +# IoT Cloud +# +# CONFIG_PKG_USING_ONENET is not set +# CONFIG_PKG_USING_GAGENT_CLOUD is not set +# CONFIG_PKG_USING_ALI_IOTKIT is not set +# CONFIG_PKG_USING_AZURE is not set +# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set +# CONFIG_PKG_USING_JIOT-C-SDK is not set +# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set +# CONFIG_PKG_USING_JOYLINK is not set +# CONFIG_PKG_USING_NIMBLE is not set +# CONFIG_PKG_USING_OTA_DOWNLOADER is not set +# CONFIG_PKG_USING_IPMSG is not set +# CONFIG_PKG_USING_LSSDP is not set +# CONFIG_PKG_USING_AIRKISS_OPEN is not set +# CONFIG_PKG_USING_LIBRWS is not set +# CONFIG_PKG_USING_TCPSERVER is not set +# CONFIG_PKG_USING_PROTOBUF_C is not set +# CONFIG_PKG_USING_DLT645 is not set +# CONFIG_PKG_USING_QXWZ is not set +# CONFIG_PKG_USING_SMTP_CLIENT is not set +# CONFIG_PKG_USING_ABUP_FOTA is not set +# CONFIG_PKG_USING_LIBCURL2RTT is not set +# CONFIG_PKG_USING_CAPNP is not set +# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set +# CONFIG_PKG_USING_AGILE_TELNET is not set +# CONFIG_PKG_USING_NMEALIB is not set +# CONFIG_PKG_USING_AGILE_JSMN is not set +# CONFIG_PKG_USING_PDULIB is not set +# CONFIG_PKG_USING_BTSTACK is not set +# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set +# CONFIG_PKG_USING_WAYZ_IOTKIT is not set +# CONFIG_PKG_USING_MAVLINK is not set +# CONFIG_PKG_USING_RAPIDJSON is not set +# CONFIG_PKG_USING_BSAL is not set +# CONFIG_PKG_USING_AGILE_MODBUS is not set +# CONFIG_PKG_USING_AGILE_FTP is not set +# CONFIG_PKG_USING_EMBEDDEDPROTO is not set +# CONFIG_PKG_USING_RT_LINK_HW is not set +# CONFIG_PKG_USING_LORA_PKT_FWD is not set +# CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set +# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set +# CONFIG_PKG_USING_HM is not set +# CONFIG_PKG_USING_SMALL_MODBUS is not set + +# +# security packages +# +# CONFIG_PKG_USING_MBEDTLS is not set +# CONFIG_PKG_USING_LIBSODIUM is not set +# CONFIG_PKG_USING_TINYCRYPT is not set +# CONFIG_PKG_USING_TFM is not set +# CONFIG_PKG_USING_YD_CRYPTO is not set + +# +# language packages +# +# CONFIG_PKG_USING_LUA is not set +# CONFIG_PKG_USING_JERRYSCRIPT is not set +# CONFIG_PKG_USING_MICROPYTHON is not set +# CONFIG_PKG_USING_PIKASCRIPT is not set + +# +# multimedia packages +# + +# +# LVGL: powerful and easy-to-use embedded GUI library +# +# CONFIG_PKG_USING_LVGL is not set +# CONFIG_PKG_USING_LITTLEVGL2RTT is not set +# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set + +# +# u8g2: a monochrome graphic library +# +# CONFIG_PKG_USING_U8G2_OFFICIAL is not set +# CONFIG_PKG_USING_U8G2 is not set +# CONFIG_PKG_USING_OPENMV is not set +# CONFIG_PKG_USING_MUPDF is not set +# CONFIG_PKG_USING_STEMWIN is not set +# CONFIG_PKG_USING_WAVPLAYER is not set +# CONFIG_PKG_USING_TJPGD is not set +# CONFIG_PKG_USING_PDFGEN is not set +# CONFIG_PKG_USING_HELIX is not set +# CONFIG_PKG_USING_AZUREGUIX is not set +# CONFIG_PKG_USING_TOUCHGFX2RTT is not set +# CONFIG_PKG_USING_NUEMWIN is not set +# CONFIG_PKG_USING_MP3PLAYER is not set +# CONFIG_PKG_USING_TINYJPEG is not set +# CONFIG_PKG_USING_UGUI is not set + +# +# PainterEngine: A cross-platform graphics application framework written in C language +# +# CONFIG_PKG_USING_PAINTERENGINE is not set +# CONFIG_PKG_USING_PAINTERENGINE_AUX is not set + +# +# tools packages +# +# CONFIG_PKG_USING_CMBACKTRACE is not set +# CONFIG_PKG_USING_EASYFLASH is not set +# CONFIG_PKG_USING_EASYLOGGER is not set +# CONFIG_PKG_USING_SYSTEMVIEW is not set +# CONFIG_PKG_USING_SEGGER_RTT is not set +# CONFIG_PKG_USING_RDB is not set +# CONFIG_PKG_USING_QRCODE is not set +# CONFIG_PKG_USING_ULOG_EASYFLASH is not set +# CONFIG_PKG_USING_ULOG_FILE is not set +# CONFIG_PKG_USING_LOGMGR is not set +# CONFIG_PKG_USING_ADBD is not set +# CONFIG_PKG_USING_COREMARK is not set +# CONFIG_PKG_USING_DHRYSTONE is not set +# CONFIG_PKG_USING_MEMORYPERF is not set +# CONFIG_PKG_USING_NR_MICRO_SHELL is not set +# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set +# CONFIG_PKG_USING_LUNAR_CALENDAR is not set +# CONFIG_PKG_USING_BS8116A is not set +# CONFIG_PKG_USING_GPS_RMC is not set +# CONFIG_PKG_USING_URLENCODE is not set +# CONFIG_PKG_USING_UMCN is not set +# CONFIG_PKG_USING_LWRB2RTT is not set +# CONFIG_PKG_USING_CPU_USAGE is not set +# CONFIG_PKG_USING_GBK2UTF8 is not set +# CONFIG_PKG_USING_VCONSOLE is not set +# CONFIG_PKG_USING_KDB is not set +# CONFIG_PKG_USING_WAMR is not set +# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set +# CONFIG_PKG_USING_LWLOG is not set +# CONFIG_PKG_USING_ANV_TRACE is not set +# CONFIG_PKG_USING_ANV_MEMLEAK is not set +# CONFIG_PKG_USING_ANV_TESTSUIT is not set +# CONFIG_PKG_USING_ANV_BENCH is not set +# CONFIG_PKG_USING_DEVMEM is not set +# CONFIG_PKG_USING_REGEX is not set +# CONFIG_PKG_USING_MEM_SANDBOX is not set +# CONFIG_PKG_USING_SOLAR_TERMS is not set +# CONFIG_PKG_USING_GAN_ZHI is not set +# CONFIG_PKG_USING_FDT is not set + +# +# system packages +# + +# +# enhanced kernel services +# +# CONFIG_PKG_USING_RT_MEMCPY_CM is not set +# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set +# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set + +# +# acceleration: Assembly language or algorithmic acceleration packages +# +# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set +# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set +# CONFIG_PKG_USING_QFPLIB_M3 is not set + +# +# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard +# +# CONFIG_PKG_USING_CMSIS_5 is not set +# CONFIG_PKG_USING_CMSIS_RTOS2 is not set + +# +# Micrium: Micrium software products porting for RT-Thread +# +# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set +# CONFIG_PKG_USING_UCOSII_WRAPPER is not set +# CONFIG_PKG_USING_UC_CRC is not set +# CONFIG_PKG_USING_UC_CLK is not set +# CONFIG_PKG_USING_UC_COMMON is not set +# CONFIG_PKG_USING_UC_MODBUS is not set +# CONFIG_RT_USING_ARDUINO is not set +# CONFIG_PKG_USING_GUIENGINE is not set +# CONFIG_PKG_USING_CAIRO is not set +# CONFIG_PKG_USING_PIXMAN is not set +# CONFIG_PKG_USING_PARTITION is not set +# CONFIG_PKG_USING_FAL is not set +# CONFIG_PKG_USING_FLASHDB is not set +# CONFIG_PKG_USING_SQLITE is not set +# CONFIG_PKG_USING_RTI is not set +# CONFIG_PKG_USING_DFS_YAFFS is not set +# CONFIG_PKG_USING_LITTLEFS is not set +# CONFIG_PKG_USING_DFS_JFFS2 is not set +# CONFIG_PKG_USING_DFS_UFFS is not set +# CONFIG_PKG_USING_LWEXT4 is not set +# CONFIG_PKG_USING_THREAD_POOL is not set +# CONFIG_PKG_USING_ROBOTS is not set +# CONFIG_PKG_USING_EV is not set +# CONFIG_PKG_USING_SYSWATCH is not set +# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set +# CONFIG_PKG_USING_PLCCORE is not set +# CONFIG_PKG_USING_RAMDISK is not set +# CONFIG_PKG_USING_MININI is not set +# CONFIG_PKG_USING_QBOOT is not set +# CONFIG_PKG_USING_PPOOL is not set +# CONFIG_PKG_USING_OPENAMP is not set +# CONFIG_PKG_USING_LPM is not set +# CONFIG_PKG_USING_TLSF is not set +# CONFIG_PKG_USING_EVENT_RECORDER is not set +# CONFIG_PKG_USING_ARM_2D is not set +# CONFIG_PKG_USING_WCWIDTH is not set +# CONFIG_PKG_USING_MCUBOOT is not set +# CONFIG_PKG_USING_TINYUSB is not set +# CONFIG_PKG_USING_USB_STACK is not set + +# +# peripheral libraries and drivers +# +# CONFIG_PKG_USING_SENSORS_DRIVERS is not set +# CONFIG_PKG_USING_REALTEK_AMEBA is not set +# CONFIG_PKG_USING_SHT2X is not set +# CONFIG_PKG_USING_SHT3X is not set +# CONFIG_PKG_USING_AS7341 is not set +# CONFIG_PKG_USING_STM32_SDIO is not set +# CONFIG_PKG_USING_ICM20608 is not set +# CONFIG_PKG_USING_BUTTON is not set +# CONFIG_PKG_USING_PCF8574 is not set +# CONFIG_PKG_USING_SX12XX is not set +# CONFIG_PKG_USING_SIGNAL_LED is not set +# CONFIG_PKG_USING_LEDBLINK is not set +# CONFIG_PKG_USING_LITTLED is not set +# CONFIG_PKG_USING_LKDGUI is not set +# CONFIG_PKG_USING_NRF5X_SDK is not set +# CONFIG_PKG_USING_NRFX is not set +# CONFIG_PKG_USING_WM_LIBRARIES is not set +# CONFIG_PKG_USING_KENDRYTE_SDK is not set +# CONFIG_PKG_USING_INFRARED is not set +# CONFIG_PKG_USING_AGILE_BUTTON is not set +# CONFIG_PKG_USING_AGILE_LED is not set +# CONFIG_PKG_USING_AT24CXX is not set +# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set +# CONFIG_PKG_USING_AD7746 is not set +# CONFIG_PKG_USING_PCA9685 is not set +# CONFIG_PKG_USING_I2C_TOOLS is not set +# CONFIG_PKG_USING_NRF24L01 is not set +# CONFIG_PKG_USING_TOUCH_DRIVERS is not set +# CONFIG_PKG_USING_MAX17048 is not set +# CONFIG_PKG_USING_RPLIDAR is not set +# CONFIG_PKG_USING_AS608 is not set +# CONFIG_PKG_USING_RC522 is not set +# CONFIG_PKG_USING_WS2812B is not set +# CONFIG_PKG_USING_EMBARC_BSP is not set +# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set +# CONFIG_PKG_USING_MULTI_RTIMER is not set +# CONFIG_PKG_USING_MAX7219 is not set +# CONFIG_PKG_USING_BEEP is not set +# CONFIG_PKG_USING_EASYBLINK is not set +# CONFIG_PKG_USING_PMS_SERIES is not set +# CONFIG_PKG_USING_CAN_YMODEM is not set +# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set +# CONFIG_PKG_USING_QLED is not set +# CONFIG_PKG_USING_PAJ7620 is not set +# CONFIG_PKG_USING_AGILE_CONSOLE is not set +# CONFIG_PKG_USING_LD3320 is not set +# CONFIG_PKG_USING_WK2124 is not set +# CONFIG_PKG_USING_LY68L6400 is not set +# CONFIG_PKG_USING_DM9051 is not set +# CONFIG_PKG_USING_SSD1306 is not set +# CONFIG_PKG_USING_QKEY is not set +# CONFIG_PKG_USING_RS485 is not set +# CONFIG_PKG_USING_NES is not set +# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set +# CONFIG_PKG_USING_VDEVICE is not set +# CONFIG_PKG_USING_SGM706 is not set +# CONFIG_PKG_USING_STM32WB55_SDK is not set +# CONFIG_PKG_USING_RDA58XX is not set +# CONFIG_PKG_USING_LIBNFC is not set +# CONFIG_PKG_USING_MFOC is not set +# CONFIG_PKG_USING_TMC51XX is not set +# CONFIG_PKG_USING_TCA9534 is not set +# CONFIG_PKG_USING_KOBUKI is not set +# CONFIG_PKG_USING_ROSSERIAL is not set +# CONFIG_PKG_USING_MICRO_ROS is not set +# CONFIG_PKG_USING_MCP23008 is not set +# CONFIG_PKG_USING_BLUETRUM_SDK is not set +# CONFIG_PKG_USING_MISAKA_AT24CXX is not set +# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set +# CONFIG_PKG_USING_BL_MCU_SDK is not set +# CONFIG_PKG_USING_SOFT_SERIAL is not set +# CONFIG_PKG_USING_MB85RS16 is not set + +# +# AI packages +# +# CONFIG_PKG_USING_LIBANN is not set +# CONFIG_PKG_USING_NNOM is not set +# CONFIG_PKG_USING_ONNX_BACKEND is not set +# CONFIG_PKG_USING_ONNX_PARSER is not set +# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set +# CONFIG_PKG_USING_ELAPACK is not set +# CONFIG_PKG_USING_ULAPACK is not set +# CONFIG_PKG_USING_QUEST is not set +# CONFIG_PKG_USING_NAXOS is not set + +# +# miscellaneous packages +# + +# +# samples: kernel and components samples +# +# CONFIG_PKG_USING_KERNEL_SAMPLES is not set +# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set +# CONFIG_PKG_USING_NETWORK_SAMPLES is not set +# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set + +# +# entertainment: terminal games and other interesting software packages +# +# CONFIG_PKG_USING_CMATRIX is not set +# CONFIG_PKG_USING_SL is not set +# CONFIG_PKG_USING_CAL is not set +# CONFIG_PKG_USING_ACLOCK is not set +# CONFIG_PKG_USING_THREES is not set +# CONFIG_PKG_USING_2048 is not set +# CONFIG_PKG_USING_SNAKE is not set +# CONFIG_PKG_USING_TETRIS is not set +# CONFIG_PKG_USING_DONUT is not set +# CONFIG_PKG_USING_LIBCSV is not set +# CONFIG_PKG_USING_OPTPARSE is not set +# CONFIG_PKG_USING_FASTLZ is not set +# CONFIG_PKG_USING_MINILZO is not set +# CONFIG_PKG_USING_QUICKLZ is not set +# CONFIG_PKG_USING_LZMA is not set +# CONFIG_PKG_USING_MULTIBUTTON is not set +# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set +# CONFIG_PKG_USING_CANFESTIVAL is not set +# CONFIG_PKG_USING_ZLIB is not set +# CONFIG_PKG_USING_MINIZIP is not set +# CONFIG_PKG_USING_DSTR is not set +# CONFIG_PKG_USING_TINYFRAME is not set +# CONFIG_PKG_USING_KENDRYTE_DEMO is not set +# CONFIG_PKG_USING_DIGITALCTRL is not set +# CONFIG_PKG_USING_UPACKER is not set +# CONFIG_PKG_USING_UPARAM is not set +# CONFIG_PKG_USING_HELLO is not set +# CONFIG_PKG_USING_VI is not set +# CONFIG_PKG_USING_KI is not set +# CONFIG_PKG_USING_ARMv7M_DWT is not set +# CONFIG_PKG_USING_VT100 is not set +# CONFIG_PKG_USING_UKAL is not set +# CONFIG_PKG_USING_CRCLIB is not set +# CONFIG_PKG_USING_LWGPS is not set +# CONFIG_PKG_USING_STATE_MACHINE is not set +# CONFIG_PKG_USING_MCURSES is not set +# CONFIG_PKG_USING_COWSAY is not set +# CONFIG_PKG_USING_TERMBOX is not set + +# +# Hardware Drivers Config +# +CONFIG_SOC_SERIES_GD32F4xx=y +CONFIG_SOC_GD32450Z=y + +# +# Onboard Peripheral Drivers +# + +# +# On-chip Peripheral Drivers +# +CONFIG_BSP_USING_GPIO=y +CONFIG_BSP_USING_UART=y +CONFIG_BSP_USING_UART1=y +# CONFIG_BSP_UART1_RX_USING_DMA is not set +# CONFIG_BSP_USING_SPI is not set +# CONFIG_BSP_USING_I2C1 is not set + +# +# Board extended module Drivers +# diff --git a/bsp/gd32/gd32450z-eval/Kconfig b/bsp/gd32/gd32450z-eval/Kconfig new file mode 100644 index 0000000000..8cbc7b71a8 --- /dev/null +++ b/bsp/gd32/gd32450z-eval/Kconfig @@ -0,0 +1,21 @@ +mainmenu "RT-Thread Configuration" + +config BSP_DIR + string + option env="BSP_ROOT" + default "." + +config RTT_DIR + string + option env="RTT_ROOT" + default "../../.." + +config PKGS_DIR + string + option env="PKGS_ROOT" + default "packages" + +source "$RTT_DIR/Kconfig" +source "$PKGS_DIR/Kconfig" +source "../libraries/Kconfig" +source "board/Kconfig" diff --git a/bsp/gd32/gd32450z-eval/README.md b/bsp/gd32/gd32450z-eval/README.md new file mode 100644 index 0000000000..6b398d8661 --- /dev/null +++ b/bsp/gd32/gd32450z-eval/README.md @@ -0,0 +1,94 @@ +# GD32450Z-EVAL开发板BSP说明 + +## 简介 + +GD32450Z-EVAL是-兆易创新推出的一款GD32F4XX系列的评估板，最高主频高达168M，该开发板具有丰富的板载资源，可以充分发挥 GD32F450ZKT6的芯片性能。 + +该开发板常用 **板载资源** 如下： + +- GD32F450ZKT6，主频 200MHz，3072KB FLASH ，256KB RAM + +- 常用外设 + + - LED ：3个，LED1 (PD4），LED2（PD5），LED3（PG3） + - 按键：2个，K1（PA0），K2（PC13），K3（PB14） + +- 常用接口：USB 接口 + +- 调试接口：GD-LINK + +## 外设支持 + +本 BSP 目前对外设的支持情况如下： + +| **片上外设** | **支持情况** | **备注** | +|:--------- |:--------:|:------------------------------------- | +| GPIO | 支持 | PA0, PA1... PK15 ---> PIN: 0, 1...144 | +| UART | 支持 | UART0 - UART7 | +| I2C | 支持 | I2C1 | +| SPI | 支持 | SPI0 - SPI2 | +| SPI FLASH | 支持 | | +| **扩展模块** | **支持情况** | **备注** | +| 暂无 | 暂不支持 | 暂不支持 | + +## 使用说明 + +使用说明分为如下两个章节： + +- 快速上手 + + 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 + +- 进阶使用 + + 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 + +### 快速上手 + +本 BSP 为开发者提供 MDK5 工程，并且支持 GCC 开发环境，也可使用RT-Thread Studio开发。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 + +#### 硬件连接 + +使用数据线连接开发板到 PC，使用USB转TTL模块连接PA2(MCU TX)和PA3(MCU RX)，打开电源开关。 + +#### 编译下载 + +双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 + +> 工程默认配置使用 GD-Link 仿真器下载程序，在通过 GD-Link 连接开发板的基础上，点击下载按钮即可下载程序到开发板 + +#### 运行结果 + +下载程序成功之后，系统会自动运行，LED 闪烁。 + +连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息: + +```bash + \ | / +- RT - Thread Operating System + / | \ 4.0.4 build Jan 9 2021 + 2006 - 2021 Copyright by rt-thread team +msh > +``` + +### 进阶使用 + +此 BSP 默认只开启了 GPIO 和 串口1的功能，如果需使用高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下： + +1. 在 bsp 下打开 env 工具。 + +2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 + +3. 输入`pkgs --update`命令更新软件包。 + +4. 输入`scons --target=mdk4/mdk5` 命令重新生成工程。 + +## 注意事项 + +暂无 + +## 联系人信息 + +维护人: + +- [BruceOu](https://github.com/Ouxiaolong/), 邮箱：<[email protected]>
\ No newline at end of file diff --git a/bsp/gd32/gd32450z-eval/SConscript b/bsp/gd32/gd32450z-eval/SConscript new file mode 100644 index 0000000000..20f7689c53 --- /dev/null +++ b/bsp/gd32/gd32450z-eval/SConscript @@ -0,0 +1,15 @@ +# for module compiling +import os +Import('RTT_ROOT') +from building import * + +cwd = GetCurrentDir() +objs = [] +list = os.listdir(cwd) + +for d in list: + path = os.path.join(cwd, d) + if os.path.isfile(os.path.join(path, 'SConscript')): + objs = objs + SConscript(os.path.join(d, 'SConscript')) + +Return('objs') diff --git a/bsp/gd32/gd32450z-eval/SConstruct b/bsp/gd32/gd32450z-eval/SConstruct new file mode 100644 index 0000000000..71deeebad1 --- /dev/null +++ b/bsp/gd32/gd32450z-eval/SConstruct @@ -0,0 +1,60 @@ +import os +import sys +import rtconfig + +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') +else: + RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..') + +sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')] +try: + from building import * +except: + print('Cannot found RT-Thread root directory, please check RTT_ROOT') + print(RTT_ROOT) + exit(-1) + +TARGET = 'rtthread.' + rtconfig.TARGET_EXT + +DefaultEnvironment(tools=[]) +env = Environment(tools = ['mingw'], + AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, + CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS, + AR = rtconfig.AR, ARFLAGS = '-rc', + CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS, + LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) +env.PrependENVPath('PATH', rtconfig.EXEC_PATH) + +if rtconfig.PLATFORM == 'iar': + env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES']) + env.Replace(ARFLAGS = ['']) + env.Replace(LINKCOM = env["LINKCOM"] + ' --map rtthread.map') + +Export('RTT_ROOT') +Export('rtconfig') + +SDK_ROOT = os.path.abspath('./') + +if os.path.exists(SDK_ROOT + '/libraries'): + libraries_path_prefix = SDK_ROOT + '/libraries' +else: + libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries' + +SDK_LIB = libraries_path_prefix +Export('SDK_LIB') + +# prepare building environment +objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False) + +gd32_library = 'GD32F4xx_Firmware_Library' +rtconfig.BSP_LIBRARY_TYPE = gd32_library + +# include libraries +objs.extend(SConscript(os.path.join(libraries_path_prefix, gd32_library, 'SConscript'))) + +# include drivers +objs.extend(SConscript(os.path.join(libraries_path_prefix, 'gd32_drivers', 'SConscript'))) + +# make a building +DoBuilding(TARGET, objs) diff --git a/bsp/gd32/gd32450z-eval/applications/SConscript b/bsp/gd32/gd32450z-eval/applications/SConscript new file mode 100644 index 0000000000..01eb940dfb --- /dev/null +++ b/bsp/gd32/gd32450z-eval/applications/SConscript @@ -0,0 +1,11 @@ +Import('RTT_ROOT') +Import('rtconfig') +from building import * + +cwd = os.path.join(str(Dir('#')), 'applications') +src = Glob('*.c') +CPPPATH = [cwd, str(Dir('#'))] + +group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/gd32/gd32450z-eval/applications/main.c b/bsp/gd32/gd32450z-eval/applications/main.c new file mode 100644 index 0000000000..5ce66c9b0c --- /dev/null +++ b/bsp/gd32/gd32450z-eval/applications/main.c @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-08-20 BruceOu first implementation + */ + +#include <stdio.h> +#include <rtthread.h> +#include <rtdevice.h> +#include <board.h> + +/* defined the LED1 pin: PD4 */ +#define LED1_PIN GET_PIN(D, 4) + +int main(void) +{ + int count = 1; + + /* set LED1 pin mode to output */ + rt_pin_mode(LED1_PIN, PIN_MODE_OUTPUT); + + while (count++) + { + rt_pin_write(LED1_PIN, PIN_HIGH); + rt_thread_mdelay(500); + rt_pin_write(LED1_PIN, PIN_LOW); + rt_thread_mdelay(500); + } + + return RT_EOK; +} diff --git a/bsp/gd32/gd32450z-eval/board/Kconfig b/bsp/gd32/gd32450z-eval/board/Kconfig new file mode 100644 index 0000000000..6d37255141 --- /dev/null +++ b/bsp/gd32/gd32450z-eval/board/Kconfig @@ -0,0 +1,85 @@ +menu "Hardware Drivers Config" + +config SOC_SERIES_GD32F4xx + bool + default y + +config SOC_GD32450Z + bool + select SOC_SERIES_GD32F4xx + select RT_USING_COMPONENTS_INIT + select RT_USING_USER_MAIN + default y + +menu "Onboard Peripheral Drivers" + +endmenu + +menu "On-chip Peripheral Drivers" + + config BSP_USING_GPIO + bool "Enable GPIO" + select RT_USING_PIN + default y + + menuconfig BSP_USING_UART + bool "Enable UART" + default y + select RT_USING_SERIAL + if BSP_USING_UART + config BSP_USING_UART1 + bool "Enable UART1" + default y + + config BSP_UART1_RX_USING_DMA + bool "Enable UART1 RX DMA" + depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA + default n + endif + + menuconfig BSP_USING_SPI + bool "Enable SPI BUS" + default n + select RT_USING_SPI + if BSP_USING_SPI + config BSP_USING_SPI1 + bool "Enable SPI1 BUS" + default n + + config BSP_SPI1_TX_USING_DMA + bool "Enable SPI1 TX DMA" + depends on BSP_USING_SPI1 + default n + + config BSP_SPI1_RX_USING_DMA + bool "Enable SPI1 RX DMA" + depends on BSP_USING_SPI1 + select BSP_SPI1_TX_USING_DMA + default n + endif + + menuconfig BSP_USING_I2C1 + bool "Enable I2C1 BUS (software simulation)" + default n + select RT_USING_I2C + select RT_USING_I2C_BITOPS + select RT_USING_PIN + if BSP_USING_I2C1 + config BSP_I2C1_SCL_PIN + int "i2c1 scl pin number" + range 1 216 + default 24 + config BSP_I2C1_SDA_PIN + int "I2C1 sda pin number" + range 1 216 + default 25 + endif + source "../libraries/gd32_drivers/Kconfig" + +endmenu + +menu "Board extended module Drivers" + +endmenu + +endmenu diff --git a/bsp/gd32/gd32450z-eval/board/SConscript b/bsp/gd32/gd32450z-eval/board/SConscript new file mode 100644 index 0000000000..77a18f74e1 --- /dev/null +++ b/bsp/gd32/gd32450z-eval/board/SConscript @@ -0,0 +1,28 @@ +import os +import rtconfig +from building import * + +Import('SDK_LIB') + +cwd = GetCurrentDir() + +# add general drivers +src = Split(''' +board.c +''') + +path = [cwd] + +startup_path_prefix = SDK_LIB + +if rtconfig.CROSS_TOOL == 'gcc': + src += [startup_path_prefix + '/GD32F4xx_Firmware_Library/CMSIS/GD/GD32F4xx/Source/GCC/startup_gd32f4xx.s'] +elif rtconfig.CROSS_TOOL == 'keil': + src += [startup_path_prefix + '/GD32F4xx_Firmware_Library/CMSIS/GD/GD32F4xx/Source/ARM/startup_gd32f4xx.s'] +elif rtconfig.CROSS_TOOL == 'iar': + src += [startup_path_prefix + '/GD32F4xx_Firmware_Library/CMSIS/GD/GD32F4xx/Source/IAR/startup_gd32f4xx.s'] + +CPPDEFINES = ['GD32F450'] +group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES) + +Return('group') diff --git a/bsp/gd32/gd32450z-eval/board/board.c b/bsp/gd32/gd32450z-eval/board/board.c new file mode 100644 index 0000000000..0e9f89865a --- /dev/null +++ b/bsp/gd32/gd32450z-eval/board/board.c @@ -0,0 +1,85 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-08-20 BruceOu first implementation + */ +#include <stdint.h> +#include <rthw.h> +#include <rtthread.h> +#include <board.h> + +/** + * @brief This function is executed in case of error occurrence. + * @param None + * @retval None + */ +void Error_Handler(void) +{ + /* USER CODE BEGIN Error_Handler */ + /* User can add his own implementation to report the HAL error return state */ + while (1) + { + } + /* USER CODE END Error_Handler */ +} + +/** System Clock Configuration +*/ +void SystemClock_Config(void) +{ + SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND); + NVIC_SetPriority(SysTick_IRQn, 0); +} + +/** + * This is the timer interrupt service routine. + * + */ +void SysTick_Handler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + rt_tick_increase(); + + /* leave interrupt */ + rt_interrupt_leave(); +} + +/** + * This function will initial GD32 board. + */ +void rt_hw_board_init() +{ + /* NVIC Configuration */ +#define NVIC_VTOR_MASK 0x3FFFFF80 +#ifdef VECT_TAB_RAM + /* Set the Vector Table base location at 0x10000000 */ + SCB->VTOR = (0x10000000 & NVIC_VTOR_MASK); +#else /* VECT_TAB_FLASH */ + /* Set the Vector Table base location at 0x08000000 */ + SCB->VTOR = (0x08000000 & NVIC_VTOR_MASK); +#endif + + SystemClock_Config(); + +#ifdef RT_USING_COMPONENTS_INIT + rt_components_board_init(); +#endif + +#ifdef RT_USING_CONSOLE + rt_console_set_device(RT_CONSOLE_DEVICE_NAME); +#endif + +#ifdef BSP_USING_SDRAM + rt_system_heap_init((void *)EXT_SDRAM_BEGIN, (void *)EXT_SDRAM_END); +#else + rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END); +#endif +} + +/*@}*/ diff --git a/bsp/gd32/gd32450z-eval/board/board.h b/bsp/gd32/gd32450z-eval/board/board.h new file mode 100644 index 0000000000..59e00a88ca --- /dev/null +++ b/bsp/gd32/gd32450z-eval/board/board.h @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-08-20 BruceOu first implementation + */ +#ifndef __BOARD_H__ +#define __BOARD_H__ + +#include "gd32f4xx.h" +#include "drv_usart.h" +#include "drv_gpio.h" + +#include "gd32f4xx_exti.h" + +#define EXT_SDRAM_BEGIN (0xC0000000U) /* the begining address of external SDRAM */ +#define EXT_SDRAM_END (EXT_SDRAM_BEGIN + (32U * 1024 * 1024)) /* the end address of external SDRAM */ + +// <o> Internal SRAM memory size[Kbytes] <8-256> +// <i>Default: 256 +#ifdef __ICCARM__ +// Use *.icf ram symbal, to avoid hardcode. +extern char __ICFEDIT_region_RAM_end__; +#define GD32_SRAM_END &__ICFEDIT_region_RAM_end__ +#else +#define GD32_SRAM_SIZE 256 +#define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024) +#endif + +#ifdef __CC_ARM +extern int Image$$RW_IRAM1$$ZI$$Limit; +#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) +#elif __ICCARM__ +#pragma section="HEAP" +#define HEAP_BEGIN (__segment_end("HEAP")) +#else +extern int __bss_end; +#define HEAP_BEGIN (&__bss_end) +#endif + +#define HEAP_END GD32_SRAM_END + +#endif + diff --git a/bsp/gd32/gd32450z-eval/board/gd32f4xx_libopt.h b/bsp/gd32/gd32450z-eval/board/gd32f4xx_libopt.h new file mode 100644 index 0000000000..d26e3d15ec --- /dev/null +++ b/bsp/gd32/gd32450z-eval/board/gd32f4xx_libopt.h @@ -0,0 +1,45 @@ +/*! + \file gd32f4xx_libopt.h + \brief library optional for gd32f4xx +*/ + +/* + Copyright (C) 2016 GigaDevice + + 2016-10-19, V1.0.0, firmware for GD32F4xx +*/ + +#ifndef GD32F4XX_LIBOPT_H +#define GD32F4XX_LIBOPT_H +#include "gd32f4xx_rcu.h" +#include "gd32f4xx_adc.h" +#include "gd32f4xx_can.h" +#include "gd32f4xx_crc.h" +#include "gd32f4xx_ctc.h" +#include "gd32f4xx_dac.h" +#include "gd32f4xx_dbg.h" +#include "gd32f4xx_dci.h" +#include "gd32f4xx_dma.h" +//#include "gd32f4xx_enet.h" +#include "gd32f4xx_exmc.h" +#include "gd32f4xx_exti.h" +#include "gd32f4xx_fmc.h" +#include "gd32f4xx_fwdgt.h" +#include "gd32f4xx_gpio.h" +#include "gd32f4xx_syscfg.h" +#include "gd32f4xx_i2c.h" +#include "gd32f4xx_ipa.h" +#include "gd32f4xx_iref.h" +#include "gd32f4xx_pmu.h" +#include "gd32f4xx_rcu.h" +#include "gd32f4xx_rtc.h" +#include "gd32f4xx_sdio.h" +#include "gd32f4xx_spi.h" +#include "gd32f4xx_timer.h" +#include "gd32f4xx_tli.h" +#include "gd32f4xx_trng.h" +#include "gd32f4xx_usart.h" +#include "gd32f4xx_wwdgt.h" +#include "gd32f4xx_misc.h" + +#endif /* GD32F4XX_LIBOPT_H */ diff --git a/bsp/gd32/gd32450z-eval/board/linker_scripts/link.icf b/bsp/gd32/gd32450z-eval/board/linker_scripts/link.icf new file mode 100644 index 0000000000..be287f2c06 --- /dev/null +++ b/bsp/gd32/gd32450z-eval/board/linker_scripts/link.icf @@ -0,0 +1,40 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x082FFFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x2003FFFF;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x2000;
+define symbol __ICFEDIT_size_heap__ = 0x2000;
+/**** End of ICF editor section. ###ICF###*/
+
+export symbol __ICFEDIT_region_RAM_end__;
+
+define symbol __region_RAM1_start__ = 0x10000000;
+define symbol __region_RAM1_end__ = 0x1000FFFF;
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+define region RAM1_region = mem:[from __region_RAM1_start__ to __region_RAM1_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+keep { section FSymTab };
+keep { section VSymTab };
+keep { section .rti_fn* };
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
+place in RAM1_region { section .sram };
\ No newline at end of file diff --git a/bsp/gd32/gd32450z-eval/board/linker_scripts/link.ld b/bsp/gd32/gd32450z-eval/board/linker_scripts/link.ld new file mode 100644 index 0000000000..f39b59d02d --- /dev/null +++ b/bsp/gd32/gd32450z-eval/board/linker_scripts/link.ld @@ -0,0 +1,142 @@ +/* + * linker script for GD32F4xx with GNU ld + * bernard.xiong 2009-10-14 + */ + +/* Program Entry, set to mark it as "used" and avoid gc */ +MEMORY +{ + CODE (rx) : ORIGIN = 0x08000000, LENGTH = 3072k /* 3072KB flash */ + DATA (rw) : ORIGIN = 0x20000000, LENGTH = 256k /* 256KB sram */ +} +ENTRY(Reset_Handler) +_system_stack_size = 0x200; + +SECTIONS +{ + .text : + { + . = ALIGN(4); + _stext = .; + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + *(.text) /* remaining code */ + *(.text.*) /* remaining code */ + *(.rodata) /* read-only data (constants) */ + *(.rodata*) + *(.glue_7) + *(.glue_7t) + *(.gnu.linkonce.t*) + + /* section information for finsh shell */ + . = ALIGN(4); + __fsymtab_start = .; + KEEP(*(FSymTab)) + __fsymtab_end = .; + . = ALIGN(4); + __vsymtab_start = .; + KEEP(*(VSymTab)) + __vsymtab_end = .; + . = ALIGN(4); + + /* section information for initial. */ + . = ALIGN(4); + __rt_init_start = .; + KEEP(*(SORT(.rti_fn*))) + __rt_init_end = .; + . = ALIGN(4); + + . = ALIGN(4); + _etext = .; + } > CODE = 0 + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + + /* This is used by the startup in order to initialize the .data secion */ + _sidata = .; + } > CODE + __exidx_end = .; + + /* .data section which is used for initialized data */ + + .data : AT (_sidata) + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _sdata = . ; + + *(.data) + *(.data.*) + *(.gnu.linkonce.d*) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _edata = . ; + } >DATA + + .stack : + { + . = . + _system_stack_size; + . = ALIGN(4); + _estack = .; + } >DATA + + __bss_start = .; + .bss : + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; + + *(.bss) + *(.bss.*) + *(COMMON) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _ebss = . ; + + *(.bss.init) + } > DATA + __bss_end = .; + + _end = .; + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + * Symbols in the DWARF debugging sections are relative to the beginning + * of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff --git a/bsp/gd32/gd32450z-eval/board/linker_scripts/link.sct b/bsp/gd32/gd32450z-eval/board/linker_scripts/link.sct new file mode 100644 index 0000000000..fd32503883 --- /dev/null +++ b/bsp/gd32/gd32450z-eval/board/linker_scripts/link.sct @@ -0,0 +1,15 @@ +; *************************************************************
+; *** Scatter-Loading Description File generated by uVision ***
+; *************************************************************
+
+LR_IROM1 0x08000000 0x00300000 { ; load region size_region
+ ER_IROM1 0x08000000 0x00300000 { ; load address = execution address
+ *.o (RESET, +First)
+ *(InRoot$$Sections)
+ .ANY (+RO)
+ }
+ RW_IRAM1 0x20000000 0x00040000 { ; RW data
+ .ANY (+RW +ZI)
+ }
+}
+
diff --git a/bsp/gd32/gd32450z-eval/project.uvoptx b/bsp/gd32/gd32450z-eval/project.uvoptx new file mode 100644 index 0000000000..8117421f4d --- /dev/null +++ b/bsp/gd32/gd32450z-eval/project.uvoptx @@ -0,0 +1,778 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd"> + + <SchemaVersion>1.0</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Extensions> + <cExt>*.c</cExt> + <aExt>*.s*; *.src; *.a*</aExt> + <oExt>*.obj; *.o</oExt> + <lExt>*.lib</lExt> + <tExt>*.txt; *.h; *.inc</tExt> + <pExt>*.plm</pExt> + <CppX>*.cpp</CppX> + <nMigrate>0</nMigrate> + </Extensions> + + <DaveTm> + <dwLowDateTime>0</dwLowDateTime> + <dwHighDateTime>0</dwHighDateTime> + </DaveTm> + + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>12000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>0</RunSim> + <RunTarget>1</RunTarget> + <RunAbUc>0</RunAbUc> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\build\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>1</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>1</IsCurrentTarget> + </OPTFL> + <CpuCode>255</CpuCode> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <tRtrace>1</tRtrace> + <sRSysVw>1</sRSysVw> + <tRSysVw>1</tRSysVw> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <bEvRecOn>1</bEvRecOn> + <bSchkAxf>0</bSchkAxf> + <bTchkAxf>0</bTchkAxf> + <nTsel>3</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>BIN\CMSIS_AGDI.dll</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>CMSIS_AGDI</Key> + <Name>-X"CMSIS-DAP" -O206 -S0 -C0 -P00000000 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO65554 -TC10000000 -TT10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0GD32F4xx_3MB.FLM -FS08000000 -FL0300000 -FP0($$Device:GD32F450ZK$Flash\GD32F4xx_3MB.FLM)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>JL2CM3</Key> + <Name>-U59401765 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0GD32F4xx_3MB.FLM -FS08000000 -FL0300000 -FP0($$Device:GD32F450ZK$Flash\GD32F4xx_3MB.FLM)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0GD32F4xx_3MB -FS08000000 -FL0300000 -FP0($$Device:GD32F450ZK$Flash\GD32F4xx_3MB.FLM))</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint/> + <Tracepoint> + <THDelay>0</THDelay> + </Tracepoint> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>0</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>0</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + <bLintAuto>0</bLintAuto> + <bAutoGenD>0</bAutoGenD> + <LntExFlags>0</LntExFlags> + <pMisraName></pMisraName> + <pszMrule></pszMrule> + <pSingCmds></pSingCmds> + <pMultCmds></pMultCmds> + <pMisraNamep></pMisraNamep> + <pszMrulep></pszMrulep> + <pSingCmdsp></pSingCmdsp> + <pMultCmdsp></pMultCmdsp> + </TargetOption> + </Target> + + <Group> + <GroupName>Applications</GroupName> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <cbSel>0</cbSel> + <RteFlg>0</RteFlg> + <File> + <GroupNumber>1</GroupNumber> + <FileNumber>1</FileNumber> + <FileType>1</FileType> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <bDave2>0</bDave2> + <PathWithFileName>applications\main.c</PathWithFileName> + <FilenameWithoutPath>main.c</FilenameWithoutPath> + <RteFlg>0</RteFlg> + <bShared>0</bShared> + </File> + </Group> + + <Group> + <GroupName>CPU</GroupName> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <cbSel>0</cbSel> + <RteFlg>0</RteFlg> + <File> + <GroupNumber>2</GroupNumber> + <FileNumber>2</FileNumber> + <FileType>1</FileType> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <bDave2>0</bDave2> + <PathWithFileName>..\..\..\libcpu\arm\common\backtrace.c</PathWithFileName> + <FilenameWithoutPath>backtrace.c</FilenameWithoutPath> + <RteFlg>0</RteFlg> + <bShared>0</bShared> + </File> + <File> + <GroupNumber>2</GroupNumber> + <FileNumber>3</FileNumber> + <FileType>1</FileType> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <bDave2>0</bDave2> + <PathWithFileName>..\..\..\libcpu\arm\common\div0.c</PathWithFileName> + <FilenameWithoutPath>div0.c</FilenameWithoutPath> + <RteFlg>0</RteFlg> + <bShared>0</bShared> + </File> + <File> + <GroupNumber>2</GroupNumber> + <FileNumber>4</FileNumber> + <FileType>1</FileType> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <bDave2>0</bDave2> + <PathWithFileName>..\..\..\libcpu\arm\common\showmem.c</PathWithFileName> + <FilenameWithoutPath>showmem.c</FilenameWithoutPath> + <RteFlg>0</RteFlg> + <bShared>0</bShared> + </File> + <File> + <GroupNumber>2</GroupNumber> + <FileNumber>5</FileNumber> + <FileType>1</FileType> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <bDave2>0</bDave2> + <PathWithFileName>..\..\..\libcpu\arm\cortex-m4\cpuport.c</PathWithFileName> + <FilenameWithoutPath>cpuport.c</FilenameWithoutPath> + <RteFlg>0</RteFlg> + <bShared>0</bShared> + </File> + <File> + <GroupNumber>2</GroupNumber> + <FileNumber>6</FileNumber> + <FileType>2</FileType> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <bDave2>0</bDave2> + <PathWithFileName>..\..\..\libcpu\arm\cortex-m4\context_rvds.S</PathWithFileName> + <FilenameWithoutPath>context_rvds.S</FilenameWithoutPath> + <RteFlg>0</RteFlg> + <bShared>0</bShared> + </File> + </Group> + + <Group> + <GroupName>DeviceDrivers</GroupName> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <cbSel>0</cbSel> + <RteFlg>0</RteFlg> + <File> + <GroupNumber>3</GroupNumber> + <FileNumber>7</FileNumber> + <FileType>1</FileType> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <bDave2>0</bDave2> + <PathWithFileName>..\..\..\components\drivers\misc\pin.c</PathWithFileName> + <FilenameWithoutPath>pin.c</FilenameWithoutPath> + <RteFlg>0</RteFlg> + <bShared>0</bShared> + </File> + <File> + <GroupNumber>3</GroupNumber> + <FileNumber>8</FileNumber> + <FileType>1</FileType> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <bDave2>0</bDave2> + <PathWithFileName>..\..\..\components\drivers\serial\serial.c</PathWithFileName> + <FilenameWithoutPath>serial.c</FilenameWithoutPath> + <RteFlg>0</RteFlg> + <bShared>0</bShared> + </File> + <File> + <GroupNumber>3</GroupNumber> + <FileNumber>9</FileNumber> + <FileType>1</FileType> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <bDave2>0</bDave2> + <PathWithFileName>..\..\..\components\drivers\src\waitqueue.c</PathWithFileName> + <FilenameWithoutPath>waitqueue.c</FilenameWithoutPath> + <RteFlg>0</RteFlg> + <bShared>0</bShared> + </File> + <File> + <GroupNumber>3</GroupNumber> + <FileNumber>10</FileNumber> + <FileType>1</FileType> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <bDave2>0</bDave2> + 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</File> + </Group> + + <Group> + <GroupName>Drivers</GroupName> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <cbSel>0</cbSel> + <RteFlg>0</RteFlg> + <File> + <GroupNumber>4</GroupNumber> + <FileNumber>16</FileNumber> + <FileType>1</FileType> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <bDave2>0</bDave2> + <PathWithFileName>..\libraries\gd32_drivers\drv_gpio.c</PathWithFileName> + <FilenameWithoutPath>drv_gpio.c</FilenameWithoutPath> + <RteFlg>0</RteFlg> + <bShared>0</bShared> + </File> + <File> + <GroupNumber>4</GroupNumber> + <FileNumber>17</FileNumber> + <FileType>1</FileType> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <bDave2>0</bDave2> + <PathWithFileName>..\libraries\gd32_drivers\drv_usart.c</PathWithFileName> + <FilenameWithoutPath>drv_usart.c</FilenameWithoutPath> + <RteFlg>0</RteFlg> + <bShared>0</bShared> + </File> + </Group> + + <Group> + <GroupName>Finsh</GroupName> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <cbSel>0</cbSel> + <RteFlg>0</RteFlg> + <File> + <GroupNumber>5</GroupNumber> + <FileNumber>18</FileNumber> + <FileType>1</FileType> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <bDave2>0</bDave2> + <PathWithFileName>..\..\..\components\finsh\shell.c</PathWithFileName> + <FilenameWithoutPath>shell.c</FilenameWithoutPath> + <RteFlg>0</RteFlg> + <bShared>0</bShared> + </File> + <File> + <GroupNumber>5</GroupNumber> + <FileNumber>19</FileNumber> + <FileType>1</FileType> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <bDave2>0</bDave2> + <PathWithFileName>..\..\..\components\finsh\msh.c</PathWithFileName> + <FilenameWithoutPath>msh.c</FilenameWithoutPath> + <RteFlg>0</RteFlg> + <bShared>0</bShared> + </File> + <File> + <GroupNumber>5</GroupNumber> + <FileNumber>20</FileNumber> + <FileType>1</FileType> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <bDave2>0</bDave2> + <PathWithFileName>..\..\..\components\finsh\cmd.c</PathWithFileName> + <FilenameWithoutPath>cmd.c</FilenameWithoutPath> + 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</Files> + <Files> + <File> + <FileName>gd32f4xx_usart.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F4xx_Firmware_Library\GD32F4xx_standard_peripheral\Source\gd32f4xx_usart.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>system_gd32f4xx.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F4xx_Firmware_Library\CMSIS\GD\GD32F4xx\Source\system_gd32f4xx.c</FilePath> + </File> + </Files> + </Group> + </Groups> + </Target> + </Targets> +</Project> diff --git a/bsp/gd32/gd32450z-eval/project.uvprojx b/bsp/gd32/gd32450z-eval/project.uvprojx new file mode 100644 index 0000000000..da7049b867 --- /dev/null +++ b/bsp/gd32/gd32450z-eval/project.uvprojx @@ -0,0 +1,677 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd"> + + <SchemaVersion>2.1</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Targets> + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <uAC6>0</uAC6> + <TargetOption> + <TargetCommonOption> + <Device>GD32F450ZK</Device> + <Vendor>GigaDevice</Vendor> + <PackID>GigaDevice.GD32F4xx_DFP.2.1.0</PackID> + <PackURL>http://gd32mcu.com/data/documents/pack/</PackURL> + <Cpu>IRAM(0x20000000,0x040000) IROM(0x08000000,0x0300000) CPUTYPE("Cortex-M4") FPU2 CLOCK(20000000) ELITTLE</Cpu> + <FlashUtilSpec></FlashUtilSpec> + <StartupFile></StartupFile> + <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0GD32F4xx_3MB -FS08000000 -FL0300000 -FP0($$Device:GD32F450ZK$Flash\GD32F4xx_3MB.FLM))</FlashDriverDll> + <DeviceId>0</DeviceId> + <RegisterFile>$$Device:GD32F450ZK$Device\Include\gd32f4xx.h</RegisterFile> + <MemoryEnv></MemoryEnv> + <Cmp></Cmp> + <Asm></Asm> + <Linker></Linker> + <OHString></OHString> + <InfinionOptionDll></InfinionOptionDll> + <SLE66CMisc></SLE66CMisc> + <SLE66AMisc></SLE66AMisc> + <SLE66LinkerMisc></SLE66LinkerMisc> + <SFDFile>$$Device:GD32F450ZK$SVD\GD32F4xx.svd</SFDFile> + <bCustSvd>0</bCustSvd> + <UseEnv>0</UseEnv> + <BinPath></BinPath> + <IncludePath></IncludePath> + <LibPath></LibPath> + <RegisterFilePath></RegisterFilePath> + <DBRegisterFilePath></DBRegisterFilePath> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + </TargetStatus> + <OutputDirectory>.\build\</OutputDirectory> + <OutputName>rtthread</OutputName> + <CreateExecutable>1</CreateExecutable> + <CreateLib>0</CreateLib> + <CreateHexFile>0</CreateHexFile> + <DebugInformation>1</DebugInformation> + <BrowseInformation>0</BrowseInformation> + <ListingPath>.\build\</ListingPath> + <HexFormatSelection>1</HexFormatSelection> + <Merge32K>0</Merge32K> + <CreateBatchFile>0</CreateBatchFile> + <BeforeCompile> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopU1X>0</nStopU1X> + <nStopU2X>0</nStopU2X> + </BeforeCompile> + <BeforeMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopB1X>0</nStopB1X> + <nStopB2X>0</nStopB2X> + </BeforeMake> + <AfterMake> + <RunUserProg1>1</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopA1X>0</nStopA1X> + <nStopA2X>0</nStopA2X> + </AfterMake> + <SelectedForBatchBuild>0</SelectedForBatchBuild> + <SVCSIdString></SVCSIdString> + </TargetCommonOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>1</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>0</GenerateAssemblyFile> + <AssembleAssemblyFile>0</AssembleAssemblyFile> + <PublicsOnly>0</PublicsOnly> + <StopOnExitCode>3</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + <ComprImg>1</ComprImg> + </CommonProperty> + <DllOption> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments> -REMAP -MPU</SimDllArguments> + <SimDlgDll>DCM.DLL</SimDlgDll> + <SimDlgDllArguments>-pCM4</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments> -MPU</TargetDllArguments> + <TargetDlgDll>TCM.DLL</TargetDlgDll> + <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments> + </DllOption> + <DebugOption> + <OPTHX> + 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<Ro1Chk>0</Ro1Chk> + <Ro2Chk>0</Ro2Chk> + <Ro3Chk>0</Ro3Chk> + <Ir1Chk>1</Ir1Chk> + <Ir2Chk>0</Ir2Chk> + <Ra1Chk>0</Ra1Chk> + <Ra2Chk>0</Ra2Chk> + <Ra3Chk>0</Ra3Chk> + <Im1Chk>1</Im1Chk> + <Im2Chk>0</Im2Chk> + <OnChipMemories> + <Ocm1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocm4> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x40000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x300000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x300000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x30000</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x10000000</StartAddress> + <Size>0x10000</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector></RvctStartVector> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>4</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>0</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>0</wLevel> + <uThumb>0</uThumb> + <uSurpInc>0</uSurpInc> + <uC99>1</uC99> + <uGnu>0</uGnu> + <useXO>0</useXO> + <v6Lang>1</v6Lang> + <v6LangP>1</v6LangP> + <vShortEn>1</vShortEn> + <vShortWch>1</vShortWch> + <v6Lto>0</v6Lto> + <v6WtE>0</v6WtE> + <v6Rtti>0</v6Rtti> + <VariousControls> + <MiscControls></MiscControls> + <Define>GD32F450, USE_STDPERIPH_DRIVER, __RTTHREAD__, __CLK_TCK=RT_TICK_PER_SECOND</Define> + <Undefine></Undefine> + <IncludePath>applications;.;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\libraries\gd32_drivers;..\..\..\components\finsh;board;.;..\..\..\include;..\..\..\components\libc\compilers\common;..\..\..\components\libc\compilers\common\nogcc;..\libraries\GD32F4xx_Firmware_Library\CMSIS\GD\GD32F4xx\Include;..\libraries\GD32F4xx_Firmware_Library\CMSIS;..\libraries\GD32F4xx_Firmware_Library\GD32F4xx_standard_peripheral\Include;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\ipc;..\..\..\examples\utest\testcases\kernel</IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <uSurpInc>0</uSurpInc> + <useXO>0</useXO> + <ClangAsOpt>4</ClangAsOpt> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + <LDads> + <umfTarg>1</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x08000000</TextAddressRange> + <DataAddressRange>0x20000000</DataAddressRange> + <pXoBase></pXoBase> + <ScatterFile>.\gd32_rom.ld</ScatterFile> + <IncludeLibs></IncludeLibs> + <IncludeLibsPath></IncludeLibsPath> + <Misc></Misc> + <LinkerInputFile></LinkerInputFile> + <DisabledWarnings></DisabledWarnings> + </LDads> + </TargetArmAds> + </TargetOption> + <Groups> + <Group> + <GroupName>Applications</GroupName> + <Files> + <File> + <FileName>main.c</FileName> + <FileType>1</FileType> + <FilePath>applications\main.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>CPU</GroupName> + <Files> + <File> + <FileName>backtrace.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\libcpu\arm\common\backtrace.c</FilePath> + </File> + <File> + <FileName>div0.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\libcpu\arm\common\div0.c</FilePath> + </File> + <File> + <FileName>showmem.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\libcpu\arm\common\showmem.c</FilePath> + </File> + <File> + <FileName>cpuport.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\libcpu\arm\cortex-m4\cpuport.c</FilePath> + </File> + <File> + <FileName>context_rvds.S</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\libcpu\arm\cortex-m4\context_rvds.S</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>DeviceDrivers</GroupName> + <Files> + <File> + <FileName>pin.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\misc\pin.c</FilePath> + </File> + <File> + <FileName>serial.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\serial\serial.c</FilePath> + </File> + <File> + <FileName>waitqueue.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\waitqueue.c</FilePath> + </File> + <File> + <FileName>workqueue.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\workqueue.c</FilePath> + </File> + <File> + <FileName>ringbuffer.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\ringbuffer.c</FilePath> + </File> + <File> + <FileName>completion.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\completion.c</FilePath> + </File> + <File> + <FileName>pipe.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\pipe.c</FilePath> + </File> + <File> + <FileName>ringblk_buf.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\ringblk_buf.c</FilePath> + </File> + <File> + <FileName>dataqueue.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\dataqueue.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Drivers</GroupName> + <Files> + <File> + <FileName>drv_gpio.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\gd32_drivers\drv_gpio.c</FilePath> + </File> + <File> + <FileName>drv_usart.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\gd32_drivers\drv_usart.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Finsh</GroupName> + <Files> + <File> + <FileName>shell.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\shell.c</FilePath> + </File> + <File> + <FileName>msh.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\msh.c</FilePath> + </File> + <File> + <FileName>cmd.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\cmd.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>gd32_drivers</GroupName> + <Files> + <File> + <FileName>startup_gd32f4xx.s</FileName> + <FileType>2</FileType> + <FilePath>..\libraries\GD32F4xx_Firmware_Library\CMSIS\GD\GD32F4xx\Source\ARM\startup_gd32f4xx.s</FilePath> + </File> + <File> + <FileName>board.c</FileName> + <FileType>1</FileType> + <FilePath>board\board.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Kernel</GroupName> + <Files> + <File> + <FileName>thread.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\thread.c</FilePath> + </File> + <File> + <FileName>irq.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\irq.c</FilePath> + </File> + <File> + <FileName>timer.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\timer.c</FilePath> + </File> + <File> + <FileName>components.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\components.c</FilePath> + </File> + <File> + <FileName>mem.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\mem.c</FilePath> + </File> + <File> + <FileName>object.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\object.c</FilePath> + </File> + <File> + <FileName>mempool.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\mempool.c</FilePath> + </File> + <File> + <FileName>kservice.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\kservice.c</FilePath> + </File> + <File> + <FileName>idle.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\idle.c</FilePath> + </File> + <File> + <FileName>device.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\device.c</FilePath> + </File> + <File> + <FileName>scheduler.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\scheduler.c</FilePath> + </File> + <File> + <FileName>clock.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\clock.c</FilePath> + </File> + <File> + <FileName>ipc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\ipc.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>libc</GroupName> + <Files> + <File> + <FileName>time.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\libc\compilers\common\time.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Libraries</GroupName> + <Files> + <File> + <FileName>gd32f4xx_syscfg.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F4xx_Firmware_Library\GD32F4xx_standard_peripheral\Source\gd32f4xx_syscfg.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_exti.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F4xx_Firmware_Library\GD32F4xx_standard_peripheral\Source\gd32f4xx_exti.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_gpio.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F4xx_Firmware_Library\GD32F4xx_standard_peripheral\Source\gd32f4xx_gpio.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_rcu.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F4xx_Firmware_Library\GD32F4xx_standard_peripheral\Source\gd32f4xx_rcu.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_misc.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F4xx_Firmware_Library\GD32F4xx_standard_peripheral\Source\gd32f4xx_misc.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_usart.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F4xx_Firmware_Library\GD32F4xx_standard_peripheral\Source\gd32f4xx_usart.c</FilePath> + </File> + <File> + <FileName>system_gd32f4xx.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\GD32F4xx_Firmware_Library\CMSIS\GD\GD32F4xx\Source\system_gd32f4xx.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>::CMSIS</GroupName> + </Group> + </Groups> + </Target> + </Targets> + + <RTE> + <apis/> + <components> + <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.0.1" condition="ARMv6_7_8-M Device"> + <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.0.1"/> + <targetInfos> + <targetInfo name="rt-thread"/> + </targetInfos> + </component> + </components> + <files/> + </RTE> + + <LayerInfo> + <Layers> + <Layer> + <LayName><Project Info></LayName> + <LayDesc></LayDesc> + <LayUrl></LayUrl> + <LayKeys></LayKeys> + <LayCat></LayCat> + <LayLic></LayLic> + <LayTarg>0</LayTarg> + <LayPrjMark>1</LayPrjMark> + </Layer> + </Layers> + </LayerInfo> + +</Project> diff --git a/bsp/gd32/gd32450z-eval/rtconfig.h b/bsp/gd32/gd32450z-eval/rtconfig.h new file mode 100644 index 0000000000..0fbd373786 --- /dev/null +++ b/bsp/gd32/gd32450z-eval/rtconfig.h @@ -0,0 +1,200 @@ +#ifndef RT_CONFIG_H__ +#define RT_CONFIG_H__ + +/* Automatically generated file; DO NOT EDIT. */ +/* RT-Thread Configuration */ + +/* RT-Thread Kernel */ + +#define RT_NAME_MAX 8 +#define RT_ALIGN_SIZE 4 +#define RT_THREAD_PRIORITY_32 +#define RT_THREAD_PRIORITY_MAX 32 +#define RT_TICK_PER_SECOND 100 +#define RT_USING_OVERFLOW_CHECK +#define RT_USING_HOOK +#define RT_USING_IDLE_HOOK +#define RT_IDLE_HOOK_LIST_SIZE 4 +#define IDLE_THREAD_STACK_SIZE 256 + +/* kservice optimization */ + +#define RT_DEBUG +#define RT_DEBUG_COLOR + +/* Inter-Thread communication */ + +#define RT_USING_SEMAPHORE +#define RT_USING_MUTEX +#define RT_USING_EVENT +#define RT_USING_MAILBOX +#define RT_USING_MESSAGEQUEUE + +/* Memory Management */ + +#define RT_USING_MEMPOOL +#define RT_USING_SMALL_MEM +#define RT_USING_HEAP + +/* Kernel Device Object */ + +#define RT_USING_DEVICE +#define RT_USING_CONSOLE +#define RT_CONSOLEBUF_SIZE 128 +#define RT_CONSOLE_DEVICE_NAME "uart1" +#define RT_VER_NUM 0x40004 + +/* RT-Thread Components */ + +#define RT_USING_COMPONENTS_INIT +#define RT_USING_USER_MAIN +#define RT_MAIN_THREAD_STACK_SIZE 2048 +#define RT_MAIN_THREAD_PRIORITY 10 + +/* C++ features */ + + +/* Command shell */ + +#define RT_USING_FINSH +#define RT_USING_MSH +#define FINSH_USING_MSH +#define FINSH_THREAD_NAME "tshell" +#define FINSH_THREAD_PRIORITY 20 +#define FINSH_THREAD_STACK_SIZE 4096 +#define FINSH_USING_HISTORY +#define FINSH_HISTORY_LINES 5 +#define FINSH_USING_SYMTAB +#define FINSH_CMD_SIZE 80 +#define MSH_USING_BUILT_IN_COMMANDS +#define FINSH_USING_DESCRIPTION +#define FINSH_ARG_MAX 10 + +/* Device virtual file system */ + + +/* Device Drivers */ + +#define RT_USING_DEVICE_IPC +#define RT_PIPE_BUFSZ 512 +#define RT_USING_SYSTEM_WORKQUEUE +#define RT_SYSTEM_WORKQUEUE_STACKSIZE 2048 +#define RT_SYSTEM_WORKQUEUE_PRIORITY 23 +#define RT_USING_SERIAL +#define RT_USING_SERIAL_V1 +#define RT_SERIAL_USING_DMA +#define RT_SERIAL_RB_BUFSZ 64 +#define RT_USING_PIN + +/* Using USB */ + + +/* POSIX layer and C standard library */ + +#define RT_LIBC_USING_TIME +#define RT_LIBC_DEFAULT_TIMEZONE 8 + +/* Network */ + +/* Socket abstraction layer */ + + +/* Network interface device */ + + +/* light weight TCP/IP stack */ + + +/* AT commands */ + + +/* VBUS(Virtual Software BUS) */ + + +/* Utilities */ + + +/* RT-Thread Utestcases */ + + +/* RT-Thread online packages */ + +/* IoT - internet of things */ + + +/* Wi-Fi */ + +/* Marvell WiFi */ + + +/* Wiced WiFi */ + + +/* IoT Cloud */ + + +/* security packages */ + + +/* language packages */ + + +/* multimedia packages */ + +/* LVGL: powerful and easy-to-use embedded GUI library */ + + +/* u8g2: a monochrome graphic library */ + + +/* PainterEngine: A cross-platform graphics application framework written in C language */ + + +/* tools packages */ + + +/* system packages */ + +/* enhanced kernel services */ + + +/* acceleration: Assembly language or algorithmic acceleration packages */ + + +/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */ + + +/* Micrium: Micrium software products porting for RT-Thread */ + + +/* peripheral libraries and drivers */ + + +/* AI packages */ + + +/* miscellaneous packages */ + +/* samples: kernel and components samples */ + + +/* entertainment: terminal games and other interesting software packages */ + + +/* Hardware Drivers Config */ + +#define SOC_SERIES_GD32F4xx +#define SOC_GD32450Z + +/* Onboard Peripheral Drivers */ + +/* On-chip Peripheral Drivers */ + +#define BSP_USING_GPIO +#define BSP_USING_UART +#define BSP_USING_UART1 + +/* Board extended module Drivers */ + + +#endif diff --git a/bsp/gd32/gd32450z-eval/rtconfig.py b/bsp/gd32/gd32450z-eval/rtconfig.py new file mode 100644 index 0000000000..c0c0b203cf --- /dev/null +++ b/bsp/gd32/gd32450z-eval/rtconfig.py @@ -0,0 +1,150 @@ +import os + +# toolchains options +ARCH='arm' +CPU='cortex-m4' +CROSS_TOOL='keil' + +# bsp lib config +BSP_LIBRARY_TYPE = None + +if os.getenv('RTT_CC'): + CROSS_TOOL = os.getenv('RTT_CC') +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') + +# cross_tool provides the cross compiler +# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR +if CROSS_TOOL == 'gcc': + PLATFORM = 'gcc' + EXEC_PATH = r'C:\Users\XXYYZZ' +elif CROSS_TOOL == 'keil': + PLATFORM = 'armcc' + EXEC_PATH = r'C:/Keil_v5' +elif CROSS_TOOL == 'iar': + PLATFORM = 'iar' + EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0' + +if os.getenv('RTT_EXEC_PATH'): + EXEC_PATH = os.getenv('RTT_EXEC_PATH') + +BUILD = 'debug' + +if PLATFORM == 'gcc': + # toolchains + PREFIX = 'arm-none-eabi-' + CC = PREFIX + 'gcc' + AS = PREFIX + 'gcc' + AR = PREFIX + 'ar' + CXX = PREFIX + 'g++' + LINK = PREFIX + 'gcc' + TARGET_EXT = 'elf' + SIZE = PREFIX + 'size' + OBJDUMP = PREFIX + 'objdump' + OBJCPY = PREFIX + 'objcopy' + + DEVICE = ' -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -DGD32F450' + CFLAGS = DEVICE + ' -Dgcc' + AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb ' + LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.ld' + + CPATH = '' + LPATH = '' + + if BUILD == 'debug': + CFLAGS += ' -O0 -gdwarf-2 -g' + AFLAGS += ' -gdwarf-2' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + + POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' + +elif PLATFORM == 'armcc': + # toolchains + CC = 'armcc' + CXX = 'armcc' + AS = 'armasm' + AR = 'armar' + LINK = 'armlink' + TARGET_EXT = 'axf' + + DEVICE = ' --cpu Cortex-M4.fp ' + CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99' + AFLAGS = DEVICE + ' --apcs=interwork ' + LFLAGS = DEVICE + ' --scatter "board\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rtthread.map --strict' + CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include' + LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib' + + CFLAGS += ' -D__MICROLIB ' + AFLAGS += ' --pd "__MICROLIB SETA 1" ' + LFLAGS += ' --library_type=microlib ' + EXEC_PATH += '/ARM/ARMCC/bin/' + + if BUILD == 'debug': + CFLAGS += ' -g -O0' + AFLAGS += ' -g' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + CFLAGS += ' -std=c99' + + POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET' + +elif PLATFORM == 'iar': + # toolchains + CC = 'iccarm' + CXX = 'iccarm' + AS = 'iasmarm' + AR = 'iarchive' + LINK = 'ilinkarm' + TARGET_EXT = 'out' + + DEVICE = '-Dewarm' + + CFLAGS = DEVICE + CFLAGS += ' --diag_suppress Pa050' + CFLAGS += ' --no_cse' + CFLAGS += ' --no_unroll' + CFLAGS += ' --no_inline' + CFLAGS += ' --no_code_motion' + CFLAGS += ' --no_tbaa' + CFLAGS += ' --no_clustering' + CFLAGS += ' --no_scheduling' + CFLAGS += ' --endian=little' + CFLAGS += ' --cpu=Cortex-M4' + CFLAGS += ' -e' + CFLAGS += ' --fpu=VFPv4_sp' + CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"' + CFLAGS += ' --silent' + + AFLAGS = DEVICE + AFLAGS += ' -s+' + AFLAGS += ' -w+' + AFLAGS += ' -r' + AFLAGS += ' --cpu Cortex-M4' + AFLAGS += ' --fpu VFPv4_sp' + AFLAGS += ' -S' + + if BUILD == 'debug': + CFLAGS += ' --debug' + CFLAGS += ' -On' + else: + CFLAGS += ' -Oh' + + LFLAGS = ' --config "board/linker_scripts/link.icf"' + LFLAGS += ' --entry __iar_program_start' + + CXXFLAGS = CFLAGS + + EXEC_PATH = EXEC_PATH + '/arm/bin/' + POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT, dist_dir): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT, dist_dir) diff --git a/bsp/gd32/gd32450z-eval/template.uvoptx b/bsp/gd32/gd32450z-eval/template.uvoptx new file mode 100644 index 0000000000..3947c5e208 --- /dev/null +++ b/bsp/gd32/gd32450z-eval/template.uvoptx @@ -0,0 +1,190 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd"> + + <SchemaVersion>1.0</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Extensions> + <cExt>*.c</cExt> + <aExt>*.s*; *.src; *.a*</aExt> + <oExt>*.obj; *.o</oExt> + <lExt>*.lib</lExt> + <tExt>*.txt; *.h; *.inc</tExt> + <pExt>*.plm</pExt> + <CppX>*.cpp</CppX> + <nMigrate>0</nMigrate> + </Extensions> + + <DaveTm> + <dwLowDateTime>0</dwLowDateTime> + <dwHighDateTime>0</dwHighDateTime> + </DaveTm> + + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>12000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>0</RunSim> + <RunTarget>1</RunTarget> + <RunAbUc>0</RunAbUc> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\build\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>1</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>1</IsCurrentTarget> + </OPTFL> + <CpuCode>255</CpuCode> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <tRtrace>1</tRtrace> + <sRSysVw>1</sRSysVw> + <tRSysVw>1</tRSysVw> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <bEvRecOn>1</bEvRecOn> + <bSchkAxf>0</bSchkAxf> + <bTchkAxf>0</bTchkAxf> + <nTsel>3</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>BIN\CMSIS_AGDI.dll</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>CMSIS_AGDI</Key> + <Name>-X"CMSIS-DAP" -O206 -S0 -C0 -P00000000 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO65554 -TC10000000 -TT10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0GD32F4xx_3MB.FLM -FS08000000 -FL0300000 -FP0($$Device:GD32F450ZK$Flash\GD32F4xx_3MB.FLM)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>JL2CM3</Key> + <Name>-U59401765 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0GD32F4xx_3MB.FLM -FS08000000 -FL0300000 -FP0($$Device:GD32F450ZK$Flash\GD32F4xx_3MB.FLM)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0GD32F4xx_3MB -FS08000000 -FL0300000 -FP0($$Device:GD32F450ZK$Flash\GD32F4xx_3MB.FLM))</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint/> + <Tracepoint> + <THDelay>0</THDelay> + </Tracepoint> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>0</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>0</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + <bLintAuto>0</bLintAuto> + <bAutoGenD>0</bAutoGenD> + <LntExFlags>0</LntExFlags> + <pMisraName></pMisraName> + <pszMrule></pszMrule> + <pSingCmds></pSingCmds> + <pMultCmds></pMultCmds> + <pMisraNamep></pMisraNamep> + <pszMrulep></pszMrulep> + <pSingCmdsp></pSingCmdsp> + <pMultCmdsp></pMultCmdsp> + </TargetOption> + </Target> + + <Group> + <GroupName>::CMSIS</GroupName> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <cbSel>0</cbSel> + <RteFlg>1</RteFlg> + </Group> + +</ProjectOpt> diff --git a/bsp/gd32/gd32450z-eval/template.uvproj b/bsp/gd32/gd32450z-eval/template.uvproj new file mode 100644 index 0000000000..a23ad93c9a --- /dev/null +++ b/bsp/gd32/gd32450z-eval/template.uvproj @@ -0,0 +1,628 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd"> + + <SchemaVersion>1.1</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Targets> + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <uAC6>0</uAC6> + <TargetOption> + <TargetCommonOption> + <Device>GD32F450ZK</Device> + <Vendor>GigaDevice</Vendor> + <Cpu>IRAM(0x20000000-0x20030000) IROM(0x08000000-0x08300000) CLOCK(20000000) CPUTYPE("Cortex-M4") FPU2</Cpu> + <FlashUtilSpec></FlashUtilSpec> + <StartupFile>"Startup\GD\GD32F4xx\startup_gd32f4xx.s" ("GD32F4xx Startup Code")</StartupFile> + <FlashDriverDll>UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0GD32F4xx_3MB -FS08000000 -FL0300000)</FlashDriverDll> + <DeviceId>0</DeviceId> + <RegisterFile>gd32f4xx0.h</RegisterFile> + <MemoryEnv></MemoryEnv> + <Cmp></Cmp> + <Asm></Asm> + <Linker></Linker> + <OHString></OHString> + <InfinionOptionDll></InfinionOptionDll> + <SLE66CMisc></SLE66CMisc> + <SLE66AMisc></SLE66AMisc> + <SLE66LinkerMisc></SLE66LinkerMisc> + <SFDFile>SFD\GD\GD32F4xx\GD32F4xx.SFR</SFDFile> + <bCustSvd>0</bCustSvd> + <UseEnv>0</UseEnv> + <BinPath></BinPath> + <IncludePath></IncludePath> + <LibPath></LibPath> + <RegisterFilePath>GD\GD32F4xx\</RegisterFilePath> + <DBRegisterFilePath>GD\GD32F4xx\</DBRegisterFilePath> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + </TargetStatus> + <OutputDirectory>.\output\</OutputDirectory> + <OutputName>rtthread</OutputName> + <CreateExecutable>1</CreateExecutable> + <CreateLib>0</CreateLib> + <CreateHexFile>1</CreateHexFile> + <DebugInformation>1</DebugInformation> + <BrowseInformation>1</BrowseInformation> + <ListingPath>.\build\</ListingPath> + <HexFormatSelection>1</HexFormatSelection> + <Merge32K>0</Merge32K> + <CreateBatchFile>0</CreateBatchFile> + <BeforeCompile> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopU1X>0</nStopU1X> + <nStopU2X>0</nStopU2X> + </BeforeCompile> + <BeforeMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopB1X>0</nStopB1X> + <nStopB2X>0</nStopB2X> + </BeforeMake> + <AfterMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopA1X>0</nStopA1X> + <nStopA2X>0</nStopA2X> + </AfterMake> + <SelectedForBatchBuild>0</SelectedForBatchBuild> + <SVCSIdString></SVCSIdString> + </TargetCommonOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>1</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>0</GenerateAssemblyFile> + <AssembleAssemblyFile>0</AssembleAssemblyFile> + <PublicsOnly>0</PublicsOnly> + <StopOnExitCode>3</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + <ComprImg>1</ComprImg> + </CommonProperty> + <DllOption> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments> -REMAP</SimDllArguments> + <SimDlgDll>DCM.DLL</SimDlgDll> + <SimDlgDllArguments>-pCM3</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDll>TCM.DLL</TargetDlgDll> + <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments> + </DllOption> + <DebugOption> + <OPTHX> + <HexSelection>1</HexSelection> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + <Oh166RecLen>16</Oh166RecLen> + </OPTHX> + <Simulator> + <UseSimulator>0</UseSimulator> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>1</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <LimitSpeedToRealTime>0</LimitSpeedToRealTime> + <RestoreSysVw>1</RestoreSysVw> + </Simulator> + <Target> + <UseTarget>1</UseTarget> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>0</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <RestoreTracepoints>0</RestoreTracepoints> + <RestoreSysVw>1</RestoreSysVw> + </Target> + <RunDebugAfterBuild>0</RunDebugAfterBuild> + <TargetSelection>3</TargetSelection> + <SimDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + </SimDlls> + <TargetDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + <Driver>BIN\CMSIS_AGDI.dll</Driver> + </TargetDlls> + </DebugOption> + <Utilities> + <Flash1> + <UseTargetDll>1</UseTargetDll> + <UseExternalTool>0</UseExternalTool> + <RunIndependent>0</RunIndependent> + <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> + <Capability>1</Capability> + <DriverSelection>4096</DriverSelection> + </Flash1> + <bUseTDR>1</bUseTDR> + <Flash2>BIN\UL2CM3.DLL</Flash2> + <Flash3>"" ()</Flash3> + <Flash4></Flash4> + <pFcarmOut></pFcarmOut> + <pFcarmGrp></pFcarmGrp> + <pFcArmRoot></pFcArmRoot> + <FcArmLst>0</FcArmLst> + </Utilities> + <TargetArmAds> + <ArmAdsMisc> + <GenerateListings>0</GenerateListings> + <asHll>1</asHll> + <asAsm>1</asAsm> + <asMacX>1</asMacX> + <asSyms>1</asSyms> + <asFals>1</asFals> + <asDbgD>1</asDbgD> + <asForm>1</asForm> + <ldLst>0</ldLst> + <ldmm>1</ldmm> + <ldXref>1</ldXref> + <BigEnd>0</BigEnd> + <AdsALst>1</AdsALst> + <AdsACrf>1</AdsACrf> + <AdsANop>0</AdsANop> + <AdsANot>0</AdsANot> + <AdsLLst>1</AdsLLst> + <AdsLmap>1</AdsLmap> + <AdsLcgr>1</AdsLcgr> + <AdsLsym>1</AdsLsym> + <AdsLszi>1</AdsLszi> + <AdsLtoi>1</AdsLtoi> + <AdsLsun>1</AdsLsun> + <AdsLven>1</AdsLven> + <AdsLsxf>1</AdsLsxf> + <RvctClst>0</RvctClst> + <GenPPlst>0</GenPPlst> + <AdsCpuType>"Cortex-M4"</AdsCpuType> + <RvctDeviceName></RvctDeviceName> + <mOS>0</mOS> + <uocRom>0</uocRom> + <uocRam>0</uocRam> + <hadIROM>1</hadIROM> + <hadIRAM>1</hadIRAM> + <hadXRAM>0</hadXRAM> + <uocXRam>0</uocXRam> + <RvdsVP>2</RvdsVP> + <hadIRAM2>1</hadIRAM2> + <hadIROM2>0</hadIROM2> + <StupSel>8</StupSel> + <useUlib>1</useUlib> + <EndSel>0</EndSel> + <uLtcg>0</uLtcg> + <nSecure>0</nSecure> + <RoSelD>3</RoSelD> + <RwSelD>3</RwSelD> + <CodeSel>0</CodeSel> + <OptFeed>0</OptFeed> + <NoZi1>0</NoZi1> + <NoZi2>0</NoZi2> + <NoZi3>0</NoZi3> + <NoZi4>0</NoZi4> + <NoZi5>0</NoZi5> + <Ro1Chk>0</Ro1Chk> + <Ro2Chk>0</Ro2Chk> + <Ro3Chk>0</Ro3Chk> + <Ir1Chk>1</Ir1Chk> + <Ir2Chk>0</Ir2Chk> + <Ra1Chk>0</Ra1Chk> + <Ra2Chk>0</Ra2Chk> + <Ra3Chk>0</Ra3Chk> + <Im1Chk>1</Im1Chk> + <Im2Chk>0</Im2Chk> + <OnChipMemories> + <Ocm1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocm4> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x30000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x300000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x300000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x30000</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x10000000</StartAddress> + <Size>0x10000</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector></RvctStartVector> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>1</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>1</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>2</wLevel> + <uThumb>0</uThumb> + <uSurpInc>0</uSurpInc> + <uC99>1</uC99> + <uGnu>0</uGnu> + <useXO>0</useXO> + <v6Lang>1</v6Lang> + <v6LangP>1</v6LangP> + <vShortEn>1</vShortEn> + <vShortWch>1</vShortWch> + <v6Lto>0</v6Lto> + <v6WtE>0</v6WtE> + <v6Rtti>0</v6Rtti> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath>..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Include;..\..\..\Library\Firmware\CMSIS\GD\GD32F4xx\Include;..\..\..\Library\Utilities;..\</IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <uSurpInc>0</uSurpInc> + <useXO>0</useXO> + <uClangAs>0</uClangAs> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + <LDads> + <umfTarg>1</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x08000000</TextAddressRange> + <DataAddressRange>0x20000000</DataAddressRange> + <pXoBase></pXoBase> + <ScatterFile></ScatterFile> + <IncludeLibs></IncludeLibs> + <IncludeLibsPath></IncludeLibsPath> + <Misc></Misc> + <LinkerInputFile></LinkerInputFile> + <DisabledWarnings></DisabledWarnings> + </LDads> + </TargetArmAds> + </TargetOption> + <Groups> + <Group> + <GroupName>Application</GroupName> + <Files> + <File> + <FileName>main.c</FileName> + <FileType>1</FileType> + <FilePath>..\main.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_it.c</FileName> + <FileType>1</FileType> + <FilePath>..\gd32f4xx_it.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>CMSIS</GroupName> + <Files> + <File> + <FileName>system_gd32f4xx.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\CMSIS\GD\GD32F4xx\Source\system_gd32f4xx.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>GD32F4xx_Peripherals</GroupName> + <Files> + <File> + <FileName>gd32f4xx_adc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_adc.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_can.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_can.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_crc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_crc.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_ctc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_ctc.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_dac.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_dac.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_dbg.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_dbg.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_dci.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_dci.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_dma.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_dma.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_enet.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_enet.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_exmc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_exmc.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_exti.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_exti.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_fmc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_fmc.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_fwdgt.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_fwdgt.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_gpio.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_gpio.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_i2c.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_i2c.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_ipa.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_ipa.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_iref.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_iref.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_misc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_misc.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_pmu.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_pmu.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_rcu.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_rcu.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_rtc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_rtc.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_sdio.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_sdio.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_spi.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_spi.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_syscfg.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_syscfg.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_timer.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_timer.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_tli.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_tli.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_trng.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_trng.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_usart.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_usart.c</FilePath> + </File> + <File> + <FileName>gd32f4xx_wwdgt.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_wwdgt.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>GD32F4xx_EVAL</GroupName> + <Files> + <File> + <FileName>gd32f450z_eval.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Library\Utilities\gd32f450z_eval.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Startup</GroupName> + <Files> + <File> + <FileName>startup_gd32f4xx.s</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\Library\Firmware\CMSIS\GD\GD32F4xx\Source\ARM\startup_gd32f4xx.s</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Doc</GroupName> + <Files> + <File> + <FileName>readme.txt</FileName> + <FileType>5</FileType> + <FilePath>..\readme.txt</FilePath> + </File> + </Files> + </Group> + </Groups> + </Target> + </Targets> + +</Project> diff --git a/bsp/gd32/gd32450z-eval/template.uvprojx b/bsp/gd32/gd32450z-eval/template.uvprojx new file mode 100644 index 0000000000..5653f2da1d --- /dev/null +++ b/bsp/gd32/gd32450z-eval/template.uvprojx @@ -0,0 +1,417 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd"> + + <SchemaVersion>2.1</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Targets> + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <uAC6>0</uAC6> + <TargetOption> + <TargetCommonOption> + <Device>GD32F450ZK</Device> + <Vendor>GigaDevice</Vendor> + <PackID>GigaDevice.GD32F4xx_DFP.2.1.0</PackID> + <PackURL>http://gd32mcu.com/data/documents/pack/</PackURL> + <Cpu>IRAM(0x20000000,0x040000) IROM(0x08000000,0x0300000) CPUTYPE("Cortex-M4") FPU2 CLOCK(20000000) ELITTLE</Cpu> + <FlashUtilSpec></FlashUtilSpec> + <StartupFile></StartupFile> + <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0GD32F4xx_3MB -FS08000000 -FL0300000 -FP0($$Device:GD32F450ZK$Flash\GD32F4xx_3MB.FLM))</FlashDriverDll> + <DeviceId>0</DeviceId> + <RegisterFile>$$Device:GD32F450ZK$Device\Include\gd32f4xx.h</RegisterFile> + <MemoryEnv></MemoryEnv> + <Cmp></Cmp> + <Asm></Asm> + <Linker></Linker> + <OHString></OHString> + <InfinionOptionDll></InfinionOptionDll> + <SLE66CMisc></SLE66CMisc> + <SLE66AMisc></SLE66AMisc> + <SLE66LinkerMisc></SLE66LinkerMisc> + <SFDFile>$$Device:GD32F450ZK$SVD\GD32F4xx.svd</SFDFile> + <bCustSvd>0</bCustSvd> + <UseEnv>0</UseEnv> + <BinPath></BinPath> + <IncludePath></IncludePath> + <LibPath></LibPath> + <RegisterFilePath></RegisterFilePath> + <DBRegisterFilePath></DBRegisterFilePath> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + </TargetStatus> + <OutputDirectory>.\build\</OutputDirectory> + <OutputName>rtthread</OutputName> + <CreateExecutable>1</CreateExecutable> + <CreateLib>0</CreateLib> + <CreateHexFile>0</CreateHexFile> + <DebugInformation>1</DebugInformation> + <BrowseInformation>0</BrowseInformation> + <ListingPath>.\build\</ListingPath> + <HexFormatSelection>1</HexFormatSelection> + <Merge32K>0</Merge32K> + <CreateBatchFile>0</CreateBatchFile> + <BeforeCompile> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopU1X>0</nStopU1X> + <nStopU2X>0</nStopU2X> + </BeforeCompile> + <BeforeMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopB1X>0</nStopB1X> + <nStopB2X>0</nStopB2X> + </BeforeMake> + <AfterMake> + <RunUserProg1>1</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopA1X>0</nStopA1X> + <nStopA2X>0</nStopA2X> + </AfterMake> + <SelectedForBatchBuild>0</SelectedForBatchBuild> + <SVCSIdString></SVCSIdString> + </TargetCommonOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>1</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>0</GenerateAssemblyFile> + <AssembleAssemblyFile>0</AssembleAssemblyFile> + <PublicsOnly>0</PublicsOnly> + <StopOnExitCode>3</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + <ComprImg>1</ComprImg> + </CommonProperty> + <DllOption> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments> -REMAP -MPU</SimDllArguments> + <SimDlgDll>DCM.DLL</SimDlgDll> + <SimDlgDllArguments>-pCM4</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments> -MPU</TargetDllArguments> + <TargetDlgDll>TCM.DLL</TargetDlgDll> + <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments> + </DllOption> + <DebugOption> + <OPTHX> + <HexSelection>1</HexSelection> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + <Oh166RecLen>16</Oh166RecLen> + </OPTHX> + </DebugOption> + <Utilities> + <Flash1> + <UseTargetDll>1</UseTargetDll> + <UseExternalTool>0</UseExternalTool> + <RunIndependent>0</RunIndependent> + <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> + <Capability>1</Capability> + <DriverSelection>4096</DriverSelection> + </Flash1> + <bUseTDR>1</bUseTDR> + <Flash2>BIN\UL2CM3.DLL</Flash2> + <Flash3></Flash3> + <Flash4></Flash4> + <pFcarmOut></pFcarmOut> + <pFcarmGrp></pFcarmGrp> + <pFcArmRoot></pFcArmRoot> + <FcArmLst>0</FcArmLst> + </Utilities> + <TargetArmAds> + <ArmAdsMisc> + <GenerateListings>0</GenerateListings> + <asHll>1</asHll> + <asAsm>1</asAsm> + <asMacX>1</asMacX> + <asSyms>1</asSyms> + <asFals>1</asFals> + <asDbgD>1</asDbgD> + <asForm>1</asForm> + <ldLst>0</ldLst> + <ldmm>1</ldmm> + <ldXref>1</ldXref> + <BigEnd>0</BigEnd> + <AdsALst>1</AdsALst> + <AdsACrf>1</AdsACrf> + <AdsANop>0</AdsANop> + <AdsANot>0</AdsANot> + <AdsLLst>1</AdsLLst> + <AdsLmap>1</AdsLmap> + <AdsLcgr>1</AdsLcgr> + <AdsLsym>1</AdsLsym> + <AdsLszi>1</AdsLszi> + <AdsLtoi>1</AdsLtoi> + <AdsLsun>1</AdsLsun> + <AdsLven>1</AdsLven> + <AdsLsxf>1</AdsLsxf> + <RvctClst>0</RvctClst> + <GenPPlst>0</GenPPlst> + <AdsCpuType>"Cortex-M4"</AdsCpuType> + <RvctDeviceName></RvctDeviceName> + <mOS>0</mOS> + <uocRom>0</uocRom> + <uocRam>0</uocRam> + <hadIROM>1</hadIROM> + <hadIRAM>1</hadIRAM> + <hadXRAM>0</hadXRAM> + <uocXRam>0</uocXRam> + <RvdsVP>2</RvdsVP> + <RvdsMve>0</RvdsMve> + <RvdsCdeCp>0</RvdsCdeCp> + <hadIRAM2>0</hadIRAM2> + <hadIROM2>0</hadIROM2> + <StupSel>8</StupSel> + <useUlib>0</useUlib> + <EndSel>0</EndSel> + <uLtcg>0</uLtcg> + <nSecure>0</nSecure> + <RoSelD>3</RoSelD> + <RwSelD>4</RwSelD> + <CodeSel>0</CodeSel> + <OptFeed>0</OptFeed> + <NoZi1>0</NoZi1> + <NoZi2>0</NoZi2> + <NoZi3>0</NoZi3> + <NoZi4>0</NoZi4> + <NoZi5>0</NoZi5> + <Ro1Chk>0</Ro1Chk> + <Ro2Chk>0</Ro2Chk> + <Ro3Chk>0</Ro3Chk> + <Ir1Chk>1</Ir1Chk> + <Ir2Chk>0</Ir2Chk> + <Ra1Chk>0</Ra1Chk> + <Ra2Chk>0</Ra2Chk> + <Ra3Chk>0</Ra3Chk> + <Im1Chk>1</Im1Chk> + <Im2Chk>0</Im2Chk> + <OnChipMemories> + <Ocm1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocm4> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x40000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x300000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x300000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x30000</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x10000000</StartAddress> + <Size>0x10000</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector></RvctStartVector> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>4</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>0</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>0</wLevel> + <uThumb>0</uThumb> + <uSurpInc>0</uSurpInc> + <uC99>1</uC99> + <uGnu>0</uGnu> + <useXO>0</useXO> + <v6Lang>1</v6Lang> + <v6LangP>1</v6LangP> + <vShortEn>1</vShortEn> + <vShortWch>1</vShortWch> + <v6Lto>0</v6Lto> + <v6WtE>0</v6WtE> + <v6Rtti>0</v6Rtti> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <uSurpInc>0</uSurpInc> + <useXO>0</useXO> + <ClangAsOpt>4</ClangAsOpt> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + <LDads> + <umfTarg>1</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x08000000</TextAddressRange> + <DataAddressRange>0x20000000</DataAddressRange> + <pXoBase></pXoBase> + <ScatterFile>.\gd32_rom.ld</ScatterFile> + <IncludeLibs></IncludeLibs> + <IncludeLibsPath></IncludeLibsPath> + <Misc></Misc> + <LinkerInputFile></LinkerInputFile> + <DisabledWarnings></DisabledWarnings> + </LDads> + </TargetArmAds> + </TargetOption> + <Groups> + <Group> + <GroupName>::CMSIS</GroupName> + </Group> + </Groups> + </Target> + </Targets> + + <RTE> + <apis/> + <components> + <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.0.1" condition="ARMv6_7_8-M Device"> + <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.0.1"/> + <targetInfos> + <targetInfo name="rt-thread"/> + </targetInfos> + </component> + </components> + <files/> + </RTE> + + <LayerInfo> + <Layers> + <Layer> + <LayName><Project Info></LayName> + <LayDesc></LayDesc> + <LayUrl></LayUrl> + <LayKeys></LayKeys> + <LayCat></LayCat> + <LayLic></LayLic> + <LayTarg>0</LayTarg> + <LayPrjMark>1</LayPrjMark> + </Layer> + </Layers> + </LayerInfo> + +</Project> diff --git a/bsp/gd32450z-eval/.config b/bsp/gd32450z-eval/.config index 5102985dc4..1869a867eb 100644 --- a/bsp/gd32450z-eval/.config +++ b/bsp/gd32450z-eval/.config @@ -263,8 +263,7 @@ CONFIG_NETDEV_IPV6=0 # CONFIG_RT_USING_LWIP=y # CONFIG_RT_USING_LWIP141 is not set -CONFIG_RT_USING_LWIP202=y -# CONFIG_RT_USING_LWIP203 is not set +CONFIG_RT_USING_LWIP203=y # CONFIG_RT_USING_LWIP212 is not set # CONFIG_RT_USING_LWIP_IPV6 is not set CONFIG_RT_LWIP_MEM_ALIGNMENT=4 @@ -495,6 +494,7 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_PKG_USING_MCURSES is not set # CONFIG_PKG_USING_TERMBOX is not set # CONFIG_PKG_USING_VT100 is not set +# CONFIG_PKG_USING_QRCODE is not set # # tools packages @@ -505,7 +505,6 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_PKG_USING_SYSTEMVIEW is not set # CONFIG_PKG_USING_SEGGER_RTT is not set # CONFIG_PKG_USING_RDB is not set -# CONFIG_PKG_USING_QRCODE is not set # CONFIG_PKG_USING_ULOG_EASYFLASH is not set # CONFIG_PKG_USING_ULOG_FILE is not set # CONFIG_PKG_USING_LOGMGR is not set @@ -556,6 +555,7 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_PKG_USING_POSIX_GETLINE is not set # CONFIG_PKG_USING_POSIX_WCWIDTH is not set # CONFIG_PKG_USING_POSIX_ITOA is not set +# CONFIG_PKG_USING_POSIX_STRINGS is not set # # acceleration: Assembly language or algorithmic acceleration packages @@ -667,6 +667,7 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_PKG_USING_SSD1306 is not set # CONFIG_PKG_USING_QKEY is not set # CONFIG_PKG_USING_RS485 is not set +# CONFIG_PKG_USING_RS232 is not set # CONFIG_PKG_USING_NES is not set # CONFIG_PKG_USING_VIRTUAL_SENSOR is not set # CONFIG_PKG_USING_VDEVICE is not set @@ -754,6 +755,8 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_PKG_USING_LWGPS is not set # CONFIG_PKG_USING_STATE_MACHINE is not set # CONFIG_PKG_USING_DESIGN_PATTERN is not set +# CONFIG_PKG_USING_CONTROLLER is not set +# CONFIG_PKG_USING_PHASE_LOCKED_LOOP is not set CONFIG_SOC_GD32450Z=y CONFIG_BSP_USING_SDRAM=y CONFIG_BSP_USING_UART0=y diff --git a/bsp/gd32450z-eval/project.uvprojx b/bsp/gd32450z-eval/project.uvprojx index 1fb3e8e5f0..592fc6bd8d 100644 --- a/bsp/gd32450z-eval/project.uvprojx +++ b/bsp/gd32450z-eval/project.uvprojx @@ -333,7 +333,7 @@ <MiscControls /> <Define>USE_STDPERIPH_DRIVER, __RTTHREAD__, RT_USING_ARM_LIBC, __CLK_TCK=RT_TICK_PER_SECOND</Define> <Undefine /> - <IncludePath>applications;.;..\..\components\libc\compilers\common;..\..\components\libc\compilers\common\nogcc;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m4;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;drivers;..\..\components\dfs\include;..\..\components\dfs\filesystems\devfs;..\..\components\dfs\filesystems\elmfat;..\..\components\finsh;.;..\..\include;Libraries\CMSIS\GD\GD32F4xx\Include;Libraries\CMSIS;Libraries\GD32F4xx_standard_peripheral\Include;..\..\components\net\lwip-2.0.2\src;..\..\components\net\lwip-2.0.2\src\include;..\..\components\net\lwip-2.0.2\src\include\ipv4;..\..\components\net\lwip-2.0.2\src\arch\include;..\..\components\net\lwip-2.0.2\src\include\netif;..\..\components\libc\posix\io;..\..\components\libc\posix\io\poll;..\..\components\libc\posix\ipc;..\..\components\net\netdev\include;..\..\components\net\sal_socket\include;..\..\components\net\sal_socket\include\socket;..\..\components\net\sal_socket\impl;..\..\components\net\sal_socket\include\dfs_net;..\..\components\net\sal_socket\include\socket\sys_socket;..\..\examples\utest\testcases\kernel</IncludePath> + <IncludePath>applications;.;..\..\components\libc\compilers\common;..\..\components\libc\compilers\common\extension;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m4;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;drivers;..\..\components\dfs\include;..\..\components\dfs\filesystems\devfs;..\..\components\dfs\filesystems\elmfat;..\..\components\finsh;.;..\..\include;Libraries\CMSIS\GD\GD32F4xx\Include;Libraries\CMSIS;Libraries\GD32F4xx_standard_peripheral\Include;..\..\components\net\lwip-2.0.3\src;..\..\components\net\lwip-2.0.3\src\include;..\..\components\net\lwip-2.0.3\src\include\ipv4;..\..\components\net\lwip-2.0.3\src\arch\include;..\..\components\net\lwip-2.0.3\src\include\netif;..\..\components\libc\posix\io;..\..\components\libc\posix\io\poll;..\..\components\libc\posix\ipc;..\..\components\net\netdev\include;..\..\components\net\sal_socket\include;..\..\components\net\sal_socket\include\socket;..\..\components\net\sal_socket\impl;..\..\components\net\sal_socket\include\dfs_net;..\..\components\net\sal_socket\include\socket\sys_socket;..\..\examples\utest\testcases\kernel</IncludePath> </VariousControls> </Cads> <Aads> @@ -388,23 +388,23 @@ <GroupName>Compiler</GroupName> <Files> <File> - <FileName>libc_syms.c</FileName> + <FileName>syscalls.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\libc\compilers\armlibc\libc_syms.c</FilePath> + <FilePath>..\..\components\libc\compilers\armlibc\syscalls.c</FilePath> </File> </Files> <Files> <File> - <FileName>syscalls.c</FileName> + <FileName>syscall_mem.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\libc\compilers\armlibc\syscalls.c</FilePath> + <FilePath>..\..\components\libc\compilers\armlibc\syscall_mem.c</FilePath> </File> </Files> <Files> <File> - <FileName>syscall_mem.c</FileName> + <FileName>libc_syms.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\libc\compilers\armlibc\syscall_mem.c</FilePath> + <FilePath>..\..\components\libc\compilers\armlibc\libc_syms.c</FilePath> </File> </Files> <Files> @@ -478,9 +478,9 @@ </Files> <Files> <File> - <FileName>dataqueue.c</FileName> + <FileName>completion.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\drivers\src\dataqueue.c</FilePath> + <FilePath>..\..\components\drivers\src\completion.c</FilePath> </File> </Files> <Files> @@ -492,23 +492,23 @@ </Files> <Files> <File> - <FileName>workqueue.c</FileName> + <FileName>ringbuffer.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\drivers\src\workqueue.c</FilePath> + <FilePath>..\..\components\drivers\src\ringbuffer.c</FilePath> </File> </Files> <Files> <File> - <FileName>ringblk_buf.c</FileName> + <FileName>dataqueue.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\drivers\src\ringblk_buf.c</FilePath> + <FilePath>..\..\components\drivers\src\dataqueue.c</FilePath> </File> </Files> <Files> <File> - <FileName>completion.c</FileName> + <FileName>ringblk_buf.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\drivers\src\completion.c</FilePath> + <FilePath>..\..\components\drivers\src\ringblk_buf.c</FilePath> </File> </Files> <Files> @@ -520,9 +520,9 @@ </Files> <Files> <File> - <FileName>ringbuffer.c</FileName> + <FileName>workqueue.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\drivers\src\ringbuffer.c</FilePath> + <FilePath>..\..\components\drivers\src\workqueue.c</FilePath> </File> </Files> </Group> @@ -603,23 +603,23 @@ </Files> <Files> <File> - <FileName>dfs_elm.c</FileName> + <FileName>ffunicode.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\dfs\filesystems\elmfat\dfs_elm.c</FilePath> + <FilePath>..\..\components\dfs\filesystems\elmfat\ffunicode.c</FilePath> </File> </Files> <Files> <File> - <FileName>ff.c</FileName> + <FileName>dfs_elm.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\dfs\filesystems\elmfat\ff.c</FilePath> + <FilePath>..\..\components\dfs\filesystems\elmfat\dfs_elm.c</FilePath> </File> </Files> <Files> <File> - <FileName>ffunicode.c</FileName> + <FileName>ff.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\dfs\filesystems\elmfat\ffunicode.c</FilePath> + <FilePath>..\..\components\dfs\filesystems\elmfat\ff.c</FilePath> </File> </Files> </Group> @@ -658,58 +658,58 @@ <GroupName>Kernel</GroupName> <Files> <File> - <FileName>ipc.c</FileName> + <FileName>idle.c</FileName> <FileType>1</FileType> - <FilePath>..\..\src\ipc.c</FilePath> + <FilePath>..\..\src\idle.c</FilePath> </File> </Files> <Files> <File> - <FileName>thread.c</FileName> + <FileName>ipc.c</FileName> <FileType>1</FileType> - <FilePath>..\..\src\thread.c</FilePath> + <FilePath>..\..\src\ipc.c</FilePath> </File> </Files> <Files> <File> - <FileName>kservice.c</FileName> + <FileName>components.c</FileName> <FileType>1</FileType> - <FilePath>..\..\src\kservice.c</FilePath> + <FilePath>..\..\src\components.c</FilePath> </File> </Files> <Files> <File> - <FileName>clock.c</FileName> + <FileName>timer.c</FileName> <FileType>1</FileType> - <FilePath>..\..\src\clock.c</FilePath> + <FilePath>..\..\src\timer.c</FilePath> </File> </Files> <Files> <File> - <FileName>object.c</FileName> + <FileName>mem.c</FileName> <FileType>1</FileType> - <FilePath>..\..\src\object.c</FilePath> + <FilePath>..\..\src\mem.c</FilePath> </File> </Files> <Files> <File> - <FileName>device.c</FileName> + <FileName>irq.c</FileName> <FileType>1</FileType> - <FilePath>..\..\src\device.c</FilePath> + <FilePath>..\..\src\irq.c</FilePath> </File> </Files> <Files> <File> - <FileName>timer.c</FileName> + <FileName>scheduler.c</FileName> <FileType>1</FileType> - <FilePath>..\..\src\timer.c</FilePath> + <FilePath>..\..\src\scheduler.c</FilePath> </File> </Files> <Files> <File> - <FileName>scheduler.c</FileName> + <FileName>object.c</FileName> <FileType>1</FileType> - <FilePath>..\..\src\scheduler.c</FilePath> + <FilePath>..\..\src\object.c</FilePath> </File> </Files> <Files> @@ -721,30 +721,30 @@ </Files> <Files> <File> - <FileName>mem.c</FileName> + <FileName>thread.c</FileName> <FileType>1</FileType> - <FilePath>..\..\src\mem.c</FilePath> + <FilePath>..\..\src\thread.c</FilePath> </File> </Files> <Files> <File> - <FileName>components.c</FileName> + <FileName>kservice.c</FileName> <FileType>1</FileType> - <FilePath>..\..\src\components.c</FilePath> + <FilePath>..\..\src\kservice.c</FilePath> </File> </Files> <Files> <File> - <FileName>idle.c</FileName> + <FileName>device.c</FileName> <FileType>1</FileType> - <FilePath>..\..\src\idle.c</FilePath> + <FilePath>..\..\src\device.c</FilePath> </File> </Files> <Files> <File> - <FileName>irq.c</FileName> + <FileName>clock.c</FileName> <FileType>1</FileType> - <FilePath>..\..\src\irq.c</FilePath> + <FilePath>..\..\src\clock.c</FilePath> </File> </Files> </Group> @@ -752,37 +752,37 @@ <GroupName>Libraries</GroupName> <Files> <File> - <FileName>gd32f4xx_dma.c</FileName> + <FileName>gd32f4xx_adc.c</FileName> <FileType>1</FileType> - <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_dma.c</FilePath> + <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_adc.c</FilePath> </File> </Files> <Files> <File> - <FileName>gd32f4xx_spi.c</FileName> + <FileName>gd32f4xx_wwdgt.c</FileName> <FileType>1</FileType> - <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_spi.c</FilePath> + <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_wwdgt.c</FilePath> </File> </Files> <Files> <File> - <FileName>gd32f4xx_exti.c</FileName> + <FileName>gd32f4xx_usart.c</FileName> <FileType>1</FileType> - <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_exti.c</FilePath> + <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_usart.c</FilePath> </File> </Files> <Files> <File> - <FileName>gd32f4xx_rcu.c</FileName> + <FileName>gd32f4xx_dac.c</FileName> <FileType>1</FileType> - <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_rcu.c</FilePath> + <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_dac.c</FilePath> </File> </Files> <Files> <File> - <FileName>gd32f4xx_enet.c</FileName> + <FileName>gd32f4xx_i2c.c</FileName> <FileType>1</FileType> - <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_enet.c</FilePath> + <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_i2c.c</FilePath> </File> </Files> <Files> @@ -801,23 +801,23 @@ </Files> <Files> <File> - <FileName>gd32f4xx_i2c.c</FileName> + <FileName>gd32f4xx_timer.c</FileName> <FileType>1</FileType> - <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_i2c.c</FilePath> + <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_timer.c</FilePath> </File> </Files> <Files> <File> - <FileName>gd32f4xx_gpio.c</FileName> + <FileName>gd32f4xx_sdio.c</FileName> <FileType>1</FileType> - <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_gpio.c</FilePath> + <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_sdio.c</FilePath> </File> </Files> <Files> <File> - <FileName>gd32f4xx_dac.c</FileName> - <FileType>1</FileType> - <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_dac.c</FilePath> + <FileName>startup_gd32f4xx.s</FileName> + <FileType>2</FileType> + <FilePath>Libraries\CMSIS\GD\GD32F4xx\Source\ARM\startup_gd32f4xx.s</FilePath> </File> </Files> <Files> @@ -836,128 +836,128 @@ </Files> <Files> <File> - <FileName>gd32f4xx_sdio.c</FileName> + <FileName>gd32f4xx_gpio.c</FileName> <FileType>1</FileType> - <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_sdio.c</FilePath> + <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_gpio.c</FilePath> </File> </Files> <Files> <File> - <FileName>gd32f4xx_dci.c</FileName> + <FileName>gd32f4xx_exti.c</FileName> <FileType>1</FileType> - <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_dci.c</FilePath> + <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_exti.c</FilePath> </File> </Files> <Files> <File> - <FileName>gd32f4xx_iref.c</FileName> + <FileName>gd32f4xx_rcu.c</FileName> <FileType>1</FileType> - <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_iref.c</FilePath> + <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_rcu.c</FilePath> </File> </Files> <Files> <File> - <FileName>system_gd32f4xx.c</FileName> + <FileName>gd32f4xx_exmc.c</FileName> <FileType>1</FileType> - <FilePath>Libraries\CMSIS\GD\GD32F4xx\Source\system_gd32f4xx.c</FilePath> + <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_exmc.c</FilePath> </File> </Files> <Files> <File> - <FileName>gd32f4xx_usart.c</FileName> + <FileName>gd32f4xx_spi.c</FileName> <FileType>1</FileType> - <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_usart.c</FilePath> + <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_spi.c</FilePath> </File> </Files> <Files> <File> - <FileName>gd32f4xx_dbg.c</FileName> + <FileName>gd32f4xx_ctc.c</FileName> <FileType>1</FileType> - <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_dbg.c</FilePath> + <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_ctc.c</FilePath> </File> </Files> <Files> <File> - <FileName>gd32f4xx_syscfg.c</FileName> + <FileName>gd32f4xx_tli.c</FileName> <FileType>1</FileType> - <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_syscfg.c</FilePath> + <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_tli.c</FilePath> </File> </Files> <Files> <File> - <FileName>startup_gd32f4xx.s</FileName> - <FileType>2</FileType> - <FilePath>Libraries\CMSIS\GD\GD32F4xx\Source\ARM\startup_gd32f4xx.s</FilePath> + <FileName>gd32f4xx_enet.c</FileName> + <FileType>1</FileType> + <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_enet.c</FilePath> </File> </Files> <Files> <File> - <FileName>gd32f4xx_fmc.c</FileName> + <FileName>system_gd32f4xx.c</FileName> <FileType>1</FileType> - <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_fmc.c</FilePath> + <FilePath>Libraries\CMSIS\GD\GD32F4xx\Source\system_gd32f4xx.c</FilePath> </File> </Files> <Files> <File> - <FileName>gd32f4xx_pmu.c</FileName> + <FileName>gd32f4xx_fmc.c</FileName> <FileType>1</FileType> - <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_pmu.c</FilePath> + <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_fmc.c</FilePath> </File> </Files> <Files> <File> - <FileName>gd32f4xx_wwdgt.c</FileName> + <FileName>gd32f4xx_iref.c</FileName> <FileType>1</FileType> - <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_wwdgt.c</FilePath> + <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_iref.c</FilePath> </File> </Files> <Files> <File> - <FileName>gd32f4xx_ctc.c</FileName> + <FileName>gd32f4xx_dbg.c</FileName> <FileType>1</FileType> - <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_ctc.c</FilePath> + <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_dbg.c</FilePath> </File> </Files> <Files> <File> - <FileName>gd32f4xx_exmc.c</FileName> + <FileName>gd32f4xx_pmu.c</FileName> <FileType>1</FileType> - <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_exmc.c</FilePath> + <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_pmu.c</FilePath> </File> </Files> <Files> <File> - <FileName>gd32f4xx_ipa.c</FileName> + <FileName>gd32f4xx_can.c</FileName> <FileType>1</FileType> - <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_ipa.c</FilePath> + <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_can.c</FilePath> </File> </Files> <Files> <File> - <FileName>gd32f4xx_adc.c</FileName> + <FileName>gd32f4xx_ipa.c</FileName> <FileType>1</FileType> - <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_adc.c</FilePath> + <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_ipa.c</FilePath> </File> </Files> <Files> <File> - <FileName>gd32f4xx_tli.c</FileName> + <FileName>gd32f4xx_syscfg.c</FileName> <FileType>1</FileType> - <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_tli.c</FilePath> + <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_syscfg.c</FilePath> </File> </Files> <Files> <File> - <FileName>gd32f4xx_timer.c</FileName> + <FileName>gd32f4xx_dci.c</FileName> <FileType>1</FileType> - <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_timer.c</FilePath> + <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_dci.c</FilePath> </File> </Files> <Files> <File> - <FileName>gd32f4xx_can.c</FileName> + <FileName>gd32f4xx_dma.c</FileName> <FileType>1</FileType> - <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_can.c</FilePath> + <FilePath>Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_dma.c</FilePath> </File> </Files> <Files> @@ -972,261 +972,261 @@ <GroupName>lwIP</GroupName> <Files> <File> - <FileName>ping.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\apps\ping\ping.c</FilePath> - </File> - </Files> - <Files> - <File> <FileName>netdb.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\api\netdb.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\api\netdb.c</FilePath> </File> </Files> <Files> <File> <FileName>ip.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\core\ip.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\core\ip.c</FilePath> </File> </Files> <Files> <File> <FileName>autoip.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\core\ipv4\autoip.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\core\ipv4\autoip.c</FilePath> </File> </Files> <Files> <File> <FileName>ethernet.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\netif\ethernet.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\netif\ethernet.c</FilePath> </File> </Files> <Files> <File> <FileName>netif.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\core\netif.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\core\netif.c</FilePath> </File> </Files> <Files> <File> <FileName>sys.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\core\sys.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\core\sys.c</FilePath> </File> </Files> <Files> <File> <FileName>sockets.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\api\sockets.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\api\sockets.c</FilePath> </File> </Files> <Files> <File> <FileName>netifapi.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\api\netifapi.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\api\netifapi.c</FilePath> </File> </Files> <Files> <File> <FileName>tcpip.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\api\tcpip.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\api\tcpip.c</FilePath> </File> </Files> <Files> <File> <FileName>ip4_addr.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\core\ipv4\ip4_addr.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\core\ipv4\ip4_addr.c</FilePath> </File> </Files> <Files> <File> <FileName>dhcp.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\core\ipv4\dhcp.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\core\ipv4\dhcp.c</FilePath> </File> </Files> <Files> <File> <FileName>init.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\core\init.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\core\init.c</FilePath> </File> </Files> <Files> <File> <FileName>ethernetif.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\netif\ethernetif.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\netif\ethernetif.c</FilePath> </File> </Files> <Files> <File> <FileName>etharp.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\core\ipv4\etharp.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\core\ipv4\etharp.c</FilePath> </File> </Files> <Files> <File> <FileName>memp.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\core\memp.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\core\memp.c</FilePath> </File> </Files> <Files> <File> <FileName>ip4.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\core\ipv4\ip4.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\core\ipv4\ip4.c</FilePath> </File> </Files> <Files> <File> <FileName>netbuf.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\api\netbuf.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\api\netbuf.c</FilePath> </File> </Files> <Files> <File> <FileName>raw.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\core\raw.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\core\raw.c</FilePath> </File> </Files> <Files> <File> <FileName>ip4_frag.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\core\ipv4\ip4_frag.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\core\ipv4\ip4_frag.c</FilePath> </File> </Files> <Files> <File> <FileName>tcp_out.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\core\tcp_out.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\core\tcp_out.c</FilePath> </File> </Files> <Files> <File> <FileName>lowpan6.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\netif\lowpan6.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\netif\lowpan6.c</FilePath> </File> </Files> <Files> <File> <FileName>icmp.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\core\ipv4\icmp.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\core\ipv4\icmp.c</FilePath> </File> </Files> <Files> <File> <FileName>api_lib.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\api\api_lib.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\api\api_lib.c</FilePath> </File> </Files> <Files> <File> <FileName>inet_chksum.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\core\inet_chksum.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\core\inet_chksum.c</FilePath> </File> </Files> <Files> <File> <FileName>stats.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\core\stats.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\core\stats.c</FilePath> </File> </Files> <Files> <File> <FileName>err.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\api\err.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\api\err.c</FilePath> </File> </Files> <Files> <File> <FileName>tcp_in.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\core\tcp_in.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\core\tcp_in.c</FilePath> </File> </Files> <Files> <File> <FileName>dns.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\core\dns.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\core\dns.c</FilePath> </File> </Files> <Files> <File> <FileName>sys_arch.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\arch\sys_arch.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\arch\sys_arch.c</FilePath> </File> </Files> <Files> <File> <FileName>timeouts.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\core\timeouts.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\core\timeouts.c</FilePath> </File> </Files> <Files> <File> <FileName>igmp.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\core\ipv4\igmp.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\core\ipv4\igmp.c</FilePath> </File> </Files> <Files> <File> <FileName>udp.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\core\udp.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\core\udp.c</FilePath> </File> </Files> <Files> <File> <FileName>pbuf.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\core\pbuf.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\core\pbuf.c</FilePath> </File> </Files> <Files> <File> <FileName>def.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\core\def.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\core\def.c</FilePath> </File> </Files> <Files> <File> <FileName>api_msg.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\api\api_msg.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\api\api_msg.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>ping.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\components\net\lwip-2.0.3\src\apps\ping\ping.c</FilePath> </File> </Files> <Files> <File> <FileName>tcp.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\lwip-2.0.2\src\core\tcp.c</FilePath> + <FilePath>..\..\components\net\lwip-2.0.3\src\core\tcp.c</FilePath> </File> </Files> </Group> @@ -1251,6 +1251,13 @@ <GroupName>SAL</GroupName> <Files> <File> + <FileName>netdev.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\components\net\netdev\src\netdev.c</FilePath> + </File> + </Files> + <Files> + <File> <FileName>netdev_ipaddr.c</FileName> <FileType>1</FileType> <FilePath>..\..\components\net\netdev\src\netdev_ipaddr.c</FilePath> @@ -1258,9 +1265,9 @@ </Files> <Files> <File> - <FileName>netdev.c</FileName> + <FileName>sal_socket.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\net\netdev\src\netdev.c</FilePath> + <FilePath>..\..\components\net\sal_socket\src\sal_socket.c</FilePath> </File> </Files> <Files> @@ -1286,13 +1293,6 @@ </Files> <Files> <File> - <FileName>sal_socket.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\components\net\sal_socket\src\sal_socket.c</FilePath> - </File> - </Files> - <Files> - <File> <FileName>af_inet_lwip.c</FileName> <FileType>1</FileType> <FilePath>..\..\components\net\sal_socket\impl\af_inet_lwip.c</FilePath> diff --git a/bsp/gd32450z-eval/rtconfig.h b/bsp/gd32450z-eval/rtconfig.h index 24e31e0e72..f77bbc63ca 100644 --- a/bsp/gd32450z-eval/rtconfig.h +++ b/bsp/gd32450z-eval/rtconfig.h @@ -152,7 +152,7 @@ /* light weight TCP/IP stack */ #define RT_USING_LWIP -#define RT_USING_LWIP202 +#define RT_USING_LWIP203 #define RT_LWIP_MEM_ALIGNMENT 4 #define RT_LWIP_IGMP #define RT_LWIP_ICMP diff --git a/bsp/imx6sx/cortex-a9/.config b/bsp/imx6sx/cortex-a9/.config index 6cf3583151..4b42f0268a 100644 --- a/bsp/imx6sx/cortex-a9/.config +++ b/bsp/imx6sx/cortex-a9/.config @@ -235,8 +235,7 @@ CONFIG_NETDEV_IPV6=0 # CONFIG_RT_USING_LWIP=y # CONFIG_RT_USING_LWIP141 is not set -CONFIG_RT_USING_LWIP202=y -# CONFIG_RT_USING_LWIP203 is not set +CONFIG_RT_USING_LWIP203=y # CONFIG_RT_USING_LWIP212 is not set # CONFIG_RT_USING_LWIP_IPV6 is not set CONFIG_RT_LWIP_MEM_ALIGNMENT=4 @@ -467,6 +466,7 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_PKG_USING_MCURSES is not set # CONFIG_PKG_USING_TERMBOX is not set # CONFIG_PKG_USING_VT100 is not set +# CONFIG_PKG_USING_QRCODE is not set # # tools packages @@ -477,7 +477,6 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_PKG_USING_SYSTEMVIEW is not set # CONFIG_PKG_USING_SEGGER_RTT is not set # CONFIG_PKG_USING_RDB is not set -# CONFIG_PKG_USING_QRCODE is not set # CONFIG_PKG_USING_ULOG_EASYFLASH is not set # CONFIG_PKG_USING_ULOG_FILE is not set # CONFIG_PKG_USING_LOGMGR is not set @@ -528,6 +527,7 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_PKG_USING_POSIX_GETLINE is not set # CONFIG_PKG_USING_POSIX_WCWIDTH is not set # CONFIG_PKG_USING_POSIX_ITOA is not set +# CONFIG_PKG_USING_POSIX_STRINGS is not set # # acceleration: Assembly language or algorithmic acceleration packages @@ -639,6 +639,7 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_PKG_USING_SSD1306 is not set # CONFIG_PKG_USING_QKEY is not set # CONFIG_PKG_USING_RS485 is not set +# CONFIG_PKG_USING_RS232 is not set # CONFIG_PKG_USING_NES is not set # CONFIG_PKG_USING_VIRTUAL_SENSOR is not set # CONFIG_PKG_USING_VDEVICE is not set @@ -726,5 +727,7 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_PKG_USING_LWGPS is not set # CONFIG_PKG_USING_STATE_MACHINE is not set # CONFIG_PKG_USING_DESIGN_PATTERN is not set +# CONFIG_PKG_USING_CONTROLLER is not set +# CONFIG_PKG_USING_PHASE_LOCKED_LOOP is not set CONFIG_SOC_MCIMX6X4=y CONFIG_RT_USING_UART1=y diff --git a/bsp/imx6sx/cortex-a9/rtconfig.h b/bsp/imx6sx/cortex-a9/rtconfig.h index 4990f78084..ee4491554a 100644 --- a/bsp/imx6sx/cortex-a9/rtconfig.h +++ b/bsp/imx6sx/cortex-a9/rtconfig.h @@ -134,7 +134,7 @@ /* light weight TCP/IP stack */ #define RT_USING_LWIP -#define RT_USING_LWIP202 +#define RT_USING_LWIP203 #define RT_LWIP_MEM_ALIGNMENT 4 #define RT_LWIP_IGMP #define RT_LWIP_ICMP diff --git a/bsp/imxrt/libraries/MIMXRT1050/SConscript b/bsp/imxrt/libraries/MIMXRT1050/SConscript index 75fde95bc1..c774395330 100644 --- a/bsp/imxrt/libraries/MIMXRT1050/SConscript +++ b/bsp/imxrt/libraries/MIMXRT1050/SConscript @@ -75,6 +75,13 @@ if GetDepend(['BSP_USING_DMA']): src += ['MIMXRT1052/drivers/fsl_lpuart_edma.c'] if GetDepend(['BSP_USING_SPI']): src += ['MIMXRT1052/drivers/fsl_lpspi_edma.c'] + +if GetDepend(['BSP_USING_PULSE_ENCODER']): + src += ['MIMXRT1052/drivers/fsl_enc.c'] + +#Adding this as XBAR is used in pin mux +src += ['MIMXRT1052/drivers/fsl_xbara.c'] +src += ['MIMXRT1052/drivers/fsl_xbarb.c'] if rtconfig.CROSS_TOOL == 'gcc': group = DefineGroup('Libraries', src, depend = [''], CPPPATH = path, ASFLAGS = '$ASFLAGS -D __STARTUP_CLEAR_BSS') diff --git a/bsp/imxrt/libraries/drivers/SConscript b/bsp/imxrt/libraries/drivers/SConscript index 3328d2af08..eaefd7c5e1 100644 --- a/bsp/imxrt/libraries/drivers/SConscript +++ b/bsp/imxrt/libraries/drivers/SConscript @@ -63,6 +63,9 @@ if GetDepend('BSP_USING_USB_DEVICE'): src += Glob('usb/phy/*.c') CPPDEFINES += ['ENDIANNESS'] +if GetDepend('BSP_USING_PULSE_ENCODER'): + src += ['drv_pulse_encoder.c'] + path = [cwd,cwd + '/config'] group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES=CPPDEFINES) diff --git a/bsp/imxrt/libraries/drivers/drv_pulse_encoder.c b/bsp/imxrt/libraries/drivers/drv_pulse_encoder.c new file mode 100644 index 0000000000..c0e5ce27f8 --- /dev/null +++ b/bsp/imxrt/libraries/drivers/drv_pulse_encoder.c @@ -0,0 +1,160 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2019-08-23 balanceTWK first version + * 2021-01-19 Leslie Lee port to imxrt series + */ + +#include <rtthread.h> +#include <rtdevice.h> +#ifdef BSP_USING_PULSE_ENCODER + +#include "fsl_common.h" +#include "fsl_enc.h" + +#define LOG_TAG "drv.pulse_encoder" +#include <drv_log.h> + +#if !defined(BSP_USING_PULSE_ENCODER1) && !defined(BSP_USING_PULSE_ENCODER2) && !defined(BSP_USING_PULSE_ENCODER3) \ + && !defined(BSP_USING_PULSE_ENCODER4) + #error "Please define at least one BSP_USING_PULSE_ENCODERx" + /* this driver can be disabled at menuconfig → RT-Thread Components → Device Drivers */ +#elif (defined(BSP_USING_PULSE_ENCODER2) || defined(BSP_USING_PULSE_ENCODER3) || defined(BSP_USING_PULSE_ENCODER4)) || defined(SOC_IMXRT1015_SERIES) + #error "IMXRT1015 had only one quadrature decoder module" +#elif (defined(BSP_USING_PULSE_ENCODER3) || defined(BSP_USING_PULSE_ENCODER4)) || defined(SOC_IMXRT1020_SERIES) + #error "IMXRT1020 had only two quadrature decoder module" +#endif + +enum +{ +#ifdef BSP_USING_PULSE_ENCODER1 + PULSE_ENCODER1_INDEX, +#endif +#ifdef BSP_USING_PULSE_ENCODER2 + PULSE_ENCODER2_INDEX, +#endif +#ifdef BSP_USING_PULSE_ENCODER3 + PULSE_ENCODER3_INDEX, +#endif +#ifdef BSP_USING_PULSE_ENCODER4 + PULSE_ENCODER4_INDEX, +#endif +}; + +struct imxrt_pulse_encoder_device +{ + struct rt_pulse_encoder_device pulse_encoder; + ENC_Type *base; + char *name; +}; +typedef struct imxrt_pulse_encoder_device imxrt_pulse_enccoder_device_t; + +static imxrt_pulse_enccoder_device_t imxrt_pulse_encoder_obj[] = +{ +#ifdef BSP_USING_PULSE_ENCODER1 + { + .base = ENC1, + .name = "pulse1" + }, +#endif +#ifdef BSP_USING_PULSE_ENCODER2 + { + .base = ENC2, + .name = "pulse2" + }, +#endif +#ifdef BSP_USING_PULSE_ENCODER3 + { + .base = ENC3, + .name = "pulse3" + }, +#endif +#ifdef BSP_USING_PULSE_ENCODER4 + { + .base = ENC4, + .name = "pulse4" + }, +#endif +}; + + + +rt_err_t pulse_encoder_init(struct rt_pulse_encoder_device *pulse_encoder) +{ + ENC_Type *base = ((imxrt_pulse_enccoder_device_t *)(pulse_encoder->parent.user_data))->base; + enc_config_t enc_config; + ENC_GetDefaultConfig(&enc_config); + ENC_Init(base, &enc_config); + ENC_DoSoftwareLoadInitialPositionValue(base); /* Update the position counter with initial value. */ + return RT_EOK; +} + +rt_err_t pulse_encoder_clear_count(struct rt_pulse_encoder_device *pulse_encoder) +{ + ENC_SetInitialPositionValue(((imxrt_pulse_enccoder_device_t *)(pulse_encoder->parent.user_data))->base, 0); + return RT_EOK; +} + +rt_int32_t pulse_encoder_get_count(struct rt_pulse_encoder_device *pulse_encoder) +{ + return (rt_int32_t)ENC_GetPositionValue(((imxrt_pulse_enccoder_device_t *)(pulse_encoder->parent.user_data))->base); +} + +rt_err_t pulse_encoder_control(struct rt_pulse_encoder_device *pulse_encoder, rt_uint32_t cmd, void *args) +{ + rt_err_t result; + + result = RT_EOK; + + switch (cmd) + { + case PULSE_ENCODER_CMD_ENABLE: + result = pulse_encoder->ops->init(pulse_encoder); + break; + case PULSE_ENCODER_CMD_DISABLE: + ENC_Deinit(((imxrt_pulse_enccoder_device_t *)(pulse_encoder->parent.user_data))->base); + break; + default: + result = -RT_ENOSYS; + break; + } + + return result; +} + +static const struct rt_pulse_encoder_ops _ops = +{ + .init = pulse_encoder_init, + .get_count = pulse_encoder_get_count, + .clear_count = pulse_encoder_clear_count, + .control = pulse_encoder_control, +}; + +int rt_hw_pulse_encoder_init(void) +{ + int i; + int result; + + result = RT_EOK; + for (i = 0; i < sizeof(imxrt_pulse_encoder_obj) / sizeof(imxrt_pulse_encoder_obj[0]); i++) + { + imxrt_pulse_encoder_obj[i].pulse_encoder.type = AB_PHASE_PULSE_ENCODER; + imxrt_pulse_encoder_obj[i].pulse_encoder.ops = &_ops; + imxrt_pulse_encoder_obj[i].pulse_encoder.parent.user_data = &(imxrt_pulse_encoder_obj[i]); + + if (rt_device_pulse_encoder_register(&imxrt_pulse_encoder_obj[i].pulse_encoder, imxrt_pulse_encoder_obj[i].name, &imxrt_pulse_encoder_obj[i]) != RT_EOK) + { + LOG_E("%s register failed", imxrt_pulse_encoder_obj[i].name); + result = -RT_ERROR; + } + } + + return result; +} +INIT_BOARD_EXPORT(rt_hw_pulse_encoder_init); + +#endif
\ No newline at end of file diff --git a/bsp/lpc54114-lite/applications/mnt.c b/bsp/lpc54114-lite/applications/mnt.c index 49852b2025..f67c5c21ea 100644 --- a/bsp/lpc54114-lite/applications/mnt.c +++ b/bsp/lpc54114-lite/applications/mnt.c @@ -11,7 +11,10 @@ #if defined(RT_USING_DFS) #include <dfs_file.h> -#include <dfs_posix.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #endif #define BSP_FLASH_MOUNT_PATH "/mnt/flash" diff --git a/bsp/ls2kdev/.config b/bsp/ls2kdev/.config index 2e2dcca70b..a273e07a43 100644 --- a/bsp/ls2kdev/.config +++ b/bsp/ls2kdev/.config @@ -264,8 +264,7 @@ CONFIG_NETDEV_IPV6=0 # CONFIG_RT_USING_LWIP=y # CONFIG_RT_USING_LWIP141 is not set -CONFIG_RT_USING_LWIP202=y -# CONFIG_RT_USING_LWIP203 is not set +CONFIG_RT_USING_LWIP203=y # CONFIG_RT_USING_LWIP212 is not set # CONFIG_RT_USING_LWIP_IPV6 is not set CONFIG_RT_LWIP_MEM_ALIGNMENT=8 @@ -501,6 +500,7 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_PKG_USING_MCURSES is not set # CONFIG_PKG_USING_TERMBOX is not set # CONFIG_PKG_USING_VT100 is not set +# CONFIG_PKG_USING_QRCODE is not set # # tools packages @@ -511,7 +511,6 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_PKG_USING_SYSTEMVIEW is not set # CONFIG_PKG_USING_SEGGER_RTT is not set # CONFIG_PKG_USING_RDB is not set -# CONFIG_PKG_USING_QRCODE is not set # CONFIG_PKG_USING_ULOG_EASYFLASH is not set # CONFIG_PKG_USING_ULOG_FILE is not set # CONFIG_PKG_USING_LOGMGR is not set @@ -562,6 +561,7 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_PKG_USING_POSIX_GETLINE is not set # CONFIG_PKG_USING_POSIX_WCWIDTH is not set # CONFIG_PKG_USING_POSIX_ITOA is not set +# CONFIG_PKG_USING_POSIX_STRINGS is not set # # acceleration: Assembly language or algorithmic acceleration packages @@ -673,6 +673,7 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_PKG_USING_SSD1306 is not set # CONFIG_PKG_USING_QKEY is not set # CONFIG_PKG_USING_RS485 is not set +# CONFIG_PKG_USING_RS232 is not set # CONFIG_PKG_USING_NES is not set # CONFIG_PKG_USING_VIRTUAL_SENSOR is not set # CONFIG_PKG_USING_VDEVICE is not set @@ -760,6 +761,8 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_PKG_USING_LWGPS is not set # CONFIG_PKG_USING_STATE_MACHINE is not set # CONFIG_PKG_USING_DESIGN_PATTERN is not set +# CONFIG_PKG_USING_CONTROLLER is not set +# CONFIG_PKG_USING_PHASE_LOCKED_LOOP is not set CONFIG_SOC_LS2K1000=y CONFIG_RT_USING_UART0=y # CONFIG_RT_USING_UART4 is not set diff --git a/bsp/ls2kdev/rtconfig.h b/bsp/ls2kdev/rtconfig.h index dceb19ed54..27fd9b0766 100644 --- a/bsp/ls2kdev/rtconfig.h +++ b/bsp/ls2kdev/rtconfig.h @@ -151,7 +151,7 @@ /* light weight TCP/IP stack */ #define RT_USING_LWIP -#define RT_USING_LWIP202 +#define RT_USING_LWIP203 #define RT_LWIP_MEM_ALIGNMENT 8 #define RT_LWIP_IGMP #define RT_LWIP_ICMP diff --git a/bsp/mini4020/applications/application.c b/bsp/mini4020/applications/application.c index f5a77d8c60..722443ac7c 100644 --- a/bsp/mini4020/applications/application.c +++ b/bsp/mini4020/applications/application.c @@ -22,7 +22,11 @@ #include <dfs.h> #include <dfs_elm.h> #include <dfs_fs.h> -#include <dfs_posix.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #endif #ifdef RT_USING_RTGUI diff --git a/bsp/n32g452xx/Libraries/rt_drivers/drv_adc.c b/bsp/n32g452xx/Libraries/rt_drivers/drv_adc.c index 8223a54e6a..992af05e52 100644 --- a/bsp/n32g452xx/Libraries/rt_drivers/drv_adc.c +++ b/bsp/n32g452xx/Libraries/rt_drivers/drv_adc.c @@ -124,9 +124,9 @@ static rt_err_t n32_adc_enabled(struct rt_adc_device *device, rt_uint32_t channe ADC_InitStructure.ChsNumber = 1; ADC_Init(n32_adc_handler, &ADC_InitStructure); - if (((n32_adc_handler == ADC2) || (n32_adc_handler == ADC2)) - && ((n32_adc_get_channel(channel) == ADC_CH_16) - || (n32_adc_get_channel(channel) == ADC_CH_18))) + if (((n32_adc_handler == ADC1) || (n32_adc_handler == ADC2)) + && ((n32_adc_get_channel(channel) == ADC_CH_16) + || (n32_adc_get_channel(channel) == ADC_CH_18))) { ADC_EnableTempSensorVrefint(ENABLE); } diff --git a/bsp/n32g452xx/Libraries/rt_drivers/drv_can.c b/bsp/n32g452xx/Libraries/rt_drivers/drv_can.c new file mode 100644 index 0000000000..280e749d5c --- /dev/null +++ b/bsp/n32g452xx/Libraries/rt_drivers/drv_can.c @@ -0,0 +1,1002 @@ +/* + * Copyright (c) 2006-2022, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2022-01-09 chenbin the first version + */ + +#include "drv_can.h" +#ifdef BSP_USING_CAN + +#include "stdint.h" +#include "n32g45x.h" +#include "n32g45x_can.h" + +struct n32g45x_baud_rate_tab +{ + uint32_t baud_rate; + uint16_t PRESCALE; + uint8_t RSJW; + uint8_t TBS1; + uint8_t TBS2; + uint8_t notused; +}; + +#define N32_CAN_BAUD_DEF(rate, rsjw, tbs1, tbs2, prescale) \ + { \ + .baud_rate = rate, \ + .RSJW = rsjw, \ + .TBS1 = tbs1, \ + .TBS2 = tbs2, \ + .PRESCALE = prescale \ + } + +/* N32G45x can device */ +struct n32g45x_can +{ + char *name; + CAN_Module *CANx; + CAN_InitType can_init; + CAN_FilterInitType can_filter_init; + struct rt_can_device device; /* inherit from can device */ +}; + +#define LOG_TAG "drv_can" +#include <drv_log.h> + +/* +* N32G45x CAN1 CAN2 used APB1 (36MHz) +* baud calculation example: baud = Tclk / ((ss + bs1 + bs2) * brp) +* 36MHz / ((1 + 5 + 3) * 4) = 1MHz +*/ +#if defined(N32G45X) /* APB1 36MHz(max) */ +static const struct n32g45x_baud_rate_tab can_baud_rate_tab[] = + { + N32_CAN_BAUD_DEF(CAN1MBaud, CAN_RSJW_1tq, CAN_TBS1_5tq, CAN_TBS2_3tq, 4), + N32_CAN_BAUD_DEF(CAN800kBaud, CAN_RSJW_1tq, CAN_TBS1_5tq, CAN_TBS2_3tq, 5), + N32_CAN_BAUD_DEF(CAN500kBaud, CAN_RSJW_1tq, CAN_TBS1_5tq, CAN_TBS2_3tq, 8), + N32_CAN_BAUD_DEF(CAN250kBaud, CAN_RSJW_1tq, CAN_TBS1_5tq, CAN_TBS2_3tq, 16), + N32_CAN_BAUD_DEF(CAN125kBaud, CAN_RSJW_1tq, CAN_TBS1_5tq, CAN_TBS2_3tq, 32), + N32_CAN_BAUD_DEF(CAN100kBaud, CAN_RSJW_2tq, CAN_TBS1_8tq, CAN_TBS2_8tq, 20), + N32_CAN_BAUD_DEF(CAN50kBaud, CAN_RSJW_2tq, CAN_TBS1_8tq, CAN_TBS2_8tq, 40), + N32_CAN_BAUD_DEF(CAN20kBaud, CAN_RSJW_2tq, CAN_TBS1_8tq, CAN_TBS2_8tq, 80), + N32_CAN_BAUD_DEF(CAN10kBaud, CAN_RSJW_2tq, CAN_TBS1_8tq, CAN_TBS2_8tq, 160), +}; +#endif + +#ifdef BSP_USING_CAN1 +static struct n32g45x_can drv_can1 = + { + .name = "can1", + .CANx = CAN1, +}; +#endif + +#ifdef BSP_USING_CAN2 +static struct n32g45x_can drv_can2 = + { + .name = "can2", + .CANx = CAN2, +}; +#endif + +static uint32_t get_can_baud_index(rt_uint32_t baud) +{ + uint32_t len, index; + + len = sizeof(can_baud_rate_tab) / sizeof(can_baud_rate_tab[0]); + for (index = 0; index < len; index++) + { + if (can_baud_rate_tab[index].baud_rate == baud) + return index; + } + return 0; /* default baud is CAN1MBaud */ +} + +static uint8_t get_can_mode_rtt2n32(uint8_t rtt_can_mode) +{ + uint8_t mode = CAN_Normal_Mode; + switch (rtt_can_mode) + { + case RT_CAN_MODE_NORMAL: + mode = CAN_Normal_Mode; + break; + case RT_CAN_MODE_LISEN: + mode = CAN_Silent_Mode; + break; + case RT_CAN_MODE_LOOPBACK: + mode = CAN_LoopBack_Mode; + break; + case RT_CAN_MODE_LOOPBACKANLISEN: + mode = CAN_Silent_LoopBack_Mode; + break; + } + return mode; +} + +static rt_err_t _can_filter_config(struct n32g45x_can *drv_can) +{ + if (drv_can->CANx == CAN1) + { + CAN1_InitFilter(&(drv_can->can_filter_init)); + } +#ifdef CAN2 + else if (drv_can->CANx == CAN2) + { + CAN2_InitFilter(&(drv_can->can_filter_init)); + } +#endif + else + { + rt_kprintf("can filter config error\n"); + return -RT_EINVAL; + } + return RT_EOK; +} + +static rt_err_t _can_config(struct rt_can_device *can, struct can_configure *cfg) +{ + struct n32g45x_can *drv_can; + rt_uint32_t baud_index; + + RT_ASSERT(can); + RT_ASSERT(cfg); + drv_can = (struct n32g45x_can *)can->parent.user_data; + RT_ASSERT(drv_can); + + /* Configure CAN1 and CAN2 */ + if (drv_can->CANx == CAN1) + { + RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_CAN1, ENABLE); + n32_msp_can_init(CAN1); + } +#ifdef CAN2 + else if (drv_can->CANx == CAN2) + { + RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_CAN2, ENABLE); + n32_msp_can_init(CAN2); + } +#endif + else + { + rt_kprintf("can init error1\n"); + return -RT_EINVAL; + } + /* Struct init*/ + CAN_InitStruct(&(drv_can->can_init)); + + drv_can->can_init.TTCM = DISABLE; + drv_can->can_init.ABOM = DISABLE; + drv_can->can_init.AWKUM = DISABLE; + drv_can->can_init.NART = DISABLE; + drv_can->can_init.RFLM = DISABLE; + drv_can->can_init.TXFP = ENABLE; + + //mode + drv_can->can_init.OperatingMode = get_can_mode_rtt2n32(cfg->mode); + + //baud + baud_index = get_can_baud_index(cfg->baud_rate); + drv_can->can_init.RSJW = can_baud_rate_tab[baud_index].RSJW; + drv_can->can_init.TBS1 = can_baud_rate_tab[baud_index].TBS1; + drv_can->can_init.TBS2 = can_baud_rate_tab[baud_index].TBS2; + drv_can->can_init.BaudRatePrescaler = can_baud_rate_tab[baud_index].PRESCALE; + + /* init can */ + if (CAN_Init(drv_can->CANx, &(drv_can->can_init)) != CAN_InitSTS_Success) + { + rt_kprintf("can init error2\n"); + return -RT_ERROR; + } + /* default filter config */ + _can_filter_config(drv_can); + return RT_EOK; +} + +#ifndef CAN1_TX_IRQn +#define CAN1_TX_IRQn USB_HP_CAN1_TX_IRQn +#endif + +#ifndef CAN1_RX0_IRQn +#define CAN1_RX0_IRQn USB_LP_CAN1_RX0_IRQn +#endif + +static rt_err_t _can_control(struct rt_can_device *can, int cmd, void *arg) +{ + rt_uint32_t argval; + struct n32g45x_can *drv_can; + struct rt_can_filter_config *filter_cfg; + + RT_ASSERT(can != RT_NULL); + drv_can = (struct n32g45x_can *)can->parent.user_data; + RT_ASSERT(drv_can != RT_NULL); + + switch (cmd) + { + case RT_DEVICE_CTRL_CLR_INT: + argval = (rt_uint32_t)arg; + if (argval == RT_DEVICE_FLAG_INT_RX) + { + if (CAN1 == drv_can->CANx) + { + NVIC_DisableIRQ(CAN1_RX0_IRQn); + NVIC_DisableIRQ(CAN1_RX1_IRQn); + } +#ifdef CAN2 + if (CAN2 == drv_can->CANx) + { + NVIC_DisableIRQ(CAN2_RX0_IRQn); + NVIC_DisableIRQ(CAN2_RX1_IRQn); + } +#endif + CAN_INTConfig(drv_can->CANx, CAN_INT_FMP0, DISABLE); /*!< DATFIFO 0 message pending Interrupt*/ + CAN_INTConfig(drv_can->CANx, CAN_INT_FF0, DISABLE); /*!< DATFIFO 0 full Interrupt*/ + CAN_INTConfig(drv_can->CANx, CAN_INT_FOV0, DISABLE); /*!< DATFIFO 0 overrun Interrupt*/ + CAN_INTConfig(drv_can->CANx, CAN_INT_FMP1, DISABLE); /*!< DATFIFO 1 message pending Interrupt*/ + CAN_INTConfig(drv_can->CANx, CAN_INT_FF1, DISABLE); /*!< DATFIFO 1 full Interrupt*/ + CAN_INTConfig(drv_can->CANx, CAN_INT_FOV1, DISABLE); /*!< DATFIFO 1 overrun Interrupt*/ + } + else if (argval == RT_DEVICE_FLAG_INT_TX) + { + if (CAN1 == drv_can->CANx) + { + NVIC_DisableIRQ(CAN1_TX_IRQn); + } +#ifdef CAN2 + if (CAN2 == drv_can->CANx) + { + NVIC_DisableIRQ(CAN2_TX_IRQn); + } +#endif + CAN_INTConfig(drv_can->CANx, CAN_INT_TME, DISABLE); /*!< Transmit mailbox empty Interrupt*/ + } + else if (argval == RT_DEVICE_CAN_INT_ERR) + { + if (CAN1 == drv_can->CANx) + { + NVIC_DisableIRQ(CAN1_SCE_IRQn); + } +#ifdef CAN2 + if (CAN2 == drv_can->CANx) + { + NVIC_DisableIRQ(CAN2_SCE_IRQn); + } +#endif + CAN_INTConfig(drv_can->CANx, CAN_INT_EWG, DISABLE); /*!< Error warning Interrupt*/ + CAN_INTConfig(drv_can->CANx, CAN_INT_EPV, DISABLE); /*!< Error passive Interrupt*/ + CAN_INTConfig(drv_can->CANx, CAN_INT_BOF, DISABLE); /*!< Bus-off Interrupt*/ + CAN_INTConfig(drv_can->CANx, CAN_INT_LEC, DISABLE); /*!< Last error code Interrupt*/ + CAN_INTConfig(drv_can->CANx, CAN_INT_ERR, DISABLE); /*!< Error Interrupt*/ + } + break; + case RT_DEVICE_CTRL_SET_INT: + argval = (rt_uint32_t)arg; + if (argval == RT_DEVICE_FLAG_INT_RX) + { + CAN_INTConfig(drv_can->CANx, CAN_INT_FMP0, ENABLE); /*!< DATFIFO 0 message pending Interrupt*/ + CAN_INTConfig(drv_can->CANx, CAN_INT_FF0, ENABLE); /*!< DATFIFO 0 full Interrupt*/ + CAN_INTConfig(drv_can->CANx, CAN_INT_FOV0, ENABLE); /*!< DATFIFO 0 overrun Interrupt*/ + CAN_INTConfig(drv_can->CANx, CAN_INT_FMP1, ENABLE); /*!< DATFIFO 1 message pending Interrupt*/ + CAN_INTConfig(drv_can->CANx, CAN_INT_FF1, ENABLE); /*!< DATFIFO 1 full Interrupt*/ + CAN_INTConfig(drv_can->CANx, CAN_INT_FOV1, ENABLE); /*!< DATFIFO 1 overrun Interrupt*/ + + if (CAN1 == drv_can->CANx) + { + NVIC_SetPriority(CAN1_RX0_IRQn, 1); + NVIC_EnableIRQ(CAN1_RX0_IRQn); + NVIC_SetPriority(CAN1_RX1_IRQn, 1); + NVIC_EnableIRQ(CAN1_RX1_IRQn); + } +#ifdef CAN2 + if (CAN2 == drv_can->CANx) + { + NVIC_SetPriority(CAN2_RX0_IRQn, 1); + NVIC_EnableIRQ(CAN2_RX0_IRQn); + NVIC_SetPriority(CAN2_RX1_IRQn, 1); + NVIC_EnableIRQ(CAN2_RX1_IRQn); + } +#endif + } + else if (argval == RT_DEVICE_FLAG_INT_TX) + { + CAN_INTConfig(drv_can->CANx, CAN_INT_TME, ENABLE); /*!< Transmit mailbox empty Interrupt*/ + + if (CAN1 == drv_can->CANx) + { + NVIC_SetPriority(CAN1_TX_IRQn, 1); + NVIC_EnableIRQ(CAN1_TX_IRQn); + } +#ifdef CAN2 + if (CAN2 == drv_can->CANx) + { + NVIC_SetPriority(CAN2_TX_IRQn, 1); + NVIC_EnableIRQ(CAN2_TX_IRQn); + } +#endif + } + else if (argval == RT_DEVICE_CAN_INT_ERR) + { + CAN_INTConfig(drv_can->CANx, CAN_INT_EWG, ENABLE); /*!< Error warning Interrupt*/ + CAN_INTConfig(drv_can->CANx, CAN_INT_EPV, ENABLE); /*!< Error passive Interrupt*/ + CAN_INTConfig(drv_can->CANx, CAN_INT_BOF, ENABLE); /*!< Bus-off Interrupt*/ + CAN_INTConfig(drv_can->CANx, CAN_INT_LEC, ENABLE); /*!< Last error code Interrupt*/ + CAN_INTConfig(drv_can->CANx, CAN_INT_ERR, ENABLE); /*!< Error Interrupt*/ + + if (CAN1 == drv_can->CANx) + { + NVIC_SetPriority(CAN1_SCE_IRQn, 1); + NVIC_EnableIRQ(CAN1_SCE_IRQn); + } +#ifdef CAN2 + if (CAN2 == drv_can->CANx) + { + NVIC_SetPriority(CAN2_SCE_IRQn, 1); + NVIC_EnableIRQ(CAN2_SCE_IRQn); + } +#endif + } + break; + case RT_CAN_CMD_SET_FILTER: + { + rt_uint32_t id_h = 0; + rt_uint32_t id_l = 0; + rt_uint32_t mask_h = 0; + rt_uint32_t mask_l = 0; + rt_uint32_t mask_l_tail = 0; //CAN_FxR2 bit [2:0] + + if (RT_NULL == arg) + { + /* default filter config */ + _can_filter_config(drv_can); + } + else + { + filter_cfg = (struct rt_can_filter_config *)arg; + /* get default filter */ + for (int i = 0; i < filter_cfg->count; i++) + { + if (filter_cfg->items[i].hdr == -1) + { + drv_can->can_filter_init.Filter_Num = i; + } + else + { + drv_can->can_filter_init.Filter_Num = filter_cfg->items[i].hdr; + } + + if (filter_cfg->items[i].mode == 0x00) + { + drv_can->can_filter_init.Filter_Mode = CAN_Filter_IdMaskMode; + } + else if (filter_cfg->items[i].mode == 0x01) + { + drv_can->can_filter_init.Filter_Mode = CAN_Filter_IdListMode; + } + + if (filter_cfg->items[i].ide == RT_CAN_STDID) + { + id_h = ((filter_cfg->items[i].id << 18) >> 13) & 0xFFFF; + id_l = ((filter_cfg->items[i].id << 18) | + (filter_cfg->items[i].ide << 2) | + (filter_cfg->items[i].rtr << 1)) & + 0xFFFF; + mask_h = ((filter_cfg->items[i].mask << 21) >> 16) & 0xFFFF; + mask_l = ((filter_cfg->items[i].mask << 21) | mask_l_tail) & 0xFFFF; + } + else if (filter_cfg->items[i].ide == RT_CAN_EXTID) + { + id_h = (filter_cfg->items[i].id >> 13) & 0xFFFF; + id_l = ((filter_cfg->items[i].id << 3) | + (filter_cfg->items[i].ide << 2) | + (filter_cfg->items[i].rtr << 1)) & + 0xFFFF; + mask_h = ((filter_cfg->items[i].mask << 3) >> 16) & 0xFFFF; + mask_l = ((filter_cfg->items[i].mask << 3) | mask_l_tail) & 0xFFFF; + } + drv_can->can_filter_init.Filter_Scale = CAN_Filter_32bitScale; + drv_can->can_filter_init.Filter_HighId = id_h; + drv_can->can_filter_init.Filter_LowId = id_l; + drv_can->can_filter_init.FilterMask_HighId = mask_h; + drv_can->can_filter_init.FilterMask_LowId = mask_l; + drv_can->can_filter_init.Filter_FIFOAssignment = CAN_FIFO0; + drv_can->can_filter_init.Filter_Act = ENABLE; + + /* Filter conf */ + _can_filter_config(drv_can); + } + } + break; + } + case RT_CAN_CMD_SET_MODE: + argval = (rt_uint32_t)arg; + if (argval != RT_CAN_MODE_NORMAL && + argval != RT_CAN_MODE_LISEN && + argval != RT_CAN_MODE_LOOPBACK && + argval != RT_CAN_MODE_LOOPBACKANLISEN) + { + return -RT_ERROR; + } + if (argval != drv_can->device.config.mode) + { + drv_can->device.config.mode = argval; + return _can_config(&drv_can->device, &drv_can->device.config); + } + break; + case RT_CAN_CMD_SET_BAUD: + argval = (rt_uint32_t)arg; + if (argval != CAN1MBaud && + argval != CAN800kBaud && + argval != CAN500kBaud && + argval != CAN250kBaud && + argval != CAN125kBaud && + argval != CAN100kBaud && + argval != CAN50kBaud && + argval != CAN20kBaud && + argval != CAN10kBaud) + { + return -RT_ERROR; + } + if (argval != drv_can->device.config.baud_rate) + { + drv_can->device.config.baud_rate = argval; + return _can_config(&drv_can->device, &drv_can->device.config); + } + break; + case RT_CAN_CMD_SET_PRIV: + argval = (rt_uint32_t)arg; + if (argval != RT_CAN_MODE_PRIV && + argval != RT_CAN_MODE_NOPRIV) + { + return -RT_ERROR; + } + if (argval != drv_can->device.config.privmode) + { + drv_can->device.config.privmode = argval; + return _can_config(&drv_can->device, &drv_can->device.config); + } + break; + case RT_CAN_CMD_GET_STATUS: + { + rt_uint32_t errtype; + errtype = drv_can->CANx->ESTS; + drv_can->device.status.rcverrcnt = errtype >> 24; + drv_can->device.status.snderrcnt = (errtype >> 16 & 0xFF); + drv_can->device.status.lasterrtype = errtype & 0x70; + drv_can->device.status.errcode = errtype & 0x07; + + rt_memcpy(arg, &drv_can->device.status, sizeof(drv_can->device.status)); + } + break; + } + + return RT_EOK; +} + +/* CAN Mailbox Transmit Request */ +#define TMIDxR_TXRQ ((uint32_t)0x00000001) /* Transmit mailbox request */ + +static int _can_sendmsg_rtmsg(CAN_Module *CANx, struct rt_can_msg *pmsg, uint32_t mailbox_index) +{ + CanTxMessage CAN_TxMessage = {0}; + CanTxMessage *TxMessage = &CAN_TxMessage; + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + + if (RT_CAN_STDID == pmsg->ide) + { + TxMessage->IDE = CAN_Standard_Id; + RT_ASSERT(IS_CAN_STDID(pmsg->id)); + TxMessage->StdId = pmsg->id; + } + else + { + TxMessage->IDE = CAN_Extended_Id; + RT_ASSERT(IS_CAN_EXTID(pmsg->id)); + TxMessage->ExtId = pmsg->id; + } + + if (RT_CAN_DTR == pmsg->rtr) + { + TxMessage->RTR = CAN_RTRQ_DATA; + } + else + { + TxMessage->RTR = CAN_RTRQ_REMOTE; + } + + if (mailbox_index != CAN_TxSTS_NoMailBox) + { + /* Set up the Id */ + CANx->sTxMailBox[mailbox_index].TMI &= TMIDxR_TXRQ; + if (TxMessage->IDE == CAN_Standard_Id) + { + assert_param(IS_CAN_STDID(TxMessage->StdId)); + CANx->sTxMailBox[mailbox_index].TMI |= ((TxMessage->StdId << 21) | TxMessage->RTR); + } + else + { + assert_param(IS_CAN_EXTID(TxMessage->ExtId)); + CANx->sTxMailBox[mailbox_index].TMI |= ((TxMessage->ExtId << 3) | TxMessage->IDE | TxMessage->RTR); + } + + /* Set up the DLC */ + TxMessage->DLC = pmsg->len & 0x0FU; + CANx->sTxMailBox[mailbox_index].TMDT &= (uint32_t)0xFFFFFFF0; + CANx->sTxMailBox[mailbox_index].TMDT |= TxMessage->DLC; + + /* Set up the data field */ + CANx->sTxMailBox[mailbox_index].TMDH = + (((uint32_t)pmsg->data[7] << 24) | + ((uint32_t)pmsg->data[6] << 16) | + ((uint32_t)pmsg->data[5] << 8) | + ((uint32_t)pmsg->data[4])); + CANx->sTxMailBox[mailbox_index].TMDL = + (((uint32_t)pmsg->data[3] << 24) | + ((uint32_t)pmsg->data[2] << 16) | + ((uint32_t)pmsg->data[1] << 8) | + ((uint32_t)pmsg->data[0])); + /* Request transmission */ + CANx->sTxMailBox[mailbox_index].TMI |= TMIDxR_TXRQ; + + return RT_EOK; + } + return -RT_ERROR; +} + +static int _can_sendmsg(struct rt_can_device *can, const void *buf, rt_uint32_t box_num) +{ + struct n32g45x_can *drv_can; + + RT_ASSERT(can != RT_NULL); + RT_ASSERT(buf != RT_NULL); + drv_can = (struct n32g45x_can *)can->parent.user_data; + RT_ASSERT(drv_can != RT_NULL); + + /* Select one empty transmit mailbox */ + switch (box_num) + { + case 0: + if ((drv_can->CANx->TSTS & CAN_TSTS_TMEM0) != CAN_TSTS_TMEM0) + { + /* Return function status */ + return -RT_ERROR; + } + break; + case 1: + if ((drv_can->CANx->TSTS & CAN_TSTS_TMEM1) != CAN_TSTS_TMEM1) + { + /* Return function status */ + return -RT_ERROR; + } + break; + case 2: + if ((drv_can->CANx->TSTS & CAN_TSTS_TMEM2) != CAN_TSTS_TMEM2) + { + /* Return function status */ + return -RT_ERROR; + } + break; + default: + RT_ASSERT(0); + break; + } + //start send msg + return _can_sendmsg_rtmsg(drv_can->CANx, ((struct rt_can_msg *)buf), box_num); +} + +static int _can_recvmsg_rtmsg(CAN_Module *CANx, struct rt_can_msg *pmsg, uint32_t FIFONum) +{ + CanRxMessage CAN_RxMessage = {0}; + CanRxMessage *RxMessage = &CAN_RxMessage; + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + assert_param(IS_CAN_FIFO(FIFONum)); + + /* Check the Rx FIFO */ + if (FIFONum == CAN_FIFO0) /* Rx element is assigned to Rx FIFO 0 */ + { + /* Check that the Rx FIFO 0 is not empty */ + if ((CANx->RFF0 & CAN_RFF0_FFMP0) == 0U) + { + return -RT_ERROR; + } + } + else /* Rx element is assigned to Rx FIFO 1 */ + { + /* Check that the Rx FIFO 1 is not empty */ + if ((CANx->RFF1 & CAN_RFF1_FFMP1) == 0U) + { + return -RT_ERROR; + } + } + + /* Get the Id */ + RxMessage->IDE = (uint8_t)0x04 & CANx->sFIFOMailBox[FIFONum].RMI; + if (RxMessage->IDE == CAN_Standard_Id) + { + RxMessage->StdId = (uint32_t)0x000007FF & (CANx->sFIFOMailBox[FIFONum].RMI >> 21); + } + else + { + RxMessage->ExtId = (uint32_t)0x1FFFFFFF & (CANx->sFIFOMailBox[FIFONum].RMI >> 3); + } + RxMessage->RTR = (uint8_t)0x02 & CANx->sFIFOMailBox[FIFONum].RMI; + /* Get the DLC */ + RxMessage->DLC = (uint8_t)0x0F & CANx->sFIFOMailBox[FIFONum].RMDT; + /* Get the FMI */ + RxMessage->FMI = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONum].RMDT >> 8); + + /* Get the data field */ + pmsg->data[0] = (uint8_t)0xFF & CANx->sFIFOMailBox[FIFONum].RMDL; + pmsg->data[1] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONum].RMDL >> 8); + pmsg->data[2] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONum].RMDL >> 16); + pmsg->data[3] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONum].RMDL >> 24); + pmsg->data[4] = (uint8_t)0xFF & CANx->sFIFOMailBox[FIFONum].RMDH; + pmsg->data[5] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONum].RMDH >> 8); + pmsg->data[6] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONum].RMDH >> 16); + pmsg->data[7] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONum].RMDH >> 24); + + /* get len */ + pmsg->len = RxMessage->DLC; + + /* get id */ + if (RxMessage->IDE == CAN_Standard_Id) + { + pmsg->ide = RT_CAN_STDID; + pmsg->id = RxMessage->StdId; + } + else + { + pmsg->ide = RT_CAN_EXTID; + pmsg->id = RxMessage->ExtId; + } + /* get type */ + if (CAN_RTRQ_Data == RxMessage->RTR) + { + pmsg->rtr = RT_CAN_DTR; + } + else + { + pmsg->rtr = RT_CAN_RTR; + } + + /* get hdr */ + if (CANx == CAN1) + { + pmsg->hdr = (RxMessage->FMI + 1) >> 1; + } +#ifdef CAN2 + else if (CANx == CAN2) + { + pmsg->hdr = (RxMessage->FMI >> 1) + 14; + } +#endif + /* Release the DATFIFO */ + /* Release FIFO0 */ + if (FIFONum == CAN_FIFO0) + { + CANx->RFF0 |= CAN_RFF0_RFFOM0; + } + /* Release FIFO1 */ + else /* FIFONum == CAN_FIFO1 */ + { + CANx->RFF1 |= CAN_RFF1_RFFOM1; + } + return RT_EOK; +} + +static int _can_recvmsg(struct rt_can_device *can, void *buf, rt_uint32_t fifo) +{ + struct n32g45x_can *drv_can; + + RT_ASSERT(can != RT_NULL); + RT_ASSERT(buf != RT_NULL); + drv_can = (struct n32g45x_can *)can->parent.user_data; + RT_ASSERT(drv_can != RT_NULL); + + /* get data */ + return _can_recvmsg_rtmsg(drv_can->CANx, ((struct rt_can_msg *)buf), fifo); +} + +static const struct rt_can_ops _can_ops = + { + _can_config, + _can_control, + _can_sendmsg, + _can_recvmsg, +}; + +static void _can_rx_isr(struct rt_can_device *can, rt_uint32_t fifo) +{ + struct n32g45x_can *drv_can; + RT_ASSERT(can != RT_NULL); + drv_can = (struct n32g45x_can *)can->parent.user_data; + RT_ASSERT(drv_can != RT_NULL); + + switch (fifo) + { + case CAN_FIFO0: + /* save to user list */ + if (CAN_GetFlagSTS(drv_can->CANx, CAN_FLAG_FFMP0) && CAN_PendingMessage(drv_can->CANx, CAN_FIFO0)) + { + rt_hw_can_isr(can, RT_CAN_EVENT_RX_IND | fifo << 8); + } + /* Check FULL flag for FIFO0 */ + if (CAN_GetFlagSTS(drv_can->CANx, CAN_FLAG_FFULL0)) + { + /* Clear FIFO0 FULL Flag */ + CAN_ClearFlag(drv_can->CANx, CAN_FLAG_FFULL0); + } + /* Check Overrun flag for FIFO0 */ + if (CAN_GetFlagSTS(drv_can->CANx, CAN_FLAG_FFOVR0)) + { + /* Clear FIFO0 Overrun Flag */ + CAN_ClearFlag(drv_can->CANx, CAN_FLAG_FFOVR0); + rt_hw_can_isr(can, RT_CAN_EVENT_RXOF_IND | fifo << 8); + } + break; + case CAN_FIFO1: + /* save to user list */ + if (CAN_GetFlagSTS(drv_can->CANx, CAN_FLAG_FFMP1) && CAN_PendingMessage(drv_can->CANx, CAN_FIFO1)) + { + rt_hw_can_isr(can, RT_CAN_EVENT_RX_IND | fifo << 8); + } + /* Check FULL flag for FIFO1 */ + if (CAN_GetFlagSTS(drv_can->CANx, CAN_FLAG_FFULL1)) + { + /* Clear FIFO1 FULL Flag */ + CAN_ClearFlag(drv_can->CANx, CAN_FLAG_FFULL1); + } + /* Check Overrun flag for FIFO1 */ + if (CAN_GetFlagSTS(drv_can->CANx, CAN_FLAG_FFOVR1)) + { + /* Clear FIFO1 Overrun Flag */ + CAN_ClearFlag(drv_can->CANx, CAN_FLAG_FFOVR1); + rt_hw_can_isr(can, RT_CAN_EVENT_RXOF_IND | fifo << 8); + } + break; + } +} + +#ifdef BSP_USING_CAN1 +/** + * @brief This function handles CAN1 TX interrupts. transmit fifo0/1/2 is empty can trigger this interrupt + */ +#define CAN1_TX_IRQHandler USB_HP_CAN1_TX_IRQHandler +void CAN1_TX_IRQHandler(void) +{ + rt_interrupt_enter(); + if (CAN_GetFlagSTS(drv_can1.CANx, CAN_FLAG_RQCPM0)) + { + rt_hw_can_isr(&drv_can1.device, RT_CAN_EVENT_TX_DONE | (0x00 << 8)); + CAN_ClearFlag(drv_can1.CANx, CAN_FLAG_RQCPM0); + } + if (CAN_GetFlagSTS(drv_can1.CANx, CAN_FLAG_RQCPM1)) + { + rt_hw_can_isr(&drv_can1.device, RT_CAN_EVENT_TX_DONE | (0x01 << 8)); + CAN_ClearFlag(drv_can1.CANx, CAN_FLAG_RQCPM1); + } + if (CAN_GetFlagSTS(drv_can1.CANx, CAN_FLAG_RQCPM2)) + { + rt_hw_can_isr(&drv_can1.device, RT_CAN_EVENT_TX_DONE | (0x02 << 8)); + CAN_ClearFlag(drv_can1.CANx, CAN_FLAG_RQCPM2); + } + rt_interrupt_leave(); +} + +/** + * @brief This function handles CAN1 RX0 interrupts. + */ +#define CAN1_RX0_IRQHandler USB_LP_CAN1_RX0_IRQHandler +void CAN1_RX0_IRQHandler(void) +{ + rt_interrupt_enter(); + _can_rx_isr(&drv_can1.device, CAN_FIFO0); + rt_interrupt_leave(); +} + +/** + * @brief This function handles CAN1 RX1 interrupts. + */ +void CAN1_RX1_IRQHandler(void) +{ + rt_interrupt_enter(); + _can_rx_isr(&drv_can1.device, CAN_FIFO1); + rt_interrupt_leave(); +} + +/** + * @brief This function handles CAN1 SCE interrupts. + */ +void CAN1_SCE_IRQHandler(void) +{ + uint32_t errtype; + rt_interrupt_enter(); + + if (CAN_GetIntStatus(drv_can1.CANx, CAN_INT_ERR)) + { + errtype = drv_can1.CANx->ESTS; + // ESTS -> LEC + switch ((errtype & 0x70) >> 4) + { + case RT_CAN_BUS_BIT_PAD_ERR: + break; + case RT_CAN_BUS_FORMAT_ERR: + drv_can1.device.status.formaterrcnt++; + break; + case RT_CAN_BUS_ACK_ERR: /* attention !!! test ack err's unit is transmit unit */ + drv_can1.device.status.ackerrcnt++; + if (!READ_BIT(drv_can1.CANx->TSTS, CAN_TSTS_TXOKM0)) + rt_hw_can_isr(&drv_can1.device, RT_CAN_EVENT_TX_FAIL | 0 << 8); + else if (!READ_BIT(drv_can1.CANx->TSTS, CAN_TSTS_TXOKM1)) + rt_hw_can_isr(&drv_can1.device, RT_CAN_EVENT_TX_FAIL | 1 << 8); + else if (!READ_BIT(drv_can1.CANx->TSTS, CAN_TSTS_TXOKM2)) + rt_hw_can_isr(&drv_can1.device, RT_CAN_EVENT_TX_FAIL | 2 << 8); + break; + case RT_CAN_BUS_IMPLICIT_BIT_ERR: + case RT_CAN_BUS_EXPLICIT_BIT_ERR: + drv_can1.device.status.biterrcnt++; + break; + case RT_CAN_BUS_CRC_ERR: + drv_can1.device.status.crcerrcnt++; + break; + } + drv_can1.device.status.lasterrtype = errtype & 0x70; + drv_can1.device.status.rcverrcnt = errtype >> 24; + drv_can1.device.status.snderrcnt = (errtype >> 16 & 0xFF); + drv_can1.device.status.errcode = errtype & 0x07; + + CAN_ClearINTPendingBit(drv_can1.CANx, CAN_INT_ERR); + } + rt_interrupt_leave(); +} +#endif /* BSP_USING_CAN1 */ + +#ifdef BSP_USING_CAN2 +/** + * @brief This function handles CAN2 TX interrupts. + */ +void CAN2_TX_IRQHandler(void) +{ + rt_interrupt_enter(); + if (CAN_GetFlagSTS(drv_can2.CANx, CAN_FLAG_RQCPM0)) + { + CAN_ClearFlag(drv_can2.CANx, CAN_FLAG_RQCPM0); + rt_hw_can_isr(&drv_can2.device, RT_CAN_EVENT_TX_DONE | (0x00 << 8)); + } + if (CAN_GetFlagSTS(drv_can2.CANx, CAN_FLAG_RQCPM1)) + { + CAN_ClearFlag(drv_can2.CANx, CAN_FLAG_RQCPM1); + rt_hw_can_isr(&drv_can2.device, RT_CAN_EVENT_TX_DONE | (0x01 << 8)); + } + if (CAN_GetFlagSTS(drv_can2.CANx, CAN_FLAG_RQCPM2)) + { + CAN_ClearFlag(drv_can2.CANx, CAN_FLAG_RQCPM2); + rt_hw_can_isr(&drv_can2.device, RT_CAN_EVENT_TX_DONE | (0x02 << 8)); + } + rt_interrupt_leave(); +} + +/** + * @brief This function handles CAN2 RX0 interrupts. + */ +void CAN2_RX0_IRQHandler(void) +{ + rt_interrupt_enter(); + _can_rx_isr(&drv_can2.device, CAN_FIFO0); + rt_interrupt_leave(); +} + +/** + * @brief This function handles CAN2 RX1 interrupts. + */ +void CAN2_RX1_IRQHandler(void) +{ + rt_interrupt_enter(); + _can_rx_isr(&drv_can2.device, CAN_FIFO1); + rt_interrupt_leave(); +} + +/** + * @brief This function handles CAN2 SCE interrupts. + */ +void CAN2_SCE_IRQHandler(void) +{ + uint32_t errtype; + rt_interrupt_enter(); + + if (CAN_GetIntStatus(drv_can2.CANx, CAN_INT_ERR)) + { + errtype = drv_can2.CANx->ESTS; + // ESTS -> LEC + switch ((errtype & 0x70) >> 4) + { + case RT_CAN_BUS_BIT_PAD_ERR: + break; + case RT_CAN_BUS_FORMAT_ERR: + drv_can2.device.status.formaterrcnt++; + break; + case RT_CAN_BUS_ACK_ERR: /* attention !!! test ack err's unit is transmit unit */ + drv_can2.device.status.ackerrcnt++; + if (!READ_BIT(drv_can2.CANx->TSTS, CAN_TSTS_TXOKM0)) + rt_hw_can_isr(&drv_can2.device, RT_CAN_EVENT_TX_FAIL | 0 << 8); + else if (!READ_BIT(drv_can2.CANx->TSTS, CAN_TSTS_TXOKM1)) + rt_hw_can_isr(&drv_can2.device, RT_CAN_EVENT_TX_FAIL | 1 << 8); + else if (!READ_BIT(drv_can2.CANx->TSTS, CAN_TSTS_TXOKM2)) + rt_hw_can_isr(&drv_can2.device, RT_CAN_EVENT_TX_FAIL | 2 << 8); + break; + case RT_CAN_BUS_IMPLICIT_BIT_ERR: + case RT_CAN_BUS_EXPLICIT_BIT_ERR: + drv_can2.device.status.biterrcnt++; + break; + case RT_CAN_BUS_CRC_ERR: + drv_can2.device.status.crcerrcnt++; + break; + } + + drv_can2.device.status.lasterrtype = errtype & 0x70; + drv_can2.device.status.rcverrcnt = errtype >> 24; + drv_can2.device.status.snderrcnt = (errtype >> 16 & 0xFF); + drv_can2.device.status.errcode = errtype & 0x07; + + CAN_ClearINTPendingBit(drv_can2.CANx, CAN_INT_ERR); + } + rt_interrupt_leave(); +} +#endif /* BSP_USING_CAN2 */ + +int rt_hw_can_init(void) +{ + struct can_configure config = CANDEFAULTCONFIG; + config.privmode = RT_CAN_MODE_NOPRIV; + config.ticks = 50; +#ifdef RT_CAN_USING_HDR + config.maxhdr = 14; +#ifdef CAN2 + config.maxhdr = 28; +#endif +#endif + +#ifdef BSP_USING_CAN1 + /* config default filter */ + drv_can1.can_filter_init.Filter_Num = 0; + drv_can1.can_filter_init.Filter_Mode = CAN_Filter_IdMaskMode; + drv_can1.can_filter_init.Filter_Scale = CAN_Filter_32bitScale; + drv_can1.can_filter_init.Filter_HighId = 0x0000; + drv_can1.can_filter_init.Filter_LowId = 0x0000; + drv_can1.can_filter_init.FilterMask_HighId = 0; + drv_can1.can_filter_init.FilterMask_LowId = 0; + drv_can1.can_filter_init.Filter_FIFOAssignment = CAN_FIFO0; + drv_can1.can_filter_init.Filter_Act = ENABLE; + drv_can1.device.config = config; + /* register CAN1 device */ + rt_hw_can_register(&drv_can1.device, drv_can1.name, &_can_ops, &drv_can1); +#endif /* BSP_USING_CAN1 */ + +#ifdef BSP_USING_CAN2 + /* config default filter */ + drv_can2.can_filter_init.Filter_Num = 0; + drv_can2.can_filter_init.Filter_Mode = CAN_Filter_IdMaskMode; + drv_can2.can_filter_init.Filter_Scale = CAN_Filter_32bitScale; + drv_can2.can_filter_init.Filter_HighId = 0x0000; + drv_can2.can_filter_init.Filter_LowId = 0x0000; + drv_can2.can_filter_init.FilterMask_HighId = 0; + drv_can2.can_filter_init.FilterMask_LowId = 0; + drv_can2.can_filter_init.Filter_FIFOAssignment = CAN_FIFO0; + drv_can2.can_filter_init.Filter_Act = ENABLE; + drv_can2.device.config = config; + /* register CAN2 device */ + rt_hw_can_register(&drv_can2.device, drv_can2.name, &_can_ops, &drv_can2); +#endif /* BSP_USING_CAN2 */ + + return 0; +} + +INIT_BOARD_EXPORT(rt_hw_can_init); + +#endif /* BSP_USING_CAN */ + +/************************** end of file ******************/ diff --git a/bsp/n32g452xx/Libraries/rt_drivers/drv_can.h b/bsp/n32g452xx/Libraries/rt_drivers/drv_can.h new file mode 100644 index 0000000000..9c3c65932d --- /dev/null +++ b/bsp/n32g452xx/Libraries/rt_drivers/drv_can.h @@ -0,0 +1,31 @@ +/* + * Copyright (c) 2006-2022, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2022-01-09 chenbin the first version + */ + +#ifndef __DRV_CAN_H__ +#define __DRV_CAN_H__ + +#ifdef __cplusplus +extern "C" +{ +#endif + +#include <board.h> +#include <rtdevice.h> +#include <rtthread.h> + + int rt_hw_can_init(void); + +#ifdef __cplusplus +} +#endif + +#endif /*__DRV_CAN_H__ */ + +/************************** end of file ******************/ diff --git a/bsp/n32g452xx/Libraries/rt_drivers/drv_gpio.c b/bsp/n32g452xx/Libraries/rt_drivers/drv_gpio.c index 56cdfadf6c..eece7aa780 100644 --- a/bsp/n32g452xx/Libraries/rt_drivers/drv_gpio.c +++ b/bsp/n32g452xx/Libraries/rt_drivers/drv_gpio.c @@ -15,14 +15,16 @@ #ifdef RT_USING_PIN -#define N32G45X_PIN_NUMBERS 64 //[48, 64, 100, 144 ] +#ifndef N32G45X_PIN_NUMBERS + #define N32G45X_PIN_NUMBERS 64//[48, 64, 80, 100, 128 ] +#endif #define __N32_PIN(index, rcc, gpio, gpio_index) \ { \ 0, RCC_##rcc##_PERIPH_GPIO##gpio, GPIO##gpio, GPIO_PIN_##gpio_index \ -, GPIO##gpio##_PORT_SOURCE, GPIO_PIN_SOURCE##gpio_index \ +, GPIO##gpio##_PORT_SOURCE, GPIO_PIN_SOURCE##gpio_index, "P" #gpio "." #gpio_index \ } -#define __N32_PIN_DEFAULT {-1, 0, 0, 0, 0, 0} +#define __N32_PIN_DEFAULT {-1, 0, 0, 0, 0, 0, ""} /* N32 GPIO driver */ struct pin_index @@ -33,6 +35,7 @@ struct pin_index uint32_t pin; uint8_t port_source; uint8_t pin_source; + const char* name; }; static const struct pin_index pins[] = @@ -87,16 +90,15 @@ static const struct pin_index pins[] = __N32_PIN(46, APB2, B, 9), __N32_PIN_DEFAULT, __N32_PIN_DEFAULT, - -#endif -#if (N32G45X_PIN_NUMBERS == 64) + #endif + #if (N32G45X_PIN_NUMBERS == 64) __N32_PIN_DEFAULT, __N32_PIN_DEFAULT, __N32_PIN(2, APB2, C, 13), __N32_PIN(3, APB2, C, 14), __N32_PIN(4, APB2, C, 15), - __N32_PIN(5, APB2, D, 0), - __N32_PIN(6, APB2, D, 1), + __N32_PIN_DEFAULT, + __N32_PIN_DEFAULT, __N32_PIN_DEFAULT, __N32_PIN(8, APB2, C, 0), __N32_PIN(9, APB2, C, 1), @@ -155,6 +157,89 @@ static const struct pin_index pins[] = __N32_PIN(62, APB2, B, 9), __N32_PIN_DEFAULT, __N32_PIN_DEFAULT, + #endif + #if (N32G45X_PIN_NUMBERS == 80) + __N32_PIN_DEFAULT, + __N32_PIN(1, APB2, E, 2), + __N32_PIN(2, APB2, E, 3), + __N32_PIN_DEFAULT, + __N32_PIN(4, APB2, C, 13), + __N32_PIN(5, APB2, C, 14), + __N32_PIN(6, APB2, C, 15), + __N32_PIN_DEFAULT, + __N32_PIN_DEFAULT, + __N32_PIN_DEFAULT, + __N32_PIN(10, APB2, C, 0), + __N32_PIN(11, APB2, C, 1), + __N32_PIN(12, APB2, C, 2), + __N32_PIN(13, APB2, C, 3), + __N32_PIN_DEFAULT, + __N32_PIN_DEFAULT, + __N32_PIN(16, APB2, A, 0), + __N32_PIN(17, APB2, A, 1), + __N32_PIN(18, APB2, A, 2), + __N32_PIN(19, APB2, A, 3), + __N32_PIN_DEFAULT, + __N32_PIN_DEFAULT, + __N32_PIN(22, APB2, A, 4), + __N32_PIN(23, APB2, A, 5), + __N32_PIN(24, APB2, A, 6), + __N32_PIN(25, APB2, A, 7), + __N32_PIN(26, APB2, C, 4), + __N32_PIN(27, APB2, C, 5), + __N32_PIN(28, APB2, B, 0), + __N32_PIN(29, APB2, B, 1), + __N32_PIN(30, APB2, B, 2), + __N32_PIN(31, APB2, E, 7), + __N32_PIN(32, APB2, E, 8), + __N32_PIN(33, APB2, E, 9), + __N32_PIN(34, APB2, E, 10), + __N32_PIN(35, APB2, E, 11), + __N32_PIN(36, APB2, E, 12), + __N32_PIN(37, APB2, E, 13), + __N32_PIN(38, APB2, B, 10), + __N32_PIN(39, APB2, B, 11), + __N32_PIN_DEFAULT, + __N32_PIN_DEFAULT, + __N32_PIN(42, APB2, B, 12), + __N32_PIN(43, APB2, B, 13), + __N32_PIN(44, APB2, B, 14), + __N32_PIN(45, APB2, B, 15), + __N32_PIN(46, APB2, D, 8), + __N32_PIN(47, APB2, D, 9), + __N32_PIN(48, APB2, D, 10), + __N32_PIN(49, APB2, D, 14), + __N32_PIN(50, APB2, D, 15), + __N32_PIN(51, APB2, C, 6), + __N32_PIN(52, APB2, C, 7), + __N32_PIN(53, APB2, C, 8), + __N32_PIN(54, APB2, C, 9), + __N32_PIN(55, APB2, A, 8), + __N32_PIN(56, APB2, A, 9), + __N32_PIN(57, APB2, A, 10), + __N32_PIN(58, APB2, A, 11), + __N32_PIN(59, APB2, A, 12), + __N32_PIN(60, APB2, A, 13), + __N32_PIN_DEFAULT, + __N32_PIN_DEFAULT, + __N32_PIN(63, APB2, A, 14), + __N32_PIN(64, APB2, A, 15), + __N32_PIN(65, APB2, C, 10), + __N32_PIN(66, APB2, C, 11), + __N32_PIN(67, APB2, C, 12), + __N32_PIN(68, APB2, D, 0), + __N32_PIN(69, APB2, D, 1), + __N32_PIN(70, APB2, D, 2), + __N32_PIN(71, APB2, B, 3), + __N32_PIN(72, APB2, B, 4), + __N32_PIN(73, APB2, B, 5), + __N32_PIN(74, APB2, B, 6), + __N32_PIN(75, APB2, B, 7), + __N32_PIN_DEFAULT, + __N32_PIN(77, APB2, B, 8), + __N32_PIN(78, APB2, B, 9), + __N32_PIN_DEFAULT, + __N32_PIN_DEFAULT, #endif #if (N32G45X_PIN_NUMBERS == 100) __N32_PIN_DEFAULT, @@ -258,8 +343,8 @@ static const struct pin_index pins[] = __N32_PIN(98, APB2, E, 1), __N32_PIN_DEFAULT, __N32_PIN_DEFAULT, -#endif -#if (N32G45X_PIN_NUMBERS == 144) + #endif + #if (N32G45X_PIN_NUMBERS == 128) __N32_PIN_DEFAULT, __N32_PIN(1, APB2, E, 2), __N32_PIN(2, APB2, E, 3), @@ -270,7 +355,6 @@ static const struct pin_index pins[] = __N32_PIN(7, APB2, C, 13), __N32_PIN(8, APB2, C, 14), __N32_PIN(9, APB2, C, 15), - __N32_PIN(10, APB2, F, 0), __N32_PIN(11, APB2, F, 1), __N32_PIN(12, APB2, F, 2), @@ -279,131 +363,115 @@ static const struct pin_index pins[] = __N32_PIN(15, APB2, F, 5), __N32_PIN_DEFAULT, __N32_PIN_DEFAULT, - __N32_PIN(18, APB2, F, 6), - __N32_PIN(19, APB2, F, 7), - __N32_PIN(20, APB2, F, 8), - __N32_PIN(21, APB2, F, 9), - __N32_PIN(22, APB2, F, 10), __N32_PIN_DEFAULT, __N32_PIN_DEFAULT, __N32_PIN_DEFAULT, - __N32_PIN(26, APB2, C, 0), - __N32_PIN(27, APB2, C, 1), - __N32_PIN(28, APB2, C, 2), - __N32_PIN(29, APB2, C, 3), + __N32_PIN(21, APB2, C, 0), + __N32_PIN(22, APB2, C, 1), + __N32_PIN(23, APB2, C, 2), + __N32_PIN(24, APB2, C, 3), __N32_PIN_DEFAULT, __N32_PIN_DEFAULT, __N32_PIN_DEFAULT, __N32_PIN_DEFAULT, - __N32_PIN(34, APB2, A, 0), - __N32_PIN(35, APB2, A, 1), - __N32_PIN(36, APB2, A, 2), - __N32_PIN(37, APB2, A, 3), + __N32_PIN(29, APB2, A, 0), + __N32_PIN(30, APB2, A, 1), + __N32_PIN(31, APB2, A, 2), + __N32_PIN(32, APB2, A, 3), __N32_PIN_DEFAULT, __N32_PIN_DEFAULT, - __N32_PIN(40, APB2, A, 4), - __N32_PIN(41, APB2, A, 5), - __N32_PIN(42, APB2, A, 6), - __N32_PIN(43, APB2, A, 7), - __N32_PIN(44, APB2, C, 4), - __N32_PIN(45, APB2, C, 5), - __N32_PIN(46, APB2, B, 0), - __N32_PIN(47, APB2, B, 1), - __N32_PIN(48, APB2, B, 2), - __N32_PIN(49, APB2, F, 11), - __N32_PIN(50, APB2, F, 12), + __N32_PIN(35, APB2, A, 4), + __N32_PIN(36, APB2, A, 5), + __N32_PIN(37, APB2, A, 6), + __N32_PIN(38, APB2, A, 7), + __N32_PIN(39, APB2, C, 4), + __N32_PIN(40, APB2, C, 5), + __N32_PIN(41, APB2, B, 0), + __N32_PIN(42, APB2, B, 1), + __N32_PIN(43, APB2, B, 2), __N32_PIN_DEFAULT, __N32_PIN_DEFAULT, - __N32_PIN(53, APB2, F, 13), - __N32_PIN(54, APB2, F, 14), - __N32_PIN(55, APB2, F, 15), - __N32_PIN(56, APB2, G, 0), - __N32_PIN(57, APB2, G, 1), - __N32_PIN(58, APB2, E, 7), - __N32_PIN(59, APB2, E, 8), - __N32_PIN(60, APB2, E, 9), + __N32_PIN(46, APB2, F, 12), + __N32_PIN(47, APB2, F, 13), + __N32_PIN(48, APB2, F, 14), + __N32_PIN(49, APB2, F, 15), + __N32_PIN(50, APB2, E, 7), + __N32_PIN(51, APB2, E, 8), + __N32_PIN(52, APB2, E, 9), __N32_PIN_DEFAULT, __N32_PIN_DEFAULT, - __N32_PIN(63, APB2, E, 10), - __N32_PIN(64, APB2, E, 11), - __N32_PIN(65, APB2, E, 12), - __N32_PIN(66, APB2, E, 13), - __N32_PIN(67, APB2, E, 14), - __N32_PIN(68, APB2, E, 15), - __N32_PIN(69, APB2, B, 10), - __N32_PIN(70, APB2, B, 11), + __N32_PIN(55, APB2, E, 10), + __N32_PIN(56, APB2, E, 11), + __N32_PIN(57, APB2, E, 12), + __N32_PIN(58, APB2, E, 13), + __N32_PIN(59, APB2, E, 14), + __N32_PIN(60, APB2, E, 15), + __N32_PIN(61, APB2, B, 10), + __N32_PIN(62, APB2, B, 11), __N32_PIN_DEFAULT, __N32_PIN_DEFAULT, - __N32_PIN(73, APB2, B, 12), - __N32_PIN(74, APB2, B, 13), - __N32_PIN(75, APB2, B, 14), - __N32_PIN(76, APB2, B, 15), - __N32_PIN(77, APB2, D, 8), - __N32_PIN(78, APB2, D, 9), - __N32_PIN(79, APB2, D, 10), - __N32_PIN(80, APB2, D, 11), - __N32_PIN(81, APB2, D, 12), - __N32_PIN(82, APB2, D, 13), + __N32_PIN(65, APB2, B, 12), + __N32_PIN(66, APB2, B, 13), + __N32_PIN(67, APB2, B, 14), + __N32_PIN(68, APB2, B, 15), + __N32_PIN(69, APB2, D, 8), + __N32_PIN(70, APB2, D, 9), + __N32_PIN(71, APB2, D, 10), + __N32_PIN(72, APB2, D, 11), __N32_PIN_DEFAULT, __N32_PIN_DEFAULT, - __N32_PIN(85, APB2, D, 14), - __N32_PIN(86, APB2, D, 15), - __N32_PIN(87, APB2, G, 2), - __N32_PIN(88, APB2, G, 3), - __N32_PIN(89, APB2, G, 4), - __N32_PIN(90, APB2, G, 5), - __N32_PIN(91, APB2, G, 6), - __N32_PIN(92, APB2, G, 7), - __N32_PIN(93, APB2, G, 8), + __N32_PIN(75, APB2, D, 12), + __N32_PIN(76, APB2, D, 13), + __N32_PIN(77, APB2, D, 14), + __N32_PIN(78, APB2, D, 15), + __N32_PIN(79, APB2, G, 0), + __N32_PIN(80, APB2, G, 1), + __N32_PIN(81, APB2, G, 2), + __N32_PIN(82, APB2, G, 3), __N32_PIN_DEFAULT, __N32_PIN_DEFAULT, - __N32_PIN(96, APB2, C, 6), - __N32_PIN(97, APB2, C, 7), - __N32_PIN(98, APB2, C, 8), - __N32_PIN(99, APB2, C, 9), - __N32_PIN(100, APB2, A, 8), - __N32_PIN(101, APB2, A, 9), - __N32_PIN(102, APB2, A, 10), - __N32_PIN(103, APB2, A, 11), - __N32_PIN(104, APB2, A, 12), - __N32_PIN(105, APB2, A, 13), + __N32_PIN(85, APB2, C, 6), + __N32_PIN(86, APB2, C, 7), + __N32_PIN(87, APB2, C, 8), + __N32_PIN(88, APB2, C, 9), + __N32_PIN(89, APB2, A, 8), + __N32_PIN(90, APB2, A, 9), + __N32_PIN(91, APB2, A, 10), + __N32_PIN(92, APB2, A, 11), + __N32_PIN(93, APB2, A, 12), + __N32_PIN(94, APB2, A, 13), __N32_PIN_DEFAULT, __N32_PIN_DEFAULT, + __N32_PIN(97, APB2, A, 14), + __N32_PIN(98, APB2, A, 15), + __N32_PIN(99, APB2, C, 10), + __N32_PIN(100, APB2, C, 11), + __N32_PIN(101, APB2, C, 12), + __N32_PIN(102, APB2, D, 0), + __N32_PIN(103, APB2, D, 1), + __N32_PIN(104, APB2, D, 2), + __N32_PIN(105, APB2, D, 3), + __N32_PIN(106, APB2, D, 4), + __N32_PIN(107, APB2, D, 5), __N32_PIN_DEFAULT, - __N32_PIN(109, APB2, A, 14), - __N32_PIN(110, APB2, A, 15), - __N32_PIN(111, APB2, C, 10), - __N32_PIN(112, APB2, C, 11), - __N32_PIN(113, APB2, C, 12), - __N32_PIN(114, APB2, D, 0), - __N32_PIN(115, APB2, D, 1), - __N32_PIN(116, APB2, D, 2), - __N32_PIN(117, APB2, D, 3), - __N32_PIN(118, APB2, D, 4), - __N32_PIN(119, APB2, D, 5), __N32_PIN_DEFAULT, + __N32_PIN(110, APB2, D, 6), + __N32_PIN(111, APB2, D, 7), + __N32_PIN(112, APB2, G, 4), + __N32_PIN(113, APB2, G, 5), + __N32_PIN(114, APB2, G, 9), __N32_PIN_DEFAULT, - __N32_PIN(122, APB2, D, 6), - __N32_PIN(123, APB2, D, 7), - __N32_PIN(124, APB2, G, 9), - __N32_PIN(125, APB2, G, 10), - __N32_PIN(126, APB2, G, 11), - __N32_PIN(127, APB2, G, 12), - __N32_PIN(128, APB2, G, 13), - __N32_PIN(129, APB2, G, 14), __N32_PIN_DEFAULT, + __N32_PIN(117, APB2, B, 3), + __N32_PIN(118, APB2, B, 4), + __N32_PIN(119, APB2, B, 5), + __N32_PIN(120, APB2, B, 6), + __N32_PIN(121, APB2, B, 7), __N32_PIN_DEFAULT, - __N32_PIN(132, APB2, G, 15), - __N32_PIN(133, APB2, B, 3), - __N32_PIN(134, APB2, B, 4), - __N32_PIN(135, APB2, B, 5), - __N32_PIN(136, APB2, B, 6), - __N32_PIN(137, APB2, B, 7), - __N32_PIN_DEFAULT, - __N32_PIN(139, APB2, B, 8), - __N32_PIN(140, APB2, B, 9), - __N32_PIN(141, APB2, E, 0), - __N32_PIN(142, APB2, E, 1), + __N32_PIN(123, APB2, B, 8), + __N32_PIN(124, APB2, B, 9), + __N32_PIN(125, APB2, E, 0), + __N32_PIN(126, APB2, E, 1), __N32_PIN_DEFAULT, __N32_PIN_DEFAULT, #endif @@ -473,6 +541,23 @@ const struct pin_index *get_pin(uint8_t pin) return index; }; +rt_base_t n32_pin_get(const char *name) +{ + rt_base_t i; + + for (i = 0; i < ITEM_NUM(pins); i++) + { + if (rt_strcmp(pins[i].name, name) == 0) + { + /* in get_pin function, use pin parameter as index of pins array */ + return i; + } + } + + /* refers content of pins array, map to __N32_PIN_DEFAULT */ + return 0; +} + void n32_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value) { const struct pin_index *index; @@ -754,6 +839,7 @@ const static struct rt_pin_ops _n32_pin_ops = n32_pin_attach_irq, n32_pin_dettach_irq, n32_pin_irq_enable, + n32_pin_get }; int n32_hw_pin_init(void) diff --git a/bsp/n32g452xx/Libraries/rt_drivers/drv_pwm.c b/bsp/n32g452xx/Libraries/rt_drivers/drv_pwm.c index 99fd087498..a5dadf573d 100644 --- a/bsp/n32g452xx/Libraries/rt_drivers/drv_pwm.c +++ b/bsp/n32g452xx/Libraries/rt_drivers/drv_pwm.c @@ -212,10 +212,6 @@ static rt_err_t drv_pwm_set(struct n32_pwm *pwm_dev, struct rt_pwm_configuration rt_uint64_t psc; rt_uint32_t pulse; - /* Init timer pin and enable clock */ - void n32_msp_tim_init(void *Instance); - n32_msp_tim_init(TIMx); - RCC_ClocksType RCC_Clock; RCC_GetClocksFreqValue(&RCC_Clock); rt_uint64_t input_clock; @@ -332,6 +328,9 @@ static int rt_hw_pwm_init(void) if (rt_device_pwm_register(&n32_pwm_obj[i].pwm_device, n32_pwm_obj[i].name, &drv_ops, &(n32_pwm_obj[i])) == RT_EOK) { + /* Init timer pin and enable clock */ + void n32_msp_tim_init(void *Instance); + n32_msp_tim_init(n32_pwm_obj[i].tim_handle); } else { diff --git a/bsp/n32g452xx/Libraries/rt_drivers/drv_usart.c b/bsp/n32g452xx/Libraries/rt_drivers/drv_usart.c index 98e0193a77..2f15585970 100644 --- a/bsp/n32g452xx/Libraries/rt_drivers/drv_usart.c +++ b/bsp/n32g452xx/Libraries/rt_drivers/drv_usart.c @@ -477,6 +477,76 @@ void DMA1_Channel8_IRQHandler(void) } #endif /* BSP_USING_UART5 */ +#if defined(BSP_USING_UART6) +/* UART6 device driver structure */ +struct n32_uart uart6 = +{ + UART6, + UART6_IRQn, + { + DMA2_CH1, + DMA2, + DMA2_FLAG_GL1, + DMA2_Channel1_IRQn, + 0, + }, +}; +struct rt_serial_device serial6; + +void UART6_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + uart_isr(&serial6); + /* leave interrupt */ + rt_interrupt_leave(); +} + +void DMA2_Channel1_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + dma_rx_done_isr(&serial6); + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif /* BSP_USING_UART6 */ + +#if defined(BSP_USING_UART7) +/* UART7 device driver structure */ +struct n32_uart uart7 = +{ + UART7, + UART7_IRQn, + { + DMA2_CH6, + DMA2, + DMA2_FLAG_GL6, + DMA2_Channel6_IRQn, + 0, + }, +}; +struct rt_serial_device serial7; + +void UART7_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + uart_isr(&serial7); + /* leave interrupt */ + rt_interrupt_leave(); +} + +void DMA2_Channel6_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + dma_rx_done_isr(&serial7); + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif /* BSP_USING_UART7 */ + static void NVIC_Configuration(struct n32_uart *uart) { NVIC_InitType NVIC_InitStructure; @@ -582,7 +652,7 @@ int rt_hw_usart_init(void) /* register UART3 device */ rt_hw_serial_register(&serial3, "uart3", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | - RT_DEVICE_FLAG_INT_TX | RT_DEVICE_FLAG_DMA_RX, + RT_DEVICE_FLAG_INT_TX | RT_DEVICE_FLAG_DMA_RX, uart); #endif /* BSP_USING_UART3 */ @@ -592,7 +662,7 @@ int rt_hw_usart_init(void) serial4.ops = &n32_uart_ops; serial4.config = config; NVIC_Configuration(uart); - /* register UART3 device */ + /* register UART4 device */ rt_hw_serial_register(&serial4, "uart4", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_INT_TX | RT_DEVICE_FLAG_DMA_RX, @@ -605,12 +675,40 @@ int rt_hw_usart_init(void) serial5.ops = &n32_uart_ops; serial5.config = config; NVIC_Configuration(uart); - /* register UART3 device */ + /* register UART5 device */ rt_hw_serial_register(&serial5, "uart5", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_INT_TX | RT_DEVICE_FLAG_DMA_RX, uart); #endif /* BSP_USING_UART5 */ + + #if defined(BSP_USING_UART6) + uart = &uart6; + config.baud_rate = BAUD_RATE_115200; + serial6.ops = &n32_uart_ops; + serial6.config = config; + NVIC_Configuration(uart); + /* register UART6 device */ + rt_hw_serial_register(&serial6, "uart6", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | + RT_DEVICE_FLAG_INT_TX | RT_DEVICE_FLAG_DMA_RX, + uart); + #endif /* BSP_USING_UART6 */ + + #if defined(BSP_USING_UART7) + uart = &uart7; + config.baud_rate = BAUD_RATE_115200; + serial7.ops = &n32_uart_ops; + serial7.config = config; + NVIC_Configuration(uart); + /* register UART7 device */ + rt_hw_serial_register(&serial7, "uart7", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | + RT_DEVICE_FLAG_INT_TX | RT_DEVICE_FLAG_DMA_RX, + uart); + #endif /* BSP_USING_UART7 */ + + return RT_EOK; } diff --git a/bsp/n32g452xx/n32g452xx-mini-system/.config b/bsp/n32g452xx/n32g452xx-mini-system/.config index 9921e8b35d..d987bd9b79 100644 --- a/bsp/n32g452xx/n32g452xx-mini-system/.config +++ b/bsp/n32g452xx/n32g452xx-mini-system/.config @@ -139,16 +139,16 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64 # CONFIG_RT_USING_I2C is not set # CONFIG_RT_USING_PHY is not set CONFIG_RT_USING_PIN=y -CONFIG_RT_USING_ADC=y +# CONFIG_RT_USING_ADC is not set # CONFIG_RT_USING_DAC is not set -CONFIG_RT_USING_PWM=y +# CONFIG_RT_USING_PWM is not set # CONFIG_RT_USING_MTD_NOR is not set # CONFIG_RT_USING_MTD_NAND is not set # CONFIG_RT_USING_PM is not set # CONFIG_RT_USING_RTC is not set # CONFIG_RT_USING_SDIO is not set # CONFIG_RT_USING_SPI is not set -CONFIG_RT_USING_WDT=y +# CONFIG_RT_USING_WDT is not set # CONFIG_RT_USING_AUDIO is not set # CONFIG_RT_USING_SENSOR is not set # CONFIG_RT_USING_TOUCH is not set @@ -292,7 +292,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_JIOT-C-SDK is not set # CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set # CONFIG_PKG_USING_JOYLINK is not set -# CONFIG_PKG_USING_EZ_IOT_OS is not set # CONFIG_PKG_USING_NIMBLE is not set # CONFIG_PKG_USING_OTA_DOWNLOADER is not set # CONFIG_PKG_USING_IPMSG is not set @@ -326,14 +325,12 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set # CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set # CONFIG_PKG_USING_HM is not set -# CONFIG_PKG_USING_SMALL_MODBUS is not set -# CONFIG_PKG_USING_NET_SERVER is not set # # security packages # # CONFIG_PKG_USING_MBEDTLS is not set -# CONFIG_PKG_USING_LIBSODIUM is not set +# CONFIG_PKG_USING_libsodium is not set # CONFIG_PKG_USING_TINYCRYPT is not set # CONFIG_PKG_USING_TFM is not set # CONFIG_PKG_USING_YD_CRYPTO is not set @@ -341,7 +338,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # # language packages # -# CONFIG_PKG_USING_LUATOS_SOC is not set # CONFIG_PKG_USING_LUA is not set # CONFIG_PKG_USING_JERRYSCRIPT is not set # CONFIG_PKG_USING_MICROPYTHON is not set @@ -354,15 +350,8 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # # LVGL: powerful and easy-to-use embedded GUI library # -# CONFIG_PKG_USING_LVGL is not set # CONFIG_PKG_USING_LITTLEVGL2RTT is not set -# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set - -# -# u8g2: a monochrome graphic library -# -# CONFIG_PKG_USING_U8G2_OFFICIAL is not set -# CONFIG_PKG_USING_U8G2 is not set +# CONFIG_PKG_USING_LVGL is not set # CONFIG_PKG_USING_OPENMV is not set # CONFIG_PKG_USING_MUPDF is not set # CONFIG_PKG_USING_STEMWIN is not set @@ -378,13 +367,10 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_UGUI is not set # -# PainterEngine: A cross-platform graphics application framework written in C language +# u8g2: a monochrome graphic library # -# CONFIG_PKG_USING_PAINTERENGINE is not set -# CONFIG_PKG_USING_PAINTERENGINE_AUX is not set -# CONFIG_PKG_USING_MCURSES is not set -# CONFIG_PKG_USING_TERMBOX is not set -# CONFIG_PKG_USING_VT100 is not set +# CONFIG_PKG_USING_U8G2_OFFICIAL is not set +# CONFIG_PKG_USING_U8G2 is not set # # tools packages @@ -427,40 +413,20 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_MEM_SANDBOX is not set # CONFIG_PKG_USING_SOLAR_TERMS is not set # CONFIG_PKG_USING_GAN_ZHI is not set -# CONFIG_PKG_USING_FDT is not set # # system packages # # -# enhanced kernel services -# -# CONFIG_PKG_USING_RT_MEMCPY_CM is not set -# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set -# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set - -# -# POSIX extension functions -# -# CONFIG_PKG_USING_POSIX_GETLINE is not set -# CONFIG_PKG_USING_POSIX_WCWIDTH is not set -# CONFIG_PKG_USING_POSIX_ITOA is not set - -# # acceleration: Assembly language or algorithmic acceleration packages # +# CONFIG_PKG_USING_RT_MEMCPY_CM is not set # CONFIG_PKG_USING_QFPLIB_M0_FULL is not set # CONFIG_PKG_USING_QFPLIB_M0_TINY is not set # CONFIG_PKG_USING_QFPLIB_M3 is not set # -# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard -# -# CONFIG_PKG_USING_CMSIS_5 is not set -# CONFIG_PKG_USING_CMSIS_RTOS2 is not set - -# # Micrium: Micrium software products porting for RT-Thread # # CONFIG_PKG_USING_UCOSIII_WRAPPER is not set @@ -469,7 +435,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_UC_CLK is not set # CONFIG_PKG_USING_UC_COMMON is not set # CONFIG_PKG_USING_UC_MODBUS is not set -# CONFIG_RT_USING_ARDUINO is not set # CONFIG_PKG_USING_GUIENGINE is not set # CONFIG_PKG_USING_CAIRO is not set # CONFIG_PKG_USING_PIXMAN is not set @@ -478,6 +443,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_FLASHDB is not set # CONFIG_PKG_USING_SQLITE is not set # CONFIG_PKG_USING_RTI is not set +# CONFIG_PKG_USING_CMSIS is not set # CONFIG_PKG_USING_DFS_YAFFS is not set # CONFIG_PKG_USING_LITTLEFS is not set # CONFIG_PKG_USING_DFS_JFFS2 is not set @@ -494,13 +460,14 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_QBOOT is not set # CONFIG_PKG_USING_PPOOL is not set # CONFIG_PKG_USING_OPENAMP is not set +# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set # CONFIG_PKG_USING_LPM is not set # CONFIG_PKG_USING_TLSF is not set # CONFIG_PKG_USING_EVENT_RECORDER is not set # CONFIG_PKG_USING_ARM_2D is not set +# CONFIG_PKG_USING_WCWIDTH is not set # CONFIG_PKG_USING_MCUBOOT is not set # CONFIG_PKG_USING_TINYUSB is not set -# CONFIG_PKG_USING_USB_STACK is not set # # peripheral libraries and drivers @@ -574,11 +541,8 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_BLUETRUM_SDK is not set # CONFIG_PKG_USING_MISAKA_AT24CXX is not set # CONFIG_PKG_USING_MISAKA_RGB_BLING is not set -# CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set # CONFIG_PKG_USING_BL_MCU_SDK is not set # CONFIG_PKG_USING_SOFT_SERIAL is not set -# CONFIG_PKG_USING_MB85RS16 is not set -# CONFIG_PKG_USING_CW2015 is not set # # AI packages @@ -617,7 +581,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_SNAKE is not set # CONFIG_PKG_USING_TETRIS is not set # CONFIG_PKG_USING_DONUT is not set -# CONFIG_PKG_USING_COWSAY is not set # CONFIG_PKG_USING_LIBCSV is not set # CONFIG_PKG_USING_OPTPARSE is not set # CONFIG_PKG_USING_FASTLZ is not set @@ -639,11 +602,14 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_VI is not set # CONFIG_PKG_USING_KI is not set # CONFIG_PKG_USING_ARMv7M_DWT is not set +# CONFIG_PKG_USING_VT100 is not set # CONFIG_PKG_USING_UKAL is not set # CONFIG_PKG_USING_CRCLIB is not set # CONFIG_PKG_USING_LWGPS is not set # CONFIG_PKG_USING_STATE_MACHINE is not set -# CONFIG_PKG_USING_DESIGN_PATTERN is not set +# CONFIG_PKG_USING_MCURSES is not set +# CONFIG_PKG_USING_COWSAY is not set +# CONFIG_PKG_USING_TERMBOX is not set # # Hardware Drivers Config @@ -658,14 +624,31 @@ CONFIG_BSP_USING_UART=y # # On-chip Peripheral Drivers # +# CONFIG_N32G45X_PIN_NUMBERS_48 is not set +CONFIG_N32G45X_PIN_NUMBERS_64=y +# CONFIG_N32G45X_PIN_NUMBERS_100 is not set +# CONFIG_N32G45X_PIN_NUMBERS_128 is not set +CONFIG_N32G45X_PIN_NUMBERS=64 CONFIG_BSP_USING_GPIO=y + +# +# Remap JTAG Port +# +# CONFIG_BSP_RMP_SW_JTAG_FULL_ENABLE is not set +# CONFIG_BSP_RMP_SW_JTAG_NO_NJTRST is not set +CONFIG_BSP_RMP_SW_JTAG_SW_ENABLE=y +# CONFIG_BSP_RMP_SW_JTAG_DISABLE is not set # CONFIG_BSP_USING_ON_CHIP_FLASH is not set # CONFIG_BSP_USING_WDT is not set CONFIG_BSP_USING_UART1=y +# CONFIG_BSP_USING_UART1_PIN_RMP is not set +CONFIG_BSP_USING_UART1_NO_RMP=y # CONFIG_BSP_USING_UART2 is not set # CONFIG_BSP_USING_UART3 is not set # CONFIG_BSP_USING_UART4 is not set # CONFIG_BSP_USING_UART5 is not set +# CONFIG_BSP_USING_UART6 is not set +# CONFIG_BSP_USING_UART7 is not set # CONFIG_BSP_USING_PWM is not set # CONFIG_BSP_USING_HWTIMER is not set # CONFIG_BSP_USING_SPI is not set diff --git a/bsp/n32g452xx/n32g452xx-mini-system/applications/main.c b/bsp/n32g452xx/n32g452xx-mini-system/applications/main.c index 11fdf6f84b..fcb0110413 100644 --- a/bsp/n32g452xx/n32g452xx-mini-system/applications/main.c +++ b/bsp/n32g452xx/n32g452xx-mini-system/applications/main.c @@ -12,19 +12,24 @@ #include <rtdevice.h> /* defined the LED1 pin: PB5 */ -#define LED1_PIN 57 +#define LED1_NAME "PB.5" +rt_base_t led1_pin; int main(void) { uint32_t Speed = 200; + + /* get LED1 pin id by name */ + led1_pin = rt_pin_get(LED1_NAME); + /* set LED1 pin mode to output */ - rt_pin_mode(LED1_PIN, PIN_MODE_OUTPUT); + rt_pin_mode(led1_pin, PIN_MODE_OUTPUT); while (1) { - rt_pin_write(LED1_PIN, PIN_LOW); + rt_pin_write(led1_pin, PIN_LOW); rt_thread_mdelay(Speed); - rt_pin_write(LED1_PIN, PIN_HIGH); + rt_pin_write(led1_pin, PIN_HIGH); rt_thread_mdelay(Speed); } } diff --git a/bsp/n32g452xx/n32g452xx-mini-system/board/Kconfig b/bsp/n32g452xx/n32g452xx-mini-system/board/Kconfig index 0b77f8ca90..59a042bf99 100755 --- a/bsp/n32g452xx/n32g452xx-mini-system/board/Kconfig +++ b/bsp/n32g452xx/n32g452xx-mini-system/board/Kconfig @@ -19,10 +19,49 @@ endmenu menu "On-chip Peripheral Drivers" + choice + prompt "Package of N32G45NXX chip:" + default N32G45X_PIN_NUMBERS_64 + config N32G45X_PIN_NUMBERS_48 + bool "LQFP48/TQFP48(QFN48 is not supported.)" + config N32G45X_PIN_NUMBERS_64 + bool "LQFP64" + config N32G45X_PIN_NUMBERS_100 + bool "LQFP100" + config N32G45X_PIN_NUMBERS_128 + bool "LQFP128" + endchoice + + config N32G45X_PIN_NUMBERS + int + range 0 128 + default 48 if N32G45X_PIN_NUMBERS_48 + default 64 if N32G45X_PIN_NUMBERS_64 + default 100 if N32G45X_PIN_NUMBERS_100 + default 128 if N32G45X_PIN_NUMBERS_128 + + config BSP_USING_GPIO bool "Enable GPIO" select RT_USING_PIN default y + if BSP_USING_GPIO + + menu "Remap JTAG Port" + choice + prompt "Remap JTAG Port" + default BSP_RMP_SW_JTAG_SW_ENABLE + config BSP_RMP_SW_JTAG_FULL_ENABLE + bool "Full SWJ Enabled (JTAG-DP+SW-DP). No GPIO available." + config BSP_RMP_SW_JTAG_NO_NJTRST + bool "Full SWJ Enabled (JTAG-DP+SW-DP) without JTRST. PB4 available." + config BSP_RMP_SW_JTAG_SW_ENABLE + bool "JTAG-DP Disabled and SW-DP Enabled. PA15,PB3,PB4 available." + config BSP_RMP_SW_JTAG_DISABLE + bool "Full SWJ Disabled (JTAG-DP+SW-DP). PA13,PA14,PA15,PB3,PB4 available." + endchoice + endmenu + endif config BSP_USING_ON_CHIP_FLASH bool "Enable on-chip FLASH" @@ -39,25 +78,121 @@ menu "On-chip Peripheral Drivers" select RT_USING_SERIAL if BSP_USING_UART config BSP_USING_UART1 - bool "Enable UART1" + bool "Enable USART1" default y + if BSP_USING_UART1 + choice + prompt "Select TX/RX Pin of USART1" + default BSP_USING_UART1_NO_RMP + config BSP_USING_UART1_PIN_RMP + bool "USART1(Remap):(TX:PB6,RX:PB7)" + config BSP_USING_UART1_NO_RMP + bool "USART1(Default):(TX:PA9,RX:PA10)" + endchoice + endif config BSP_USING_UART2 - bool "Enable UART2" + bool "Enable USART2" default n + if BSP_USING_UART2 + choice + prompt "Select TX/RX Pin of USART2" + default BSP_USING_UART2_NO_RMP + config BSP_USING_UART2_NO_RMP + bool "USART2(Default):(TX:PA2, RX:PA3)" + config BSP_USING_UART2_PIN_RMP1 + bool "USART2:(TX:PD5, RX:PD6)" + config BSP_USING_UART2_PIN_RMP2 + bool "USART2:(TX:PC8, RX:PC9)" + config BSP_USING_UART2_PIN_RMP3 + bool "USART2:(TX:PB4, RX:PB5)" + endchoice + endif + config BSP_USING_UART3 - bool "Enable UART3" + bool "Enable USART3" default n + if BSP_USING_UART3 + choice + prompt "Select TX/RX Pin of USART3" + default BSP_USING_UART3_PIN_NO_RMP + config BSP_USING_UART3_PIN_NO_RMP + bool "USART3:Default (TX:PB10, RX:PB11)" + config BSP_USING_UART3_PIN_PART_RMP + bool "USART3:Partial remap (TX:PC10, RX:PC11)" + config BSP_USING_UART3_PIN_ALL_RMP + bool "USART3:Full remap (TX:PD8, RX:PD9)" + endchoice + endif config BSP_USING_UART4 bool "Enable UART4" default n + if BSP_USING_UART4 + choice + prompt "Select TX/RX Pin of UART4" + default BSP_USING_UART4_PIN_NORMP + config BSP_USING_UART4_PIN_NORMP + bool "UART4(Default):TX:PC10, RX:PC11" + config BSP_USING_UART4_PIN_RMP1 + bool "UART4:TX:PB2, RX:PE7" + config BSP_USING_UART4_PIN_RMP2 + bool "UART4:TX:PA13, RX:PA14" + config BSP_USING_UART4_PIN_RMP3 + bool "UART4:TX:PD0, RX:PD1" + endchoice + endif config BSP_USING_UART5 bool "Enable UART5" default n - + if BSP_USING_UART5 + choice + prompt "Select TX/RX Pin of UART5" + default BSP_USING_UART5_PIN_NORMP + config BSP_USING_UART5_PIN_NORMP + bool "UART5(Default):TX:PC12, RX:PD2" + config BSP_USING_UART5_PIN_RMP1 + bool "UART5:TX:PB13, RX:PB14" + config BSP_USING_UART5_PIN_RMP2 + bool "UART5:TX:PE8, RX:PE9" + config BSP_USING_UART5_PIN_RMP3 + bool "UART5:TX:PB8, RX:PB9" + endchoice + endif + + config BSP_USING_UART6 + bool "Enable UART6" + default n + if BSP_USING_UART6 + choice + prompt "Select TX/RX Pin of UART6" + default BSP_USING_UART6_PIN_NORMP + config BSP_USING_UART6_PIN_NORMP + bool "UART6(Default):TX:PE2, RX:PE3" + config BSP_USING_UART6_PIN_RMP2 + bool "UART6:TX:PC0, RX:PC1" + config BSP_USING_UART6_PIN_RMP3 + bool "UART6:TX:PB0, RX:PB1" + endchoice + endif + + config BSP_USING_UART7 + bool "Enable UART7" + default n + if BSP_USING_UART7 + choice + prompt "Select TX/RX Pin of UART7" + default BSP_USING_UART7_PIN_NORMP + config BSP_USING_UART7_PIN_NORMP + bool "UART7(Default):TX:PC4, RX:PC5" + config BSP_USING_UART7_PIN_RMP1 + bool "UART7:TX:PC2, RX:PC3" + config BSP_USING_UART7_PIN_RMP3 + bool "UART7:TX:PG0, RX:PG1" + endchoice + endif endif menuconfig BSP_USING_PWM @@ -213,13 +348,13 @@ menu "On-chip Peripheral Drivers" select RT_USING_PIN if BSP_USING_I2C1 config BSP_I2C1_SCL_PIN - int "i2c1 scl pin number" - range 0 63 - default 22 + int "I2C1 scl pin number" + range 1 N32G45X_PIN_NUMBERS + default 29 config BSP_I2C1_SDA_PIN int "I2C1 sda pin number" - range 0 63 - default 23 + range 1 N32G45X_PIN_NUMBERS + default 30 endif menuconfig BSP_USING_ADC diff --git a/bsp/n32g452xx/n32g452xx-mini-system/board/board.c b/bsp/n32g452xx/n32g452xx-mini-system/board/board.c index ca6e55fb4e..9048415752 100644 --- a/bsp/n32g452xx/n32g452xx-mini-system/board/board.c +++ b/bsp/n32g452xx/n32g452xx-mini-system/board/board.c @@ -76,6 +76,7 @@ void rt_hw_board_init() #ifdef RT_USING_PIN int n32_hw_pin_init(void); n32_hw_pin_init(); + n32_msp_jtag_init(RT_NULL); #endif #ifdef RT_USING_SERIAL diff --git a/bsp/n32g452xx/n32g452xx-mini-system/board/board.h b/bsp/n32g452xx/n32g452xx-mini-system/board/board.h index 0a3b0fa661..fd5fa543f4 100644 --- a/bsp/n32g452xx/n32g452xx-mini-system/board/board.h +++ b/bsp/n32g452xx/n32g452xx-mini-system/board/board.h @@ -25,7 +25,7 @@ extern "C" { #define N32_FLASH_END_ADDRESS ((uint32_t)(N32_FLASH_START_ADRESS + N32_FLASH_SIZE)) /* Internal SRAM memory size[Kbytes] <80>, Default: 80*/ -#define N32_SRAM_SIZE (80) +#define N32_SRAM_SIZE (144) #define N32_SRAM_END (0x20000000 + N32_SRAM_SIZE * 1024) #if defined(__ARMCC_VERSION) diff --git a/bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.c b/bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.c index bd79fbd756..84ff210461 100644 --- a/bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.c +++ b/bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.c @@ -27,58 +27,283 @@ void n32_msp_usart_init(void *Instance) if (USART1 == USARTx) { RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_USART1, ENABLE); +#ifdef BSP_USING_UART1_PIN_RMP + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE); + GPIO_ConfigPinRemap(GPIO_RMP_USART1, ENABLE); + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_6; + GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitCtlStruct.Pin = GPIO_PIN_7; + GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); +#else RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE); GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_InitCtlStruct.Pin = GPIO_PIN_9; GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct); - GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; GPIO_InitCtlStruct.Pin = GPIO_PIN_10; GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct); - } #endif + } + +#endif /* BSP_USING_UART1 */ #ifdef BSP_USING_UART2 + if (USART2 == USARTx) { RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_USART2, ENABLE); +#ifdef BSP_USING_UART2_PIN_RMP1 + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE); + GPIO_ConfigPinRemap(GPIO_RMP1_USART2, ENABLE); + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOD, ENABLE); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_5; + GPIO_InitPeripheral(GPIOD, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitCtlStruct.Pin = GPIO_PIN_6; + GPIO_InitPeripheral(GPIOD, &GPIO_InitCtlStruct); + +#elif defined (BSP_USING_UART2_PIN_RMP2) + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE); + GPIO_ConfigPinRemap(GPIO_RMCP2_USART2, ENABLE); + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOC, ENABLE); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_8; + GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitCtlStruct.Pin = GPIO_PIN_9; + GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct); + +#elif defined (BSP_USING_UART2_PIN_RMP3) + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE); + GPIO_ConfigPinRemap(GPIO_RMP3_USART2, ENABLE); + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_4; + GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitCtlStruct.Pin = GPIO_PIN_5; + GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); + +#else RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE); GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_InitCtlStruct.Pin = GPIO_PIN_2; GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct); - GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; GPIO_InitCtlStruct.Pin = GPIO_PIN_3; GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct); - } #endif + } + +#endif /* BSP_USING_UART2 */ #ifdef BSP_USING_UART3 + if (USART3 == USARTx) { RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_USART3, ENABLE); +#if defined(BSP_USING_UART3_PIN_PART_RMP) + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE); + GPIO_ConfigPinRemap(GPIO_PART_RMP_USART3, ENABLE); + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOC, ENABLE); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_10; + GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitCtlStruct.Pin = GPIO_PIN_11; + GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct); +#elif defined(BSP_USING_UART3_PIN_ALL_RMP) + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE); + GPIO_ConfigPinRemap(GPIO_ALL_RMP_USART3, ENABLE); + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOD, ENABLE); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_8; + GPIO_InitPeripheral(GPIOD, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitCtlStruct.Pin = GPIO_PIN_9; + GPIO_InitPeripheral(GPIOD, &GPIO_InitCtlStruct); +#else RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE); GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_InitCtlStruct.Pin = GPIO_PIN_10; GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); - GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; GPIO_InitCtlStruct.Pin = GPIO_PIN_11; GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); - } #endif + } + +#endif /* BSP_USING_UART3 */ #ifdef BSP_USING_UART4 + if (UART4 == USARTx) { RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_UART4, ENABLE); - RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE); +#if defined(BSP_USING_UART4_PIN_RMP1) + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE); + GPIO_ConfigPinRemap(GPIO_RMP1_UART4, ENABLE); + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB | RCC_APB2_PERIPH_GPIOE, ENABLE); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_2; + GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitCtlStruct.Pin = GPIO_PIN_7; + GPIO_InitPeripheral(GPIOE, &GPIO_InitCtlStruct); +#elif defined(BSP_USING_UART4_PIN_RMP2) + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE); + GPIO_ConfigPinRemap(GPIO_RMP2_UART4, ENABLE); + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_13; + GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitCtlStruct.Pin = GPIO_PIN_14; + GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct); +#elif defined(BSP_USING_UART4_PIN_RMP3) + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE); + GPIO_ConfigPinRemap(GPIO_RMP3_UART4, ENABLE); + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOD, ENABLE); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_0; + GPIO_InitPeripheral(GPIOD, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitCtlStruct.Pin = GPIO_PIN_1; + GPIO_InitPeripheral(GPIOD, &GPIO_InitCtlStruct); +#else + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOC, ENABLE); GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_InitCtlStruct.Pin = GPIO_PIN_10; + GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitCtlStruct.Pin = GPIO_PIN_11; + GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct); +#endif + } + +#endif /* BSP_USING_UART4 */ +#ifdef BSP_USING_UART5 + + if (UART5 == USARTx) + { + RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_UART5, ENABLE); +#if defined(BSP_USING_UART5_PIN_RMP1) + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE); + GPIO_ConfigPinRemap(GPIO_RMP1_UART5, ENABLE); + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_13; + GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitCtlStruct.Pin = GPIO_PIN_14; + GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); +#elif defined(BSP_USING_UART5_PIN_RMP2) + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE); + GPIO_ConfigPinRemap(GPIO_RMP2_UART5, ENABLE); + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOE, ENABLE); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_8; + GPIO_InitPeripheral(GPIOE, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitCtlStruct.Pin = GPIO_PIN_9; + GPIO_InitPeripheral(GPIOE, &GPIO_InitCtlStruct); +#elif defined(BSP_USING_UART5_PIN_RMP3) + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE); + GPIO_ConfigPinRemap(GPIO_RMP3_UART5, ENABLE); + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_8; GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitCtlStruct.Pin = GPIO_PIN_9; + GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); +#else + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOC | RCC_APB2_PERIPH_GPIOD, ENABLE); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_12; + GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitCtlStruct.Pin = GPIO_PIN_2; + GPIO_InitPeripheral(GPIOD, &GPIO_InitCtlStruct); +#endif + } + +#endif /* BSP_USING_UART5 */ +#ifdef BSP_USING_UART6 + if (UART6 == USARTx) + { + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_UART6, ENABLE); +#if defined(BSP_USING_UART6_PIN_RMP2) + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE); + GPIO_ConfigPinRemap(GPIO_RMP2_UART6, ENABLE); + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOC, ENABLE); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_0; + GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct); GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; - GPIO_InitCtlStruct.Pin = GPIO_PIN_11; + GPIO_InitCtlStruct.Pin = GPIO_PIN_1; + GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct); +#elif defined(BSP_USING_UART6_PIN_RMP3) + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE); + GPIO_ConfigPinRemap(GPIO_RMP3_UART6, ENABLE); + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_0; GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitCtlStruct.Pin = GPIO_PIN_1; + GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); +#else /* BSP_USING_UART6_PIN_NORMP */ + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOE, ENABLE); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_2; + GPIO_InitPeripheral(GPIOE, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitCtlStruct.Pin = GPIO_PIN_3; + GPIO_InitPeripheral(GPIOE, &GPIO_InitCtlStruct); +#endif } + +#endif /* BSP_USING_UART6 */ +#ifdef BSP_USING_UART7 + + if (UART7 == USARTx) + { + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_UART7, ENABLE); +#if defined(BSP_USING_UART7_PIN_RMP1) + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE); + GPIO_ConfigPinRemap(GPIO_RMP1_UART7, ENABLE); + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOC, ENABLE); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_2; + GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitCtlStruct.Pin = GPIO_PIN_3; + GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct); +#elif defined(BSP_USING_UART7_PIN_RMP3) + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE); + GPIO_ConfigPinRemap(GPIO_RMP3_UART7, ENABLE); + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOG, ENABLE); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_0; + GPIO_InitPeripheral(GPIOG, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitCtlStruct.Pin = GPIO_PIN_1; + GPIO_InitPeripheral(GPIOG, &GPIO_InitCtlStruct); +#else /* BSP_USING_UART7_PIN_NORMP */ + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOC, ENABLE); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_4; + GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitCtlStruct.Pin = GPIO_PIN_5; + GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct); #endif + } + +#endif /* BSP_USING_UART7 */ /* Add others */ } #endif /* BSP_USING_SERIAL */ @@ -113,7 +338,6 @@ void n32_msp_spi_init(void *Instance) { RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_SPI2, ENABLE); RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE); - GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_Out_PP; GPIO_InitCtlStruct.Pin = GPIO_PIN_12; GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); @@ -167,7 +391,7 @@ void n32_msp_tim_init(void *Instance) { RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_TIM1, ENABLE); RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE); - GPIO_InitCtlStructure.Pin = GPIO_PIN_8 | GPIO_PIN_11; + GPIO_InitCtlStructure.Pin = GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11; GPIO_InitCtlStructure.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_InitCtlStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStructure); @@ -244,7 +468,7 @@ void n32_msp_adc_init(void *Instance) /* Configure ADC Channel as analog input */ GPIO_InitCtlStruct.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3; - GPIO_InitCtlStruct.GPIO_Speed = GPIO_Speed_2MHz; + GPIO_InitCtlStruct.GPIO_Speed = GPIO_INPUT; GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AIN; GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct); } @@ -260,7 +484,7 @@ void n32_msp_adc_init(void *Instance) /* Configure ADC Channel as analog input */ GPIO_InitCtlStruct.Pin = GPIO_PIN_1; - GPIO_InitCtlStruct.GPIO_Speed = GPIO_Speed_2MHz; + GPIO_InitCtlStruct.GPIO_Speed = GPIO_INPUT; GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AIN; GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct); } @@ -341,21 +565,73 @@ void n32_msp_can_init(void *Instance) if (CAN2 == CANx) { RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_CAN2, ENABLE); - RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE); RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE); - // GPIO_PinsRemapConfig(AFIO_MAP6_CAN2_0001, ENABLE); GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; - GPIO_InitCtlStruct.Pin = GPIO_PIN_6; + GPIO_InitCtlStruct.Pin = GPIO_PIN_13; GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); - GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; - GPIO_InitCtlStruct.Pin = GPIO_PIN_5; + GPIO_InitCtlStruct.Pin = GPIO_PIN_12; GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); } #endif } #endif /* BSP_USING_CAN */ +void n32_msp_jtag_init(void *Instance) +{ + GPIO_InitType GPIO_InitCtlStruct; + GPIO_InitStruct(&GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Speed = GPIO_Speed_50MHz; +#if defined(BSP_RMP_SW_JTAG_NO_NJTRST) + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE); + GPIO_ConfigPinRemap(GPIO_RMP_SW_JTAG_NO_NJTRST, ENABLE); + /* Available pin: PB4 */ + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IPU; + GPIO_InitCtlStruct.Pin = GPIO_PIN_4; + GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); +#elif defined(BSP_RMP_SW_JTAG_SW_ENABLE) + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE); + GPIO_ConfigPinRemap(GPIO_RMP_SW_JTAG_SW_ENABLE, ENABLE); + /* Available pin: PB3, PB4, PA15 */ + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE); + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_Out_OD; + GPIO_InitCtlStruct.Pin = GPIO_PIN_3; + GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IPU; + GPIO_InitCtlStruct.Pin = GPIO_PIN_4; + GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IPU; + GPIO_InitCtlStruct.Pin = GPIO_PIN_15; + GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct); +#elif defined(BSP_RMP_SW_JTAG_DISABLE) + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE); + GPIO_ConfigPinRemap(GPIO_RMP_SW_JTAG_DISABLE, ENABLE); + /* Available pin: PB3, PB4, PA13, PA14, PA15 */ + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE); + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_Out_OD; + GPIO_InitCtlStruct.Pin = GPIO_PIN_3; + GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IPU; + GDPIO_InitCtlStruct.Pin = GPIO_PIN_4; + GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IPU; + GPIO_InitCtlStruct.Pin = GPIO_PIN_13; + GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IPD; + GPIO_InitCtlStruct.Pin = GPIO_PIN_14; + GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IPU; + GPIO_InitCtlStruct.Pin = GPIO_PIN_15; + GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct); +#else + return; +#endif +} + + #ifdef RT_USING_FINSH #include <finsh.h> #if defined(BSP_USING_UART2) || defined(BSP_USING_UART3) @@ -413,7 +689,7 @@ static int adc_vol_sample(int argc, char *argv[]) return RT_ERROR; } - for (int i = 6; i <= 9; ++i) + for (int i = 1; i <= 18; ++i) { ret = rt_adc_enable(adc_dev, i); value = rt_adc_read(adc_dev, i); diff --git a/bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.h b/bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.h index b92c62a69f..5d911a9ca4 100644 --- a/bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.h +++ b/bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.h @@ -18,6 +18,7 @@ void n32_msp_sdio_init(void *Instance); void n32_msp_adc_init(void *Instance); void n32_msp_hwtim_init(void *Instance); void n32_msp_can_init(void *Instance); +void n32_msp_jtag_init(void *Instance); #endif /* __N32_MSP_H__ */ diff --git a/bsp/n32g452xx/n32g452xx-mini-system/rtconfig.h b/bsp/n32g452xx/n32g452xx-mini-system/rtconfig.h index 14a3c468b7..e191c2d43d 100644 --- a/bsp/n32g452xx/n32g452xx-mini-system/rtconfig.h +++ b/bsp/n32g452xx/n32g452xx-mini-system/rtconfig.h @@ -76,6 +76,12 @@ /* Device virtual file system */ +#define RT_USING_DFS +#define DFS_USING_POSIX +#define DFS_USING_WORKDIR +#define DFS_FILESYSTEMS_MAX 4 +#define DFS_FILESYSTEM_TYPES_MAX 4 +#define DFS_FD_MAX 16 /* Device Drivers */ @@ -85,9 +91,6 @@ #define RT_SERIAL_USING_DMA #define RT_SERIAL_RB_BUFSZ 64 #define RT_USING_PIN -#define RT_USING_ADC -#define RT_USING_PWM -#define RT_USING_WDT /* Using USB */ @@ -157,26 +160,14 @@ /* u8g2: a monochrome graphic library */ -/* PainterEngine: A cross-platform graphics application framework written in C language */ - - /* tools packages */ /* system packages */ -/* enhanced kernel services */ - - -/* POSIX extension functions */ - - /* acceleration: Assembly language or algorithmic acceleration packages */ -/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */ - - /* Micrium: Micrium software products porting for RT-Thread */ @@ -204,7 +195,14 @@ /* On-chip Peripheral Drivers */ +#define N32G45X_PIN_NUMBERS_64 +#define N32G45X_PIN_NUMBERS 64 #define BSP_USING_GPIO + +/* Remap JTAG Port */ + +#define BSP_RMP_SW_JTAG_SW_ENABLE #define BSP_USING_UART1 +#define BSP_USING_UART1_NO_RMP #endif diff --git a/bsp/nrf5x/nrf52832/applications/mnt.c b/bsp/nrf5x/nrf52832/applications/mnt.c index c7e4d10235..d4af1d2b6c 100644 --- a/bsp/nrf5x/nrf52832/applications/mnt.c +++ b/bsp/nrf5x/nrf52832/applications/mnt.c @@ -35,7 +35,11 @@ #endif #include "fal.h" -#include <dfs_posix.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #define LOG_TAG "drv.fs" #define DBG_LVL DBG_LOG diff --git a/bsp/nuvoton/libraries/m2354/rtt_port/drv_sdh.c b/bsp/nuvoton/libraries/m2354/rtt_port/drv_sdh.c index 708f653d36..38086cb2d5 100644 --- a/bsp/nuvoton/libraries/m2354/rtt_port/drv_sdh.c +++ b/bsp/nuvoton/libraries/m2354/rtt_port/drv_sdh.c @@ -20,8 +20,12 @@ #include <string.h> #if defined(RT_USING_DFS) - #include <dfs_fs.h> - #include <dfs_posix.h> +#include <dfs_fs.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #endif /* Private define ---------------------------------------------------------------*/ diff --git a/bsp/nuvoton/libraries/m480/rtt_port/drv_sdh.c b/bsp/nuvoton/libraries/m480/rtt_port/drv_sdh.c index 7c92743bd3..7c5aa68697 100644 --- a/bsp/nuvoton/libraries/m480/rtt_port/drv_sdh.c +++ b/bsp/nuvoton/libraries/m480/rtt_port/drv_sdh.c @@ -20,8 +20,12 @@ #include <string.h> #if defined(RT_USING_DFS) - #include <dfs_fs.h> - #include <dfs_posix.h> +#include <dfs_fs.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #endif /* Private define ---------------------------------------------------------------*/ diff --git a/bsp/nuvoton/libraries/n9h30/rtt_port/drv_sdh.c b/bsp/nuvoton/libraries/n9h30/rtt_port/drv_sdh.c index 499311c752..955fe6a645 100644 --- a/bsp/nuvoton/libraries/n9h30/rtt_port/drv_sdh.c +++ b/bsp/nuvoton/libraries/n9h30/rtt_port/drv_sdh.c @@ -20,8 +20,12 @@ #include <drv_sys.h> #if defined(RT_USING_DFS) - #include <dfs_fs.h> - #include <dfs_posix.h> +#include <dfs_fs.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #endif /* Private define ---------------------------------------------------------------*/ diff --git a/bsp/nuvoton/libraries/nu_packages/AudioCodec/audio_test.c b/bsp/nuvoton/libraries/nu_packages/AudioCodec/audio_test.c index d978fa4ded..6a805b3ba7 100644 --- a/bsp/nuvoton/libraries/nu_packages/AudioCodec/audio_test.c +++ b/bsp/nuvoton/libraries/nu_packages/AudioCodec/audio_test.c @@ -16,7 +16,11 @@ #include "wavrecorder.h" #include "wavplayer.h" -#include "dfs_posix.h" +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> /* The routine just for test automatically. diff --git a/bsp/nuvoton/libraries/nuc980/rtt_port/drv_sdh.c b/bsp/nuvoton/libraries/nuc980/rtt_port/drv_sdh.c index 6990ce215c..4b81a01f52 100644 --- a/bsp/nuvoton/libraries/nuc980/rtt_port/drv_sdh.c +++ b/bsp/nuvoton/libraries/nuc980/rtt_port/drv_sdh.c @@ -21,8 +21,12 @@ #include <drv_sys.h> #if defined(RT_USING_DFS) - #include <dfs_fs.h> - #include <dfs_posix.h> +#include <dfs_fs.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #endif /* Private define ---------------------------------------------------------------*/ diff --git a/bsp/nuvoton/nk-980iot/applications/mnt.c b/bsp/nuvoton/nk-980iot/applications/mnt.c index 4ff5b1f252..803e4b751b 100644 --- a/bsp/nuvoton/nk-980iot/applications/mnt.c +++ b/bsp/nuvoton/nk-980iot/applications/mnt.c @@ -22,8 +22,12 @@ #include <rtdbg.h> #if defined(RT_USING_DFS) - #include <dfs_fs.h> - #include <dfs_posix.h> +#include <dfs_fs.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #endif #if defined(PKG_USING_FAL) diff --git a/bsp/nuvoton/nk-n9h30/applications/mnt.c b/bsp/nuvoton/nk-n9h30/applications/mnt.c index 03e7481242..f4e7cf5bf3 100644 --- a/bsp/nuvoton/nk-n9h30/applications/mnt.c +++ b/bsp/nuvoton/nk-n9h30/applications/mnt.c @@ -22,8 +22,12 @@ #include <rtdbg.h> #if defined(RT_USING_DFS) - #include <dfs_fs.h> - #include <dfs_posix.h> +#include <dfs_fs.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #endif #if defined(PKG_USING_FAL) diff --git a/bsp/nuvoton/nk-rtu980/applications/mnt.c b/bsp/nuvoton/nk-rtu980/applications/mnt.c index ecfc390243..f99fcb0134 100644 --- a/bsp/nuvoton/nk-rtu980/applications/mnt.c +++ b/bsp/nuvoton/nk-rtu980/applications/mnt.c @@ -22,8 +22,12 @@ #include <rtdbg.h> #if defined(RT_USING_DFS) - #include <dfs_fs.h> - #include <dfs_posix.h> +#include <dfs_fs.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #endif #if defined(PKG_USING_FAL) diff --git a/bsp/nuvoton/numaker-iot-m487/applications/mnt.c b/bsp/nuvoton/numaker-iot-m487/applications/mnt.c index d7e657d852..c0cec18978 100644 --- a/bsp/nuvoton/numaker-iot-m487/applications/mnt.c +++ b/bsp/nuvoton/numaker-iot-m487/applications/mnt.c @@ -13,8 +13,12 @@ #include <rtthread.h> #if defined(RT_USING_DFS) - #include <dfs_fs.h> - #include <dfs_posix.h> +#include <dfs_fs.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #endif #if defined(PKG_USING_FAL) diff --git a/bsp/nuvoton/numaker-m032ki/applications/mnt.c b/bsp/nuvoton/numaker-m032ki/applications/mnt.c index 914fa657f6..00f0f91499 100644 --- a/bsp/nuvoton/numaker-m032ki/applications/mnt.c +++ b/bsp/nuvoton/numaker-m032ki/applications/mnt.c @@ -13,8 +13,12 @@ #include <rtthread.h> #if defined(RT_USING_DFS) - #include <dfs_fs.h> - #include <dfs_posix.h> +#include <dfs_fs.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #endif #if defined(PKG_USING_FAL) diff --git a/bsp/nuvoton/numaker-pfm-m487/applications/mnt.c b/bsp/nuvoton/numaker-pfm-m487/applications/mnt.c index 6e7a9ff5de..844ab9960d 100644 --- a/bsp/nuvoton/numaker-pfm-m487/applications/mnt.c +++ b/bsp/nuvoton/numaker-pfm-m487/applications/mnt.c @@ -13,8 +13,12 @@ #include <rtthread.h> #if defined(RT_USING_DFS) - #include <dfs_fs.h> - #include <dfs_posix.h> +#include <dfs_fs.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #endif #if defined(PKG_USING_FAL) diff --git a/bsp/qemu-vexpress-a9/.config b/bsp/qemu-vexpress-a9/.config index 1823424c79..f20d37057e 100644 --- a/bsp/qemu-vexpress-a9/.config +++ b/bsp/qemu-vexpress-a9/.config @@ -299,9 +299,8 @@ CONFIG_NETDEV_IPV6=0 # CONFIG_RT_USING_LWIP=y # CONFIG_RT_USING_LWIP141 is not set -# CONFIG_RT_USING_LWIP202 is not set -# CONFIG_RT_USING_LWIP203 is not set -CONFIG_RT_USING_LWIP212=y +CONFIG_RT_USING_LWIP203=y +# CONFIG_RT_USING_LWIP212 is not set # CONFIG_RT_USING_LWIP_IPV6 is not set CONFIG_RT_LWIP_MEM_ALIGNMENT=4 # CONFIG_RT_LWIP_IGMP is not set @@ -532,6 +531,7 @@ CONFIG_RT_USING_LWP=y # CONFIG_PKG_USING_MCURSES is not set # CONFIG_PKG_USING_TERMBOX is not set # CONFIG_PKG_USING_VT100 is not set +# CONFIG_PKG_USING_QRCODE is not set # # tools packages @@ -542,7 +542,6 @@ CONFIG_RT_USING_LWP=y # CONFIG_PKG_USING_SYSTEMVIEW is not set # CONFIG_PKG_USING_SEGGER_RTT is not set # CONFIG_PKG_USING_RDB is not set -# CONFIG_PKG_USING_QRCODE is not set # CONFIG_PKG_USING_ULOG_EASYFLASH is not set # CONFIG_PKG_USING_ULOG_FILE is not set # CONFIG_PKG_USING_LOGMGR is not set @@ -593,6 +592,7 @@ CONFIG_RT_USING_LWP=y # CONFIG_PKG_USING_POSIX_GETLINE is not set # CONFIG_PKG_USING_POSIX_WCWIDTH is not set # CONFIG_PKG_USING_POSIX_ITOA is not set +# CONFIG_PKG_USING_POSIX_STRINGS is not set # # acceleration: Assembly language or algorithmic acceleration packages @@ -705,6 +705,7 @@ CONFIG_RT_USING_LWP=y # CONFIG_PKG_USING_SSD1306 is not set # CONFIG_PKG_USING_QKEY is not set # CONFIG_PKG_USING_RS485 is not set +# CONFIG_PKG_USING_RS232 is not set # CONFIG_PKG_USING_NES is not set # CONFIG_PKG_USING_VIRTUAL_SENSOR is not set # CONFIG_PKG_USING_VDEVICE is not set @@ -792,6 +793,8 @@ CONFIG_RT_USING_LWP=y # CONFIG_PKG_USING_LWGPS is not set # CONFIG_PKG_USING_STATE_MACHINE is not set # CONFIG_PKG_USING_DESIGN_PATTERN is not set +# CONFIG_PKG_USING_CONTROLLER is not set +# CONFIG_PKG_USING_PHASE_LOCKED_LOOP is not set # # Hardware Drivers Config diff --git a/bsp/qemu-vexpress-a9/applications/main.c b/bsp/qemu-vexpress-a9/applications/main.c index e8ef51657e..b9364eee2f 100644 --- a/bsp/qemu-vexpress-a9/applications/main.c +++ b/bsp/qemu-vexpress-a9/applications/main.c @@ -14,7 +14,7 @@ int main(void) { - printf("hello rt-thread\n"); + printf("Hello RT-Thread!\n"); return 0; } diff --git a/bsp/qemu-vexpress-a9/drivers/drv_clcd.c b/bsp/qemu-vexpress-a9/drivers/drv_clcd.c index 2d012dca84..3fe2bd58d3 100644 --- a/bsp/qemu-vexpress-a9/drivers/drv_clcd.c +++ b/bsp/qemu-vexpress-a9/drivers/drv_clcd.c @@ -75,13 +75,15 @@ static rt_err_t drv_clcd_control(struct rt_device *device, int cmd, void *args) RT_ASSERT(info != RT_NULL); info->pixel_format = RTGRAPHIC_PIXEL_FORMAT_RGB565; - // info->pixel_format = RTGRAPHIC_PIXEL_FORMAT_ARGB888; info->bits_per_pixel= 16; info->width = lcd->width; info->height = lcd->height; info->framebuffer = lcd->fb; } break; + + default: + return -RT_EINVAL; } return RT_EOK; @@ -109,7 +111,7 @@ int drv_clcd_hw_init(void) _lcd.width = CLCD_WIDTH; _lcd.height = CLCD_HEIGHT; - _lcd.fb = rt_malloc(_lcd.width * _lcd.height * 2); + _lcd.fb = rt_malloc(_lcd.width * _lcd.height * 2 /*RGB565 2 Bytes*/); if (_lcd.fb == NULL) { rt_kprintf("initialize frame buffer failed!\n"); diff --git a/bsp/qemu-vexpress-a9/rtconfig.h b/bsp/qemu-vexpress-a9/rtconfig.h index 5957f7c565..35238f926c 100644 --- a/bsp/qemu-vexpress-a9/rtconfig.h +++ b/bsp/qemu-vexpress-a9/rtconfig.h @@ -203,7 +203,7 @@ /* light weight TCP/IP stack */ #define RT_USING_LWIP -#define RT_USING_LWIP212 +#define RT_USING_LWIP203 #define RT_LWIP_MEM_ALIGNMENT 4 #define RT_LWIP_ICMP #define RT_LWIP_DNS diff --git a/bsp/ra6m4-cpk/drivers/drv_gpio.h b/bsp/ra6m4-cpk/drivers/drv_gpio.h index 4493bb02ee..c72c636548 100644 --- a/bsp/ra6m4-cpk/drivers/drv_gpio.h +++ b/bsp/ra6m4-cpk/drivers/drv_gpio.h @@ -39,4 +39,4 @@ int rt_hw_pin_init(void); } #endif -#endif /* __DRV_GPIO_H__ */
\ No newline at end of file +#endif /* __DRV_GPIO_H__ */ diff --git a/bsp/ra6m4-cpk/drivers/drv_rtc.c b/bsp/ra6m4-cpk/drivers/drv_rtc.c index 6c3908eebb..379213fd93 100644 --- a/bsp/ra6m4-cpk/drivers/drv_rtc.c +++ b/bsp/ra6m4-cpk/drivers/drv_rtc.c @@ -223,4 +223,4 @@ static int rt_hw_rtc_init(void) return RT_EOK; } INIT_DEVICE_EXPORT(rt_hw_rtc_init); -#endif
\ No newline at end of file +#endif diff --git a/bsp/ra6m4-cpk/ports/fal/SConscript b/bsp/ra6m4-cpk/ports/fal/SConscript index 2b71fcc93c..c8931044c5 100644 --- a/bsp/ra6m4-cpk/ports/fal/SConscript +++ b/bsp/ra6m4-cpk/ports/fal/SConscript @@ -8,15 +8,15 @@ src = [] src += Glob('*.c') CPPPATH = [cwd] -LOCAL_CCFLAGS = '' +LOCAL_CFLAGS = '' if rtconfig.PLATFORM == 'gcc': - LOCAL_CCFLAGS += ' -std=c99' + LOCAL_CFLAGS += ' -std=c99' elif rtconfig.PLATFORM == 'armcc': - LOCAL_CCFLAGS += ' --c99' + LOCAL_CFLAGS += ' --c99' elif rtconfig.PLATFORM == 'armclang': - LOCAL_CCFLAGS += ' -std=c99' + LOCAL_CFLAGS += ' -std=c99' -group = DefineGroup('FAL', src, depend = ['PKG_USING_FAL'], CPPPATH = CPPPATH, LOCAL_CCFLAGS = LOCAL_CCFLAGS) +group = DefineGroup('FAL', src, depend = ['PKG_USING_FAL'], CPPPATH = CPPPATH, LOCAL_CFLAGS = LOCAL_CFLAGS) Return('group') diff --git a/bsp/ra6m4-cpk/ports/rw007/SConscript b/bsp/ra6m4-cpk/ports/rw007/SConscript index 7ce64a6c3c..99b97f1a80 100644 --- a/bsp/ra6m4-cpk/ports/rw007/SConscript +++ b/bsp/ra6m4-cpk/ports/rw007/SConscript @@ -8,15 +8,15 @@ src = [] src += Glob('*.c') CPPPATH = [cwd] -LOCAL_CCFLAGS = '' +LOCAL_CFLAGS = '' if rtconfig.PLATFORM == 'gcc': - LOCAL_CCFLAGS += ' -std=c99' + LOCAL_CFLAGS += ' -std=c99' elif rtconfig.PLATFORM == 'armcc': - LOCAL_CCFLAGS += ' --c99' + LOCAL_CFLAGS += ' --c99' elif rtconfig.PLATFORM == 'armclang': - LOCAL_CCFLAGS += ' -std=c99' + LOCAL_CFLAGS += ' -std=c99' -group = DefineGroup('rw007', src, depend = ['BSP_USING_RW007'], CPPPATH = CPPPATH, LOCAL_CCFLAGS = LOCAL_CCFLAGS) +group = DefineGroup('rw007', src, depend = ['BSP_USING_RW007'], CPPPATH = CPPPATH, LOCAL_CFLAGS = LOCAL_CFLAGS) Return('group') diff --git a/bsp/ra6m4-cpk/ra_cfg/fsp_cfg/bsp/bsp_cfg.h b/bsp/ra6m4-cpk/ra_cfg/fsp_cfg/bsp/bsp_cfg.h index f3664077fc..9e72e1ccb7 100644 --- a/bsp/ra6m4-cpk/ra_cfg/fsp_cfg/bsp/bsp_cfg.h +++ b/bsp/ra6m4-cpk/ra_cfg/fsp_cfg/bsp/bsp_cfg.h @@ -34,7 +34,7 @@ #ifndef BSP_CLOCK_CFG_MAIN_OSC_POPULATED #define BSP_CLOCK_CFG_MAIN_OSC_POPULATED (1) #endif - + #ifndef BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE #define BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE (0) #endif diff --git a/bsp/ra6m4-cpk/ra_gen/vector_data.c b/bsp/ra6m4-cpk/ra_gen/vector_data.c index 5bbc494618..bbb826b011 100644 --- a/bsp/ra6m4-cpk/ra_gen/vector_data.c +++ b/bsp/ra6m4-cpk/ra_gen/vector_data.c @@ -18,4 +18,4 @@ [3] = BSP_PRV_IELS_ENUM(EVENT_SCI7_ERI), /* SCI7 ERI (Receive error) */ [4] = BSP_PRV_IELS_ENUM(EVENT_ICU_IRQ0), /* ICU IRQ0 (External pin interrupt 0) */ }; - #endif
\ No newline at end of file + #endif diff --git a/bsp/ra6m4-cpk/ra_gen/vector_data.h b/bsp/ra6m4-cpk/ra_gen/vector_data.h index fd6cf29e21..5caeef0462 100644 --- a/bsp/ra6m4-cpk/ra_gen/vector_data.h +++ b/bsp/ra6m4-cpk/ra_gen/vector_data.h @@ -36,4 +36,4 @@ SCI7_ERI_IRQn = 3, /* SCI7 ERI (Receive error) */ ICU_IRQ0_IRQn = 4, /* ICU IRQ0 (External pin interrupt 0) */ } IRQn_Type; - #endif /* VECTOR_DATA_H */
\ No newline at end of file + #endif /* VECTOR_DATA_H */ diff --git a/bsp/ra6m4-cpk/src/hal_entry.c b/bsp/ra6m4-cpk/src/hal_entry.c index acac8a8442..79e099d30d 100644 --- a/bsp/ra6m4-cpk/src/hal_entry.c +++ b/bsp/ra6m4-cpk/src/hal_entry.c @@ -14,7 +14,7 @@ #include <rtdevice.h> #define LED3_PIN BSP_IO_PORT_01_PIN_06 -#define USER_INPUT "P105" +#define USER_INPUT "P105" void hal_entry(void) { diff --git a/bsp/raspberry-pi/raspi4-32/.config b/bsp/raspberry-pi/raspi4-32/.config index 82e6d9493e..133327fe51 100644 --- a/bsp/raspberry-pi/raspi4-32/.config +++ b/bsp/raspberry-pi/raspi4-32/.config @@ -282,8 +282,7 @@ CONFIG_NETDEV_IPV6=0 # CONFIG_RT_USING_LWIP=y # CONFIG_RT_USING_LWIP141 is not set -CONFIG_RT_USING_LWIP202=y -# CONFIG_RT_USING_LWIP203 is not set +CONFIG_RT_USING_LWIP203=y # CONFIG_RT_USING_LWIP212 is not set # CONFIG_RT_USING_LWIP_IPV6 is not set CONFIG_RT_LWIP_MEM_ALIGNMENT=4 @@ -514,6 +513,7 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_PKG_USING_MCURSES is not set # CONFIG_PKG_USING_TERMBOX is not set # CONFIG_PKG_USING_VT100 is not set +# CONFIG_PKG_USING_QRCODE is not set # # tools packages @@ -524,7 +524,6 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_PKG_USING_SYSTEMVIEW is not set # CONFIG_PKG_USING_SEGGER_RTT is not set # CONFIG_PKG_USING_RDB is not set -# CONFIG_PKG_USING_QRCODE is not set # CONFIG_PKG_USING_ULOG_EASYFLASH is not set # CONFIG_PKG_USING_ULOG_FILE is not set # CONFIG_PKG_USING_LOGMGR is not set @@ -575,6 +574,7 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_PKG_USING_POSIX_GETLINE is not set # CONFIG_PKG_USING_POSIX_WCWIDTH is not set # CONFIG_PKG_USING_POSIX_ITOA is not set +# CONFIG_PKG_USING_POSIX_STRINGS is not set # # acceleration: Assembly language or algorithmic acceleration packages @@ -686,6 +686,7 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_PKG_USING_SSD1306 is not set # CONFIG_PKG_USING_QKEY is not set # CONFIG_PKG_USING_RS485 is not set +# CONFIG_PKG_USING_RS232 is not set # CONFIG_PKG_USING_NES is not set # CONFIG_PKG_USING_VIRTUAL_SENSOR is not set # CONFIG_PKG_USING_VDEVICE is not set @@ -773,6 +774,8 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_PKG_USING_LWGPS is not set # CONFIG_PKG_USING_STATE_MACHINE is not set # CONFIG_PKG_USING_DESIGN_PATTERN is not set +# CONFIG_PKG_USING_CONTROLLER is not set +# CONFIG_PKG_USING_PHASE_LOCKED_LOOP is not set CONFIG_BCM2711_SOC=y # CONFIG_BSP_SUPPORT_FPU is not set diff --git a/bsp/raspberry-pi/raspi4-32/rtconfig.h b/bsp/raspberry-pi/raspi4-32/rtconfig.h index aeeb1f12f8..ed2adcbb38 100644 --- a/bsp/raspberry-pi/raspi4-32/rtconfig.h +++ b/bsp/raspberry-pi/raspi4-32/rtconfig.h @@ -168,7 +168,7 @@ /* light weight TCP/IP stack */ #define RT_USING_LWIP -#define RT_USING_LWIP202 +#define RT_USING_LWIP203 #define RT_LWIP_MEM_ALIGNMENT 4 #define RT_LWIP_IGMP #define RT_LWIP_ICMP diff --git a/bsp/raspberry-pico/Kconfig b/bsp/raspberry-pico/Kconfig index c9666bbc93..b8ba681346 100644 --- a/bsp/raspberry-pico/Kconfig +++ b/bsp/raspberry-pico/Kconfig @@ -17,6 +17,7 @@ config PKGS_DIR source "$RTT_DIR/Kconfig" source "$PKGS_DIR/Kconfig" +source "libraries/Kconfig" config SOC_RP2040 bool diff --git a/bsp/raspberry-pico/SConstruct b/bsp/raspberry-pico/SConstruct index 79821f993a..26b423a1d8 100644 --- a/bsp/raspberry-pico/SConstruct +++ b/bsp/raspberry-pico/SConstruct @@ -27,5 +27,7 @@ Export('rtconfig') # prepare building environment objs = PrepareBuilding(env, RTT_ROOT) +objs.extend(SConscript(os.path.join(os.getcwd(), 'board', 'ports', 'SConscript'))) + # make a building DoBuilding(TARGET, objs) diff --git a/bsp/raspberry-pico/applications/SConscript b/bsp/raspberry-pico/applications/SConscript index 01eb940dfb..a0508c4020 100644 --- a/bsp/raspberry-pico/applications/SConscript +++ b/bsp/raspberry-pico/applications/SConscript @@ -1,11 +1,17 @@ -Import('RTT_ROOT') -Import('rtconfig') from building import * +import os -cwd = os.path.join(str(Dir('#')), 'applications') -src = Glob('*.c') -CPPPATH = [cwd, str(Dir('#'))] +cwd = GetCurrentDir() + +src = ['main.c'] + +CPPPATH = [cwd] group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) +list = os.listdir(cwd) +for item in list: + if os.path.isfile(os.path.join(cwd, item, 'SConscript')): + group = group + SConscript(os.path.join(item, 'SConscript')) + Return('group') diff --git a/bsp/raspberry-pico/applications/lvgl/SConscript b/bsp/raspberry-pico/applications/lvgl/SConscript new file mode 100644 index 0000000000..bbeed6d911 --- /dev/null +++ b/bsp/raspberry-pico/applications/lvgl/SConscript @@ -0,0 +1,17 @@ +from building import * +import os + +cwd = GetCurrentDir() +group = [] +src = Glob('*.c') +CPPPATH = [cwd] + +group = DefineGroup('LVGL-port', src, depend = ['BSP_USING_LVGL'], CPPPATH = CPPPATH) + +list = os.listdir(cwd) +for d in list: + path = os.path.join(cwd, d) + if os.path.isfile(os.path.join(path, 'SConscript')): + group = group + SConscript(os.path.join(d, 'SConscript')) + +Return('group') diff --git a/bsp/raspberry-pico/applications/lvgl/lv_conf.h b/bsp/raspberry-pico/applications/lvgl/lv_conf.h new file mode 100644 index 0000000000..a5e6be8a2a --- /dev/null +++ b/bsp/raspberry-pico/applications/lvgl/lv_conf.h @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-10-18 Meco Man First version + */ + +#ifndef LV_CONF_H +#define LV_CONF_H + +#define LV_USE_PERF_MONITOR 1 +#define LV_COLOR_DEPTH 16 +#define LV_COLOR_16_SWAP 1 + +/* music player demo */ +#define LV_HOR_RES_MAX 240 +#define LV_VER_RES_MAX 240 +#define LV_USE_DEMO_RTT_MUSIC 1 +#define LV_DEMO_RTT_MUSIC_AUTO_PLAY 1 +#define LV_FONT_MONTSERRAT_12 1 +#define LV_FONT_MONTSERRAT_16 1 + +#endif diff --git a/bsp/raspberry-pico/applications/lvgl/lv_demo.c b/bsp/raspberry-pico/applications/lvgl/lv_demo.c new file mode 100644 index 0000000000..95e047d541 --- /dev/null +++ b/bsp/raspberry-pico/applications/lvgl/lv_demo.c @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-10-17 Meco Man First version + */ +#include <rtthread.h> +#include <lvgl.h> +#include <lv_port_indev.h> +#define DBG_TAG "LVGL.demo" +#define DBG_LVL DBG_INFO +#include <rtdbg.h> + +#ifndef LV_THREAD_STACK_SIZE +#define LV_THREAD_STACK_SIZE 4096 +#endif + +#ifndef LV_THREAD_PRIO +#define LV_THREAD_PRIO (RT_THREAD_PRIORITY_MAX * 2 / 3) +#endif + +static void lvgl_thread(void *parameter) +{ + extern void lv_demo_music(void); + lv_demo_music(); + while (1) + { + lv_task_handler(); + rt_thread_mdelay(5); + } +} + +static int lvgl_demo_init(void) +{ + rt_thread_t tid; + + tid = rt_thread_create("LVGL", lvgl_thread, RT_NULL, LV_THREAD_STACK_SIZE, LV_THREAD_PRIO, 0); + if (tid == RT_NULL) + { + LOG_E("Fail to create 'LVGL' thread"); + } + rt_thread_startup(tid); + + return 0; +} +INIT_APP_EXPORT(lvgl_demo_init); diff --git a/bsp/raspberry-pico/applications/lvgl/lv_port_disp.c b/bsp/raspberry-pico/applications/lvgl/lv_port_disp.c new file mode 100644 index 0000000000..636ff7a008 --- /dev/null +++ b/bsp/raspberry-pico/applications/lvgl/lv_port_disp.c @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-10-18 Meco Man The first version + * 2021-12-24 Rb Refresh using dma2d + */ +#include <lvgl.h> +#include "drv_lcd.h" + +/*A static or global variable to store the buffers*/ +static lv_disp_draw_buf_t disp_buf; +static lv_disp_drv_t disp_drv; /*Descriptor of a display driver*/ + +#define DISP_BUF_SIZE (LV_HOR_RES_MAX * LV_VER_RES_MAX) + +static const lv_color_t * buf_to_flush; + +static lv_disp_drv_t g_disp_drv; +static lv_color_t lv_disp_buf1[DISP_BUF_SIZE]; + +static void lcd_fb_flush(lv_disp_drv_t *disp_drv, const lv_area_t *area, lv_color_t *color_p) +{ + LCD_DisplayWindows(area->x1, area->y1, area->x2, area->y2, (uint16_t*) color_p); + lv_disp_flush_ready(disp_drv); +} + +void lv_port_disp_init(void) +{ + rt_err_t result; + + SPI_Init(); + LCD_Init(HORIZONTAL); + + /*Initialize `disp_buf` with the buffer(s).*/ + lv_disp_draw_buf_init(&disp_buf, lv_disp_buf1, RT_NULL, DISP_BUF_SIZE); + + lv_disp_drv_init(&disp_drv); /*Basic initialization*/ + + /*Set the resolution of the display*/ + disp_drv.hor_res = LV_VER_RES_MAX; + disp_drv.ver_res = LV_HOR_RES_MAX; + + /*Set a display buffer*/ + disp_drv.draw_buf = &disp_buf; + + /*Used to copy the buffer's content to the display*/ + disp_drv.flush_cb = lcd_fb_flush; + + /*Finally register the driver*/ + lv_disp_drv_register(&disp_drv); + + g_disp_drv = disp_drv; +} diff --git a/bsp/raspberry-pico/applications/lvgl/lv_port_disp.h b/bsp/raspberry-pico/applications/lvgl/lv_port_disp.h new file mode 100644 index 0000000000..ef39eb03cd --- /dev/null +++ b/bsp/raspberry-pico/applications/lvgl/lv_port_disp.h @@ -0,0 +1,23 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-10-18 Meco Man The first version + */ +#ifndef LV_PORT_DISP_H +#define LV_PORT_DISP_H + +#ifdef __cplusplus +extern "C" { +#endif + +void lv_port_disp_init(void); + +#ifdef __cplusplus +} /*extern "C"*/ +#endif + +#endif diff --git a/bsp/raspberry-pico/applications/lvgl/lv_port_indev.c b/bsp/raspberry-pico/applications/lvgl/lv_port_indev.c new file mode 100644 index 0000000000..0beae12763 --- /dev/null +++ b/bsp/raspberry-pico/applications/lvgl/lv_port_indev.c @@ -0,0 +1,105 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-10-18 Meco Man The first version + */ +#include <lvgl.h> +#include <stdbool.h> +#include <rtdevice.h> + +#define UP_KEY 2 +#define DOWN_KEY 18 +#define LEFT_KEY 16 +#define RIGHT_KEY 20 +#define CRTL_KEY 3 + +#define BUTTON0_PIN 2 +#define BUTTON1_PIN 18 +#define BUTTON2_PIN 16 +#define BUTTON_WKUP_PIN 20 + +/*Test if `id` button is pressed or not*/ +static bool button_is_pressed(uint8_t id) +{ + switch(id) + { + case 0: + if(rt_pin_read(BUTTON0_PIN) == PIN_LOW) + return true; + break; + case 1: + if(rt_pin_read(BUTTON1_PIN) == PIN_LOW) + return true; + break; + case 2: + if(rt_pin_read(BUTTON2_PIN) == PIN_LOW) + return true; + break; + case 3: + if(rt_pin_read(BUTTON_WKUP_PIN) == PIN_LOW) + return true; + break; + } + + return false; +} + +static int8_t button_get_pressed_id(void) +{ + uint8_t i; + + /*Check to buttons see which is being pressed*/ + for(i = 0; i < 4; i++) + { + /*Return the pressed button's ID*/ + if(button_is_pressed(i)) + { + return i; + } + } + + /*No button pressed*/ + return -1; +} + +void button_read(lv_indev_drv_t * drv, lv_indev_data_t*data) +{ + static uint32_t last_btn = 0; /*Store the last pressed button*/ + int btn_pr = button_get_pressed_id(); /*Get the ID (0,1,2...) of the pressed button*/ + if(btn_pr >= 0) + { /*Is there a button press? (E.g. -1 indicated no button was pressed)*/ + last_btn = btn_pr; /*Save the ID of the pressed button*/ + data->state = LV_INDEV_STATE_PRESSED; /*Set the pressed state*/ + } + else + { + data->state = LV_INDEV_STATE_RELEASED; /*Set the released state*/ + } + + data->btn_id = last_btn; /*Save the last button*/ +} + + +lv_indev_t * button_indev; + +void lv_port_indev_init(void) +{ + static lv_indev_drv_t indev_drv; + + /* Initialize the on-board buttons */ + rt_pin_mode(BUTTON0_PIN, PIN_MODE_INPUT); + rt_pin_mode(BUTTON1_PIN, PIN_MODE_INPUT); + rt_pin_mode(BUTTON2_PIN, PIN_MODE_INPUT); + rt_pin_mode(BUTTON_WKUP_PIN, PIN_MODE_INPUT); + + lv_indev_drv_init(&indev_drv); /*Basic initialization*/ + indev_drv.type = LV_INDEV_TYPE_BUTTON; + indev_drv.read_cb = button_read; + + /*Register the driver in LVGL and save the created input device object*/ + button_indev = lv_indev_drv_register(&indev_drv); +} diff --git a/bsp/raspberry-pico/applications/lvgl/lv_port_indev.h b/bsp/raspberry-pico/applications/lvgl/lv_port_indev.h new file mode 100644 index 0000000000..d15f0e5cfa --- /dev/null +++ b/bsp/raspberry-pico/applications/lvgl/lv_port_indev.h @@ -0,0 +1,28 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-10-18 Meco Man The first version + */ +#ifndef LV_PORT_INDEV_H +#define LV_PORT_INDEV_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include <lv_hal_indev.h> + +extern lv_indev_t * button_indev; + +void lv_port_indev_init(void); +void lv_port_indev_input(rt_int16_t x, rt_int16_t y, lv_indev_state_t state); + +#ifdef __cplusplus +} /*extern "C"*/ +#endif + +#endif diff --git a/bsp/raspberry-pico/board/SConscript b/bsp/raspberry-pico/board/SConscript new file mode 100644 index 0000000000..17c3b776a3 --- /dev/null +++ b/bsp/raspberry-pico/board/SConscript @@ -0,0 +1,20 @@ +import os +import rtconfig +from building import * + +cwd = GetCurrentDir() + +# add general drivers +src = Split(''' +board.c +''') + +path = [cwd] +path += [cwd + '/ports/lcd'] + +if GetDepend(['BSP_USING_LVGL']): + path += [cwd + '/ports/lcd'] + +group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path) + +Return('group') diff --git a/bsp/raspberry-pico/drivers/board.c b/bsp/raspberry-pico/board/board.c index 3d0a58a588..f95a197769 100644 --- a/bsp/raspberry-pico/drivers/board.c +++ b/bsp/raspberry-pico/board/board.c @@ -16,6 +16,8 @@ #include "board.h" #include "hardware/structs/systick.h" +#define PLL_SYS_KHZ (133 * 1000) + void isr_systick(void) { /* enter interrupt */ @@ -43,6 +45,8 @@ uint32_t systick_config(uint32_t ticks) void rt_hw_board_init() { + set_sys_clock_khz(PLL_SYS_KHZ, true); + rt_system_heap_init(HEAP_BEGIN, HEAP_END); alarm_pool_init_default(); @@ -65,7 +69,7 @@ void rt_hw_board_init() stdio_init_all(); rt_hw_uart_init(); -#if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE) +#ifdef RT_USING_CONSOLE rt_console_set_device(RT_CONSOLE_DEVICE_NAME); #endif } diff --git a/bsp/raspberry-pico/drivers/board.h b/bsp/raspberry-pico/board/board.h index 0c418d5c4e..0c418d5c4e 100644 --- a/bsp/raspberry-pico/drivers/board.h +++ b/bsp/raspberry-pico/board/board.h diff --git a/bsp/raspberry-pico/board/ports/SConscript b/bsp/raspberry-pico/board/ports/SConscript new file mode 100644 index 0000000000..3c57bc9c6d --- /dev/null +++ b/bsp/raspberry-pico/board/ports/SConscript @@ -0,0 +1,12 @@ +import os +from building import * + +objs = [] +cwd = GetCurrentDir() + +list = os.listdir(cwd) +for item in list: + if os.path.isfile(os.path.join(cwd, item, 'SConscript')): + objs = objs + SConscript(os.path.join(item, 'SConscript')) + +Return('objs') diff --git a/bsp/raspberry-pico/board/ports/lcd/SConscript b/bsp/raspberry-pico/board/ports/lcd/SConscript new file mode 100644 index 0000000000..ab60ebfecf --- /dev/null +++ b/bsp/raspberry-pico/board/ports/lcd/SConscript @@ -0,0 +1,10 @@ +from building import * +import os + +cwd = GetCurrentDir() +src = ['drv_lcd.c'] +CPPPATH = [cwd] + +group = DefineGroup('Drivers', src, depend = ['BSP_USING_LVGL'], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/raspberry-pico/board/ports/lcd/drv_lcd.c b/bsp/raspberry-pico/board/ports/lcd/drv_lcd.c new file mode 100644 index 0000000000..30808f97d4 --- /dev/null +++ b/bsp/raspberry-pico/board/ports/lcd/drv_lcd.c @@ -0,0 +1,444 @@ +#include <drv_lcd.h> +#include <stdlib.h> + +#define SPI_PORT spi1 + +uint slice_num; +LCD_ATTRIBUTES LCD; + +/****************************************************************************** + function : Hardware reset + parameter: + ******************************************************************************/ +static void LCD_Reset(void) +{ + DEV_Digital_Write(LCD_RST_PIN, 1); + rt_thread_mdelay(100); + DEV_Digital_Write(LCD_RST_PIN, 0); + rt_thread_mdelay(100); + DEV_Digital_Write(LCD_RST_PIN, 1); + rt_thread_mdelay(100); +} + +/****************************************************************************** + function : send command + parameter: + Reg : Command register + ******************************************************************************/ +static void LCD_SendCommand(UBYTE Reg) +{ + DEV_Digital_Write(LCD_DC_PIN, 0); + DEV_Digital_Write(LCD_CS_PIN, 0); + DEV_SPI_WriteByte(Reg); + DEV_Digital_Write(LCD_CS_PIN, 1); +} + +/****************************************************************************** + function : send data + parameter: + Data : Write data + ******************************************************************************/ +static void LCD_SendData_8Bit(UBYTE Data) +{ + DEV_Digital_Write(LCD_DC_PIN, 1); + DEV_Digital_Write(LCD_CS_PIN, 0); + DEV_SPI_WriteByte(Data); + DEV_Digital_Write(LCD_CS_PIN, 1); +} + +/****************************************************************************** + function : send data + parameter: + Data : Write data + ******************************************************************************/ +static void LCD_SendData_16Bit(UWORD Data) +{ + DEV_Digital_Write(LCD_DC_PIN, 1); + DEV_Digital_Write(LCD_CS_PIN, 0); + DEV_SPI_WriteByte((Data >> 8) & 0xFF); + DEV_SPI_WriteByte(Data & 0xFF); + DEV_Digital_Write(LCD_CS_PIN, 1); +} + +/****************************************************************************** + function : Initialize the lcd register + parameter: + ******************************************************************************/ +static void LCD_InitReg(void) +{ + LCD_SendCommand(0x3A); + LCD_SendData_8Bit(0x05); + + LCD_SendCommand(0xB2); + LCD_SendData_8Bit(0x0C); + LCD_SendData_8Bit(0x0C); + LCD_SendData_8Bit(0x00); + LCD_SendData_8Bit(0x33); + LCD_SendData_8Bit(0x33); + + LCD_SendCommand(0xB7); // Gate Control + LCD_SendData_8Bit(0x35); + + LCD_SendCommand(0xBB); // VCOM Setting + LCD_SendData_8Bit(0x19); + + LCD_SendCommand(0xC0); // LCM Control + LCD_SendData_8Bit(0x2C); + + LCD_SendCommand(0xC2); // VDV and VRH Command Enable + LCD_SendData_8Bit(0x01); + LCD_SendCommand(0xC3); // VRH Set + LCD_SendData_8Bit(0x12); + LCD_SendCommand(0xC4); // VDV Set + LCD_SendData_8Bit(0x20); + + LCD_SendCommand(0xC6); // Frame Rate Control in Normal Mode + LCD_SendData_8Bit(0x01); // 110hz + + LCD_SendCommand(0xD0); // Power Control 1 + LCD_SendData_8Bit(0xA4); + LCD_SendData_8Bit(0xA1); + + LCD_SendCommand(0xE0); // Positive Voltage Gamma Control + LCD_SendData_8Bit(0xD0); + LCD_SendData_8Bit(0x04); + LCD_SendData_8Bit(0x0D); + LCD_SendData_8Bit(0x11); + LCD_SendData_8Bit(0x13); + LCD_SendData_8Bit(0x2B); + LCD_SendData_8Bit(0x3F); + LCD_SendData_8Bit(0x54); + LCD_SendData_8Bit(0x4C); + LCD_SendData_8Bit(0x18); + LCD_SendData_8Bit(0x0D); + LCD_SendData_8Bit(0x0B); + LCD_SendData_8Bit(0x1F); + LCD_SendData_8Bit(0x23); + + LCD_SendCommand(0xE1); // Negative Voltage Gamma Control + LCD_SendData_8Bit(0xD0); + LCD_SendData_8Bit(0x04); + LCD_SendData_8Bit(0x0C); + LCD_SendData_8Bit(0x11); + LCD_SendData_8Bit(0x13); + LCD_SendData_8Bit(0x2C); + LCD_SendData_8Bit(0x3F); + LCD_SendData_8Bit(0x44); + LCD_SendData_8Bit(0x51); + LCD_SendData_8Bit(0x2F); + LCD_SendData_8Bit(0x1F); + LCD_SendData_8Bit(0x1F); + LCD_SendData_8Bit(0x20); + LCD_SendData_8Bit(0x23); + + LCD_SendCommand(0x21); // Display Inversion On + + LCD_SendCommand(0x11); // Sleep Out + + LCD_SendCommand(0x29); // Display On +} + +/******************************************************************************** + function: Set the resolution and scanning method of the screen + parameter: + Scan_dir: Scan direction + ********************************************************************************/ +static void LCD_SetAttributes(UBYTE Scan_dir) +{ + // Get the screen scan direction + LCD.SCAN_DIR = Scan_dir; + UBYTE MemoryAccessReg = 0x00; + + // Get GRAM and LCD width and height + if (Scan_dir == HORIZONTAL) + { + LCD.HEIGHT = LCD_WIDTH; + LCD.WIDTH = LCD_HEIGHT; + MemoryAccessReg = 0X70; + } + else + { + LCD.HEIGHT = LCD_HEIGHT; + LCD.WIDTH = LCD_WIDTH; + MemoryAccessReg = 0X00; + } + + // Set the read / write scan direction of the frame memory + LCD_SendCommand(0x36); // MX, MY, RGB mode + LCD_SendData_8Bit(MemoryAccessReg); // 0x08 set RGB +} + +/******************************************************************************** + function : Initialize the lcd + parameter: + ********************************************************************************/ +void LCD_Init(UBYTE Scan_dir) +{ + DEV_SET_PWM(50); + + // Hardware reset + LCD_Reset(); + + // Set the resolution and scanning method of the screen + LCD_SetAttributes(Scan_dir); + + // Set the initialization register + LCD_InitReg(); +} + +void LCD_SetWindows(UWORD Xstart, UWORD Ystart, UWORD Xend, UWORD Yend) +{ + // set the X coordinates + LCD_SendCommand(0x2A); + LCD_SendData_8Bit((Xstart >> 8) & 0xFF); + LCD_SendData_8Bit(Xstart & 0xFF); + LCD_SendData_8Bit(((Xend - 1) >> 8) & 0xFF); + LCD_SendData_8Bit((Xend - 1) & 0xFF); + + // set the Y coordinates + LCD_SendCommand(0x2B); + LCD_SendData_8Bit((Ystart >> 8) & 0xFF); + LCD_SendData_8Bit(Ystart & 0xFF); + LCD_SendData_8Bit(((Yend - 1) >> 8) & 0xFF); + LCD_SendData_8Bit((Yend - 1) & 0xFF); + + LCD_SendCommand(0X2C); +} + +/****************************************************************************** + function : Clear screen + parameter: + ******************************************************************************/ +void LCD_Clear(UWORD Color) +{ + UWORD j, i; + UWORD Image[LCD.WIDTH * LCD.HEIGHT]; + + Color = ((Color << 8) & 0xff00) | (Color >> 8); + + for (j = 0; j < LCD.HEIGHT * LCD.WIDTH; j++) + { + Image[j] = Color; + } + + LCD_SetWindows(0, 0, LCD.WIDTH, LCD.HEIGHT); + DEV_Digital_Write(LCD_DC_PIN, 1); + DEV_Digital_Write(LCD_CS_PIN, 0); + for (j = 0; j < LCD.HEIGHT; j++) + { + DEV_SPI_Write_nByte((uint8_t *) &Image[j * LCD.WIDTH], LCD.WIDTH * 2); + } + DEV_Digital_Write(LCD_CS_PIN, 1); +} + +/****************************************************************************** + function : Sends the image buffer in RAM to displays + parameter: + ******************************************************************************/ +void LCD_Display(UWORD *Image) +{ + UWORD j; + LCD_SetWindows(0, 0, LCD.WIDTH, LCD.HEIGHT); + DEV_Digital_Write(LCD_DC_PIN, 1); + DEV_Digital_Write(LCD_CS_PIN, 0); + for (j = 0; j < LCD.HEIGHT; j++) + { + DEV_SPI_Write_nByte((uint8_t *) &Image[j * LCD.WIDTH], LCD.WIDTH * 2); + } + DEV_Digital_Write(LCD_CS_PIN, 1); + LCD_SendCommand(0x29); +} + +/****************************************************************************** + function : Sends the image buffer in RAM to displays + parameter: + Xstart : X direction Start coordinates + Ystart : Y direction Start coordinates + Xend : X direction end coordinates + Yend : Y direction end coordinates + Image : Written content + ******************************************************************************/ +void LCD_DisplayWindows(UWORD Xstart, UWORD Ystart, UWORD Xend, UWORD Yend, UWORD *Image) +{ + // display + UDOUBLE Addr = 0; + + UWORD j; + LCD_SetWindows(Xstart, Ystart, Xend, Yend); + DEV_Digital_Write(LCD_DC_PIN, 1); + DEV_Digital_Write(LCD_CS_PIN, 0); + for (j = Ystart; j < Yend - 1; j++) + { + Addr = Xstart + j * LCD.WIDTH; + DEV_SPI_Write_nByte((uint8_t *) &Image[Addr], (Xend - Xstart) * 2); + } + DEV_Digital_Write(LCD_CS_PIN, 1); +} + +/****************************************************************************** + function : Change the color of a point + parameter: + X : X coordinates + Y : Y coordinates + Color : Color + ******************************************************************************/ +void LCD_DisplayPoint(UWORD X, UWORD Y, UWORD Color) +{ + LCD_SetWindows(X, Y, X, Y); + LCD_SendData_16Bit(Color); +} + +void Handler_LCD(int signo) +{ + // System Exit + rt_kprintf("\r\nHandler:Program stop\r\n"); + DEV_Module_Exit(); + exit(0); +} + +/** + * GPIO read and write + **/ +void DEV_Digital_Write(UWORD Pin, UBYTE Value) +{ + gpio_put(Pin, Value); +} + +UBYTE DEV_Digital_Read(UWORD Pin) +{ + return gpio_get(Pin); +} + +/** + * GPIO Mode + **/ +void DEV_GPIO_Mode(UWORD Pin, UWORD Mode) +{ + gpio_init(Pin); + if (Mode == 0 || Mode == GPIO_IN) + { + gpio_set_dir(Pin, GPIO_IN); + } + else + { + gpio_set_dir(Pin, GPIO_OUT); + } +} + +/** + * SPI + **/ +void DEV_SPI_WriteByte(UBYTE Value) +{ + spi_write_blocking(SPI_PORT, &Value, 1); +} + +void DEV_SPI_Write_nByte(UBYTE pData[], UDOUBLE Len) +{ + spi_write_blocking(SPI_PORT, pData, Len); +} + +void DEV_GPIO_Init(void) +{ + DEV_GPIO_Mode(LCD_RST_PIN, 1); + DEV_GPIO_Mode(LCD_DC_PIN, 1); + DEV_GPIO_Mode(LCD_CS_PIN, 1); + DEV_GPIO_Mode(LCD_BL_PIN, 1); + + DEV_Digital_Write(LCD_CS_PIN, 1); + DEV_Digital_Write(LCD_DC_PIN, 0); + DEV_Digital_Write(LCD_BL_PIN, 1); +} + +/****************************************************************************** + function: Module Initialize, the library and initialize the pins, SPI protocol + parameter: + Info: + ******************************************************************************/ +UBYTE DEV_Module_Init(void) +{ + // SPI Config + spi_init(SPI_PORT, 80000 * 1000); + gpio_set_function(LCD_CLK_PIN, GPIO_FUNC_SPI); + gpio_set_function(LCD_MOSI_PIN, GPIO_FUNC_SPI); + + // GPIO Config + DEV_GPIO_Init(); + + // PWM Config + gpio_set_function(LCD_BL_PIN, GPIO_FUNC_PWM); + slice_num = pwm_gpio_to_slice_num(LCD_BL_PIN); + pwm_set_wrap(slice_num, 100); + pwm_set_chan_level(slice_num, PWM_CHAN_B, 1); + pwm_set_clkdiv(slice_num, 50); + pwm_set_enabled(slice_num, true); + + rt_kprintf("DEV_Module_Init OK \r\n"); + + return 0; +} + +void DEV_SET_PWM(UBYTE Value) +{ + if (Value < 0 || Value > 100) + { + rt_kprintf("DEV_SET_PWM Error \r\n"); + } + else + { + pwm_set_chan_level(slice_num, PWM_CHAN_B, Value); + } +} + +UBYTE SPI_Init(void) +{ + DEV_Module_Init(); + return 0; +} + +bool _swapBytes; +UDOUBLE dma_tx_channel; +dma_channel_config dma_tx_config; + +/*************************************************************************************** + ** Function name: dmaWait + ** Description: Wait until DMA is over (blocking!) + ***************************************************************************************/ +void dmaWait(void) +{ + while (dma_channel_is_busy(dma_tx_channel)) + ; + + // For SPI must also wait for FIFO to flush and reset format + while (spi_get_hw(SPI_PORT)->sr & SPI_SSPSR_BSY_BITS) + { + }; + spi_set_format(SPI_PORT, 16, (spi_cpol_t) 0, (spi_cpha_t) 0, SPI_MSB_FIRST); +} + +/*************************************************************************************** + ** Function name: pushPixelsDMA + ** Description: Push pixels to TFT + ***************************************************************************************/ +void pushPixelsDMA(UWORD* image, UDOUBLE len) +{ + if ((len == 0)) + return; + + dmaWait(); + + channel_config_set_bswap(&dma_tx_config, !_swapBytes); + + dma_channel_configure(dma_tx_channel, &dma_tx_config, &spi_get_hw(SPI_PORT)->dr, (UWORD*) image, len, true); +} + +bool initDMA(bool ctrl_cs) +{ + dma_tx_channel = dma_claim_unused_channel(true); + dma_tx_config = dma_channel_get_default_config(dma_tx_channel); + + channel_config_set_transfer_data_size(&dma_tx_config, DMA_SIZE_16); + channel_config_set_dreq(&dma_tx_config, spi_get_index(SPI_PORT) ? DREQ_SPI1_TX : DREQ_SPI0_TX); + + return true; +} diff --git a/bsp/raspberry-pico/board/ports/lcd/drv_lcd.h b/bsp/raspberry-pico/board/ports/lcd/drv_lcd.h new file mode 100644 index 0000000000..090c4013bc --- /dev/null +++ b/bsp/raspberry-pico/board/ports/lcd/drv_lcd.h @@ -0,0 +1,75 @@ +#ifndef __DRV_LCD_H +#define __DRV_LCD_H + +#include <stdint.h> +#include <rtdevice.h> + +#include "pico/stdlib.h" +#include "hardware/spi.h" +#include "hardware/i2c.h" +#include "hardware/pwm.h" +#include "hardware/dma.h" + +#define LCD_HEIGHT 240 +#define LCD_WIDTH 240 + +#define HORIZONTAL 0 +#define VERTICAL 1 + +/** + * data + **/ +#define UBYTE uint8_t +#define UWORD uint16_t +#define UDOUBLE uint32_t + +/** + * GPIOI config + **/ +#define LCD_RST_PIN 12 +#define LCD_DC_PIN 8 +#define LCD_BL_PIN 13 + +#define LCD_CS_PIN 9 +#define LCD_CLK_PIN 10 +#define LCD_MOSI_PIN 11 + +typedef struct +{ + UWORD WIDTH;UWORD HEIGHT;UBYTE SCAN_DIR; +} LCD_ATTRIBUTES; +extern LCD_ATTRIBUTES LCD; + +/*------------------------------------------------------------------------------------------------------*/ +void DEV_Digital_Write(UWORD Pin, UBYTE Value); +UBYTE DEV_Digital_Read(UWORD Pin); + +void DEV_GPIO_Mode(UWORD Pin, UWORD Mode); +void DEV_KEY_Config(UWORD Pin); +void DEV_Digital_Write(UWORD Pin, UBYTE Value); +UBYTE DEV_Digital_Read(UWORD Pin); + +void DEV_SPI_WriteByte(UBYTE Value); +void DEV_SPI_Write_nByte(UBYTE *pData, UDOUBLE Len); + +void DEV_SET_PWM(UBYTE Value); + +UBYTE SPI_Init(void); +UBYTE DEV_Module_Init(void); +void DEV_Module_Exit(void); + +/******************************************************************************** + function: + Macro definition variable name + ********************************************************************************/ +bool initDMA(bool ctrl_cs); +void LCD_Init(UBYTE Scan_dir); +void LCD_Clear(UWORD Color); +void LCD_Display(UWORD *Image); +void LCD_SetWindows(UWORD Xstart, UWORD Ystart, UWORD Xend, UWORD Yend); +void LCD_DisplayWindows(UWORD Xstart, UWORD Ystart, UWORD Xend, UWORD Yend, UWORD *Image); +void pushPixelsDMA(UWORD* image, UDOUBLE len); +void LCD_DisplayPoint(UWORD X, UWORD Y, UWORD Color); +void Handler_LCD(int signo); + +#endif diff --git a/bsp/raspberry-pico/libraries/Kconfig b/bsp/raspberry-pico/libraries/Kconfig new file mode 100644 index 0000000000..9de45a9aa6 --- /dev/null +++ b/bsp/raspberry-pico/libraries/Kconfig @@ -0,0 +1,23 @@ +menu "Hardware Drivers Config" + +config SOC_RP2040 + bool + select SOC_SERIES_RP2040_PICO + select RT_USING_COMPONENTS_INIT + default y + +menu "Onboard Peripheral Drivers" + + config BSP_USING_LVGL + bool "Enable LVGL for LCD" + select PKG_USING_LVGL + select BSP_USING_SPI_LCD + select PKG_USING_LV_MUSIC_DEMO + default n + +endmenu + +endmenu + + + diff --git a/bsp/raspberry-pico/libraries/SConscript b/bsp/raspberry-pico/libraries/SConscript index 8d45dee783..f0102b2cb5 100644 --- a/bsp/raspberry-pico/libraries/SConscript +++ b/bsp/raspberry-pico/libraries/SConscript @@ -13,6 +13,9 @@ pico-sdk/src/rp2_common/hardware_claim/claim.c pico-sdk/src/rp2_common/hardware_sync/sync.c pico-sdk/src/rp2_common/pico_platform/platform.c pico-sdk/src/rp2_common/hardware_uart/uart.c +pico-sdk/src/rp2_common/hardware_spi/spi.c +pico-sdk/src/rp2_common/hardware_dma/dma.c +pico-sdk/src/rp2_common/hardware_i2c/i2c.c pico-sdk/src/common/pico_time/time.c pico-sdk/src/common/pico_time/timeout_helper.c pico-sdk/src/rp2_common/hardware_timer/timer.c @@ -67,6 +70,10 @@ path = [ cwd + '/pico-sdk/src/rp2_common/hardware_claim/include', cwd + '/pico-sdk/src/rp2_common/hardware_sync/include', cwd + '/pico-sdk/src/rp2_common/hardware_uart/include', + cwd + '/pico-sdk/src/rp2_common/hardware_dma/include', + cwd + '/pico-sdk/src/rp2_common/hardware_spi/include', + cwd + '/pico-sdk/src/rp2_common/hardware_i2c/include', + cwd + '/pico-sdk/src/rp2_common/hardware_pwm/include', cwd + '/pico-sdk/src/rp2_common/hardware_divider/include', cwd + '/pico-sdk/src/common/pico_time/include', cwd + '/pico-sdk/src/rp2_common/hardware_timer/include', diff --git a/bsp/simulator/drivers/module_win32.c b/bsp/simulator/drivers/module_win32.c index 81a98eca87..0f07576964 100644 --- a/bsp/simulator/drivers/module_win32.c +++ b/bsp/simulator/drivers/module_win32.c @@ -193,7 +193,11 @@ RTM_EXPORT(rt_module_find); #ifdef RT_USING_DFS #include <windows.h> -#include <dfs_posix.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> extern char * dfs_win32_dirdup(char * path); static char* _module_name(const char *path) { diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_lcd.c b/bsp/stm32/libraries/HAL_Drivers/drv_lcd.c index 96c61835e6..a0db14fc1a 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_lcd.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_lcd.c @@ -90,6 +90,9 @@ static rt_err_t drv_lcd_control(struct rt_device *device, int cmd, void *args) info->framebuffer = lcd->lcd_info.framebuffer; } break; + + default: + return -RT_EINVAL; } return RT_EOK; diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_lcd_mipi.c b/bsp/stm32/libraries/HAL_Drivers/drv_lcd_mipi.c index 275a18e925..e3bb847c5c 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_lcd_mipi.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_lcd_mipi.c @@ -23,7 +23,7 @@ struct stm32_lcd struct rt_device parent; struct rt_device_graphic_info info; }; -static struct stm32_lcd lcd; +struct stm32_lcd lcd; extern void stm32_mipi_lcd_init(void); extern void stm32_mipi_lcd_config(rt_uint32_t pixel_format); @@ -76,7 +76,7 @@ rt_err_t ltdc_init(void) HAL_DSI_Init(&hdsi, &dsi_pll); hdsi_video.VirtualChannelID = 0; - hdsi_video.ColorCoding = DSI_RGB888; + hdsi_video.ColorCoding = DSI_RGB565; hdsi_video.VSPolarity = DSI_VSYNC_ACTIVE_HIGH; hdsi_video.HSPolarity = DSI_HSYNC_ACTIVE_HIGH; hdsi_video.DEPolarity = DSI_DATA_ENABLE_ACTIVE_HIGH; @@ -130,7 +130,7 @@ rt_err_t ltdc_init(void) HAL_DSI_Start(&(hdsi)); - stm32_mipi_lcd_config(RTGRAPHIC_PIXEL_FORMAT_ARGB888); + stm32_mipi_lcd_config(RTGRAPHIC_PIXEL_FORMAT_RGB565); return RT_EOK; } @@ -143,7 +143,7 @@ void ltdc_layer_init(uint16_t index, uint32_t framebuffer) layer_cfg.WindowX1 = LCD_WIDTH; layer_cfg.WindowY0 = 0; layer_cfg.WindowY1 = LCD_HEIGHT; - layer_cfg.PixelFormat = LTDC_PIXEL_FORMAT_ARGB8888; + layer_cfg.PixelFormat = LTDC_PIXEL_FORMAT_RGB565; layer_cfg.BlendingFactor1 = LTDC_BLENDING_FACTOR1_PAxCA; layer_cfg.BlendingFactor2 = LTDC_BLENDING_FACTOR2_PAxCA; layer_cfg.Alpha = 255; @@ -169,9 +169,9 @@ static rt_err_t stm32_lcd_init(rt_device_t device) { lcd.info.width = LCD_WIDTH; lcd.info.height = LCD_HEIGHT; - lcd.info.pixel_format = RTGRAPHIC_PIXEL_FORMAT_ARGB888; - lcd.info.bits_per_pixel = 32; - lcd.info.framebuffer = (void *)rt_malloc_align(LCD_WIDTH * LCD_HEIGHT * (lcd.info.bits_per_pixel / 8), 32); + lcd.info.pixel_format = RTGRAPHIC_PIXEL_FORMAT_RGB565; + lcd.info.bits_per_pixel = 16; + lcd.info.framebuffer = (void *)rt_malloc_align(LCD_WIDTH * LCD_HEIGHT * (lcd.info.bits_per_pixel / 8), 32);; memset(lcd.info.framebuffer, 0, LCD_WIDTH * LCD_HEIGHT * (lcd.info.bits_per_pixel / 8)); ltdc_init(); ltdc_layer_init(0, (uint32_t)lcd.info.framebuffer); diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_usart.c b/bsp/stm32/libraries/HAL_Drivers/drv_usart.c index 7807e0c010..6211676056 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_usart.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_usart.c @@ -918,6 +918,7 @@ static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag) struct stm32_uart *uart; RT_ASSERT(serial != RT_NULL); + RT_ASSERT(flag == RT_DEVICE_FLAG_DMA_TX || flag == RT_DEVICE_FLAG_DMA_RX); uart = rt_container_of(serial, struct stm32_uart, serial); if (RT_DEVICE_FLAG_DMA_RX == flag) @@ -925,7 +926,7 @@ static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag) DMA_Handle = &uart->dma_rx.handle; dma_config = uart->config->dma_rx; } - else if (RT_DEVICE_FLAG_DMA_TX == flag) + else /* RT_DEVICE_FLAG_DMA_TX == flag */ { DMA_Handle = &uart->dma_tx.handle; dma_config = uart->config->dma_tx; diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_usart_v2.c b/bsp/stm32/libraries/HAL_Drivers/drv_usart_v2.c index 038129beef..95635fe37b 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_usart_v2.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_usart_v2.c @@ -959,6 +959,7 @@ static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag) struct stm32_uart *uart; RT_ASSERT(serial != RT_NULL); + RT_ASSERT(flag == RT_DEVICE_FLAG_DMA_TX || flag == RT_DEVICE_FLAG_DMA_RX); uart = rt_container_of(serial, struct stm32_uart, serial); if (RT_DEVICE_FLAG_DMA_RX == flag) @@ -966,7 +967,7 @@ static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag) DMA_Handle = &uart->dma_rx.handle; dma_config = uart->config->dma_rx; } - else if (RT_DEVICE_FLAG_DMA_TX == flag) + else /* RT_DEVICE_FLAG_DMA_TX == flag */ { DMA_Handle = &uart->dma_tx.handle; dma_config = uart->config->dma_tx; diff --git a/bsp/stm32/stm32f103-atk-warshipv3/board/ports/sdcard_port.c b/bsp/stm32/stm32f103-atk-warshipv3/board/ports/sdcard_port.c index d56fb039d4..df2614c080 100644 --- a/bsp/stm32/stm32f103-atk-warshipv3/board/ports/sdcard_port.c +++ b/bsp/stm32/stm32f103-atk-warshipv3/board/ports/sdcard_port.c @@ -14,7 +14,11 @@ #include <dfs_elm.h> #include <dfs_fs.h> -#include <dfs_posix.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #define DBG_TAG "app.card" #define DBG_LVL DBG_INFO diff --git a/bsp/stm32/stm32f103-dofly-M3S/board/ports/drv_sdcard.c b/bsp/stm32/stm32f103-dofly-M3S/board/ports/drv_sdcard.c index 13d235b694..d717da27dd 100644 --- a/bsp/stm32/stm32f103-dofly-M3S/board/ports/drv_sdcard.c +++ b/bsp/stm32/stm32f103-dofly-M3S/board/ports/drv_sdcard.c @@ -14,7 +14,11 @@ #if defined BSP_USING_SDIO_SDCARD || defined BSP_USING_SPI_SDCARD #include <dfs_elm.h> #include <dfs_fs.h> -#include <dfs_posix.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #include "drv_gpio.h" #define DBG_TAG "app.card" diff --git a/bsp/stm32/stm32f103-fire-arbitrary/board/ports/sdcard_port.c b/bsp/stm32/stm32f103-fire-arbitrary/board/ports/sdcard_port.c index 55baa2c263..c0575f01b2 100644 --- a/bsp/stm32/stm32f103-fire-arbitrary/board/ports/sdcard_port.c +++ b/bsp/stm32/stm32f103-fire-arbitrary/board/ports/sdcard_port.c @@ -14,7 +14,11 @@ #include <dfs_elm.h> #include <dfs_fs.h> -#include <dfs_posix.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #define DBG_TAG "app.card" #define DBG_LVL DBG_INFO diff --git a/bsp/stm32/stm32f407-armfly-v5/board/ports/sdcard_port.c b/bsp/stm32/stm32f407-armfly-v5/board/ports/sdcard_port.c index f5427ef265..2b6e48ba3f 100644 --- a/bsp/stm32/stm32f407-armfly-v5/board/ports/sdcard_port.c +++ b/bsp/stm32/stm32f407-armfly-v5/board/ports/sdcard_port.c @@ -14,7 +14,11 @@ #include <dfs_elm.h> #include <dfs_fs.h> -#include <dfs_posix.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #define DBG_TAG "app.card" #define DBG_LVL DBG_INFO diff --git a/bsp/stm32/stm32f407-atk-explorer/board/Kconfig b/bsp/stm32/stm32f407-atk-explorer/board/Kconfig index 2684672d54..7fcdba54c8 100644 --- a/bsp/stm32/stm32f407-atk-explorer/board/Kconfig +++ b/bsp/stm32/stm32f407-atk-explorer/board/Kconfig @@ -438,6 +438,7 @@ menu "Board extended module Drivers" select PKG_USING_AT_DEVICE select AT_DEVICE_USING_ESP8266 select AT_DEVICE_ESP8266_SAMPLE + select AT_DEVICE_ESP8266_SAMPLE_BSP_TAKEOVER if BSP_USING_AT_ESP8266 @@ -457,6 +458,8 @@ menu "Board extended module Drivers" int "The maximum length of receive line buffer" default 512 + comment "May adjust RT_SERIAL_RB_BUFSZ up to 512 if using the Serial V1 device driver" + endif endmenu diff --git a/bsp/stm32/stm32f407-atk-explorer/board/ports/drv_filesystem.c b/bsp/stm32/stm32f407-atk-explorer/board/ports/drv_filesystem.c index 6635c43128..cafb45b107 100644 --- a/bsp/stm32/stm32f407-atk-explorer/board/ports/drv_filesystem.c +++ b/bsp/stm32/stm32f407-atk-explorer/board/ports/drv_filesystem.c @@ -15,7 +15,11 @@ #ifdef BSP_USING_FS #include <dfs_romfs.h> #include <dfs_fs.h> -#include <dfs_posix.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #if DFS_FILESYSTEMS_MAX < 4 #error "Please define DFS_FILESYSTEMS_MAX more than 4" diff --git a/bsp/stm32/stm32f427-robomaster-a/board/ports/sdcard_port.c b/bsp/stm32/stm32f427-robomaster-a/board/ports/sdcard_port.c index 6a79c83523..376089ef9e 100644 --- a/bsp/stm32/stm32f427-robomaster-a/board/ports/sdcard_port.c +++ b/bsp/stm32/stm32f427-robomaster-a/board/ports/sdcard_port.c @@ -14,7 +14,11 @@ #include <dfs_elm.h> #include <dfs_fs.h> -#include <dfs_posix.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #define DBG_TAG "app.card" #define DBG_LVL DBG_INFO diff --git a/bsp/stm32/stm32f429-armfly-v6/board/ports/sdcard_port.c b/bsp/stm32/stm32f429-armfly-v6/board/ports/sdcard_port.c index 6a79c83523..376089ef9e 100644 --- a/bsp/stm32/stm32f429-armfly-v6/board/ports/sdcard_port.c +++ b/bsp/stm32/stm32f429-armfly-v6/board/ports/sdcard_port.c @@ -14,7 +14,11 @@ #include <dfs_elm.h> #include <dfs_fs.h> -#include <dfs_posix.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #define DBG_TAG "app.card" #define DBG_LVL DBG_INFO diff --git a/bsp/stm32/stm32f429-atk-apollo/board/ports/sdcard_port.c b/bsp/stm32/stm32f429-atk-apollo/board/ports/sdcard_port.c index fe2595fa4b..058a948a8a 100644 --- a/bsp/stm32/stm32f429-atk-apollo/board/ports/sdcard_port.c +++ b/bsp/stm32/stm32f429-atk-apollo/board/ports/sdcard_port.c @@ -15,7 +15,11 @@ #include <dfs_elm.h> #include <dfs_fs.h> -#include <dfs_posix.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #define DBG_TAG "app.card" #define DBG_LVL DBG_INFO diff --git a/bsp/stm32/stm32f429-fire-challenger/board/ports/sdcard_port.c b/bsp/stm32/stm32f429-fire-challenger/board/ports/sdcard_port.c index 01111ab4d3..93702aed13 100644 --- a/bsp/stm32/stm32f429-fire-challenger/board/ports/sdcard_port.c +++ b/bsp/stm32/stm32f429-fire-challenger/board/ports/sdcard_port.c @@ -14,7 +14,11 @@ #include <dfs_elm.h> #include <dfs_fs.h> -#include <dfs_posix.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #include "drv_gpio.h" #define DBG_TAG "app.card" diff --git a/bsp/stm32/stm32f469-st-disco/applications/lvgl/lv_conf.h b/bsp/stm32/stm32f469-st-disco/applications/lvgl/lv_conf.h index a657bd6a47..7f3d0ad633 100644 --- a/bsp/stm32/stm32f469-st-disco/applications/lvgl/lv_conf.h +++ b/bsp/stm32/stm32f469-st-disco/applications/lvgl/lv_conf.h @@ -12,7 +12,7 @@ #define LV_CONF_H #define LV_USE_PERF_MONITOR 1 -#define LV_COLOR_DEPTH 32 +#define LV_COLOR_DEPTH 16 #define LV_USE_GPU_STM32_DMA2D 1 #define LV_GPU_DMA2D_CMSIS_INCLUDE "stm32f469xx.h" diff --git a/bsp/stm32/stm32f469-st-disco/applications/lvgl/lv_demo.c b/bsp/stm32/stm32f469-st-disco/applications/lvgl/lv_demo.c index 17d01e09cc..0026e0c06b 100644 --- a/bsp/stm32/stm32f469-st-disco/applications/lvgl/lv_demo.c +++ b/bsp/stm32/stm32f469-st-disco/applications/lvgl/lv_demo.c @@ -15,14 +15,17 @@ #include <rtdbg.h> #ifndef LV_THREAD_STACK_SIZE -#define LV_THREAD_STACK_SIZE 4096 + #define LV_THREAD_STACK_SIZE 4096 #endif #ifndef LV_THREAD_PRIO -#define LV_THREAD_PRIO (RT_THREAD_PRIORITY_MAX*2/3) + #define LV_THREAD_PRIO (RT_THREAD_PRIORITY_MAX * 2 / 8) #endif -static void lvgl_thread(void *parameter) +static struct rt_thread lvgl_thread; +static rt_uint8_t lvgl_thread_stack[LV_THREAD_STACK_SIZE]; + +static void lvgl_entry(void *parameter) { extern void lv_demo_music(void); lv_demo_music(); @@ -30,7 +33,7 @@ static void lvgl_thread(void *parameter) while(1) { lv_task_handler(); - rt_thread_mdelay(1); + rt_thread_mdelay(5); } } @@ -38,12 +41,15 @@ static int lvgl_demo_init(void) { rt_thread_t tid; - tid = rt_thread_create("LVGL", lvgl_thread, RT_NULL, LV_THREAD_STACK_SIZE, LV_THREAD_PRIO, 10); - if(tid == RT_NULL) - { - LOG_E("Fail to create 'LVGL' thread"); - } - rt_thread_startup(tid); + rt_thread_init(&lvgl_thread, + "LVGL", + lvgl_entry, + RT_NULL, + &lvgl_thread_stack[0], + sizeof(lvgl_thread_stack), + LV_THREAD_PRIO, + 10); + rt_thread_startup(&lvgl_thread); return 0; } diff --git a/bsp/stm32/stm32f469-st-disco/applications/lvgl/lv_port_disp.c b/bsp/stm32/stm32f469-st-disco/applications/lvgl/lv_port_disp.c index 2bc5743edf..6660e08b50 100644 --- a/bsp/stm32/stm32f469-st-disco/applications/lvgl/lv_port_disp.c +++ b/bsp/stm32/stm32f469-st-disco/applications/lvgl/lv_port_disp.c @@ -6,6 +6,7 @@ * Change Logs: * Date Author Notes * 2021-10-18 Meco Man The first version + * 2021-12-24 Rb Refresh using dma2d */ #include <lvgl.h> #include <lcd_port.h> @@ -22,133 +23,79 @@ static struct rt_device_graphic_info info; static lv_disp_drv_t disp_drv; /*Descriptor of a display driver*/ -static DMA_HandleTypeDef DmaHandle; -#define DMA_STREAM DMA2_Stream0 -#define DMA_CHANNEL DMA_CHANNEL_0 -#define DMA_STREAM_IRQ DMA2_Stream0_IRQn -#define DMA_STREAM_IRQHANDLER DMA2_Stream0_IRQHandler +#define DISP_BUF_SIZE (LV_HOR_RES_MAX * LV_VER_RES_MAX / 4) -static int32_t x1_flush; -static int32_t y1_flush; -static int32_t x2_flush; -static int32_t y2_fill; -static int32_t y_fill_act; -static const lv_color_t * buf_to_flush; +static lv_disp_drv_t g_disp_drv; +extern LTDC_HandleTypeDef hltdc; +volatile rt_bool_t g_gpu_state = RT_FALSE; -static void DMA_TransferComplete(DMA_HandleTypeDef *han) -{ - y_fill_act ++; - - if(y_fill_act > y2_fill) - { - lv_disp_flush_ready(&disp_drv); - } - else - { - buf_to_flush += (x2_flush - x1_flush + 1); - - if (HAL_DMA_Start_IT(han,(uint32_t)buf_to_flush, - (uint32_t)&((uint32_t *)info.framebuffer)[y_fill_act * info.width + x1_flush], - (x2_flush - x1_flush + 1)) != HAL_OK) - { - LOG_E("HAL_DMA_Start_IT error"); - RT_ASSERT(0); - } - } -} - -static void DMA_TransferError(DMA_HandleTypeDef *han) -{ - LOG_E("DMA_TransferError"); - RT_ASSERT(0); -} - -void DMA_STREAM_IRQHANDLER(void) +static void lvgl_dma_config(void) { - rt_interrupt_enter(); - - HAL_DMA_IRQHandler(&DmaHandle); - - rt_interrupt_leave(); + HAL_NVIC_SetPriority(DMA2D_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(DMA2D_IRQn); + __HAL_RCC_DMA2D_CLK_ENABLE(); } -static void lvgl_dma_config(void) +static void lcd_fb_flush(lv_disp_drv_t *disp_drv, const lv_area_t *area, lv_color_t *color_p) { - /*## -1- Enable DMA2 clock #################################################*/ - __HAL_RCC_DMA2_CLK_ENABLE(); + uint32_t OffLineSrc = LV_HOR_RES_MAX - (area->x2 - area->x1 + 1); + uint32_t addr = (uint32_t) hltdc.LayerCfg[0].FBStartAdress + 2 * (LV_HOR_RES_MAX * area->y1 + area->x1); - /*##-2- Select the DMA functional Parameters ###############################*/ - DmaHandle.Init.Channel = DMA_CHANNEL; /* DMA_CHANNEL_0 */ - DmaHandle.Init.Direction = DMA_MEMORY_TO_MEMORY; /* M2M transfer mode */ - DmaHandle.Init.PeriphInc = DMA_PINC_ENABLE; /* Peripheral increment mode Enable */ - DmaHandle.Init.MemInc = DMA_MINC_ENABLE; /* Memory increment mode Enable */ - DmaHandle.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; /* Peripheral data alignment : 32bit */ - DmaHandle.Init.MemDataAlignment = DMA_PDATAALIGN_WORD; /* memory data alignment : 32bit */ - DmaHandle.Init.Mode = DMA_NORMAL; /* Normal DMA mode */ - DmaHandle.Init.Priority = DMA_PRIORITY_HIGH; /* priority level : high */ - DmaHandle.Init.FIFOMode = DMA_FIFOMODE_ENABLE; /* FIFO mode enabled */ - DmaHandle.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_1QUARTERFULL; /* FIFO threshold: 1/4 full */ - DmaHandle.Init.MemBurst = DMA_MBURST_SINGLE; /* Memory burst */ - DmaHandle.Init.PeriphBurst = DMA_PBURST_SINGLE; /* Peripheral burst */ + DMA2D->CR = 0x00000000UL | (1 << 9); + DMA2D->FGMAR = (uint32_t) (uint16_t*) (color_p); + DMA2D->OMAR = (uint32_t) addr; - DmaHandle.Instance = DMA_STREAM; + DMA2D->FGOR = 0; + DMA2D->OOR = OffLineSrc; - if (HAL_DMA_Init(&DmaHandle) != HAL_OK) - { - LOG_E("HAL_DMA_Init error"); - RT_ASSERT(0); - } + DMA2D->FGPFCCR = DMA2D_OUTPUT_RGB565; + DMA2D->OPFCCR = DMA2D_OUTPUT_RGB565; - HAL_DMA_RegisterCallback(&DmaHandle, HAL_DMA_XFER_CPLT_CB_ID, DMA_TransferComplete); - HAL_DMA_RegisterCallback(&DmaHandle, HAL_DMA_XFER_ERROR_CB_ID, DMA_TransferError); + DMA2D->NLR = (area->y2 - area->y1 + 1) | ((area->x2 - area->x1 + 1) << 16); + DMA2D->CR |= DMA2D_IT_TC | DMA2D_IT_TE | DMA2D_IT_CE; + DMA2D->CR |= DMA2D_CR_START; - HAL_NVIC_SetPriority(DMA_STREAM_IRQ, 0, 0); - HAL_NVIC_EnableIRQ(DMA_STREAM_IRQ); + g_gpu_state = RT_TRUE; } -static void lcd_fb_flush(lv_disp_drv_t *disp_drv, const lv_area_t *area, lv_color_t *color_p) +void DMA2D_IRQHandler(void) { - /*Return if the area is out the screen*/ - if (area->x2 < 0) return; - if (area->y2 < 0) return; - if (area->x1 > info.width - 1) return; - if (area->y1 > info.height - 1) return; + rt_interrupt_enter(); - /*Truncate the area to the screen*/ - int32_t act_x1 = area->x1 < 0 ? 0 : area->x1; - int32_t act_y1 = area->y1 < 0 ? 0 : area->y1; - int32_t act_x2 = area->x2 > info.width - 1 ? info.width - 1 : area->x2; - int32_t act_y2 = area->y2 > info.height - 1 ? info.height - 1 : area->y2; + if ((DMA2D->ISR & DMA2D_FLAG_TC) != 0U) + { + if ((DMA2D->CR & DMA2D_IT_TC) != 0U) + { - x1_flush = act_x1; - y1_flush = act_y1; - x2_flush = act_x2; - y2_fill = act_y2; - y_fill_act = act_y1; - buf_to_flush = color_p; + DMA2D->CR &= ~DMA2D_IT_TC; + DMA2D->IFCR = DMA2D_FLAG_TC; - if (HAL_DMA_Start_IT(&DmaHandle,(uint32_t)buf_to_flush, - (uint32_t)&((uint32_t *)info.framebuffer)[y_fill_act * info.width + x1_flush], - (x2_flush - x1_flush + 1)) != HAL_OK) - { - LOG_E("HAL_DMA_Start_IT error"); - RT_ASSERT(0); + if (g_gpu_state == RT_TRUE) + { + g_gpu_state = RT_FALSE; + lv_disp_flush_ready(&g_disp_drv); + } + } } + + rt_interrupt_leave(); } void lv_port_disp_init(void) { rt_err_t result; - void* buf_1 = RT_NULL; - void* buf_2 = RT_NULL; + static lv_color_t lv_disp_buf1[DISP_BUF_SIZE] = {0}; lcd_device = rt_device_find("lcd"); + if (lcd_device == 0) { - LOG_E("error!"); + LOG_E("lcd_device error!"); return; } + result = rt_device_open(lcd_device, 0); + if (result != RT_EOK) { LOG_E("error!"); @@ -157,6 +104,7 @@ void lv_port_disp_init(void) /* get framebuffer address */ result = rt_device_control(lcd_device, RTGRAPHIC_CTRL_GET_INFO, &info); + if (result != RT_EOK) { LOG_E("error!"); @@ -165,26 +113,12 @@ void lv_port_disp_init(void) } RT_ASSERT (info.bits_per_pixel == 8 || info.bits_per_pixel == 16 || - info.bits_per_pixel == 24 || info.bits_per_pixel == 32); + info.bits_per_pixel == 24 || info.bits_per_pixel == 32); lvgl_dma_config(); - buf_1 = rt_malloc(info.width * info.height * sizeof(lv_color_t)); - if (buf_1 == RT_NULL) - { - LOG_E("malloc memory failed"); - return; - } - - buf_2 = rt_malloc(info.width * info.height * sizeof(lv_color_t)); - if (buf_2 == RT_NULL) - { - LOG_E("malloc memory failed"); - return; - } - /*Initialize `disp_buf` with the buffer(s).*/ - lv_disp_draw_buf_init(&disp_buf, buf_1, buf_2, info.width * info.height); + lv_disp_draw_buf_init(&disp_buf, lv_disp_buf1, RT_NULL, DISP_BUF_SIZE); lv_disp_drv_init(&disp_drv); /*Basic initialization*/ @@ -200,4 +134,6 @@ void lv_port_disp_init(void) /*Finally register the driver*/ lv_disp_drv_register(&disp_drv); + + g_disp_drv = disp_drv; } diff --git a/bsp/stm32/stm32f469-st-disco/board/ports/drv_sdcard.c b/bsp/stm32/stm32f469-st-disco/board/ports/drv_sdcard.c index 9fd2d11fd4..986a562cdd 100644 --- a/bsp/stm32/stm32f469-st-disco/board/ports/drv_sdcard.c +++ b/bsp/stm32/stm32f469-st-disco/board/ports/drv_sdcard.c @@ -15,7 +15,11 @@ #include <dfs_elm.h> #include <dfs_fs.h> -#include <dfs_posix.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #include "drv_gpio.h" #include "drv_sdio.h" diff --git a/bsp/stm32/stm32f746-st-disco/board/ports/sdcard_port.c b/bsp/stm32/stm32f746-st-disco/board/ports/sdcard_port.c index 66e8dfefab..bcb8a33308 100644 --- a/bsp/stm32/stm32f746-st-disco/board/ports/sdcard_port.c +++ b/bsp/stm32/stm32f746-st-disco/board/ports/sdcard_port.c @@ -14,7 +14,11 @@ #include <dfs_elm.h> #include <dfs_fs.h> -#include <dfs_posix.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #define DBG_TAG "app.card" #define DBG_LVL DBG_INFO diff --git a/bsp/stm32/stm32f767-atk-apollo/board/ports/sdcard_port.c b/bsp/stm32/stm32f767-atk-apollo/board/ports/sdcard_port.c index bc7e8b676e..9180edcc7e 100644 --- a/bsp/stm32/stm32f767-atk-apollo/board/ports/sdcard_port.c +++ b/bsp/stm32/stm32f767-atk-apollo/board/ports/sdcard_port.c @@ -14,7 +14,11 @@ #include <dfs_elm.h> #include <dfs_fs.h> -#include <dfs_posix.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #define DBG_TAG "app.card" #define DBG_LVL DBG_INFO diff --git a/bsp/stm32/stm32f767-fire-challenger-v1/board/ports/sdcard_port.c b/bsp/stm32/stm32f767-fire-challenger-v1/board/ports/sdcard_port.c index f1a7b8c27f..edbb295da5 100644 --- a/bsp/stm32/stm32f767-fire-challenger-v1/board/ports/sdcard_port.c +++ b/bsp/stm32/stm32f767-fire-challenger-v1/board/ports/sdcard_port.c @@ -14,7 +14,11 @@ #include <dfs_elm.h> #include <dfs_fs.h> -#include <dfs_posix.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #include "drv_gpio.h" #define DBG_TAG "app.card" diff --git a/bsp/stm32/stm32h743-atk-apollo/board/ports/drv_ov2640.c b/bsp/stm32/stm32h743-atk-apollo/board/ports/drv_ov2640.c index 95e5784654..83058e352c 100644 --- a/bsp/stm32/stm32h743-atk-apollo/board/ports/drv_ov2640.c +++ b/bsp/stm32/stm32h743-atk-apollo/board/ports/drv_ov2640.c @@ -12,7 +12,11 @@ #if defined(BSP_USING_OV2640) -#include <dfs_posix.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #include <drv_ov2640.h> #include <drv_dcmi.h> #include "pcf8574.h" diff --git a/bsp/stm32/stm32h743-openmv-h7plus/SConstruct b/bsp/stm32/stm32h743-openmv-h7plus/SConstruct index a7cc0cb251..7adb1878ab 100644 --- a/bsp/stm32/stm32h743-openmv-h7plus/SConstruct +++ b/bsp/stm32/stm32h743-openmv-h7plus/SConstruct @@ -20,14 +20,14 @@ TARGET = 'rt-thread.' + rtconfig.TARGET_EXT DefaultEnvironment(tools=[]) env = Environment(tools = ['mingw'], AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, - CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS, + CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS, AR = rtconfig.AR, ARFLAGS = '-rc', CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS, LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) env.PrependENVPath('PATH', rtconfig.EXEC_PATH) if rtconfig.PLATFORM == 'iar': - env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES']) + env.Replace(CCCOM = ['$CC $CFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES']) env.Replace(ARFLAGS = ['']) env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map') diff --git a/bsp/stm32/stm32l475-atk-pandora/board/Kconfig b/bsp/stm32/stm32l475-atk-pandora/board/Kconfig index 767c446a13..d17a1f542b 100644 --- a/bsp/stm32/stm32l475-atk-pandora/board/Kconfig +++ b/bsp/stm32/stm32l475-atk-pandora/board/Kconfig @@ -473,8 +473,10 @@ menu "Board extended module Drivers" select PKG_USING_AT_DEVICE select AT_DEVICE_USING_ESP8266 select AT_DEVICE_ESP8266_SAMPLE + select AT_DEVICE_ESP8266_SAMPLE_BSP_TAKEOVER if BSP_USING_AT_ESP8266 + config ESP8266_SAMPLE_WIFI_SSID string "WIFI ssid" default "rtthread" @@ -490,6 +492,9 @@ menu "Board extended module Drivers" config ESP8266_SAMPLE_RECV_BUFF_LEN int "The maximum length of receive line buffer" default 512 + + comment "May adjust RT_SERIAL_RB_BUFSZ up to 512 if using the Serial V1 device driver" + endif config BSP_USING_NRF24L01 diff --git a/bsp/stm32/stm32l475-atk-pandora/board/ports/audio/drv_es8388.c b/bsp/stm32/stm32l475-atk-pandora/board/ports/audio/drv_es8388.c index 5d9844c6bd..d8bb668f59 100644 --- a/bsp/stm32/stm32l475-atk-pandora/board/ports/audio/drv_es8388.c +++ b/bsp/stm32/stm32l475-atk-pandora/board/ports/audio/drv_es8388.c @@ -25,7 +25,7 @@ static struct es8388_device es_dev = {0}; static rt_uint16_t reg_read(rt_uint8_t addr) { struct rt_i2c_msg msg[2] = {0}; - uint8_t val = 0xff; + rt_uint8_t val = 0xff; RT_ASSERT(es_dev.i2c != RT_NULL); @@ -97,7 +97,7 @@ static int es8388_set_adc_dac_volume(int mode, int volume, int dot) void es8388_set_voice_mute(rt_bool_t enable) { - uint8_t reg = 0; + rt_uint8_t reg = 0; reg = reg_read(ES8388_DACCONTROL3); reg = reg & 0xFB; @@ -154,7 +154,7 @@ rt_err_t es8388_init(const char *i2c_name, rt_uint16_t pin) rt_err_t es8388_start(enum es8388_mode mode) { int res = 0; - uint8_t prev_data = 0, data = 0; + rt_uint8_t prev_data = 0, data = 0; prev_data = reg_read(ES8388_DACCONTROL21); if (mode == ES_MODE_LINE) @@ -225,7 +225,7 @@ rt_err_t es8388_stop(enum es8388_mode mode) rt_err_t es8388_fmt_set(enum es8388_mode mode, enum es8388_format fmt) { - uint8_t reg = 0; + rt_uint8_t reg = 0; if (mode == ES_MODE_ADC || mode == ES_MODE_DAC_ADC) { diff --git a/bsp/stm32/stm32l475-atk-pandora/board/ports/drv_sdcard.c b/bsp/stm32/stm32l475-atk-pandora/board/ports/drv_sdcard.c index 2bed0ef415..ba253aacfa 100644 --- a/bsp/stm32/stm32l475-atk-pandora/board/ports/drv_sdcard.c +++ b/bsp/stm32/stm32l475-atk-pandora/board/ports/drv_sdcard.c @@ -15,7 +15,11 @@ #include <dfs_elm.h> #include <dfs_fs.h> -#include <dfs_posix.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #include "drv_spi.h" #include "spi_msd.h" diff --git a/bsp/stm32/stm32l475-atk-pandora/board/ports/fal/SConscript b/bsp/stm32/stm32l475-atk-pandora/board/ports/fal/SConscript index 4a53bd1c97..c8931044c5 100644 --- a/bsp/stm32/stm32l475-atk-pandora/board/ports/fal/SConscript +++ b/bsp/stm32/stm32l475-atk-pandora/board/ports/fal/SConscript @@ -8,16 +8,15 @@ src = [] src += Glob('*.c') CPPPATH = [cwd] -LOCAL_CCFLAGS = '' +LOCAL_CFLAGS = '' -if rtconfig.CROSS_TOOL == 'gcc': - LOCAL_CCFLAGS += ' -std=c99' -elif rtconfig.CROSS_TOOL == 'keil': - if rtconfig.PLATFORM == 'armcc': - LOCAL_CCFLAGS += ' --c99' - elif rtconfig.PLATFORM == 'armclang': - LOCAL_CCFLAGS += ' -std=c99' +if rtconfig.PLATFORM == 'gcc': + LOCAL_CFLAGS += ' -std=c99' +elif rtconfig.PLATFORM == 'armcc': + LOCAL_CFLAGS += ' --c99' +elif rtconfig.PLATFORM == 'armclang': + LOCAL_CFLAGS += ' -std=c99' -group = DefineGroup('FAL', src, depend = ['PKG_USING_FAL'], CPPPATH = CPPPATH, LOCAL_CCFLAGS = LOCAL_CCFLAGS) +group = DefineGroup('FAL', src, depend = ['PKG_USING_FAL'], CPPPATH = CPPPATH, LOCAL_CFLAGS = LOCAL_CFLAGS) Return('group') diff --git a/bsp/stm32/stm32l496-ali-developer/board/ports/sdcard_port.c b/bsp/stm32/stm32l496-ali-developer/board/ports/sdcard_port.c index 6abc52c3ba..3016f583d3 100644 --- a/bsp/stm32/stm32l496-ali-developer/board/ports/sdcard_port.c +++ b/bsp/stm32/stm32l496-ali-developer/board/ports/sdcard_port.c @@ -14,7 +14,11 @@ #include <dfs_elm.h> #include <dfs_fs.h> -#include <dfs_posix.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #define DBG_TAG "app.card" #define DBG_LVL DBG_INFO diff --git a/bsp/stm32/stm32mp157a-st-discovery/board/ports/audio/audio_play.c b/bsp/stm32/stm32mp157a-st-discovery/board/ports/audio/audio_play.c index 2e045b016b..1f463d99bf 100644 --- a/bsp/stm32/stm32mp157a-st-discovery/board/ports/audio/audio_play.c +++ b/bsp/stm32/stm32mp157a-st-discovery/board/ports/audio/audio_play.c @@ -10,7 +10,11 @@ #include <rtthread.h> #include <rtdevice.h> -#include <dfs_posix.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #if defined(BSP_USING_AUDIO) && defined(BSP_USING_SDMMC) #define BUFSZ 1024 diff --git a/bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_ov5640.c b/bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_ov5640.c index 69af85e27b..303a78fc1d 100644 --- a/bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_ov5640.c +++ b/bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_ov5640.c @@ -13,7 +13,11 @@ #if defined(BSP_USING_DCMI) #include "drv_mfx.h" -#include <dfs_posix.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #include "drv_ov5640.h" //#define DRV_DEBUG diff --git a/bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_sound.c b/bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_sound.c index b9e76a0703..93acea9c1d 100644 --- a/bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_sound.c +++ b/bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_sound.c @@ -13,7 +13,11 @@ #ifdef BSP_USING_AUDIO #include "drv_wm8994.h" -#include <dfs_posix.h> +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> #define DRV_DEBUG #define LOG_TAG "drv.sound" diff --git a/bsp/swm320-lq100/applications/main.c b/bsp/swm320-lq100/applications/main.c index 5685bf6745..ecc86347c2 100644 --- a/bsp/swm320-lq100/applications/main.c +++ b/bsp/swm320-lq100/applications/main.c @@ -260,7 +260,11 @@ MSH_CMD_EXPORT(wdt_sample, wdt sample); #include "drv_spi.h" #include "spi_flash_sfud.h" -#include "dfs_posix.h" +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> static int rt_hw_spi_flash_init(void) { @@ -380,7 +384,11 @@ MSH_CMD_EXPORT(spi_w25q_sample, spi w25q sample); //#define SDCARD_NAME "sd0" //#include "drv_spi.h" -//#include "dfs_posix.h" +// #include <dfs_file.h> +// #include <unistd.h> +// #include <stdio.h> +// #include <sys/stat.h> +// #include <sys/statfs.h> //#include "spi_msd.h" //static int rt_hw_spi1_tfcard(void) @@ -437,7 +445,11 @@ MSH_CMD_EXPORT(spi_w25q_sample, spi w25q sample); #ifdef RT_USING_SDIO #define SDCARD_NAME "sd0" -#include "dfs_posix.h" +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> static void sdio_elmfat_sample(void) { diff --git a/bsp/swm320/applications/main.c b/bsp/swm320/applications/main.c index 0ebd6663f6..f34a421727 100644 --- a/bsp/swm320/applications/main.c +++ b/bsp/swm320/applications/main.c @@ -260,7 +260,11 @@ MSH_CMD_EXPORT(wdt_sample, wdt sample); #include "drv_spi.h" #include "spi_flash_sfud.h" -#include "dfs_posix.h" +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> static int rt_hw_spi_flash_init(void) { @@ -380,7 +384,11 @@ MSH_CMD_EXPORT(spi_w25q_sample, spi w25q sample); //#define SDCARD_NAME "sd0" //#include "drv_spi.h" -//#include "dfs_posix.h" +// #include <dfs_file.h> +// #include <unistd.h> +// #include <stdio.h> +// #include <sys/stat.h> +// #include <sys/statfs.h> //#include "spi_msd.h" //static int rt_hw_spi1_tfcard(void) @@ -437,7 +445,11 @@ MSH_CMD_EXPORT(spi_w25q_sample, spi w25q sample); #ifdef RT_USING_SDIO #define SDCARD_NAME "sd0" -#include "dfs_posix.h" +#include <dfs_file.h> +#include <unistd.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/statfs.h> static void sdio_elmfat_sample(void) { diff --git a/bsp/thead-smart/applications/SConscript b/bsp/thead-smart/applications/SConscript index b95023ca41..873f10c6e5 100644 --- a/bsp/thead-smart/applications/SConscript +++ b/bsp/thead-smart/applications/SConscript @@ -6,8 +6,8 @@ cwd = GetCurrentDir() src = Glob('*.c') CPPPATH = GetCurrentDir() -CCFLAGS = ' -c -ffunction-sections' +CFLAGS = ' -c -ffunction-sections' -group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH, CCFLAGS=CCFLAGS) +group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH, CFLAGS=CFLAGS) Return('group') diff --git a/bsp/tm4c129x/libraries/SConscript b/bsp/tm4c129x/libraries/SConscript index 56c7b84ab3..9262cbfe87 100644 --- a/bsp/tm4c129x/libraries/SConscript +++ b/bsp/tm4c129x/libraries/SConscript @@ -6,7 +6,7 @@ from building import * cwd = GetCurrentDir() src = Glob('driverlib/*.c') SrcRemove(src, 'onewire.c') -CCFLAGS = '' +CFLAGS = '' # add for startup script if rtconfig.CROSS_TOOL == 'gcc': @@ -15,12 +15,12 @@ elif rtconfig.CROSS_TOOL == 'keil': src += ['startup/startup_rvmdk.S'] elif rtconfig.CROSS_TOOL == 'iar': src += ['startup/startup_ewarm.c'] - CCFLAGS += ' --diag_suppress=pe177' + CFLAGS += ' --diag_suppress=pe177' CPPPATH = [cwd, cwd + '/inc', cwd + '/driverlib'] CPPDEFINES = [rtconfig.PART_TYPE] -group = DefineGroup('Libraries', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES = CPPDEFINES, CCFLAGS = CCFLAGS) +group = DefineGroup('Libraries', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES = CPPDEFINES, CFLAGS = CFLAGS) Return('group') diff --git a/bsp/zynqmp-r5-axu4ev/.config b/bsp/zynqmp-r5-axu4ev/.config index e72504bec4..9c68105bb2 100644 --- a/bsp/zynqmp-r5-axu4ev/.config +++ b/bsp/zynqmp-r5-axu4ev/.config @@ -265,8 +265,7 @@ CONFIG_NETDEV_IPV6=0 # CONFIG_RT_USING_LWIP=y # CONFIG_RT_USING_LWIP141 is not set -CONFIG_RT_USING_LWIP202=y -# CONFIG_RT_USING_LWIP203 is not set +CONFIG_RT_USING_LWIP203=y # CONFIG_RT_USING_LWIP212 is not set # CONFIG_RT_USING_LWIP_IPV6 is not set CONFIG_RT_LWIP_MEM_ALIGNMENT=32 @@ -497,6 +496,7 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_PKG_USING_MCURSES is not set # CONFIG_PKG_USING_TERMBOX is not set # CONFIG_PKG_USING_VT100 is not set +# CONFIG_PKG_USING_QRCODE is not set # # tools packages @@ -507,7 +507,6 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_PKG_USING_SYSTEMVIEW is not set # CONFIG_PKG_USING_SEGGER_RTT is not set # CONFIG_PKG_USING_RDB is not set -# CONFIG_PKG_USING_QRCODE is not set # CONFIG_PKG_USING_ULOG_EASYFLASH is not set # CONFIG_PKG_USING_ULOG_FILE is not set # CONFIG_PKG_USING_LOGMGR is not set @@ -558,6 +557,7 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_PKG_USING_POSIX_GETLINE is not set # CONFIG_PKG_USING_POSIX_WCWIDTH is not set # CONFIG_PKG_USING_POSIX_ITOA is not set +# CONFIG_PKG_USING_POSIX_STRINGS is not set # # acceleration: Assembly language or algorithmic acceleration packages @@ -669,6 +669,7 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_PKG_USING_SSD1306 is not set # CONFIG_PKG_USING_QKEY is not set # CONFIG_PKG_USING_RS485 is not set +# CONFIG_PKG_USING_RS232 is not set # CONFIG_PKG_USING_NES is not set # CONFIG_PKG_USING_VIRTUAL_SENSOR is not set # CONFIG_PKG_USING_VDEVICE is not set @@ -756,6 +757,8 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_PKG_USING_LWGPS is not set # CONFIG_PKG_USING_STATE_MACHINE is not set # CONFIG_PKG_USING_DESIGN_PATTERN is not set +# CONFIG_PKG_USING_CONTROLLER is not set +# CONFIG_PKG_USING_PHASE_LOCKED_LOOP is not set CONFIG_SOC_ZYNQMP_R5=y # diff --git a/bsp/zynqmp-r5-axu4ev/drivers/board.h b/bsp/zynqmp-r5-axu4ev/drivers/board.h index 07c43b5dc1..ad1bd2fff1 100644 --- a/bsp/zynqmp-r5-axu4ev/drivers/board.h +++ b/bsp/zynqmp-r5-axu4ev/drivers/board.h @@ -15,4 +15,4 @@ extern int __bss_end; void rt_hw_board_init(); -#endif
\ No newline at end of file +#endif diff --git a/bsp/zynqmp-r5-axu4ev/drivers/drv_eth.c b/bsp/zynqmp-r5-axu4ev/drivers/drv_eth.c index 05c29305fc..b7b9a22a1d 100644 --- a/bsp/zynqmp-r5-axu4ev/drivers/drv_eth.c +++ b/bsp/zynqmp-r5-axu4ev/drivers/drv_eth.c @@ -344,4 +344,4 @@ static int rt_hw_zynqmp_eth_init(void) return state; } -INIT_DEVICE_EXPORT(rt_hw_zynqmp_eth_init);
\ No newline at end of file +INIT_DEVICE_EXPORT(rt_hw_zynqmp_eth_init); diff --git a/bsp/zynqmp-r5-axu4ev/drivers/drv_sdcard.c b/bsp/zynqmp-r5-axu4ev/drivers/drv_sdcard.c index 5c2e72ce29..155b7da552 100644 --- a/bsp/zynqmp-r5-axu4ev/drivers/drv_sdcard.c +++ b/bsp/zynqmp-r5-axu4ev/drivers/drv_sdcard.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -469,4 +469,4 @@ static int rh_hw_emmc_init(void) return -RT_ERROR; } INIT_DEVICE_EXPORT(rh_hw_emmc_init); -#endif
\ No newline at end of file +#endif diff --git a/bsp/zynqmp-r5-axu4ev/drivers/drv_timer.c b/bsp/zynqmp-r5-axu4ev/drivers/drv_timer.c index cf59954d4b..f38e7f294a 100644 --- a/bsp/zynqmp-r5-axu4ev/drivers/drv_timer.c +++ b/bsp/zynqmp-r5-axu4ev/drivers/drv_timer.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2020, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -62,4 +62,4 @@ static int rt_hw_timer_init(void) return RT_EOK; } -INIT_BOARD_EXPORT(rt_hw_timer_init);
\ No newline at end of file +INIT_BOARD_EXPORT(rt_hw_timer_init); diff --git a/bsp/zynqmp-r5-axu4ev/drivers/drv_timer.h b/bsp/zynqmp-r5-axu4ev/drivers/drv_timer.h index f759faf081..3a5d0b7774 100644 --- a/bsp/zynqmp-r5-axu4ev/drivers/drv_timer.h +++ b/bsp/zynqmp-r5-axu4ev/drivers/drv_timer.h @@ -45,4 +45,4 @@ extern "C" { } #endif -#endif
\ No newline at end of file +#endif diff --git a/bsp/zynqmp-r5-axu4ev/drivers/drv_uart.c b/bsp/zynqmp-r5-axu4ev/drivers/drv_uart.c index 84656bcc46..383ae62f32 100644 --- a/bsp/zynqmp-r5-axu4ev/drivers/drv_uart.c +++ b/bsp/zynqmp-r5-axu4ev/drivers/drv_uart.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2020, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -315,4 +315,4 @@ int rt_hw_uart_init(void) return RT_EOK; } -INIT_BOARD_EXPORT(rt_hw_uart_init);
\ No newline at end of file +INIT_BOARD_EXPORT(rt_hw_uart_init); diff --git a/bsp/zynqmp-r5-axu4ev/rtconfig.h b/bsp/zynqmp-r5-axu4ev/rtconfig.h index 2dad29e3c4..8fd898cad6 100644 --- a/bsp/zynqmp-r5-axu4ev/rtconfig.h +++ b/bsp/zynqmp-r5-axu4ev/rtconfig.h @@ -154,7 +154,7 @@ /* light weight TCP/IP stack */ #define RT_USING_LWIP -#define RT_USING_LWIP202 +#define RT_USING_LWIP203 #define RT_LWIP_MEM_ALIGNMENT 32 #define RT_LWIP_IGMP #define RT_LWIP_ICMP |
